forked from OSchip/llvm-project
25 lines
686 B
LLVM
25 lines
686 B
LLVM
; RUN: llc < %s -O0
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; PR 1323
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%struct.comp = type { i8*, i32, i8*, [3 x i8], i32 }
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define void @regbranch() {
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cond_next240.i:
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br i1 false, label %cond_true251.i, label %cond_next272.i
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cond_true251.i: ; preds = %cond_next240.i
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switch i8 0, label %cond_next272.i [
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i8 42, label %bb268.i
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i8 43, label %bb268.i
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i8 63, label %bb268.i
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]
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bb268.i: ; preds = %cond_true251.i, %cond_true251.i, %cond_true251.i
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br label %cond_next272.i
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cond_next272.i: ; preds = %bb268.i, %cond_true251.i, %cond_next240.i
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%len.2.i = phi i32 [ 0, %bb268.i ], [ 0, %cond_next240.i ], [ 0, %cond_true251.i ] ; <i32> [#uses=1]
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%tmp278.i = icmp eq i32 %len.2.i, 1 ; <i1> [#uses=0]
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ret void
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}
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