| .. |
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AsmParser
|
[AMDGPU] Update assembler for HSA Code Object v3
|
2018-06-21 19:38:56 +00:00 |
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Disassembler
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AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
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InstPrinter
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
MCTargetDesc
|
[AMDGPU] Fix layering issue with AMDGPUHSAMetadataStreamer (NFC)
|
2018-07-10 20:07:22 +00:00 |
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TargetInfo
|
Remove \brief commands from doxygen comments.
|
2018-05-01 15:54:18 +00:00 |
|
Utils
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
AMDGPU.h
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AMDGPU: Add pass to lower kernel arguments to loads
|
2018-06-26 19:10:00 +00:00 |
|
AMDGPU.td
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
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AMDGPUAliasAnalysis.cpp
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[AMDGPU] Change constant addr space to 4
|
2018-02-13 18:00:25 +00:00 |
|
AMDGPUAliasAnalysis.h
|
…
|
|
|
AMDGPUAlwaysInlinePass.cpp
|
Reapply "AMDGPU: Force inlining if LDS global address is used"
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2018-07-10 14:03:41 +00:00 |
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AMDGPUAnnotateKernelFeatures.cpp
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AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
AMDGPUAnnotateUniformValues.cpp
|
…
|
|
|
AMDGPUArgumentUsageInfo.cpp
|
AMDGPU/AMDHSA: Remove GridWorkGroupCountX/Y/Z
|
2018-06-21 18:36:04 +00:00 |
|
AMDGPUArgumentUsageInfo.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
AMDGPUAsmPrinter.cpp
|
Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"
|
2018-07-20 09:05:08 +00:00 |
|
AMDGPUAsmPrinter.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
AMDGPUCallLowering.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
AMDGPUCallLowering.h
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AMDGPU/GlobalISel: Implement custom kernel arg lowering
|
2018-07-05 17:01:20 +00:00 |
|
AMDGPUCallingConv.td
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AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
AMDGPUCodeGenPrepare.cpp
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[AMDGPU] Use AssumptionCacheTracker in the divrem32 expansion
|
2018-07-25 17:02:11 +00:00 |
|
AMDGPUFeatures.td
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
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AMDGPUFrameLowering.cpp
|
…
|
|
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AMDGPUFrameLowering.h
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Remove \brief commands from doxygen comments.
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2018-05-01 15:54:18 +00:00 |
|
AMDGPUGISel.td
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AMDGPU/GlobalISel: Implement select() for 32-bit @llvm.minnun and @llvm.maxnum
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2018-07-13 22:16:03 +00:00 |
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AMDGPUGenRegisterBankInfo.def
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AMDGPU/GlobalISel: Fix crash in regbankselect on non-power-of-2 types
|
2018-07-27 06:04:40 +00:00 |
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AMDGPUHSAMetadataStreamer.cpp
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Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"
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2018-07-20 09:05:08 +00:00 |
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AMDGPUHSAMetadataStreamer.h
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Fix -Wmismatched-tags warning
|
2018-07-10 22:09:33 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
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AMDGPUISelLowering.cpp
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AMDGPU: Make fneg combine handle fcanonicalize
|
2018-07-30 12:16:47 +00:00 |
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AMDGPUISelLowering.h
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Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"
|
2018-07-20 09:05:08 +00:00 |
|
AMDGPUInline.cpp
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Revert Enrich inline messages
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2018-07-31 14:47:22 +00:00 |
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AMDGPUInstrInfo.cpp
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AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
AMDGPUInstrInfo.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
AMDGPUInstrInfo.td
|
[AMDGPU] [AMDGPU] Support a fdot2 pattern.
|
2018-07-16 18:19:59 +00:00 |
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AMDGPUInstructionSelector.cpp
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AMDGPU/GlobalISel: Implement select() for 32-bit @llvm.minnun and @llvm.maxnum
|
2018-07-13 22:16:03 +00:00 |
|
AMDGPUInstructionSelector.h
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AMDGPU/GlobalISel: Implement select() for @llvm.amdgcn.exp
|
2018-07-13 21:05:14 +00:00 |
|
AMDGPUInstructions.td
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AMDGPU: Reduce code size with fcanonicalize (fneg x)
|
2018-07-30 12:16:58 +00:00 |
|
AMDGPUIntrinsicInfo.cpp
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[AMDGPU] Update includes for intrinsic changes :(
|
2018-06-23 03:05:39 +00:00 |
|
AMDGPUIntrinsicInfo.h
|
[AMDGPU] Update includes for intrinsic changes :(
|
2018-06-23 03:05:39 +00:00 |
|
AMDGPUIntrinsics.td
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
AMDGPULegalizerInfo.cpp
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AMDGPU/GlobalISel: Legalize G_INSERT
|
2018-07-24 02:19:20 +00:00 |
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AMDGPULegalizerInfo.h
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AMDGPU: Refactor Subtarget classes
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2018-07-11 20:59:01 +00:00 |
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AMDGPULibCalls.cpp
|
Rename DEBUG macro to LLVM_DEBUG.
|
2018-05-14 12:53:11 +00:00 |
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AMDGPULibFunc.cpp
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[AMDGPU] Remove hardcoded address space value from AMDGPULibFunc
|
2017-11-04 17:37:43 +00:00 |
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AMDGPULibFunc.h
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AMDGPU: Fix missing C++ mode comment
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2018-06-20 19:45:40 +00:00 |
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AMDGPULowerIntrinsics.cpp
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AMDGPU: Refactor Subtarget classes
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2018-07-11 20:59:01 +00:00 |
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AMDGPULowerKernelArguments.cpp
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AMDGPU: Stop trying to extend arguments for clover
|
2018-07-28 12:34:25 +00:00 |
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AMDGPULowerKernelAttributes.cpp
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AMDGPU: Add pass to optimize reqd_work_group_size
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2018-05-18 21:35:00 +00:00 |
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AMDGPUMCInstLower.cpp
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AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
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AMDGPUMachineCFGStructurizer.cpp
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AMDGPU: Refactor Subtarget classes
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2018-07-11 20:59:01 +00:00 |
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AMDGPUMachineFunction.cpp
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Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"
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2018-07-20 09:05:08 +00:00 |
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AMDGPUMachineFunction.h
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Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"
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2018-07-20 09:05:08 +00:00 |
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AMDGPUMachineModuleInfo.cpp
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Remove \brief commands from doxygen comments.
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2018-05-01 15:54:18 +00:00 |
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AMDGPUMachineModuleInfo.h
|
Remove \brief commands from doxygen comments.
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2018-05-01 15:54:18 +00:00 |
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AMDGPUMacroFusion.cpp
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AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headers
|
2018-05-22 02:03:23 +00:00 |
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AMDGPUMacroFusion.h
|
…
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|
|
AMDGPUOpenCLEnqueuedBlockLowering.cpp
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[AMDGPU] Change enqueue kernel handle type
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2018-06-13 17:31:51 +00:00 |
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AMDGPUPTNote.h
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AMDGPU/NFC: Move AMDGPU specific note types to ELF.h
|
2017-10-12 18:59:54 +00:00 |
|
AMDGPUPerfHintAnalysis.cpp
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[AMDGPU] Do not consider indirect acces through phi for wave limiter
|
2018-06-11 16:50:49 +00:00 |
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AMDGPUPerfHintAnalysis.h
|
Fix -Winconsistent-missing-overrides in AMDGPU code
|
2018-05-25 17:46:24 +00:00 |
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AMDGPUPromoteAlloca.cpp
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AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
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AMDGPURegAsmNames.inc.cpp
|
…
|
|
|
AMDGPURegisterBankInfo.cpp
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AMDGPU/GlobalISel: Add support for llvm.amdgcn.kernarg.segment.ptr
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2018-06-25 16:17:48 +00:00 |
|
AMDGPURegisterBankInfo.h
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AMDGPU/GlobalISel: Define instruction mapping for G_OR
|
2018-03-01 21:25:25 +00:00 |
|
AMDGPURegisterBanks.td
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AMDGPU/GlobalISel: Define InstrMappings for G_ICMP
|
2018-03-01 19:27:10 +00:00 |
|
AMDGPURegisterInfo.cpp
|
AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headers
|
2018-05-22 02:03:23 +00:00 |
|
AMDGPURegisterInfo.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
AMDGPURegisterInfo.td
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
AMDGPURewriteOutArguments.cpp
|
Rename DEBUG macro to LLVM_DEBUG.
|
2018-05-14 12:53:11 +00:00 |
|
AMDGPUSearchableTables.td
|
AMDGPU: Remove old-style image intrinsics
|
2018-06-21 13:37:45 +00:00 |
|
AMDGPUSubtarget.cpp
|
Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"
|
2018-07-20 09:05:08 +00:00 |
|
AMDGPUSubtarget.h
|
Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"
|
2018-07-20 09:05:08 +00:00 |
|
AMDGPUTargetMachine.cpp
|
run post-RA hazard recognizer pass late
|
2018-07-16 10:02:41 +00:00 |
|
AMDGPUTargetMachine.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
AMDGPUTargetObjectFile.cpp
|
AMDGPU: Fix set but not used warnings related to AMDGPUAS
|
2017-11-01 19:12:38 +00:00 |
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AMDGPUTargetObjectFile.h
|
Remove \brief commands from doxygen comments.
|
2018-05-01 15:54:18 +00:00 |
|
AMDGPUTargetTransformInfo.cpp
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
AMDGPUTargetTransformInfo.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
AMDGPUUnifyDivergentExitNodes.cpp
|
Move Analysis/Utils/Local.h back to Transforms
|
2018-06-04 21:23:21 +00:00 |
|
AMDGPUUnifyMetadata.cpp
|
Remove \brief commands from doxygen comments.
|
2018-05-01 15:54:18 +00:00 |
|
AMDILCFGStructurizer.cpp
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
AMDKernelCodeT.h
|
Remove @brief commands from doxygen comments, too.
|
2018-05-01 16:10:38 +00:00 |
|
BUFInstructions.td
|
AMDGPU: Turn D16 for MIMG instructions into a regular operand
|
2018-06-21 13:36:01 +00:00 |
|
CMakeLists.txt
|
[AMDGPU] Fix layering issue with AMDGPUHSAMetadataStreamer (NFC)
|
2018-07-10 20:07:22 +00:00 |
|
CaymanInstructions.td
|
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
|
2017-12-07 10:40:31 +00:00 |
|
DSInstructions.td
|
AMDGPU: Add patterns for i32/i64 local atomic load/store
|
2018-06-22 08:39:52 +00:00 |
|
EvergreenInstructions.td
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
FLATInstructions.td
|
AMDGPU: Make various NamedOperands upper case
|
2018-06-04 14:45:20 +00:00 |
|
GCNHazardRecognizer.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
GCNHazardRecognizer.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
GCNILPSched.cpp
|
Rename DEBUG macro to LLVM_DEBUG.
|
2018-05-14 12:53:11 +00:00 |
|
GCNIterativeScheduler.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
GCNIterativeScheduler.h
|
AMDGPU: Partial ILP scheduler port from SelectionDAG to SchedulingDAG (experimental)
|
2017-11-20 14:35:53 +00:00 |
|
GCNMinRegStrategy.cpp
|
Rename DEBUG macro to LLVM_DEBUG.
|
2018-05-14 12:53:11 +00:00 |
|
GCNProcessors.td
|
AMDGPU: Add Vega12 and Vega20
|
2018-04-30 19:08:16 +00:00 |
|
GCNRegPressure.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
GCNRegPressure.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
GCNSchedStrategy.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
GCNSchedStrategy.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
LLVMBuild.txt
|
…
|
|
|
MIMGInstructions.td
|
AMDGPU: Remove redundant MIMG instruction variants
|
2018-06-21 13:37:55 +00:00 |
|
R600.td
|
Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"
|
2018-07-20 09:05:08 +00:00 |
|
R600AsmPrinter.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
R600AsmPrinter.h
|
AMDGPU: Split R600 AsmPrinter code into its own class
|
2018-05-24 20:02:01 +00:00 |
|
R600ClauseMergePass.cpp
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600ControlFlowFinalizer.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
R600Defines.h
|
Remove \brief commands from doxygen comments.
|
2018-05-01 15:54:18 +00:00 |
|
R600EmitClauseMarkers.cpp
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600ExpandSpecialInstrs.cpp
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600FrameLowering.cpp
|
…
|
|
|
R600FrameLowering.h
|
…
|
|
|
R600ISelLowering.cpp
|
Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"
|
2018-07-20 09:05:08 +00:00 |
|
R600ISelLowering.h
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600InstrFormats.td
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
R600InstrInfo.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
R600InstrInfo.h
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600Instructions.td
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600MachineFunctionInfo.cpp
|
…
|
|
|
R600MachineFunctionInfo.h
|
…
|
|
|
R600MachineScheduler.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
R600MachineScheduler.h
|
Remove \brief commands from doxygen comments.
|
2018-05-01 15:54:18 +00:00 |
|
R600OpenCLImageTypeLoweringPass.cpp
|
AMDGPU: Rename OpenCL lowering pass to be R600 specific.
|
2018-05-13 10:04:48 +00:00 |
|
R600OptimizeVectorRegisters.cpp
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600Packetizer.cpp
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600Processors.td
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600RegisterInfo.cpp
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600RegisterInfo.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
R600RegisterInfo.td
|
AMDGPU: Separate R600 and GCN TableGen files
|
2018-06-28 23:47:12 +00:00 |
|
R600Schedule.td
|
…
|
|
|
R700Instructions.td
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIAnnotateControlFlow.cpp
|
Move Analysis/Utils/Local.h back to Transforms
|
2018-06-04 21:23:21 +00:00 |
|
SIDebuggerInsertNops.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIDefines.h
|
AMDGPU: Turn D16 for MIMG instructions into a regular operand
|
2018-06-21 13:36:01 +00:00 |
|
SIFixSGPRCopies.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIFixVGPRCopies.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIFixWWMLiveness.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIFoldOperands.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIFormMemoryClauses.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIFrameLowering.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIFrameLowering.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIISelLowering.cpp
|
AMDGPU: Break 64-bit arguments into 32-bit pieces
|
2018-07-31 19:29:04 +00:00 |
|
SIISelLowering.h
|
AMDGPU: Stop wasting argument registers with v3i32/v3f32
|
2018-07-28 14:11:34 +00:00 |
|
SIInsertSkips.cpp
|
AMDGPU: Force skip over s_sendmsg and exp instructions
|
2018-07-30 09:23:59 +00:00 |
|
SIInsertWaitcnts.cpp
|
[AMDGPU][Waitcnt] Re-apply fix "comparison of integers of different signs" build error"
|
2018-07-16 10:21:36 +00:00 |
|
SIInstrFormats.td
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIInstrInfo.cpp
|
AMDGPU: Force skip over s_sendmsg and exp instructions
|
2018-07-30 09:23:59 +00:00 |
|
SIInstrInfo.h
|
AMDGPU: Force skip over s_sendmsg and exp instructions
|
2018-07-30 09:23:59 +00:00 |
|
SIInstrInfo.td
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIInstructions.td
|
AMDGPU: Reduce code size with fcanonicalize (fneg x)
|
2018-07-30 12:16:58 +00:00 |
|
SIIntrinsics.td
|
…
|
|
|
SILoadStoreOptimizer.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SILowerControlFlow.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SILowerI1Copies.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIMachineFunctionInfo.cpp
|
Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"
|
2018-07-20 09:05:08 +00:00 |
|
SIMachineFunctionInfo.h
|
AMDGPU/AMDHSA: Remove GridWorkGroupCountX/Y/Z
|
2018-06-21 18:36:04 +00:00 |
|
SIMachineScheduler.cpp
|
AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headers
|
2018-05-22 02:03:23 +00:00 |
|
SIMachineScheduler.h
|
Remove \brief commands from doxygen comments.
|
2018-05-01 15:54:18 +00:00 |
|
SIMemoryLegalizer.cpp
|
run post-RA hazard recognizer pass late
|
2018-07-16 10:02:41 +00:00 |
|
SIOptimizeExecMasking.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIOptimizeExecMaskingPreRA.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIPeepholeSDWA.cpp
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIProgramInfo.h
|
[AMDGPU] Refactor HSAMetadataStream::emitKernel (NFC)
|
2018-07-10 17:31:32 +00:00 |
|
SIRegisterInfo.cpp
|
[AMDGPU] Fix VGPR spills where offset doesn't fit in 12 bits
|
2018-07-26 19:47:51 +00:00 |
|
SIRegisterInfo.h
|
AMDGPU: Refactor Subtarget classes
|
2018-07-11 20:59:01 +00:00 |
|
SIRegisterInfo.td
|
AMDGPU: Make v4i16/v4f16 legal
|
2018-06-15 15:15:46 +00:00 |
|
SISchedule.td
|
[SchedModel] Complete models shouldn't match against itineraries when they don't use them (PR35639)
|
2018-04-05 13:11:36 +00:00 |
|
SIShrinkInstructions.cpp
|
AMDGPU: Use existing function to check for VGPRs
|
2018-07-20 21:20:36 +00:00 |
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SIWholeQuadMode.cpp
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AMDGPU: Refactor Subtarget classes
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2018-07-11 20:59:01 +00:00 |
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SMInstructions.td
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[AMDGPU][MC][VI][GFX9] Added s_atc_probe* instructions
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2018-04-06 15:48:39 +00:00 |
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SOPInstructions.td
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[AMDGPU][MC][GFX9] Added instructions s_mul_hi_*32, s_lshl*_add_u32
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2018-04-09 13:10:33 +00:00 |
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VIInstrFormats.td
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…
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VIInstructions.td
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…
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VOP1Instructions.td
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[AMDGPU] Convert rcp to rcp_iflag
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2018-06-27 15:33:33 +00:00 |
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VOP2Instructions.td
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AMDGPU: Add Vega12 and Vega20
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2018-04-30 19:08:16 +00:00 |
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VOP3Instructions.td
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[AMDGPU] DAG combine to produce V_PERM_B32
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2018-06-12 23:50:37 +00:00 |
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VOP3PInstructions.td
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[AMDGPU] [AMDGPU] Support a fdot2 pattern.
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2018-07-16 18:19:59 +00:00 |
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VOPCInstructions.td
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[AMDGPU][MC] Corrected default values for unused SDWA operands
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2018-03-16 15:40:27 +00:00 |
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VOPInstructions.td
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AMDGPU: Introduce common SOP_Pseudo and VOP_Pseudo TableGen base classes
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2018-03-26 13:56:53 +00:00 |
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