forked from OSchip/llvm-project
72 lines
1.9 KiB
LLVM
72 lines
1.9 KiB
LLVM
; RUN: llc < %s -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s -check-prefix=ARM
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; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s -check-prefix=ARM
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; RUN: llc < %s -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s -check-prefix=THUMBTWO
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; RUN: llc < %s -mtriple=thumbv6-apple-ios | FileCheck %s -check-prefix=THUMBONE
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; RUN: llc < %s -mtriple=armv4-apple-ios | FileCheck %s -check-prefix=ARMV4
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define void @test1(i32* %ptr, i32 %val1) {
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; ARM: test1
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; ARM: dmb {{ish$}}
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; ARM-NEXT: str
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; ARM-NEXT: dmb {{ish$}}
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; THUMBONE: test1
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; THUMBONE: __sync_lock_test_and_set_4
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; THUMBTWO: test1
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; THUMBTWO: dmb {{ish$}}
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; THUMBTWO-NEXT: str
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; THUMBTWO-NEXT: dmb {{ish$}}
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store atomic i32 %val1, i32* %ptr seq_cst, align 4
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ret void
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}
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define i32 @test2(i32* %ptr) {
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; ARM: test2
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; ARM: ldr
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; ARM-NEXT: dmb {{ish$}}
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; THUMBONE: test2
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; THUMBONE: __sync_val_compare_and_swap_4
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; THUMBTWO: test2
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; THUMBTWO: ldr
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; THUMBTWO-NEXT: dmb {{ish$}}
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%val = load atomic i32* %ptr seq_cst, align 4
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ret i32 %val
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}
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define void @test3(i8* %ptr1, i8* %ptr2) {
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; ARM: test3
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; ARM: ldrb
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; ARM: strb
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; THUMBTWO: test3
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; THUMBTWO: ldrb
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; THUMBTWO: strb
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; THUMBONE: test3
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; THUMBONE: ldrb
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; THUMBONE: strb
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%val = load atomic i8* %ptr1 unordered, align 1
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store atomic i8 %val, i8* %ptr2 unordered, align 1
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ret void
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}
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define void @test4(i8* %ptr1, i8* %ptr2) {
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; THUMBONE: test4
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; THUMBONE: ___sync_val_compare_and_swap_1
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; THUMBONE: ___sync_lock_test_and_set_1
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%val = load atomic i8* %ptr1 seq_cst, align 1
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store atomic i8 %val, i8* %ptr2 seq_cst, align 1
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ret void
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}
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define i64 @test_old_load_64bit(i64* %p) {
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; ARMV4: test_old_load_64bit
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; ARMV4: ___sync_val_compare_and_swap_8
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%1 = load atomic i64* %p seq_cst, align 8
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ret i64 %1
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}
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define void @test_old_store_64bit(i64* %p, i64 %v) {
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; ARMV4: test_old_store_64bit
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; ARMV4: ___sync_lock_test_and_set_8
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store atomic i64 %v, i64* %p seq_cst, align 8
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ret void
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}
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