forked from OSchip/llvm-project
21 lines
783 B
TableGen
21 lines
783 B
TableGen
//===-- R700Instructions.td - R700 Instruction defs -------*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// TableGen definitions for instructions which are:
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// - Available to R700 and newer VLIW4/VLIW5 GPUs
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// - Available only on R700 family GPUs.
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//
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//===----------------------------------------------------------------------===//
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def isR700 : Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::R700">;
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let Predicates = [isR700] in {
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def SIN_r700 : SIN_Common<0x6E>;
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def COS_r700 : COS_Common<0x6F>;
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}
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