llvm-project/llvm
Chandler Carruth 2ce191e220 [x86] Fix a really subtle miscompile due to a somewhat glaring bug in
EFLAGS copy lowering.

If you have a branch of LLVM, you may want to cherrypick this. It is
extremely unlikely to hit this case empirically, but it will likely
manifest as an "impossible" branch being taken somewhere, and will be
... very hard to debug.

Hitting this requires complex conditions living across complex control
flow combined with some interesting memory (non-stack) initialized with
the results of a comparison. Also, because you have to arrange for an
EFLAGS copy to be in *just* the right place, almost anything you do to
the code will hide the bug. I was unable to reduce anything remotely
resembling a "good" test case from the place where I hit it, and so
instead I have constructed synthetic MIR testing that directly exercises
the bug in question (as well as the good behavior for completeness).

The issue is that we would mistakenly assume any SETcc with a valid
condition and an initial operand that was a register and a virtual
register at that to be a register *defining* SETcc...

It isn't though....

This would in turn cause us to test some other bizarre register,
typically the base pointer of some memory. Now, testing this register
and using that to branch on doesn't make any sense. It even fails the
machine verifier (if you are running it) due to the wrong register
class. But it will make it through LLVM, assemble, and it *looks*
fine... But wow do you get a very unsual and surprising branch taken in
your actual code.

The fix is to actually check what kind of SETcc instruction we're
dealing with. Because there are a bunch of them, I just test the
may-store bit in the instruction. I've also added an assert for sanity
that ensure we are, in fact, *defining* the register operand. =D

llvm-svn: 338481
2018-08-01 03:01:58 +00:00
..
bindings
cmake [CMake] Followup for r337366: Only export LLVM_LINK_LLVM_DYLIB if it's set to ON 2018-07-27 10:57:51 +00:00
docs [llvm-mca][docs] Replace "temporary" with "physical registers". NFC. 2018-07-31 18:59:46 +00:00
examples
include [DebugInfo] Generate fixups as emitting DWARF .debug_line. 2018-08-01 02:18:06 +00:00
lib [x86] Fix a really subtle miscompile due to a somewhat glaring bug in 2018-08-01 03:01:58 +00:00
projects
resources
runtimes Revert "[CMake] Pass Clang defaults to runtimes builds" 2018-07-13 20:01:55 +00:00
test [x86] Fix a really subtle miscompile due to a somewhat glaring bug in 2018-08-01 03:01:58 +00:00
tools [llvm-objcopy] Make --strip-debug strip .gdb_index 2018-07-31 21:26:35 +00:00
unittests [CodeView] Minimal support for S_UNAMESPACE records 2018-07-31 19:15:50 +00:00
utils Revert r338365: [X86] Improved sched models for X86 BT*rr instructions. 2018-07-31 13:00:51 +00:00
.arcconfig
.clang-format
.clang-tidy
.gitattributes
.gitignore
CMakeLists.txt Add PerfJITEventListener for perf profiling support. 2018-07-24 00:54:06 +00:00
CODE_OWNERS.TXT
CREDITS.TXT
LICENSE.TXT
LLVMBuild.txt
README.txt
RELEASE_TESTERS.TXT
configure
llvm.spec.in

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