forked from OSchip/llvm-project
55 lines
1.9 KiB
LLVM
55 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver4 | FileCheck %s
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define <4 x i32> @rot_v4i32_splat(<4 x i32> %x) {
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; CHECK-LABEL: rot_v4i32_splat:
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; CHECK: # BB#0:
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; CHECK-NEXT: vprotd $31, %xmm0, %xmm0
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; CHECK-NEXT: retq
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%1 = lshr <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>
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%2 = shl <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
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%3 = or <4 x i32> %1, %2
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ret <4 x i32> %3
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}
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define <4 x i32> @rot_v4i32_non_splat(<4 x i32> %x) {
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; CHECK-LABEL: rot_v4i32_non_splat:
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; CHECK: # BB#0:
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; CHECK-NEXT: vprotd {{.*}}(%rip), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%1 = lshr <4 x i32> %x, <i32 1, i32 2, i32 3, i32 4>
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%2 = shl <4 x i32> %x, <i32 31, i32 30, i32 29, i32 28>
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%3 = or <4 x i32> %1, %2
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ret <4 x i32> %3
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}
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define <4 x i32> @rot_v4i32_splat_2masks(<4 x i32> %x) {
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; CHECK-LABEL: rot_v4i32_splat_2masks:
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; CHECK: # BB#0:
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; CHECK-NEXT: vprotd $31, %xmm0, %xmm0
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; CHECK-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%1 = lshr <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>
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%2 = and <4 x i32> %1, <i32 4294901760, i32 4294901760, i32 4294901760, i32 4294901760>
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%3 = shl <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
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%4 = and <4 x i32> %3, <i32 0, i32 4294901760, i32 0, i32 4294901760>
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%5 = or <4 x i32> %2, %4
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ret <4 x i32> %5
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}
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define <4 x i32> @rot_v4i32_non_splat_2masks(<4 x i32> %x) {
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; CHECK-LABEL: rot_v4i32_non_splat_2masks:
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; CHECK: # BB#0:
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; CHECK-NEXT: vprotd {{.*}}(%rip), %xmm0, %xmm0
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; CHECK-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%1 = lshr <4 x i32> %x, <i32 1, i32 2, i32 3, i32 4>
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%2 = and <4 x i32> %1, <i32 4294901760, i32 4294901760, i32 4294901760, i32 4294901760>
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%3 = shl <4 x i32> %x, <i32 31, i32 30, i32 29, i32 28>
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%4 = and <4 x i32> %3, <i32 0, i32 4294901760, i32 0, i32 4294901760>
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%5 = or <4 x i32> %2, %4
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ret <4 x i32> %5
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}
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