forked from OSchip/llvm-project
49 lines
1.9 KiB
LLVM
49 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
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; compare v2i16
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define <2 x i16> @compare_v2i64_to_v2i16_unary(<2 x i16>* %src) nounwind {
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; X86-LABEL: compare_v2i64_to_v2i16_unary:
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; X86: # %bb.0:
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; X86-NEXT: movaps {{.*#+}} xmm0 = [65535,0,65535,0]
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; X86-NEXT: retl
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;
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; X64-LABEL: compare_v2i64_to_v2i16_unary:
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; X64: # %bb.0:
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; X64-NEXT: movaps {{.*#+}} xmm0 = [65535,65535]
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; X64-NEXT: retq
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%val = load <2 x i16>, <2 x i16>* %src, align 4
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%cmp = icmp uge <2 x i16> %val, %val
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%sel = select <2 x i1> %cmp, <2 x i16> <i16 -1, i16 -1>, <2 x i16> zeroinitializer
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ret <2 x i16> %sel
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}
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define <2 x i16> @compare_v2i64_to_v2i16_binary(<2 x i16>* %src0, <2 x i16>* %src1) nounwind {
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; X86-LABEL: compare_v2i64_to_v2i16_binary:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero
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; X86-NEXT: pmovzxwq {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero
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; X86-NEXT: pcmpgtq %xmm0, %xmm1
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; X86-NEXT: pcmpeqd %xmm0, %xmm0
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; X86-NEXT: pxor %xmm1, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: compare_v2i64_to_v2i16_binary:
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; X64: # %bb.0:
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; X64-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero
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; X64-NEXT: pmovzxwq {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero
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; X64-NEXT: pcmpgtq %xmm0, %xmm1
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; X64-NEXT: pcmpeqd %xmm0, %xmm0
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; X64-NEXT: pxor %xmm1, %xmm0
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; X64-NEXT: retq
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%val0 = load <2 x i16>, <2 x i16>* %src0, align 4
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%val1 = load <2 x i16>, <2 x i16>* %src1, align 4
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%cmp = icmp uge <2 x i16> %val0, %val1
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%sel = select <2 x i1> %cmp, <2 x i16> <i16 -1, i16 -1>, <2 x i16> zeroinitializer
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ret <2 x i16> %sel
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}
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