forked from OSchip/llvm-project
788 lines
49 KiB
LLVM
788 lines
49 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86,AVX2,X86-AVX2
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X86,AVX512,X86-AVX512
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64,AVX2,X64-AVX2
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X64,AVX512,X64-AVX512
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declare <8 x i32> @llvm.x86.avx2.permd(<8 x i32>, <8 x i32>)
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declare <8 x float> @llvm.x86.avx2.permps(<8 x float>, <8 x i32>)
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declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>)
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declare <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8>, <32 x i8>)
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define <32 x i8> @combine_pshufb_pslldq(<32 x i8> %a0) {
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; CHECK-LABEL: combine_pshufb_pslldq:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: ret{{[l|q]}}
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%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)
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%2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>
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ret <32 x i8> %2
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}
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define <32 x i8> @combine_pshufb_psrldq(<32 x i8> %a0) {
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; CHECK-LABEL: combine_pshufb_psrldq:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: ret{{[l|q]}}
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%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128>)
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%2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32>
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ret <32 x i8> %2
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}
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define <32 x i8> @combine_pshufb_vpermd(<8 x i32> %a) {
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; CHECK-LABEL: combine_pshufb_vpermd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,16,17,18,18]
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; CHECK-NEXT: ret{{[l|q]}}
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%tmp0 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 4>)
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%tmp1 = bitcast <8 x i32> %tmp0 to <32 x i8>
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%tmp2 = shufflevector <32 x i8> %tmp1, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 30>
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ret <32 x i8> %tmp2
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}
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define <32 x i8> @combine_pshufb_vpermps(<8 x float> %a) {
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; CHECK-LABEL: combine_pshufb_vpermps:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,16,17,18,18]
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; CHECK-NEXT: ret{{[l|q]}}
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%tmp0 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 4>)
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%tmp1 = bitcast <8 x float> %tmp0 to <32 x i8>
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%tmp2 = shufflevector <32 x i8> %tmp1, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 30>
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ret <32 x i8> %tmp2
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}
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define <32 x i8> @combine_and_pshufb(<32 x i8> %a0) {
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; CHECK-LABEL: combine_and_pshufb:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; CHECK-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7],ymm0[8],ymm1[9,10,11],ymm0[12],ymm1[13,14,15]
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; CHECK-NEXT: ret{{[l|q]}}
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%1 = shufflevector <32 x i8> %a0, <32 x i8> zeroinitializer, <32 x i32> <i32 0, i32 1, i32 32, i32 32, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
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%2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
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ret <32 x i8> %2
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}
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define <32 x i8> @combine_pshufb_and(<32 x i8> %a0) {
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; CHECK-LABEL: combine_pshufb_and:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; CHECK-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7],ymm0[8],ymm1[9,10,11],ymm0[12],ymm1[13,14,15]
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; CHECK-NEXT: ret{{[l|q]}}
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%1 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
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%2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 0, i32 1, i32 32, i32 32, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
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ret <32 x i8> %2
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}
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define <4 x i64> @combine_permq_pshufb_as_vperm2i128(<4 x i64> %a0) {
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; X86-LABEL: combine_permq_pshufb_as_vperm2i128:
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; X86: # %bb.0:
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; X86-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[2,3],zero,zero
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; X86-NEXT: vpaddq {{\.LCPI.*}}, %ymm0, %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: combine_permq_pshufb_as_vperm2i128:
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; X64: # %bb.0:
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; X64-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[2,3],zero,zero
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; X64-NEXT: vpaddq {{.*}}(%rip), %ymm0, %ymm0
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; X64-NEXT: retq
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%1 = shufflevector <4 x i64> %a0, <4 x i64> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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%2 = bitcast <4 x i64> %1 to <32 x i8>
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%3 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255>)
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%4 = bitcast <32 x i8> %3 to <4 x i64>
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%5 = add <4 x i64> %4, <i64 1, i64 1, i64 3, i64 3>
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ret <4 x i64> %5
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}
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define <8 x i32> @combine_as_vpermd(<8 x i32> %a0) {
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; CHECK-LABEL: combine_as_vpermd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vmovaps {{.*#+}} ymm1 = [4,5,4,5,6,7,0,7]
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; CHECK-NEXT: vpermps %ymm0, %ymm1, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%1 = shufflevector <8 x i32> %a0, <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
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%2 = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6>)
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%3 = shufflevector <8 x i32> %1, <8 x i32> %2, <8 x i32> <i32 0, i32 8, i32 9, i32 1, i32 15, i32 14, i32 4, i32 3>
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ret <8 x i32> %3
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}
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define <8 x float> @combine_as_vpermps(<8 x float> %a0) {
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; CHECK-LABEL: combine_as_vpermps:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vmovaps {{.*#+}} ymm1 = <6,4,7,5,1,u,4,7>
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; CHECK-NEXT: vpermps %ymm0, %ymm1, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%1 = shufflevector <8 x float> %a0, <8 x float> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>
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%2 = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 1, i32 undef, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>)
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%3 = shufflevector <8 x float> %1, <8 x float> %2, <8 x i32> <i32 15, i32 0, i32 14, i32 1, i32 8, i32 9, i32 4, i32 3>
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ret <8 x float> %3
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}
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define <32 x i8> @combine_permq_pshufb_as_vpblendd(<4 x i64> %a0) {
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; CHECK-LABEL: combine_permq_pshufb_as_vpblendd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; CHECK-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7]
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; CHECK-NEXT: ret{{[l|q]}}
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%1 = shufflevector <4 x i64> %a0, <4 x i64> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
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%2 = bitcast <4 x i64> %1 to <32 x i8>
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%3 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255>)
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ret <32 x i8> %3
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}
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define <16 x i8> @combine_pshufb_as_vpbroadcastb128(<16 x i8> %a) {
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; CHECK-LABEL: combine_pshufb_as_vpbroadcastb128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpbroadcastb %xmm0, %xmm0
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; CHECK-NEXT: ret{{[l|q]}}
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%1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a, <16 x i8> zeroinitializer)
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ret <16 x i8> %1
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}
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define <32 x i8> @combine_pshufb_as_vpbroadcastb256(<2 x i64> %a) {
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; CHECK-LABEL: combine_pshufb_as_vpbroadcastb256:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpbroadcastb %xmm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%1 = shufflevector <2 x i64> %a, <2 x i64> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
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%2 = bitcast <4 x i64> %1 to <32 x i8>
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%3 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> zeroinitializer)
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%4 = bitcast <32 x i8> %3 to <8 x i32>
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%5 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %4, <8 x i32> zeroinitializer)
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%6 = bitcast <8 x i32> %5 to <32 x i8>
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ret <32 x i8> %6
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}
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define <16 x i8> @combine_pshufb_as_vpbroadcastw128(<16 x i8> %a) {
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; CHECK-LABEL: combine_pshufb_as_vpbroadcastw128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpbroadcastw %xmm0, %xmm0
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; CHECK-NEXT: ret{{[l|q]}}
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%1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a, <16 x i8> <i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1>)
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ret <16 x i8> %1
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}
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define <32 x i8> @combine_pshufb_as_vpbroadcastw256(<2 x i64> %a) {
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; CHECK-LABEL: combine_pshufb_as_vpbroadcastw256:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpbroadcastw %xmm0, %ymm0
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; CHECK-NEXT: ret{{[l|q]}}
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%1 = shufflevector <2 x i64> %a, <2 x i64> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
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%2 = bitcast <4 x i64> %1 to <32 x i8>
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%3 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1>)
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%4 = bitcast <32 x i8> %3 to <8 x i32>
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%5 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %4, <8 x i32> zeroinitializer)
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%6 = bitcast <8 x i32> %5 to <32 x i8>
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ret <32 x i8> %6
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}
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define <16 x i8> @combine_pshufb_as_vpbroadcastd128(<16 x i8> %a) {
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; X86-LABEL: combine_pshufb_as_vpbroadcastd128:
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; X86: # %bb.0:
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; X86-NEXT: vpbroadcastd %xmm0, %xmm0
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; X86-NEXT: vpaddb {{\.LCPI.*}}, %xmm0, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: combine_pshufb_as_vpbroadcastd128:
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; X64: # %bb.0:
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; X64-NEXT: vpbroadcastd %xmm0, %xmm0
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; X64-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0
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; X64-NEXT: retq
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%1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>)
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%2 = add <16 x i8> %1, <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>
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ret <16 x i8> %2
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}
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define <8 x i32> @combine_permd_as_vpbroadcastd256(<4 x i32> %a) {
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; X86-LABEL: combine_permd_as_vpbroadcastd256:
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; X86: # %bb.0:
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; X86-NEXT: vpbroadcastd %xmm0, %ymm0
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; X86-NEXT: vpaddd {{\.LCPI.*}}, %ymm0, %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: combine_permd_as_vpbroadcastd256:
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; X64: # %bb.0:
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; X64-NEXT: vpbroadcastd %xmm0, %ymm0
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; X64-NEXT: vpaddd {{.*}}(%rip), %ymm0, %ymm0
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; X64-NEXT: retq
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%1 = shufflevector <4 x i32> %a, <4 x i32> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%2 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %1, <8 x i32> zeroinitializer)
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%3 = add <8 x i32> %2, <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
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ret <8 x i32> %3
|
|
}
|
|
|
|
define <16 x i8> @combine_pshufb_as_vpbroadcastq128(<16 x i8> %a) {
|
|
; CHECK-LABEL: combine_pshufb_as_vpbroadcastq128:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)
|
|
ret <16 x i8> %1
|
|
}
|
|
|
|
define <8 x i32> @combine_permd_as_vpbroadcastq256(<4 x i32> %a) {
|
|
; X86-LABEL: combine_permd_as_vpbroadcastq256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: vpbroadcastq %xmm0, %ymm0
|
|
; X86-NEXT: vpaddd {{\.LCPI.*}}, %ymm0, %ymm0
|
|
; X86-NEXT: retl
|
|
;
|
|
; X64-LABEL: combine_permd_as_vpbroadcastq256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vpbroadcastq %xmm0, %ymm0
|
|
; X64-NEXT: vpaddd {{.*}}(%rip), %ymm0, %ymm0
|
|
; X64-NEXT: retq
|
|
%1 = shufflevector <4 x i32> %a, <4 x i32> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
%2 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %1, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>)
|
|
%3 = add <8 x i32> %2, <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
|
|
ret <8 x i32> %3
|
|
}
|
|
|
|
define <4 x float> @combine_pshufb_as_vpbroadcastss128(<4 x float> %a) {
|
|
; CHECK-LABEL: combine_pshufb_as_vpbroadcastss128:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vbroadcastss %xmm0, %xmm0
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = bitcast <4 x float> %a to <16 x i8>
|
|
%2 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>)
|
|
%3 = bitcast <16 x i8> %2 to <4 x float>
|
|
ret <4 x float> %3
|
|
}
|
|
|
|
define <8 x float> @combine_permps_as_vpbroadcastss256(<4 x float> %a) {
|
|
; CHECK-LABEL: combine_permps_as_vpbroadcastss256:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vbroadcastss %xmm0, %ymm0
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = shufflevector <4 x float> %a, <4 x float> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
%2 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %1, <8 x i32> zeroinitializer)
|
|
ret <8 x float> %2
|
|
}
|
|
|
|
define <4 x double> @combine_permps_as_vpbroadcastsd256(<2 x double> %a) {
|
|
; CHECK-LABEL: combine_permps_as_vpbroadcastsd256:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vbroadcastsd %xmm0, %ymm0
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = shufflevector <2 x double> %a, <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
|
|
%2 = bitcast <4 x double> %1 to <8 x float>
|
|
%3 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %2, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>)
|
|
%4 = bitcast <8 x float> %3 to <4 x double>
|
|
ret <4 x double> %4
|
|
}
|
|
|
|
define <16 x i8> @combine_vpbroadcast_pshufb_as_vpbroadcastb128(<16 x i8> %a) {
|
|
; CHECK-LABEL: combine_vpbroadcast_pshufb_as_vpbroadcastb128:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpbroadcastb %xmm0, %xmm0
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> zeroinitializer
|
|
%2 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> zeroinitializer)
|
|
ret <16 x i8> %2
|
|
}
|
|
|
|
define <32 x i8> @combine_vpbroadcast_pshufb_as_vpbroadcastb256(<32 x i8> %a) {
|
|
; CHECK-LABEL: combine_vpbroadcast_pshufb_as_vpbroadcastb256:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpbroadcastb %xmm0, %ymm0
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = shufflevector <32 x i8> %a, <32 x i8> undef, <32 x i32> zeroinitializer
|
|
%2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> zeroinitializer)
|
|
ret <32 x i8> %2
|
|
}
|
|
|
|
define <4 x float> @combine_vpbroadcast_pshufb_as_vpbroadcastss128(<4 x float> %a) {
|
|
; CHECK-LABEL: combine_vpbroadcast_pshufb_as_vpbroadcastss128:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vbroadcastss %xmm0, %xmm0
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> zeroinitializer
|
|
%2 = bitcast <4 x float> %1 to <16 x i8>
|
|
%3 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %2, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>)
|
|
%4 = bitcast <16 x i8> %3 to <4 x float>
|
|
ret <4 x float> %4
|
|
}
|
|
|
|
define <8 x float> @combine_vpbroadcast_permd_as_vpbroadcastss256(<4 x float> %a) {
|
|
; CHECK-LABEL: combine_vpbroadcast_permd_as_vpbroadcastss256:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vbroadcastss %xmm0, %ymm0
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = shufflevector <4 x float> %a, <4 x float> undef, <8 x i32> zeroinitializer
|
|
%2 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %1, <8 x i32> zeroinitializer)
|
|
ret <8 x float> %2
|
|
}
|
|
|
|
define <4 x double> @combine_vpbroadcast_permd_as_vpbroadcastsd256(<2 x double> %a) {
|
|
; CHECK-LABEL: combine_vpbroadcast_permd_as_vpbroadcastsd256:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vbroadcastsd %xmm0, %ymm0
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = shufflevector <2 x double> %a, <2 x double> undef, <4 x i32> zeroinitializer
|
|
%2 = bitcast <4 x double> %1 to <8 x float>
|
|
%3 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %2, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>)
|
|
%4 = bitcast <8 x float> %3 to <4 x double>
|
|
ret <4 x double> %4
|
|
}
|
|
|
|
define <8 x i32> @combine_permd_as_permq(<8 x i32> %a) {
|
|
; CHECK-LABEL: combine_permd_as_permq:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,1]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a, <8 x i32> <i32 0, i32 1, i32 4, i32 5, i32 4, i32 5, i32 2, i32 3>)
|
|
ret <8 x i32> %1
|
|
}
|
|
|
|
define <8 x float> @combine_permps_as_permpd(<8 x float> %a) {
|
|
; CHECK-LABEL: combine_permps_as_permpd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[3,2,0,1]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a, <8 x i32> <i32 6, i32 7, i32 4, i32 5, i32 0, i32 1, i32 2, i32 3>)
|
|
ret <8 x float> %1
|
|
}
|
|
|
|
define <4 x i64> @combine_pshufb_as_zext(<32 x i8> %a0) {
|
|
; CHECK-LABEL: combine_pshufb_as_zext:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpmovzxwq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
|
%2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 10, i8 11, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 4, i8 5, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 6, i8 7, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
|
|
%3 = bitcast <32 x i8> %2 to <4 x i64>
|
|
ret <4 x i64> %3
|
|
}
|
|
|
|
define <4 x i64> @combine_pshufb_as_zext128(<32 x i8> %a0) {
|
|
; CHECK-LABEL: combine_pshufb_as_zext128:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
|
|
; CHECK-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,1,0,1]
|
|
; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[15,14],zero,zero,zero,zero,zero,zero,ymm0[13,12],zero,zero,zero,zero,zero,zero,ymm0[31,30],zero,zero,zero,zero,zero,zero,ymm0[29,28],zero,zero,zero,zero,zero,zero
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
|
|
%2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 15, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 13, i8 12, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 15, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 13, i8 12, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
|
|
%3 = bitcast <32 x i8> %2 to <4 x i64>
|
|
ret <4 x i64> %3
|
|
}
|
|
|
|
define <4 x double> @combine_pshufb_as_vzmovl_64(<4 x double> %a0) {
|
|
; CHECK-LABEL: combine_pshufb_as_vzmovl_64:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1
|
|
; CHECK-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = bitcast <4 x double> %a0 to <32 x i8>
|
|
%2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
|
|
%3 = bitcast <32 x i8> %2 to <4 x double>
|
|
ret <4 x double> %3
|
|
}
|
|
|
|
define <8 x float> @combine_pshufb_as_vzmovl_32(<8 x float> %a0) {
|
|
; CHECK-LABEL: combine_pshufb_as_vzmovl_32:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1
|
|
; CHECK-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = bitcast <8 x float> %a0 to <32 x i8>
|
|
%2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
|
|
%3 = bitcast <32 x i8> %2 to <8 x float>
|
|
ret <8 x float> %3
|
|
}
|
|
|
|
define <32 x i8> @combine_pshufb_as_pslldq(<32 x i8> %a0) {
|
|
; CHECK-LABEL: combine_pshufb_as_pslldq:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpslldq {{.*#+}} ymm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm0[0,1,2,3,4,5],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,18,19,20,21]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5>)
|
|
ret <32 x i8> %res0
|
|
}
|
|
|
|
define <32 x i8> @combine_pshufb_as_psrldq(<32 x i8> %a0) {
|
|
; CHECK-LABEL: combine_pshufb_as_psrldq:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpsrldq {{.*#+}} ymm0 = ymm0[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm0[31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128>)
|
|
ret <32 x i8> %res0
|
|
}
|
|
|
|
define <32 x i8> @combine_pshufb_as_psrlw(<32 x i8> %a0) {
|
|
; CHECK-LABEL: combine_pshufb_as_psrlw:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpsrlw $8, %ymm0, %ymm0
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 1, i8 128, i8 3, i8 128, i8 5, i8 128, i8 7, i8 128, i8 9, i8 128, i8 11, i8 128, i8 13, i8 128, i8 15, i8 128, i8 17, i8 128, i8 19, i8 128, i8 21, i8 128, i8 23, i8 128, i8 25, i8 128, i8 27, i8 128, i8 29, i8 128, i8 31, i8 128>)
|
|
ret <32 x i8> %res0
|
|
}
|
|
|
|
define <32 x i8> @combine_pshufb_as_pslld(<32 x i8> %a0) {
|
|
; CHECK-LABEL: combine_pshufb_as_pslld:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpslld $24, %ymm0, %ymm0
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 128, i8 128, i8 128, i8 0, i8 128, i8 128, i8 128, i8 4, i8 128, i8 128, i8 128, i8 8, i8 128, i8 128, i8 128, i8 12, i8 128, i8 128, i8 128, i8 16, i8 128, i8 128, i8 128, i8 20, i8 128, i8 128, i8 128, i8 24, i8 128, i8 128, i8 128, i8 28>)
|
|
ret <32 x i8> %res0
|
|
}
|
|
|
|
define <32 x i8> @combine_pshufb_as_psrlq(<32 x i8> %a0) {
|
|
; CHECK-LABEL: combine_pshufb_as_psrlq:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpsrlq $40, %ymm0, %ymm0
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 5, i8 6, i8 7, i8 128, i8 128, i8 128, i8 128, i8 128, i8 13, i8 14, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 21, i8 22, i8 23, i8 128, i8 128, i8 128, i8 128, i8 128, i8 29, i8 30, i8 31, i8 128, i8 128, i8 128, i8 128, i8 128>)
|
|
ret <32 x i8> %res0
|
|
}
|
|
|
|
define <32 x i8> @combine_pshufb_as_pshuflw(<32 x i8> %a0) {
|
|
; CHECK-LABEL: combine_pshufb_as_pshuflw:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[1,0,3,2,4,5,6,7,9,8,11,10,12,13,14,15]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 2, i8 3, i8 0, i8 1, i8 6, i8 7, i8 4, i8 5, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 2, i8 3, i8 0, i8 1, i8 6, i8 7, i8 4, i8 5, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)
|
|
ret <32 x i8> %res0
|
|
}
|
|
|
|
define <32 x i8> @combine_pshufb_as_pshufhw(<32 x i8> %a0) {
|
|
; CHECK-LABEL: combine_pshufb_as_pshufhw:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpshufhw {{.*#+}} ymm0 = ymm0[0,1,2,3,5,4,7,6,8,9,10,11,13,12,15,14]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 10, i8 11, i8 8, i8 9, i8 14, i8 15, i8 12, i8 13, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 10, i8 11, i8 8, i8 9, i8 14, i8 15, i8 12, i8 13>)
|
|
ret <32 x i8> %res0
|
|
}
|
|
|
|
define <32 x i8> @combine_pshufb_not_as_pshufw(<32 x i8> %a0) {
|
|
; CHECK-LABEL: combine_pshufb_not_as_pshufw:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[2,3,0,1,6,7,4,5,10,11,8,9,14,15,12,13,18,19,16,17,22,23,20,21,26,27,24,25,30,31,28,29]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 2, i8 3, i8 0, i8 1, i8 6, i8 7, i8 4, i8 5, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 2, i8 3, i8 0, i8 1, i8 6, i8 7, i8 4, i8 5, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)
|
|
%res1 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %res0, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 10, i8 11, i8 8, i8 9, i8 14, i8 15, i8 12, i8 13, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 10, i8 11, i8 8, i8 9, i8 14, i8 15, i8 12, i8 13>)
|
|
ret <32 x i8> %res1
|
|
}
|
|
|
|
define <32 x i8> @combine_pshufb_as_unpacklo_undef(<32 x i8> %a0) {
|
|
; CHECK-LABEL: combine_pshufb_as_unpacklo_undef:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 undef, i8 0, i8 undef, i8 1, i8 undef, i8 2, i8 undef, i8 3, i8 undef, i8 4, i8 undef, i8 5, i8 undef, i8 6, i8 undef, i8 7, i8 undef, i8 16, i8 undef, i8 17, i8 undef, i8 18, i8 undef, i8 19, i8 undef, i8 20, i8 undef, i8 21, i8 undef, i8 22, i8 undef, i8 23>)
|
|
%2 = shufflevector <32 x i8> %1, <32 x i8> undef, <32 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14, i32 16, i32 16, i32 18, i32 18, i32 20, i32 20, i32 22, i32 22, i32 24, i32 24, i32 26, i32 26, i32 28, i32 28, i32 30, i32 30>
|
|
ret <32 x i8> %2
|
|
}
|
|
|
|
define <32 x i8> @combine_pshufb_as_unpacklo_zero(<32 x i8> %a0) {
|
|
; CHECK-LABEL: combine_pshufb_as_unpacklo_zero:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1
|
|
; CHECK-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 -1, i8 -1, i8 2, i8 3, i8 -1, i8 -1, i8 4, i8 5, i8 -1, i8 -1, i8 6, i8 7, i8 -1, i8 -1, i8 16, i8 17, i8 -1, i8 -1, i8 18, i8 19, i8 -1, i8 -1, i8 20, i8 21, i8 -1, i8 -1, i8 22, i8 23, i8 -1, i8 -1>)
|
|
ret <32 x i8> %1
|
|
}
|
|
|
|
define <32 x i8> @combine_pshufb_as_unpackhi_zero(<32 x i8> %a0) {
|
|
; CHECK-LABEL: combine_pshufb_as_unpackhi_zero:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1
|
|
; CHECK-NEXT: vpunpckhbw {{.*#+}} ymm0 = ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15],ymm1[24],ymm0[24],ymm1[25],ymm0[25],ymm1[26],ymm0[26],ymm1[27],ymm0[27],ymm1[28],ymm0[28],ymm1[29],ymm0[29],ymm1[30],ymm0[30],ymm1[31],ymm0[31]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 -1, i8 8, i8 -1, i8 9, i8 -1, i8 10, i8 -1, i8 11, i8 -1, i8 12, i8 -1, i8 13, i8 -1, i8 14, i8 -1, i8 15, i8 -1, i8 24, i8 -1, i8 25, i8 -1, i8 26, i8 -1, i8 27, i8 -1, i8 28, i8 -1, i8 29, i8 -1, i8 30, i8 -1, i8 31>)
|
|
ret <32 x i8> %1
|
|
}
|
|
|
|
define <32 x i8> @combine_psrlw_pshufb(<16 x i16> %a0) {
|
|
; X86-LABEL: combine_psrlw_pshufb:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: vandps {{\.LCPI.*}}, %ymm0, %ymm0
|
|
; X86-NEXT: retl
|
|
;
|
|
; X64-LABEL: combine_psrlw_pshufb:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
|
|
; X64-NEXT: retq
|
|
%1 = lshr <16 x i16> %a0, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
|
|
%2 = bitcast <16 x i16> %1 to <32 x i8>
|
|
%3 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 1, i8 0, i8 3, i8 2, i8 5, i8 4, i8 7, i8 6, i8 9, i8 8, i8 11, i8 10, i8 13, i8 12, i8 15, i8 14, i8 17, i8 16, i8 19, i8 18, i8 21, i8 20, i8 23, i8 22, i8 25, i8 24, i8 27, i8 26, i8 29, i8 28, i8 31, i8 30>)
|
|
ret <32 x i8> %3
|
|
}
|
|
|
|
define <32 x i8> @combine_pslld_pshufb(<8 x i32> %a0) {
|
|
; X86-LABEL: combine_pslld_pshufb:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: vandps {{\.LCPI.*}}, %ymm0, %ymm0
|
|
; X86-NEXT: retl
|
|
;
|
|
; X64-LABEL: combine_pslld_pshufb:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
|
|
; X64-NEXT: retq
|
|
%1 = shl <8 x i32> %a0, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24>
|
|
%2 = bitcast <8 x i32> %1 to <32 x i8>
|
|
%3 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 11, i8 10, i8 9, i8 8, i8 15, i8 14, i8 13, i8 12, i8 19, i8 18, i8 17, i8 16, i8 23, i8 22, i8 21, i8 20, i8 27, i8 26, i8 25, i8 24, i8 31, i8 30, i8 29, i8 28>)
|
|
ret <32 x i8> %3
|
|
}
|
|
|
|
define <32 x i8> @combine_psrlq_pshufb(<4 x i64> %a0) {
|
|
; CHECK-LABEL: combine_psrlq_pshufb:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = zero,zero,zero,zero,ymm0[7,6,5,4],zero,zero,zero,zero,ymm0[15,14,13,12],zero,zero,zero,zero,ymm0[23,22,21],zero,zero,zero,zero,ymm0[31,30,29,28],zero
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = lshr <4 x i64> %a0, <i64 32, i64 32, i64 32, i64 32>
|
|
%2 = bitcast <4 x i64> %1 to <32 x i8>
|
|
%3 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 31, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23>)
|
|
ret <32 x i8> %3
|
|
}
|
|
|
|
define <32 x i8> @combine_unpack_unpack_pshufb(<32 x i8> %a0) {
|
|
; CHECK-LABEL: combine_unpack_unpack_pshufb:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,0,4,8,1,1,5,9,2,2,6,10,3,3,7,11,16,16,20,24,17,17,21,25,18,18,22,26,19,19,23,27]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19>
|
|
%2 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
%3 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 8, i32 9, i32 10, i32 11, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 24, i32 25, i32 26, i32 27, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
%4 = shufflevector <32 x i8> %1, <32 x i8> %2, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
%5 = shufflevector <32 x i8> %1, <32 x i8> %3, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
|
%6 = shufflevector <32 x i8> %4, <32 x i8> %5, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55>
|
|
ret <32 x i8> %6
|
|
}
|
|
|
|
define <16 x i16> @shuffle_combine_packssdw_pshufb(<8 x i32> %a0) {
|
|
; CHECK-LABEL: shuffle_combine_packssdw_pshufb:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpsrad $31, %ymm0, %ymm0
|
|
; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[12,13,8,9,4,5,0,1,12,13,8,9,4,5,0,1,16,17,20,21,24,25,28,29,28,29,24,25,20,21,16,17]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = ashr <8 x i32> %a0, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>
|
|
%2 = tail call <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32> %1, <8 x i32> %1)
|
|
%3 = shufflevector <16 x i16> %2, <16 x i16> undef, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 3, i32 2, i32 1, i32 0, i32 8, i32 9, i32 10, i32 11, i32 11, i32 10, i32 9, i32 8>
|
|
ret <16 x i16> %3
|
|
}
|
|
declare <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32>, <8 x i32>) nounwind readnone
|
|
|
|
define <32 x i8> @shuffle_combine_packsswb_pshufb(<16 x i16> %a0, <16 x i16> %a1) {
|
|
; CHECK-LABEL: shuffle_combine_packsswb_pshufb:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpsraw $15, %ymm0, %ymm0
|
|
; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[14,12,10,8,6,4,2,0,14,12,10,8,6,4,2,0,30,28,26,24,22,20,18,16,30,28,26,24,22,20,18,16]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = ashr <16 x i16> %a0, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
|
|
%2 = ashr <16 x i16> %a1, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
|
|
%3 = tail call <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16> %1, <16 x i16> %2)
|
|
%4 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %3, <32 x i8> <i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>)
|
|
ret <32 x i8> %4
|
|
}
|
|
declare <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16>, <16 x i16>) nounwind readnone
|
|
|
|
define <16 x i16> @shuffle_combine_packusdw_pshufb(<8 x i32> %a0, <8 x i32> %a1) {
|
|
; CHECK-LABEL: shuffle_combine_packusdw_pshufb:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[14,15,10,11,6,7,2,3,14,15,10,11,6,7,2,3,18,19,22,23,26,27,30,31,30,31,26,27,22,23,18,19]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = lshr <8 x i32> %a0, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
|
|
%2 = tail call <16 x i16> @llvm.x86.avx2.packusdw(<8 x i32> %1, <8 x i32> %1)
|
|
%3 = shufflevector <16 x i16> %2, <16 x i16> undef, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 3, i32 2, i32 1, i32 0, i32 8, i32 9, i32 10, i32 11, i32 11, i32 10, i32 9, i32 8>
|
|
ret <16 x i16> %3
|
|
}
|
|
declare <16 x i16> @llvm.x86.avx2.packusdw(<8 x i32>, <8 x i32>) nounwind readnone
|
|
|
|
define <32 x i8> @shuffle_combine_packuswb_pshufb(<16 x i16> %a0, <16 x i16> %a1) {
|
|
; CHECK-LABEL: shuffle_combine_packuswb_pshufb:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[15,13,11,9,7,5,3,1,15,13,11,9,7,5,3,1,31,29,27,25,23,21,19,17,31,29,27,25,23,21,19,17]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = lshr <16 x i16> %a0, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
|
|
%2 = lshr <16 x i16> %a1, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
|
|
%3 = tail call <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16> %1, <16 x i16> %2)
|
|
%4 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %3, <32 x i8> <i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>)
|
|
ret <32 x i8> %4
|
|
}
|
|
declare <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16>, <16 x i16>) nounwind readnone
|
|
|
|
define <32 x i8> @combine_pshufb_as_packsswb(<16 x i16> %a0, <16 x i16> %a1) nounwind {
|
|
; CHECK-LABEL: combine_pshufb_as_packsswb:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpsraw $11, %ymm0, %ymm0
|
|
; CHECK-NEXT: vpsraw $11, %ymm1, %ymm1
|
|
; CHECK-NEXT: vpacksswb %ymm1, %ymm0, %ymm0
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = ashr <16 x i16> %a0, <i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11>
|
|
%2 = ashr <16 x i16> %a1, <i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11>
|
|
%3 = bitcast <16 x i16> %1 to <32 x i8>
|
|
%4 = bitcast <16 x i16> %2 to <32 x i8>
|
|
%5 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %3, <32 x i8> <i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
|
|
%6 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %4, <32 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14>)
|
|
%7 = or <32 x i8> %5, %6
|
|
ret <32 x i8> %7
|
|
}
|
|
|
|
define <32 x i8> @combine_pshufb_as_packuswb(<16 x i16> %a0, <16 x i16> %a1) nounwind {
|
|
; CHECK-LABEL: combine_pshufb_as_packuswb:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpsrlw $11, %ymm0, %ymm0
|
|
; CHECK-NEXT: vpsrlw $11, %ymm1, %ymm1
|
|
; CHECK-NEXT: vpackuswb %ymm1, %ymm0, %ymm0
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = lshr <16 x i16> %a0, <i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11>
|
|
%2 = lshr <16 x i16> %a1, <i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11, i16 11>
|
|
%3 = bitcast <16 x i16> %1 to <32 x i8>
|
|
%4 = bitcast <16 x i16> %2 to <32 x i8>
|
|
%5 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %3, <32 x i8> <i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
|
|
%6 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %4, <32 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i8 12, i8 14>)
|
|
%7 = or <32 x i8> %5, %6
|
|
ret <32 x i8> %7
|
|
}
|
|
|
|
define <16 x i8> @combine_pshufb_insertion_as_broadcast_v2i64(i64 %a0) {
|
|
; X86-LABEL: combine_pshufb_insertion_as_broadcast_v2i64:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
|
|
; X86-NEXT: retl
|
|
;
|
|
; X64-LABEL: combine_pshufb_insertion_as_broadcast_v2i64:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vmovq %rdi, %xmm0
|
|
; X64-NEXT: vpbroadcastq %xmm0, %xmm0
|
|
; X64-NEXT: retq
|
|
%1 = insertelement <2 x i64> undef, i64 %a0, i32 0
|
|
%2 = bitcast <2 x i64> %1 to <16 x i8>
|
|
%3 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %2, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)
|
|
ret <16 x i8> %3
|
|
}
|
|
|
|
define <8 x i32> @combine_permd_insertion_as_broadcast_v4i64(i64 %a0) {
|
|
; X86-LABEL: combine_permd_insertion_as_broadcast_v4i64:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: vbroadcastsd {{[0-9]+}}(%esp), %ymm0
|
|
; X86-NEXT: retl
|
|
;
|
|
; X64-LABEL: combine_permd_insertion_as_broadcast_v4i64:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vmovq %rdi, %xmm0
|
|
; X64-NEXT: vpbroadcastq %xmm0, %ymm0
|
|
; X64-NEXT: retq
|
|
%1 = insertelement <4 x i64> undef, i64 %a0, i32 0
|
|
%2 = bitcast <4 x i64> %1 to <8 x i32>
|
|
%3 = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %2, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>)
|
|
ret <8 x i32> %3
|
|
}
|
|
|
|
define <32 x i8> @combine_pshufb_pshufb_or_as_blend(<32 x i8> %a0, <32 x i8> %a1) {
|
|
; CHECK-LABEL: combine_pshufb_pshufb_or_as_blend:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>)
|
|
%2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a1, <32 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>)
|
|
%3 = or <32 x i8> %1, %2
|
|
ret <32 x i8> %3
|
|
}
|
|
|
|
define <32 x i8> @combine_pshufb_pshufb_or_as_unpcklbw(<32 x i8> %a0, <32 x i8> %a1) {
|
|
; CHECK-LABEL: combine_pshufb_pshufb_or_as_unpcklbw:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpunpcklbw {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[16],ymm1[16],ymm0[17],ymm1[17],ymm0[18],ymm1[18],ymm0[19],ymm1[19],ymm0[20],ymm1[20],ymm0[21],ymm1[21],ymm0[22],ymm1[22],ymm0[23],ymm1[23]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 -1, i8 1, i8 -1, i8 2, i8 -1, i8 3, i8 -1, i8 4, i8 -1, i8 5, i8 -1, i8 6, i8 -1, i8 7, i8 -1, i8 0, i8 -1, i8 1, i8 -1, i8 2, i8 -1, i8 3, i8 -1, i8 4, i8 -1, i8 5, i8 -1, i8 6, i8 -1, i8 7, i8 -1>)
|
|
%2 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a1, <32 x i8> <i8 -1, i8 0, i8 -1, i8 1, i8 -1, i8 2, i8 -1, i8 3, i8 -1, i8 4, i8 -1, i8 5, i8 -1, i8 6, i8 -1, i8 7, i8 -1, i8 0, i8 -1, i8 1, i8 -1, i8 2, i8 -1, i8 3, i8 -1, i8 4, i8 -1, i8 5, i8 -1, i8 6, i8 -1, i8 7>)
|
|
%3 = or <32 x i8> %1, %2
|
|
ret <32 x i8> %3
|
|
}
|
|
|
|
define <32 x i8> @combine_pshufb_pshufb_or_pshufb(<32 x i8> %a0) {
|
|
; CHECK-LABEL: combine_pshufb_pshufb_or_pshufb:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,0,0,0,4,4,4,4]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1>)
|
|
%2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 2, i8 3>)
|
|
%3 = or <32 x i8> %1, %2
|
|
%4 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %3, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>)
|
|
ret <32 x i8> %4
|
|
}
|
|
|
|
define <8 x i32> @constant_fold_permd() {
|
|
; CHECK-LABEL: constant_fold_permd:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vmovaps {{.*#+}} ymm0 = [5,7,3,2,8,2,6,1]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>, <8 x i32> <i32 4, i32 6, i32 2, i32 1, i32 7, i32 1, i32 5, i32 0>)
|
|
ret <8 x i32> %1
|
|
}
|
|
|
|
define <8 x float> @constant_fold_permps() {
|
|
; CHECK-LABEL: constant_fold_permps:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vmovaps {{.*#+}} ymm0 = [5.0E+0,7.0E+0,3.0E+0,2.0E+0,8.0E+0,2.0E+0,6.0E+0,1.0E+0]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0>, <8 x i32> <i32 4, i32 6, i32 2, i32 1, i32 7, i32 1, i32 5, i32 0>)
|
|
ret <8 x float> %1
|
|
}
|
|
|
|
define <32 x i8> @constant_fold_pshufb_256() {
|
|
; CHECK-LABEL: constant_fold_pshufb_256:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vmovaps {{.*#+}} ymm0 = <14,0,0,0,u,u,0,0,0,0,0,0,0,0,8,9,255,0,0,0,u,u,0,0,241,0,0,0,0,0,249,250>
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 -8, i8 -9, i8 -10, i8 -11, i8 -12, i8 -13, i8 -14, i8 -15>, <32 x i8> <i8 1, i8 -1, i8 -1, i8 -1, i8 undef, i8 undef, i8 -1, i8 -1, i8 15, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 7, i8 6, i8 1, i8 -1, i8 -1, i8 -1, i8 undef, i8 undef, i8 -1, i8 -1, i8 15, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 7, i8 6>)
|
|
ret <32 x i8> %1
|
|
}
|
|
|
|
define <32 x i8> @PR27320(<8 x i32> %a0) {
|
|
; CHECK-LABEL: PR27320:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,1,2,1]
|
|
; CHECK-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,1,2,3,4,4,5,6,7,7,8,9,10,10,11,28,29,29,30,31,16,16,17,18,19,19,20,21,22,22,23]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
%1 = shufflevector <8 x i32> %a0, <8 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 3, i32 4, i32 5, i32 undef>
|
|
%2 = bitcast <8 x i32> %1 to <32 x i8>
|
|
%3 = shufflevector <32 x i8> %2, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 1, i32 2, i32 3, i32 4, i32 4, i32 5, i32 6, i32 7, i32 7, i32 8, i32 9, i32 10, i32 10, i32 11, i32 16, i32 17, i32 17, i32 18, i32 19, i32 20, i32 20, i32 21, i32 22, i32 23, i32 23, i32 24, i32 25, i32 26, i32 26, i32 27>
|
|
ret <32 x i8> %3
|
|
}
|
|
|
|
define internal fastcc <8 x float> @PR34577(<8 x float> %inp0, <8 x float> %inp1, <8 x float> %inp2) {
|
|
; CHECK-LABEL: PR34577:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,1,3]
|
|
; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2
|
|
; CHECK-NEXT: vblendps {{.*#+}} ymm0 = ymm2[0,1,2,3],ymm0[4,5,6,7]
|
|
; CHECK-NEXT: vmovaps {{.*#+}} ymm2 = <u,u,7,2,u,u,3,2>
|
|
; CHECK-NEXT: vpermps %ymm1, %ymm2, %ymm1
|
|
; CHECK-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
|
|
; CHECK-NEXT: ret{{[l|q]}}
|
|
entry:
|
|
%shuf0 = shufflevector <8 x float> %inp0, <8 x float> %inp2, <8 x i32> <i32 1, i32 10, i32 11, i32 13, i32 2, i32 13, i32 5, i32 0>
|
|
%sel = select <8 x i1> <i1 false, i1 true, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false>, <8 x float> %shuf0, <8 x float> zeroinitializer
|
|
%shuf1 = shufflevector <8 x float> zeroinitializer, <8 x float> %sel, <8 x i32> <i32 6, i32 11, i32 6, i32 15, i32 12, i32 11, i32 1, i32 3>
|
|
%shuf2 = shufflevector <8 x float> %inp1, <8 x float> %shuf1, <8 x i32> <i32 15, i32 10, i32 7, i32 2, i32 12, i32 undef, i32 3, i32 2>
|
|
ret <8 x float> %shuf2
|
|
}
|
|
|
|
define void @packss_zext_v8i1() {
|
|
; X86-LABEL: packss_zext_v8i1:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: vxorps %xmm0, %xmm0, %xmm0
|
|
; X86-NEXT: vmovups %ymm0, (%eax)
|
|
; X86-NEXT: vzeroupper
|
|
; X86-NEXT: retl
|
|
;
|
|
; X64-LABEL: packss_zext_v8i1:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vxorps %xmm0, %xmm0, %xmm0
|
|
; X64-NEXT: vmovups %ymm0, (%rax)
|
|
; X64-NEXT: vzeroupper
|
|
; X64-NEXT: retq
|
|
%tmp0 = icmp sgt <8 x i32> undef, undef
|
|
%tmp1 = zext <8 x i1> %tmp0 to <8 x i32>
|
|
%tmp2 = shufflevector <8 x i32> %tmp1, <8 x i32> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
|
%tmp3 = trunc <16 x i32> %tmp2 to <16 x i16>
|
|
%tmp4 = add <16 x i16> zeroinitializer, %tmp3
|
|
%tmp6 = sext <16 x i16> %tmp4 to <16 x i32>
|
|
%tmp10 = shufflevector <16 x i32> %tmp6, <16 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15>
|
|
%tmp11 = tail call <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32> undef, <8 x i32> %tmp10)
|
|
store <16 x i16> %tmp11, <16 x i16>* undef, align 2
|
|
ret void
|
|
}
|