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AArch64
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[globalisel][tablegen] Add support for COPY_TO_REGCLASS.
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2017-06-20 12:36:34 +00:00 |
AMDGPU
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AMDGPU: Preserve undef when folding register operands
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2017-06-20 18:41:31 +00:00 |
ARM
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DAG: correctly legalize UMULO.
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2017-06-20 15:01:38 +00:00 |
AVR
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[AVR] Fix a big in shift operator lowering; Authored by Dr. Gergo Erdi
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2017-05-31 06:27:46 +00:00 |
BPF
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bpf: avoid load from read-only sections
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2017-06-16 15:41:16 +00:00 |
Generic
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CodeGen/LLVMTargetMachine: Refactor ISel pass construction; NFCI
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2017-06-06 00:26:13 +00:00 |
Hexagon
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[Hexagon] Don't kill live registers when creating mux out of tfr
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2017-06-16 12:24:03 +00:00 |
Inputs
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…
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Lanai
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CodeGen: Rename DEBUG_TYPE to match passnames
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2017-05-25 21:26:32 +00:00 |
MIR
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llc: Add ability to parse mir from stdin
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2017-06-06 20:06:57 +00:00 |
MSP430
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[MSP430] Fix PR33050: Don't use ADD16ri to lower FrameIndex.
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2017-05-24 15:08:30 +00:00 |
Mips
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Revert r305382, it caused PR33513.
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2017-06-19 19:48:59 +00:00 |
NVPTX
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Revert r302938 "Add LiveRangeShrink pass to shrink live range within BB."
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2017-05-18 18:50:05 +00:00 |
Nios2
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[Nios2] Target registration
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2017-05-29 09:48:30 +00:00 |
PowerPC
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[CGP, PowerPC] try to constant fold before creating loads for memcmp expansion
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2017-06-19 19:48:35 +00:00 |
SPARC
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Revert r302938 "Add LiveRangeShrink pass to shrink live range within BB."
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2017-05-18 18:50:05 +00:00 |
SystemZ
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[SelectionDAG] Allow sin/cos -> sincos optimization on GNU triples w/ just -fno-math-errno
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2017-06-12 17:15:41 +00:00 |
Thumb
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RegScavenging: Add scavengeRegisterBackwards()
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2017-06-17 02:08:18 +00:00 |
Thumb2
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MIR: remove explicit "noVRegs" property.
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2017-05-30 21:28:57 +00:00 |
WebAssembly
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[WebAssembly] Use __stack_pointer global when writing wasm binary
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2017-06-16 23:59:10 +00:00 |
WinEH
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…
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X86
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[x86] enable CGP memcmp() expansion for 2/4/8 byte sizes
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2017-06-20 15:58:30 +00:00 |
XCore
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AsmPrinter: mark the beginning and the end of a function in verbose mode
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2017-05-23 21:22:16 +00:00 |