forked from OSchip/llvm-project
177 lines
5.4 KiB
LLVM
177 lines
5.4 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -enable-patchpoint-liveness=false | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck -check-prefix=PATCH %s
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;
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; Note: Print verbose stackmaps using -debug-only=stackmaps.
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; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
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; CHECK-NEXT: __LLVM_StackMaps:
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; Header
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; CHECK-NEXT: .byte 1
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .short 0
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; Num Functions
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; CHECK-NEXT: .long 2
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; Num LargeConstants
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; CHECK-NEXT: .long 0
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; Num Callsites
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; CHECK-NEXT: .long 5
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; Functions and stack size
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; CHECK-NEXT: .quad _stackmap_liveness
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; CHECK-NEXT: .quad 8
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; CHECK-NEXT: .quad _mixed_liveness
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; CHECK-NEXT: .quad 8
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define void @stackmap_liveness() {
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entry:
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%a1 = call <2 x double> asm sideeffect "", "={xmm2}"() nounwind
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; StackMap 1 (no liveness information available)
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; CHECK-LABEL: .long L{{.*}}-_stackmap_liveness
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 0
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; Padding
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; CHECK-NEXT: .short 0
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; Num LiveOut Entries: 0
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; CHECK-NEXT: .short 0
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; Align
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; CHECK-NEXT: .align 3
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; StackMap 1 (patchpoint liveness information enabled)
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; PATCH-LABEL: .long L{{.*}}-_stackmap_liveness
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; PATCH-NEXT: .short 0
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; PATCH-NEXT: .short 0
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; Padding
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; PATCH-NEXT: .short 0
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; Num LiveOut Entries: 1
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; PATCH-NEXT: .short 1
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; LiveOut Entry 1: %YMM2 (16 bytes) --> %XMM2
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; PATCH-NEXT: .short 19
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; PATCH-NEXT: .byte 0
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; PATCH-NEXT: .byte 16
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; Align
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; PATCH-NEXT: .align 3
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call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 12, i8* null, i32 0)
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%a2 = call i64 asm sideeffect "", "={r8}"() nounwind
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%a3 = call i8 asm sideeffect "", "={ah}"() nounwind
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%a4 = call <4 x double> asm sideeffect "", "={ymm0}"() nounwind
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%a5 = call <4 x double> asm sideeffect "", "={ymm1}"() nounwind
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; StackMap 2 (no liveness information available)
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; CHECK-LABEL: .long L{{.*}}-_stackmap_liveness
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 0
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; Padding
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; CHECK-NEXT: .short 0
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; Num LiveOut Entries: 0
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; CHECK-NEXT: .short 0
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; Align
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; CHECK-NEXT: .align 3
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; StackMap 2 (patchpoint liveness information enabled)
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; PATCH-LABEL: .long L{{.*}}-_stackmap_liveness
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; PATCH-NEXT: .short 0
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; PATCH-NEXT: .short 0
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; Padding
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; PATCH-NEXT: .short 0
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; Num LiveOut Entries: 5
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; PATCH-NEXT: .short 5
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; LiveOut Entry 1: %RAX (1 bytes) --> %AL or %AH
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; PATCH-NEXT: .short 0
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; PATCH-NEXT: .byte 0
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; PATCH-NEXT: .byte 1
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; LiveOut Entry 2: %R8 (8 bytes)
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; PATCH-NEXT: .short 8
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; PATCH-NEXT: .byte 0
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; PATCH-NEXT: .byte 8
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; LiveOut Entry 3: %YMM0 (32 bytes)
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; PATCH-NEXT: .short 17
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; PATCH-NEXT: .byte 0
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; PATCH-NEXT: .byte 32
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; LiveOut Entry 4: %YMM1 (32 bytes)
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; PATCH-NEXT: .short 18
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; PATCH-NEXT: .byte 0
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; PATCH-NEXT: .byte 32
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; LiveOut Entry 5: %YMM2 (16 bytes) --> %XMM2
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; PATCH-NEXT: .short 19
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; PATCH-NEXT: .byte 0
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; PATCH-NEXT: .byte 16
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; Align
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; PATCH-NEXT: .align 3
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call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 2, i32 12, i8* null, i32 0)
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call void asm sideeffect "", "{r8},{ah},{ymm0},{ymm1}"(i64 %a2, i8 %a3, <4 x double> %a4, <4 x double> %a5) nounwind
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; StackMap 3 (no liveness information available)
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; CHECK-LABEL: .long L{{.*}}-_stackmap_liveness
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; CHECK-NEXT: .short 0
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; CHECK-NEXT: .short 0
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; Padding
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; CHECK-NEXT: .short 0
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; Num LiveOut Entries: 0
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; CHECK-NEXT: .short 0
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; Align
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; CHECK-NEXT: .align 3
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; StackMap 3 (patchpoint liveness information enabled)
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; PATCH-LABEL: .long L{{.*}}-_stackmap_liveness
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; PATCH-NEXT: .short 0
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; PATCH-NEXT: .short 0
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; Padding
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; PATCH-NEXT: .short 0
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; Num LiveOut Entries: 2
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; PATCH-NEXT: .short 2
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; LiveOut Entry 1: %RSP (8 bytes)
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; PATCH-NEXT: .short 7
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; PATCH-NEXT: .byte 0
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; PATCH-NEXT: .byte 8
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; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2
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; PATCH-NEXT: .short 19
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; PATCH-NEXT: .byte 0
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; PATCH-NEXT: .byte 16
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; Align
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; PATCH-NEXT: .align 3
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call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 3, i32 12, i8* null, i32 0)
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call void asm sideeffect "", "{xmm2}"(<2 x double> %a1) nounwind
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ret void
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}
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define void @mixed_liveness() {
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entry:
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%a1 = call <2 x double> asm sideeffect "", "={xmm2}"() nounwind
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; StackMap 4 (patchpoint liveness information enabled)
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; PATCH-LABEL: .long L{{.*}}-_mixed_liveness
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; PATCH-NEXT: .short 0
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; PATCH-NEXT: .short 0
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; Padding
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; PATCH-NEXT: .short 0
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; Num LiveOut Entries: 0
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; PATCH-NEXT: .short 0
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; Align
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; PATCH-NEXT: .align 3
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; StackMap 5 (patchpoint liveness information enabled)
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; PATCH-LABEL: .long L{{.*}}-_mixed_liveness
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; PATCH-NEXT: .short 0
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; PATCH-NEXT: .short 0
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; Padding
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; PATCH-NEXT: .short 0
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; Num LiveOut Entries: 2
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; PATCH-NEXT: .short 2
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; LiveOut Entry 1: %RSP (8 bytes)
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; PATCH-NEXT: .short 7
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; PATCH-NEXT: .byte 0
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; PATCH-NEXT: .byte 8
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; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2
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; PATCH-NEXT: .short 19
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; PATCH-NEXT: .byte 0
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; PATCH-NEXT: .byte 16
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; Align
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; PATCH-NEXT: .align 3
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call void (i64, i32, ...) @llvm.experimental.stackmap(i64 4, i32 5)
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call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 5, i32 0, i8* null, i32 0)
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call void asm sideeffect "", "{xmm2}"(<2 x double> %a1) nounwind
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ret void
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}
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declare void @llvm.experimental.stackmap(i64, i32, ...)
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declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...)
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