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AArch64
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[AArch64] Implement .variant_pcs directive
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2020-10-13 10:06:27 +00:00 |
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AMDGPU
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[AMDGPU] flat scratch ST addressing mode on gfx10
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2020-10-19 15:29:52 -07:00 |
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ARM
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llvm-dwarfdump: Dump address forms in their encoded length rather than always in 64 bits
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2020-10-04 15:48:57 -07:00 |
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AVR
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[AVRInstPrinter] printOperand: support llvm-objdump --print-imm-hex
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2020-07-12 08:14:52 -07:00 |
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AsmParser
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Introduce and use a new section type for the bb_addr_map section.
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2020-10-08 11:13:19 -07:00 |
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BPF
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[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
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2020-03-15 17:46:23 -07:00 |
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COFF
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[test][MC] Use %python in llvm/test/MC/COFF/bigobj.py
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2020-10-07 14:03:28 -04:00 |
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Disassembler
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[AMDGPU] flat scratch ST addressing mode on gfx10
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2020-10-19 15:29:52 -07:00 |
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ELF
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Show register names in DWARF unwind info.
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2020-10-05 15:34:33 -07:00 |
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Hexagon
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[llvm-readobj] Update tests because of changes in llvm-readobj behavior
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2020-07-20 10:39:04 +01:00 |
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Lanai
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[lit] Delete empty lines at the end of lit.local.cfg NFC
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2019-06-17 09:51:07 +00:00 |
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MSP430
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[llvm-readobj] Update tests because of changes in llvm-readobj behavior
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2020-07-20 10:39:04 +01:00 |
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MachO
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llvm-dwarfdump: Dump address forms in their encoded length rather than always in 64 bits
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2020-10-04 15:48:57 -07:00 |
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Mips
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Show register names in DWARF unwind info.
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2020-10-05 15:34:33 -07:00 |
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PowerPC
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[PowerPC] Add outer product instructions for MMA
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2020-09-30 18:06:49 -05:00 |
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RISCV
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[RISCV] Support vmsge.vx and vmsgeu.vx pseudo instructions in RVV.
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2020-10-02 17:20:34 +08:00 |
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Sparc
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[llvm-readobj] Update tests because of changes in llvm-readobj behavior
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2020-07-20 10:39:04 +01:00 |
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SystemZ
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[SystemZAsmParser] Treat VR128 separately in ParseDirectiveInsn().
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2020-10-06 14:42:40 +02:00 |
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VE
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[VE] Add VBRD/VMV instructions
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2020-10-19 18:33:54 +09:00 |
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WebAssembly
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[WebAssembly] Prototype i8x16.popcnt
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2020-10-15 21:18:22 +00:00 |
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X86
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[X86] Remove period from end of error message in assembler
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2020-10-21 00:43:23 -07:00 |
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