forked from OSchip/llvm-project
35 lines
1.8 KiB
ArmAsm
35 lines
1.8 KiB
ArmAsm
# RUN: not llvm-mc -triple riscv32 -mattr=+f < %s 2>&1 | FileCheck %s
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# Out of range immediates
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## simm12
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flw ft1, -2049(a0) # CHECK: :[[@LINE]]:10: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo modifier or an integer in the range [-2048, 2047]
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fsw ft2, 2048(a1) # CHECK: :[[@LINE]]:10: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo modifier or an integer in the range [-2048, 2047]
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# Memory operand not formatted correctly
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flw ft1, a0, -200 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
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fsw ft2, a1, 100 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
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# Invalid register names
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flw ft15, 100(a0) # CHECK: :[[@LINE]]:5: error: invalid operand for instruction
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flw ft1, 100(a10) # CHECK: :[[@LINE]]:14: error: expected register
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fsgnjn.s fa100, fa2, fa3 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
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# Integer registers where FP regs are expected
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fmv.x.w fs7, a2 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
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# FP registers where integer regs are expected
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fmv.w.x a8, ft2 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
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# Rounding mode when a register is expected
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fmadd.s f10, f11, f12, ree # CHECK: :[[@LINE]]:24: error: invalid operand for instruction
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# Invalid rounding modes
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fmadd.s f10, f11, f12, f13, ree # CHECK: :[[@LINE]]:29: error: operand must be a valid floating point rounding mode mnemonic
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fmsub.s f14, f15, f16, f17, 0 # CHECK: :[[@LINE]]:29: error: operand must be a valid floating point rounding mode mnemonic
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fnmsub.s f18, f19, f20, f21, 0b111 # CHECK: :[[@LINE]]:30: error: operand must be a valid floating point rounding mode mnemonic
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# Using 'D' instructions for an 'F'-only target
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fadd.d ft0, ft1, ft2 # CHECK: :[[@LINE]]:1: error: instruction use requires an option to be enabled
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# Using RV64F instructions for RV32 is tested in rv64f-valid.s
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