forked from OSchip/llvm-project
224 lines
7.7 KiB
ArmAsm
224 lines
7.7 KiB
ArmAsm
// RUN: llvm-mc -mattr=+code-object-v3 -triple amdgcn-amd-amdhsa -mcpu=gfx1010 -mattr=+xnack < %s | FileCheck --check-prefix=ASM %s
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// RUN: llvm-mc -mattr=+code-object-v3 -triple amdgcn-amd-amdhsa -mcpu=gfx1010 -mattr=+xnack -filetype=obj < %s > %t
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// RUN: llvm-readobj -elf-output-style=GNU -sections -symbols -relocations %t | FileCheck --check-prefix=READOBJ %s
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// RUN: llvm-objdump -s -j .rodata %t | FileCheck --check-prefix=OBJDUMP %s
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// big endian not supported
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// XFAIL: powerpc-, powerpc64-, s390x, mips-, mips64-, sparc
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// READOBJ: Section Headers
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// READOBJ: .text PROGBITS {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9]+}} AX {{[0-9]+}} {{[0-9]+}} 256
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// READOBJ: .rodata PROGBITS {{[0-9a-f]+}} {{[0-9a-f]+}} 0000c0 {{[0-9]+}} A {{[0-9]+}} {{[0-9]+}} 64
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// READOBJ: Relocation section '.rela.rodata' at offset
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// READOBJ: 0000000000000010 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 10
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// READOBJ: 0000000000000050 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 110
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// READOBJ: 0000000000000090 {{[0-9a-f]+}}00000005 R_AMDGPU_REL64 0000000000000000 .text + 210
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// READOBJ: Symbol table '.symtab' contains {{[0-9]+}} entries:
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// READOBJ: {{[0-9]+}}: 0000000000000100 0 FUNC LOCAL PROTECTED 2 complete
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// READOBJ: {{[0-9]+}}: 0000000000000040 64 OBJECT LOCAL DEFAULT 3 complete.kd
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// READOBJ: {{[0-9]+}}: 0000000000000000 0 FUNC LOCAL PROTECTED 2 minimal
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// READOBJ: {{[0-9]+}}: 0000000000000000 64 OBJECT LOCAL DEFAULT 3 minimal.kd
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// READOBJ: {{[0-9]+}}: 0000000000000200 0 FUNC LOCAL PROTECTED 2 special_sgpr
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// READOBJ: {{[0-9]+}}: 0000000000000080 64 OBJECT LOCAL DEFAULT 3 special_sgpr.kd
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// OBJDUMP: Contents of section .rodata
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// Note, relocation for KERNEL_CODE_ENTRY_BYTE_OFFSET is not resolved here.
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// minimal
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// OBJDUMP-NEXT: 0000 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0010 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0020 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0030 0000ac60 80000000 00000000 00000000
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// complete
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// OBJDUMP-NEXT: 0040 01000000 01000000 00000000 00000000
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// OBJDUMP-NEXT: 0050 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0060 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0070 015001e4 1f0f007f 7f040000 00000000
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// special_sgpr
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// OBJDUMP-NEXT: 0080 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 0090 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 00a0 00000000 00000000 00000000 00000000
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// OBJDUMP-NEXT: 00b0 00000060 80000000 00000000 00000000
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.text
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// ASM: .text
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.amdgcn_target "amdgcn-amd-amdhsa--gfx1010+xnack"
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// ASM: .amdgcn_target "amdgcn-amd-amdhsa--gfx1010+xnack"
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.p2align 8
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.type minimal,@function
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minimal:
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s_endpgm
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.p2align 8
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.type complete,@function
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complete:
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s_endpgm
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.p2align 8
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.type special_sgpr,@function
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special_sgpr:
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s_endpgm
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.rodata
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// ASM: .rodata
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// Test that only specifying required directives is allowed, and that defaulted
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// values are omitted.
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.p2align 6
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.amdhsa_kernel minimal
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.amdhsa_next_free_vgpr 0
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.amdhsa_next_free_sgpr 0
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.end_amdhsa_kernel
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// ASM: .amdhsa_kernel minimal
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// ASM: .amdhsa_next_free_vgpr 0
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// ASM-NEXT: .amdhsa_next_free_sgpr 0
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// ASM: .end_amdhsa_kernel
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// Test that we can specify all available directives with non-default values.
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.p2align 6
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.amdhsa_kernel complete
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.amdhsa_group_segment_fixed_size 1
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.amdhsa_private_segment_fixed_size 1
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.amdhsa_user_sgpr_private_segment_buffer 1
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.amdhsa_user_sgpr_dispatch_ptr 1
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.amdhsa_user_sgpr_queue_ptr 1
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.amdhsa_user_sgpr_kernarg_segment_ptr 1
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.amdhsa_user_sgpr_dispatch_id 1
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.amdhsa_user_sgpr_flat_scratch_init 1
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.amdhsa_user_sgpr_private_segment_size 1
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.amdhsa_wavefront_size32 1
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.amdhsa_system_sgpr_private_segment_wavefront_offset 1
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.amdhsa_system_sgpr_workgroup_id_x 0
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.amdhsa_system_sgpr_workgroup_id_y 1
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.amdhsa_system_sgpr_workgroup_id_z 1
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.amdhsa_system_sgpr_workgroup_info 1
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.amdhsa_system_vgpr_workitem_id 1
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.amdhsa_next_free_vgpr 9
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.amdhsa_next_free_sgpr 27
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.amdhsa_reserve_vcc 0
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.amdhsa_reserve_flat_scratch 0
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.amdhsa_reserve_xnack_mask 0
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.amdhsa_float_round_mode_32 1
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.amdhsa_float_round_mode_16_64 1
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.amdhsa_float_denorm_mode_32 1
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.amdhsa_float_denorm_mode_16_64 0
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.amdhsa_dx10_clamp 0
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.amdhsa_ieee_mode 0
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.amdhsa_fp16_overflow 1
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.amdhsa_workgroup_processor_mode 1
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.amdhsa_memory_ordered 1
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.amdhsa_forward_progress 1
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.amdhsa_exception_fp_ieee_invalid_op 1
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.amdhsa_exception_fp_denorm_src 1
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.amdhsa_exception_fp_ieee_div_zero 1
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.amdhsa_exception_fp_ieee_overflow 1
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.amdhsa_exception_fp_ieee_underflow 1
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.amdhsa_exception_fp_ieee_inexact 1
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.amdhsa_exception_int_div_zero 1
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.end_amdhsa_kernel
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// ASM: .amdhsa_kernel complete
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// ASM-NEXT: .amdhsa_group_segment_fixed_size 1
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// ASM-NEXT: .amdhsa_private_segment_fixed_size 1
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// ASM-NEXT: .amdhsa_user_sgpr_private_segment_buffer 1
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// ASM-NEXT: .amdhsa_user_sgpr_dispatch_ptr 1
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// ASM-NEXT: .amdhsa_user_sgpr_queue_ptr 1
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// ASM-NEXT: .amdhsa_user_sgpr_kernarg_segment_ptr 1
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// ASM-NEXT: .amdhsa_user_sgpr_dispatch_id 1
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// ASM-NEXT: .amdhsa_user_sgpr_flat_scratch_init 1
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// ASM-NEXT: .amdhsa_user_sgpr_private_segment_size 1
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// ASM-NEXT: .amdhsa_wavefront_size32 1
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// ASM-NEXT: .amdhsa_system_sgpr_private_segment_wavefront_offset 1
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// ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_x 0
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// ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_y 1
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// ASM-NEXT: .amdhsa_system_sgpr_workgroup_id_z 1
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// ASM-NEXT: .amdhsa_system_sgpr_workgroup_info 1
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// ASM-NEXT: .amdhsa_system_vgpr_workitem_id 1
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// ASM-NEXT: .amdhsa_next_free_vgpr 9
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// ASM-NEXT: .amdhsa_next_free_sgpr 27
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// ASM-NEXT: .amdhsa_reserve_vcc 0
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// ASM-NEXT: .amdhsa_reserve_flat_scratch 0
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// ASM-NEXT: .amdhsa_reserve_xnack_mask 0
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// ASM-NEXT: .amdhsa_float_round_mode_32 1
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// ASM-NEXT: .amdhsa_float_round_mode_16_64 1
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// ASM-NEXT: .amdhsa_float_denorm_mode_32 1
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// ASM-NEXT: .amdhsa_float_denorm_mode_16_64 0
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// ASM-NEXT: .amdhsa_dx10_clamp 0
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// ASM-NEXT: .amdhsa_ieee_mode 0
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// ASM-NEXT: .amdhsa_fp16_overflow 1
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// ASM-NEXT: .amdhsa_workgroup_processor_mode 1
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// ASM-NEXT: .amdhsa_memory_ordered 1
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// ASM-NEXT: .amdhsa_forward_progress 1
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// ASM-NEXT: .amdhsa_exception_fp_ieee_invalid_op 1
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// ASM-NEXT: .amdhsa_exception_fp_denorm_src 1
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// ASM-NEXT: .amdhsa_exception_fp_ieee_div_zero 1
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// ASM-NEXT: .amdhsa_exception_fp_ieee_overflow 1
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// ASM-NEXT: .amdhsa_exception_fp_ieee_underflow 1
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// ASM-NEXT: .amdhsa_exception_fp_ieee_inexact 1
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// ASM-NEXT: .amdhsa_exception_int_div_zero 1
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// ASM-NEXT: .end_amdhsa_kernel
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// Test that we are including special SGPR usage in the granulated count.
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.p2align 6
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.amdhsa_kernel special_sgpr
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// Same next_free_sgpr as "complete", but...
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.amdhsa_next_free_sgpr 27
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// ...on GFX10+ this should require an additional 6 SGPRs, pushing us from
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// 3 granules to 4
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.amdhsa_reserve_flat_scratch 1
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.amdhsa_reserve_vcc 0
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.amdhsa_reserve_xnack_mask 0
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.amdhsa_float_denorm_mode_16_64 0
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.amdhsa_dx10_clamp 0
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.amdhsa_ieee_mode 0
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.amdhsa_next_free_vgpr 0
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.end_amdhsa_kernel
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// ASM: .amdhsa_kernel special_sgpr
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// ASM: .amdhsa_next_free_vgpr 0
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// ASM-NEXT: .amdhsa_next_free_sgpr 27
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// ASM-NEXT: .amdhsa_reserve_vcc 0
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// ASM-NEXT: .amdhsa_reserve_xnack_mask 0
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// ASM: .amdhsa_float_denorm_mode_16_64 0
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// ASM-NEXT: .amdhsa_dx10_clamp 0
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// ASM-NEXT: .amdhsa_ieee_mode 0
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// ASM: .end_amdhsa_kernel
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.section .foo
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.byte .amdgcn.gfx_generation_number
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// ASM: .byte 10
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.byte .amdgcn.next_free_vgpr
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// ASM: .byte 0
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.byte .amdgcn.next_free_sgpr
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// ASM: .byte 0
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v_mov_b32_e32 v7, s10
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.byte .amdgcn.next_free_vgpr
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// ASM: .byte 8
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.byte .amdgcn.next_free_sgpr
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// ASM: .byte 11
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.set .amdgcn.next_free_vgpr, 0
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.set .amdgcn.next_free_sgpr, 0
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.byte .amdgcn.next_free_vgpr
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// ASM: .byte 0
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.byte .amdgcn.next_free_sgpr
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// ASM: .byte 0
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v_mov_b32_e32 v16, s3
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.byte .amdgcn.next_free_vgpr
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// ASM: .byte 17
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.byte .amdgcn.next_free_sgpr
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// ASM: .byte 4
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