forked from OSchip/llvm-project
118641 lines
3.6 MiB
118641 lines
3.6 MiB
// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
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// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -mattr=+d16-preserves-unused-bits -show-encoding %s | FileCheck %s
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ds_add_u32 v1, v2 offset:65535
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// CHECK: [0xff,0xff,0x00,0xd8,0x01,0x02,0x00,0x00]
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ds_add_u32 v255, v2 offset:65535
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// CHECK: [0xff,0xff,0x00,0xd8,0xff,0x02,0x00,0x00]
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ds_add_u32 v1, v255 offset:65535
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// CHECK: [0xff,0xff,0x00,0xd8,0x01,0xff,0x00,0x00]
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ds_add_u32 v1, v2
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// CHECK: [0x00,0x00,0x00,0xd8,0x01,0x02,0x00,0x00]
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ds_add_u32 v1, v2 offset:0
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// CHECK: [0x00,0x00,0x00,0xd8,0x01,0x02,0x00,0x00]
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ds_add_u32 v1, v2 offset:4
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// CHECK: [0x04,0x00,0x00,0xd8,0x01,0x02,0x00,0x00]
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ds_add_u32 v1, v2 offset:65535 gds
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// CHECK: [0xff,0xff,0x01,0xd8,0x01,0x02,0x00,0x00]
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ds_sub_u32 v1, v2 offset:65535
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// CHECK: [0xff,0xff,0x02,0xd8,0x01,0x02,0x00,0x00]
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ds_sub_u32 v255, v2 offset:65535
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// CHECK: [0xff,0xff,0x02,0xd8,0xff,0x02,0x00,0x00]
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ds_sub_u32 v1, v255 offset:65535
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// CHECK: [0xff,0xff,0x02,0xd8,0x01,0xff,0x00,0x00]
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ds_sub_u32 v1, v2
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// CHECK: [0x00,0x00,0x02,0xd8,0x01,0x02,0x00,0x00]
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ds_sub_u32 v1, v2 offset:0
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// CHECK: [0x00,0x00,0x02,0xd8,0x01,0x02,0x00,0x00]
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ds_sub_u32 v1, v2 offset:4
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// CHECK: [0x04,0x00,0x02,0xd8,0x01,0x02,0x00,0x00]
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ds_sub_u32 v1, v2 offset:65535 gds
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// CHECK: [0xff,0xff,0x03,0xd8,0x01,0x02,0x00,0x00]
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ds_rsub_u32 v1, v2 offset:65535
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// CHECK: [0xff,0xff,0x04,0xd8,0x01,0x02,0x00,0x00]
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ds_rsub_u32 v255, v2 offset:65535
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// CHECK: [0xff,0xff,0x04,0xd8,0xff,0x02,0x00,0x00]
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ds_rsub_u32 v1, v255 offset:65535
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// CHECK: [0xff,0xff,0x04,0xd8,0x01,0xff,0x00,0x00]
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ds_rsub_u32 v1, v2
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// CHECK: [0x00,0x00,0x04,0xd8,0x01,0x02,0x00,0x00]
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ds_rsub_u32 v1, v2 offset:0
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// CHECK: [0x00,0x00,0x04,0xd8,0x01,0x02,0x00,0x00]
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ds_rsub_u32 v1, v2 offset:4
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// CHECK: [0x04,0x00,0x04,0xd8,0x01,0x02,0x00,0x00]
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ds_rsub_u32 v1, v2 offset:65535 gds
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// CHECK: [0xff,0xff,0x05,0xd8,0x01,0x02,0x00,0x00]
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ds_inc_u32 v1, v2 offset:65535
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// CHECK: [0xff,0xff,0x06,0xd8,0x01,0x02,0x00,0x00]
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ds_inc_u32 v255, v2 offset:65535
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// CHECK: [0xff,0xff,0x06,0xd8,0xff,0x02,0x00,0x00]
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ds_inc_u32 v1, v255 offset:65535
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// CHECK: [0xff,0xff,0x06,0xd8,0x01,0xff,0x00,0x00]
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ds_inc_u32 v1, v2
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// CHECK: [0x00,0x00,0x06,0xd8,0x01,0x02,0x00,0x00]
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ds_inc_u32 v1, v2 offset:0
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// CHECK: [0x00,0x00,0x06,0xd8,0x01,0x02,0x00,0x00]
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ds_inc_u32 v1, v2 offset:4
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// CHECK: [0x04,0x00,0x06,0xd8,0x01,0x02,0x00,0x00]
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ds_inc_u32 v1, v2 offset:65535 gds
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// CHECK: [0xff,0xff,0x07,0xd8,0x01,0x02,0x00,0x00]
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ds_dec_u32 v1, v2 offset:65535
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// CHECK: [0xff,0xff,0x08,0xd8,0x01,0x02,0x00,0x00]
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ds_dec_u32 v255, v2 offset:65535
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// CHECK: [0xff,0xff,0x08,0xd8,0xff,0x02,0x00,0x00]
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ds_dec_u32 v1, v255 offset:65535
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// CHECK: [0xff,0xff,0x08,0xd8,0x01,0xff,0x00,0x00]
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ds_dec_u32 v1, v2
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// CHECK: [0x00,0x00,0x08,0xd8,0x01,0x02,0x00,0x00]
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ds_dec_u32 v1, v2 offset:0
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// CHECK: [0x00,0x00,0x08,0xd8,0x01,0x02,0x00,0x00]
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ds_dec_u32 v1, v2 offset:4
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// CHECK: [0x04,0x00,0x08,0xd8,0x01,0x02,0x00,0x00]
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ds_dec_u32 v1, v2 offset:65535 gds
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// CHECK: [0xff,0xff,0x09,0xd8,0x01,0x02,0x00,0x00]
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ds_min_i32 v1, v2 offset:65535
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// CHECK: [0xff,0xff,0x0a,0xd8,0x01,0x02,0x00,0x00]
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ds_min_i32 v255, v2 offset:65535
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// CHECK: [0xff,0xff,0x0a,0xd8,0xff,0x02,0x00,0x00]
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ds_min_i32 v1, v255 offset:65535
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// CHECK: [0xff,0xff,0x0a,0xd8,0x01,0xff,0x00,0x00]
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ds_min_i32 v1, v2
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// CHECK: [0x00,0x00,0x0a,0xd8,0x01,0x02,0x00,0x00]
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ds_min_i32 v1, v2 offset:0
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// CHECK: [0x00,0x00,0x0a,0xd8,0x01,0x02,0x00,0x00]
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ds_min_i32 v1, v2 offset:4
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// CHECK: [0x04,0x00,0x0a,0xd8,0x01,0x02,0x00,0x00]
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ds_min_i32 v1, v2 offset:65535 gds
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// CHECK: [0xff,0xff,0x0b,0xd8,0x01,0x02,0x00,0x00]
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ds_max_i32 v1, v2 offset:65535
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// CHECK: [0xff,0xff,0x0c,0xd8,0x01,0x02,0x00,0x00]
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ds_max_i32 v255, v2 offset:65535
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// CHECK: [0xff,0xff,0x0c,0xd8,0xff,0x02,0x00,0x00]
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ds_max_i32 v1, v255 offset:65535
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// CHECK: [0xff,0xff,0x0c,0xd8,0x01,0xff,0x00,0x00]
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ds_max_i32 v1, v2
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// CHECK: [0x00,0x00,0x0c,0xd8,0x01,0x02,0x00,0x00]
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ds_max_i32 v1, v2 offset:0
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// CHECK: [0x00,0x00,0x0c,0xd8,0x01,0x02,0x00,0x00]
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ds_max_i32 v1, v2 offset:4
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// CHECK: [0x04,0x00,0x0c,0xd8,0x01,0x02,0x00,0x00]
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ds_max_i32 v1, v2 offset:65535 gds
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// CHECK: [0xff,0xff,0x0d,0xd8,0x01,0x02,0x00,0x00]
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ds_min_u32 v1, v2 offset:65535
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// CHECK: [0xff,0xff,0x0e,0xd8,0x01,0x02,0x00,0x00]
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ds_min_u32 v255, v2 offset:65535
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// CHECK: [0xff,0xff,0x0e,0xd8,0xff,0x02,0x00,0x00]
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ds_min_u32 v1, v255 offset:65535
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// CHECK: [0xff,0xff,0x0e,0xd8,0x01,0xff,0x00,0x00]
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ds_min_u32 v1, v2
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// CHECK: [0x00,0x00,0x0e,0xd8,0x01,0x02,0x00,0x00]
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ds_min_u32 v1, v2 offset:0
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// CHECK: [0x00,0x00,0x0e,0xd8,0x01,0x02,0x00,0x00]
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ds_min_u32 v1, v2 offset:4
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// CHECK: [0x04,0x00,0x0e,0xd8,0x01,0x02,0x00,0x00]
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ds_min_u32 v1, v2 offset:65535 gds
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// CHECK: [0xff,0xff,0x0f,0xd8,0x01,0x02,0x00,0x00]
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ds_max_u32 v1, v2 offset:65535
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// CHECK: [0xff,0xff,0x10,0xd8,0x01,0x02,0x00,0x00]
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ds_max_u32 v255, v2 offset:65535
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// CHECK: [0xff,0xff,0x10,0xd8,0xff,0x02,0x00,0x00]
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ds_max_u32 v1, v255 offset:65535
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// CHECK: [0xff,0xff,0x10,0xd8,0x01,0xff,0x00,0x00]
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ds_max_u32 v1, v2
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// CHECK: [0x00,0x00,0x10,0xd8,0x01,0x02,0x00,0x00]
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ds_max_u32 v1, v2 offset:0
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// CHECK: [0x00,0x00,0x10,0xd8,0x01,0x02,0x00,0x00]
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ds_max_u32 v1, v2 offset:4
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// CHECK: [0x04,0x00,0x10,0xd8,0x01,0x02,0x00,0x00]
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ds_max_u32 v1, v2 offset:65535 gds
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// CHECK: [0xff,0xff,0x11,0xd8,0x01,0x02,0x00,0x00]
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ds_and_b32 v1, v2 offset:65535
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// CHECK: [0xff,0xff,0x12,0xd8,0x01,0x02,0x00,0x00]
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ds_and_b32 v255, v2 offset:65535
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// CHECK: [0xff,0xff,0x12,0xd8,0xff,0x02,0x00,0x00]
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ds_and_b32 v1, v255 offset:65535
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// CHECK: [0xff,0xff,0x12,0xd8,0x01,0xff,0x00,0x00]
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ds_and_b32 v1, v2
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// CHECK: [0x00,0x00,0x12,0xd8,0x01,0x02,0x00,0x00]
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ds_and_b32 v1, v2 offset:0
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// CHECK: [0x00,0x00,0x12,0xd8,0x01,0x02,0x00,0x00]
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ds_and_b32 v1, v2 offset:4
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// CHECK: [0x04,0x00,0x12,0xd8,0x01,0x02,0x00,0x00]
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ds_and_b32 v1, v2 offset:65535 gds
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// CHECK: [0xff,0xff,0x13,0xd8,0x01,0x02,0x00,0x00]
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ds_or_b32 v1, v2 offset:65535
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// CHECK: [0xff,0xff,0x14,0xd8,0x01,0x02,0x00,0x00]
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ds_or_b32 v255, v2 offset:65535
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// CHECK: [0xff,0xff,0x14,0xd8,0xff,0x02,0x00,0x00]
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ds_or_b32 v1, v255 offset:65535
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// CHECK: [0xff,0xff,0x14,0xd8,0x01,0xff,0x00,0x00]
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ds_or_b32 v1, v2
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// CHECK: [0x00,0x00,0x14,0xd8,0x01,0x02,0x00,0x00]
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ds_or_b32 v1, v2 offset:0
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// CHECK: [0x00,0x00,0x14,0xd8,0x01,0x02,0x00,0x00]
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ds_or_b32 v1, v2 offset:4
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// CHECK: [0x04,0x00,0x14,0xd8,0x01,0x02,0x00,0x00]
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ds_or_b32 v1, v2 offset:65535 gds
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// CHECK: [0xff,0xff,0x15,0xd8,0x01,0x02,0x00,0x00]
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ds_xor_b32 v1, v2 offset:65535
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// CHECK: [0xff,0xff,0x16,0xd8,0x01,0x02,0x00,0x00]
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ds_xor_b32 v255, v2 offset:65535
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// CHECK: [0xff,0xff,0x16,0xd8,0xff,0x02,0x00,0x00]
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ds_xor_b32 v1, v255 offset:65535
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// CHECK: [0xff,0xff,0x16,0xd8,0x01,0xff,0x00,0x00]
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ds_xor_b32 v1, v2
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// CHECK: [0x00,0x00,0x16,0xd8,0x01,0x02,0x00,0x00]
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ds_xor_b32 v1, v2 offset:0
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// CHECK: [0x00,0x00,0x16,0xd8,0x01,0x02,0x00,0x00]
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ds_xor_b32 v1, v2 offset:4
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// CHECK: [0x04,0x00,0x16,0xd8,0x01,0x02,0x00,0x00]
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ds_xor_b32 v1, v2 offset:65535 gds
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// CHECK: [0xff,0xff,0x17,0xd8,0x01,0x02,0x00,0x00]
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ds_mskor_b32 v1, v2, v3 offset:65535
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// CHECK: [0xff,0xff,0x18,0xd8,0x01,0x02,0x03,0x00]
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ds_mskor_b32 v255, v2, v3 offset:65535
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// CHECK: [0xff,0xff,0x18,0xd8,0xff,0x02,0x03,0x00]
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ds_mskor_b32 v1, v255, v3 offset:65535
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// CHECK: [0xff,0xff,0x18,0xd8,0x01,0xff,0x03,0x00]
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ds_mskor_b32 v1, v2, v255 offset:65535
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// CHECK: [0xff,0xff,0x18,0xd8,0x01,0x02,0xff,0x00]
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ds_mskor_b32 v1, v2, v3
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// CHECK: [0x00,0x00,0x18,0xd8,0x01,0x02,0x03,0x00]
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ds_mskor_b32 v1, v2, v3 offset:0
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// CHECK: [0x00,0x00,0x18,0xd8,0x01,0x02,0x03,0x00]
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ds_mskor_b32 v1, v2, v3 offset:4
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// CHECK: [0x04,0x00,0x18,0xd8,0x01,0x02,0x03,0x00]
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ds_mskor_b32 v1, v2, v3 offset:65535 gds
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// CHECK: [0xff,0xff,0x19,0xd8,0x01,0x02,0x03,0x00]
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ds_write_b32 v1, v2 offset:65535
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// CHECK: [0xff,0xff,0x1a,0xd8,0x01,0x02,0x00,0x00]
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ds_write_b32 v255, v2 offset:65535
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// CHECK: [0xff,0xff,0x1a,0xd8,0xff,0x02,0x00,0x00]
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ds_write_b32 v1, v255 offset:65535
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// CHECK: [0xff,0xff,0x1a,0xd8,0x01,0xff,0x00,0x00]
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ds_write_b32 v1, v2
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// CHECK: [0x00,0x00,0x1a,0xd8,0x01,0x02,0x00,0x00]
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ds_write_b32 v1, v2 offset:0
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// CHECK: [0x00,0x00,0x1a,0xd8,0x01,0x02,0x00,0x00]
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ds_write_b32 v1, v2 offset:4
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// CHECK: [0x04,0x00,0x1a,0xd8,0x01,0x02,0x00,0x00]
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ds_write_b32 v1, v2 offset:65535 gds
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// CHECK: [0xff,0xff,0x1b,0xd8,0x01,0x02,0x00,0x00]
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ds_write2_b32 v1, v2, v3 offset0:127 offset1:255
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// CHECK: [0x7f,0xff,0x1c,0xd8,0x01,0x02,0x03,0x00]
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ds_write2_b32 v255, v2, v3 offset0:127 offset1:255
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// CHECK: [0x7f,0xff,0x1c,0xd8,0xff,0x02,0x03,0x00]
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ds_write2_b32 v1, v255, v3 offset0:127 offset1:255
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// CHECK: [0x7f,0xff,0x1c,0xd8,0x01,0xff,0x03,0x00]
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ds_write2_b32 v1, v2, v255 offset0:127 offset1:255
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// CHECK: [0x7f,0xff,0x1c,0xd8,0x01,0x02,0xff,0x00]
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ds_write2_b32 v1, v2, v3 offset1:255
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// CHECK: [0x00,0xff,0x1c,0xd8,0x01,0x02,0x03,0x00]
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ds_write2_b32 v1, v2, v3 offset0:0 offset1:255
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// CHECK: [0x00,0xff,0x1c,0xd8,0x01,0x02,0x03,0x00]
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ds_write2_b32 v1, v2, v3 offset0:16 offset1:255
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// CHECK: [0x10,0xff,0x1c,0xd8,0x01,0x02,0x03,0x00]
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ds_write2_b32 v1, v2, v3 offset0:127
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// CHECK: [0x7f,0x00,0x1c,0xd8,0x01,0x02,0x03,0x00]
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ds_write2_b32 v1, v2, v3 offset0:127 offset1:0
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// CHECK: [0x7f,0x00,0x1c,0xd8,0x01,0x02,0x03,0x00]
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ds_write2_b32 v1, v2, v3 offset0:127 offset1:1
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// CHECK: [0x7f,0x01,0x1c,0xd8,0x01,0x02,0x03,0x00]
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ds_write2_b32 v1, v2, v3 offset0:127 offset1:255 gds
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// CHECK: [0x7f,0xff,0x1d,0xd8,0x01,0x02,0x03,0x00]
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ds_write2st64_b32 v1, v2, v3 offset0:127 offset1:255
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// CHECK: [0x7f,0xff,0x1e,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b32 v255, v2, v3 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x1e,0xd8,0xff,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b32 v1, v255, v3 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x1e,0xd8,0x01,0xff,0x03,0x00]
|
|
|
|
ds_write2st64_b32 v1, v2, v255 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x1e,0xd8,0x01,0x02,0xff,0x00]
|
|
|
|
ds_write2st64_b32 v1, v2, v3 offset1:255
|
|
// CHECK: [0x00,0xff,0x1e,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b32 v1, v2, v3 offset0:0 offset1:255
|
|
// CHECK: [0x00,0xff,0x1e,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b32 v1, v2, v3 offset0:16 offset1:255
|
|
// CHECK: [0x10,0xff,0x1e,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b32 v1, v2, v3 offset0:127
|
|
// CHECK: [0x7f,0x00,0x1e,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b32 v1, v2, v3 offset0:127 offset1:0
|
|
// CHECK: [0x7f,0x00,0x1e,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b32 v1, v2, v3 offset0:127 offset1:1
|
|
// CHECK: [0x7f,0x01,0x1e,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b32 v1, v2, v3 offset0:127 offset1:255 gds
|
|
// CHECK: [0x7f,0xff,0x1f,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_b32 v1, v2, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x20,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_b32 v255, v2, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x20,0xd8,0xff,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_b32 v1, v255, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x20,0xd8,0x01,0xff,0x03,0x00]
|
|
|
|
ds_cmpst_b32 v1, v2, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x20,0xd8,0x01,0x02,0xff,0x00]
|
|
|
|
ds_cmpst_b32 v1, v2, v3
|
|
// CHECK: [0x00,0x00,0x20,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_b32 v1, v2, v3 offset:0
|
|
// CHECK: [0x00,0x00,0x20,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_b32 v1, v2, v3 offset:4
|
|
// CHECK: [0x04,0x00,0x20,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_b32 v1, v2, v3 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x21,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_f32 v1, v2, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x22,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_f32 v255, v2, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x22,0xd8,0xff,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_f32 v1, v255, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x22,0xd8,0x01,0xff,0x03,0x00]
|
|
|
|
ds_cmpst_f32 v1, v2, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x22,0xd8,0x01,0x02,0xff,0x00]
|
|
|
|
ds_cmpst_f32 v1, v2, v3
|
|
// CHECK: [0x00,0x00,0x22,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_f32 v1, v2, v3 offset:0
|
|
// CHECK: [0x00,0x00,0x22,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_f32 v1, v2, v3 offset:4
|
|
// CHECK: [0x04,0x00,0x22,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_f32 v1, v2, v3 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x23,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_min_f32 v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x24,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_f32 v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x24,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_min_f32 v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x24,0xd8,0x01,0xff,0x00,0x00]
|
|
|
|
ds_min_f32 v1, v2
|
|
// CHECK: [0x00,0x00,0x24,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_f32 v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x24,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_f32 v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x24,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_f32 v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x25,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_f32 v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x26,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_f32 v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x26,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_max_f32 v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x26,0xd8,0x01,0xff,0x00,0x00]
|
|
|
|
ds_max_f32 v1, v2
|
|
// CHECK: [0x00,0x00,0x26,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_f32 v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x26,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_f32 v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x26,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_f32 v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x27,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_nop
|
|
// CHECK: [0x00,0x00,0x28,0xd8,0x00,0x00,0x00,0x00]
|
|
|
|
ds_add_f32 v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x2a,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_add_f32 v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x2a,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_add_f32 v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x2a,0xd8,0x01,0xff,0x00,0x00]
|
|
|
|
ds_add_f32 v1, v2
|
|
// CHECK: [0x00,0x00,0x2a,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_add_f32 v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x2a,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_add_f32 v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x2a,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_add_f32 v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x2b,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b8 v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x3c,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b8 v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x3c,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_write_b8 v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x3c,0xd8,0x01,0xff,0x00,0x00]
|
|
|
|
ds_write_b8 v1, v2
|
|
// CHECK: [0x00,0x00,0x3c,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b8 v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x3c,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b8 v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x3c,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b8 v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x3d,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b16 v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x3e,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b16 v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x3e,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_write_b16 v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x3e,0xd8,0x01,0xff,0x00,0x00]
|
|
|
|
ds_write_b16 v1, v2
|
|
// CHECK: [0x00,0x00,0x3e,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b16 v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x3e,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b16 v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x3e,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b16 v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x3f,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_add_rtn_u32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x40,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_add_rtn_u32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x40,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_add_rtn_u32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x40,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_add_rtn_u32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x40,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_add_rtn_u32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x40,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_add_rtn_u32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x40,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_add_rtn_u32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x40,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_add_rtn_u32 v5, v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x41,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_sub_rtn_u32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x42,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_sub_rtn_u32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x42,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_sub_rtn_u32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x42,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_sub_rtn_u32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x42,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_sub_rtn_u32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x42,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_sub_rtn_u32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x42,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_sub_rtn_u32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x42,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_sub_rtn_u32 v5, v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x43,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_rsub_rtn_u32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x44,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_rsub_rtn_u32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x44,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_rsub_rtn_u32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x44,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_rsub_rtn_u32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x44,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_rsub_rtn_u32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x44,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_rsub_rtn_u32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x44,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_rsub_rtn_u32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x44,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_rsub_rtn_u32 v5, v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x45,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_inc_rtn_u32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x46,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_inc_rtn_u32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x46,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_inc_rtn_u32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x46,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_inc_rtn_u32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x46,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_inc_rtn_u32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x46,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_inc_rtn_u32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x46,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_inc_rtn_u32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x46,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_inc_rtn_u32 v5, v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x47,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_dec_rtn_u32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x48,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_dec_rtn_u32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x48,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_dec_rtn_u32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x48,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_dec_rtn_u32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x48,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_dec_rtn_u32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x48,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_dec_rtn_u32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x48,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_dec_rtn_u32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x48,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_dec_rtn_u32 v5, v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x49,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_i32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x4a,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_i32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x4a,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_min_rtn_i32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x4a,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_i32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x4a,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_min_rtn_i32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x4a,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_i32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x4a,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_i32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x4a,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_i32 v5, v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x4b,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_i32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x4c,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_i32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x4c,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_max_rtn_i32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x4c,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_i32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x4c,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_max_rtn_i32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x4c,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_i32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x4c,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_i32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x4c,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_i32 v5, v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x4d,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_u32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x4e,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_u32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x4e,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_min_rtn_u32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x4e,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_u32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x4e,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_min_rtn_u32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x4e,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_u32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x4e,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_u32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x4e,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_u32 v5, v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x4f,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_u32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x50,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_u32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x50,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_max_rtn_u32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x50,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_u32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x50,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_max_rtn_u32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x50,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_u32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x50,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_u32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x50,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_u32 v5, v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x51,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_and_rtn_b32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x52,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_and_rtn_b32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x52,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_and_rtn_b32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x52,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_and_rtn_b32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x52,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_and_rtn_b32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x52,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_and_rtn_b32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x52,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_and_rtn_b32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x52,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_and_rtn_b32 v5, v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x53,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_or_rtn_b32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x54,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_or_rtn_b32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x54,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_or_rtn_b32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x54,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_or_rtn_b32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x54,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_or_rtn_b32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x54,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_or_rtn_b32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x54,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_or_rtn_b32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x54,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_or_rtn_b32 v5, v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x55,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_xor_rtn_b32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x56,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_xor_rtn_b32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x56,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_xor_rtn_b32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x56,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_xor_rtn_b32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x56,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_xor_rtn_b32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x56,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_xor_rtn_b32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x56,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_xor_rtn_b32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x56,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_xor_rtn_b32 v5, v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x57,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_mskor_rtn_b32 v5, v1, v2, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x58,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_mskor_rtn_b32 v255, v1, v2, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x58,0xd8,0x01,0x02,0x03,0xff]
|
|
|
|
ds_mskor_rtn_b32 v5, v255, v2, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x58,0xd8,0xff,0x02,0x03,0x05]
|
|
|
|
ds_mskor_rtn_b32 v5, v1, v255, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x58,0xd8,0x01,0xff,0x03,0x05]
|
|
|
|
ds_mskor_rtn_b32 v5, v1, v2, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x58,0xd8,0x01,0x02,0xff,0x05]
|
|
|
|
ds_mskor_rtn_b32 v5, v1, v2, v3
|
|
// CHECK: [0x00,0x00,0x58,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_mskor_rtn_b32 v5, v1, v2, v3 offset:0
|
|
// CHECK: [0x00,0x00,0x58,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_mskor_rtn_b32 v5, v1, v2, v3 offset:4
|
|
// CHECK: [0x04,0x00,0x58,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_mskor_rtn_b32 v5, v1, v2, v3 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x59,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg_rtn_b32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x5a,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_wrxchg_rtn_b32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x5a,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_wrxchg_rtn_b32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x5a,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_wrxchg_rtn_b32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x5a,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_wrxchg_rtn_b32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x5a,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_wrxchg_rtn_b32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x5a,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_wrxchg_rtn_b32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x5a,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_wrxchg_rtn_b32 v5, v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x5b,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_wrxchg2_rtn_b32 v[5:6], v1, v2, v3 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x5c,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b32 v[254:255], v1, v2, v3 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x5c,0xd8,0x01,0x02,0x03,0xfe]
|
|
|
|
ds_wrxchg2_rtn_b32 v[5:6], v255, v2, v3 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x5c,0xd8,0xff,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b32 v[5:6], v1, v255, v3 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x5c,0xd8,0x01,0xff,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b32 v[5:6], v1, v2, v255 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x5c,0xd8,0x01,0x02,0xff,0x05]
|
|
|
|
ds_wrxchg2_rtn_b32 v[5:6], v1, v2, v3 offset1:255
|
|
// CHECK: [0x00,0xff,0x5c,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b32 v[5:6], v1, v2, v3 offset0:0 offset1:255
|
|
// CHECK: [0x00,0xff,0x5c,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b32 v[5:6], v1, v2, v3 offset0:16 offset1:255
|
|
// CHECK: [0x10,0xff,0x5c,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b32 v[5:6], v1, v2, v3 offset0:127
|
|
// CHECK: [0x7f,0x00,0x5c,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b32 v[5:6], v1, v2, v3 offset0:127 offset1:0
|
|
// CHECK: [0x7f,0x00,0x5c,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b32 v[5:6], v1, v2, v3 offset0:127 offset1:1
|
|
// CHECK: [0x7f,0x01,0x5c,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b32 v[5:6], v1, v2, v3 offset0:127 offset1:255 gds
|
|
// CHECK: [0x7f,0xff,0x5d,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b32 v[5:6], v1, v2, v3 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x5e,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b32 v[254:255], v1, v2, v3 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x5e,0xd8,0x01,0x02,0x03,0xfe]
|
|
|
|
ds_wrxchg2st64_rtn_b32 v[5:6], v255, v2, v3 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x5e,0xd8,0xff,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b32 v[5:6], v1, v255, v3 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x5e,0xd8,0x01,0xff,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b32 v[5:6], v1, v2, v255 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x5e,0xd8,0x01,0x02,0xff,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b32 v[5:6], v1, v2, v3 offset1:255
|
|
// CHECK: [0x00,0xff,0x5e,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b32 v[5:6], v1, v2, v3 offset0:0 offset1:255
|
|
// CHECK: [0x00,0xff,0x5e,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b32 v[5:6], v1, v2, v3 offset0:16 offset1:255
|
|
// CHECK: [0x10,0xff,0x5e,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b32 v[5:6], v1, v2, v3 offset0:127
|
|
// CHECK: [0x7f,0x00,0x5e,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b32 v[5:6], v1, v2, v3 offset0:127 offset1:0
|
|
// CHECK: [0x7f,0x00,0x5e,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b32 v[5:6], v1, v2, v3 offset0:127 offset1:1
|
|
// CHECK: [0x7f,0x01,0x5e,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b32 v[5:6], v1, v2, v3 offset0:127 offset1:255 gds
|
|
// CHECK: [0x7f,0xff,0x5f,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_b32 v5, v1, v2, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x60,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_b32 v255, v1, v2, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x60,0xd8,0x01,0x02,0x03,0xff]
|
|
|
|
ds_cmpst_rtn_b32 v5, v255, v2, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x60,0xd8,0xff,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_b32 v5, v1, v255, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x60,0xd8,0x01,0xff,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_b32 v5, v1, v2, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x60,0xd8,0x01,0x02,0xff,0x05]
|
|
|
|
ds_cmpst_rtn_b32 v5, v1, v2, v3
|
|
// CHECK: [0x00,0x00,0x60,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_b32 v5, v1, v2, v3 offset:0
|
|
// CHECK: [0x00,0x00,0x60,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_b32 v5, v1, v2, v3 offset:4
|
|
// CHECK: [0x04,0x00,0x60,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_b32 v5, v1, v2, v3 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x61,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_f32 v5, v1, v2, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x62,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_f32 v255, v1, v2, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x62,0xd8,0x01,0x02,0x03,0xff]
|
|
|
|
ds_cmpst_rtn_f32 v5, v255, v2, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x62,0xd8,0xff,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_f32 v5, v1, v255, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x62,0xd8,0x01,0xff,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_f32 v5, v1, v2, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x62,0xd8,0x01,0x02,0xff,0x05]
|
|
|
|
ds_cmpst_rtn_f32 v5, v1, v2, v3
|
|
// CHECK: [0x00,0x00,0x62,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_f32 v5, v1, v2, v3 offset:0
|
|
// CHECK: [0x00,0x00,0x62,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_f32 v5, v1, v2, v3 offset:4
|
|
// CHECK: [0x04,0x00,0x62,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_f32 v5, v1, v2, v3 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x63,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_min_rtn_f32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x64,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_f32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x64,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_min_rtn_f32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x64,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_f32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x64,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_min_rtn_f32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x64,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_f32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x64,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_f32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x64,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_f32 v5, v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x65,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_f32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x66,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_f32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x66,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_max_rtn_f32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x66,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_f32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x66,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_max_rtn_f32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x66,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_f32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x66,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_f32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x66,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_f32 v5, v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x67,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_wrap_rtn_b32 v5, v1, v2, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x68,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrap_rtn_b32 v255, v1, v2, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x68,0xd8,0x01,0x02,0x03,0xff]
|
|
|
|
ds_wrap_rtn_b32 v5, v255, v2, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x68,0xd8,0xff,0x02,0x03,0x05]
|
|
|
|
ds_wrap_rtn_b32 v5, v1, v255, v3 offset:65535
|
|
// CHECK: [0xff,0xff,0x68,0xd8,0x01,0xff,0x03,0x05]
|
|
|
|
ds_wrap_rtn_b32 v5, v1, v2, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x68,0xd8,0x01,0x02,0xff,0x05]
|
|
|
|
ds_wrap_rtn_b32 v5, v1, v2, v3
|
|
// CHECK: [0x00,0x00,0x68,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrap_rtn_b32 v5, v1, v2, v3 offset:0
|
|
// CHECK: [0x00,0x00,0x68,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrap_rtn_b32 v5, v1, v2, v3 offset:4
|
|
// CHECK: [0x04,0x00,0x68,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrap_rtn_b32 v5, v1, v2, v3 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x69,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_add_rtn_f32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x6a,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_add_rtn_f32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x6a,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_add_rtn_f32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x6a,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_add_rtn_f32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x6a,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_add_rtn_f32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x6a,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_add_rtn_f32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x6a,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_add_rtn_f32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x6a,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_add_rtn_f32 v5, v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x6b,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_read_b32 v5, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x6c,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b32 v255, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x6c,0xd8,0x01,0x00,0x00,0xff]
|
|
|
|
ds_read_b32 v5, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x6c,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read_b32 v5, v1
|
|
// CHECK: [0x00,0x00,0x6c,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b32 v5, v1 offset:0
|
|
// CHECK: [0x00,0x00,0x6c,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b32 v5, v1 offset:4
|
|
// CHECK: [0x04,0x00,0x6c,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b32 v5, v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x6d,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2_b32 v[5:6], v1 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x6e,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2_b32 v[254:255], v1 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x6e,0xd8,0x01,0x00,0x00,0xfe]
|
|
|
|
ds_read2_b32 v[5:6], v255 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x6e,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read2_b32 v[5:6], v1 offset1:255
|
|
// CHECK: [0x00,0xff,0x6e,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2_b32 v[5:6], v1 offset0:0 offset1:255
|
|
// CHECK: [0x00,0xff,0x6e,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2_b32 v[5:6], v1 offset0:16 offset1:255
|
|
// CHECK: [0x10,0xff,0x6e,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2_b32 v[5:6], v1 offset0:127
|
|
// CHECK: [0x7f,0x00,0x6e,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2_b32 v[5:6], v1 offset0:127 offset1:0
|
|
// CHECK: [0x7f,0x00,0x6e,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2_b32 v[5:6], v1 offset0:127 offset1:1
|
|
// CHECK: [0x7f,0x01,0x6e,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2_b32 v[5:6], v1 offset0:127 offset1:255 gds
|
|
// CHECK: [0x7f,0xff,0x6f,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b32 v[5:6], v1 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x70,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b32 v[254:255], v1 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x70,0xd8,0x01,0x00,0x00,0xfe]
|
|
|
|
ds_read2st64_b32 v[5:6], v255 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x70,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b32 v[5:6], v1 offset1:255
|
|
// CHECK: [0x00,0xff,0x70,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b32 v[5:6], v1 offset0:0 offset1:255
|
|
// CHECK: [0x00,0xff,0x70,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b32 v[5:6], v1 offset0:16 offset1:255
|
|
// CHECK: [0x10,0xff,0x70,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b32 v[5:6], v1 offset0:127
|
|
// CHECK: [0x7f,0x00,0x70,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b32 v[5:6], v1 offset0:127 offset1:0
|
|
// CHECK: [0x7f,0x00,0x70,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b32 v[5:6], v1 offset0:127 offset1:1
|
|
// CHECK: [0x7f,0x01,0x70,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b32 v[5:6], v1 offset0:127 offset1:255 gds
|
|
// CHECK: [0x7f,0xff,0x71,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i8 v5, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x72,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i8 v255, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x72,0xd8,0x01,0x00,0x00,0xff]
|
|
|
|
ds_read_i8 v5, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x72,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read_i8 v5, v1
|
|
// CHECK: [0x00,0x00,0x72,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i8 v5, v1 offset:0
|
|
// CHECK: [0x00,0x00,0x72,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i8 v5, v1 offset:4
|
|
// CHECK: [0x04,0x00,0x72,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i8 v5, v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x73,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u8 v5, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x74,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u8 v255, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x74,0xd8,0x01,0x00,0x00,0xff]
|
|
|
|
ds_read_u8 v5, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x74,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read_u8 v5, v1
|
|
// CHECK: [0x00,0x00,0x74,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u8 v5, v1 offset:0
|
|
// CHECK: [0x00,0x00,0x74,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u8 v5, v1 offset:4
|
|
// CHECK: [0x04,0x00,0x74,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u8 v5, v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x75,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i16 v5, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x76,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i16 v255, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x76,0xd8,0x01,0x00,0x00,0xff]
|
|
|
|
ds_read_i16 v5, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x76,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read_i16 v5, v1
|
|
// CHECK: [0x00,0x00,0x76,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i16 v5, v1 offset:0
|
|
// CHECK: [0x00,0x00,0x76,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i16 v5, v1 offset:4
|
|
// CHECK: [0x04,0x00,0x76,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i16 v5, v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x77,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u16 v5, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x78,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u16 v255, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x78,0xd8,0x01,0x00,0x00,0xff]
|
|
|
|
ds_read_u16 v5, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x78,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read_u16 v5, v1
|
|
// CHECK: [0x00,0x00,0x78,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u16 v5, v1 offset:0
|
|
// CHECK: [0x00,0x00,0x78,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u16 v5, v1 offset:4
|
|
// CHECK: [0x04,0x00,0x78,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u16 v5, v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x79,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_swizzle_b32 v5, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x7a,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_swizzle_b32 v255, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x7a,0xd8,0x01,0x00,0x00,0xff]
|
|
|
|
ds_swizzle_b32 v5, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x7a,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_swizzle_b32 v5, v1
|
|
// CHECK: [0x00,0x00,0x7a,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_swizzle_b32 v5, v1 offset:0
|
|
// CHECK: [0x00,0x00,0x7a,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_swizzle_b32 v5, v1 offset:4
|
|
// CHECK: [0x04,0x00,0x7a,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_swizzle_b32 v5, v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x7b,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_permute_b32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x7c,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_permute_b32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x7c,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_permute_b32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x7c,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_permute_b32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x7c,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_permute_b32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x7c,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_permute_b32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x7c,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_permute_b32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x7c,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_bpermute_b32 v5, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x7e,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_bpermute_b32 v255, v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x7e,0xd8,0x01,0x02,0x00,0xff]
|
|
|
|
ds_bpermute_b32 v5, v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0x7e,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_bpermute_b32 v5, v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x7e,0xd8,0x01,0xff,0x00,0x05]
|
|
|
|
ds_bpermute_b32 v5, v1, v2
|
|
// CHECK: [0x00,0x00,0x7e,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_bpermute_b32 v5, v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0x7e,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_bpermute_b32 v5, v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0x7e,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_add_u64 v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x80,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_add_u64 v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x80,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_add_u64 v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0x80,0xd8,0x01,0xfe,0x00,0x00]
|
|
|
|
ds_add_u64 v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0x80,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_add_u64 v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x80,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_add_u64 v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0x80,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_add_u64 v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x81,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_sub_u64 v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x82,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_sub_u64 v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x82,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_sub_u64 v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0x82,0xd8,0x01,0xfe,0x00,0x00]
|
|
|
|
ds_sub_u64 v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0x82,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_sub_u64 v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x82,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_sub_u64 v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0x82,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_sub_u64 v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x83,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_rsub_u64 v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x84,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_rsub_u64 v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x84,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_rsub_u64 v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0x84,0xd8,0x01,0xfe,0x00,0x00]
|
|
|
|
ds_rsub_u64 v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0x84,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_rsub_u64 v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x84,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_rsub_u64 v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0x84,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_rsub_u64 v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x85,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_inc_u64 v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x86,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_inc_u64 v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x86,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_inc_u64 v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0x86,0xd8,0x01,0xfe,0x00,0x00]
|
|
|
|
ds_inc_u64 v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0x86,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_inc_u64 v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x86,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_inc_u64 v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0x86,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_inc_u64 v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x87,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_dec_u64 v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x88,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_dec_u64 v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x88,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_dec_u64 v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0x88,0xd8,0x01,0xfe,0x00,0x00]
|
|
|
|
ds_dec_u64 v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0x88,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_dec_u64 v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x88,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_dec_u64 v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0x88,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_dec_u64 v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x89,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_i64 v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x8a,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_i64 v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x8a,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_min_i64 v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0x8a,0xd8,0x01,0xfe,0x00,0x00]
|
|
|
|
ds_min_i64 v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0x8a,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_i64 v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x8a,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_i64 v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0x8a,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_i64 v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x8b,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_i64 v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x8c,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_i64 v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x8c,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_max_i64 v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0x8c,0xd8,0x01,0xfe,0x00,0x00]
|
|
|
|
ds_max_i64 v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0x8c,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_i64 v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x8c,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_i64 v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0x8c,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_i64 v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x8d,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_u64 v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x8e,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_u64 v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x8e,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_min_u64 v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0x8e,0xd8,0x01,0xfe,0x00,0x00]
|
|
|
|
ds_min_u64 v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0x8e,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_u64 v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x8e,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_u64 v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0x8e,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_u64 v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x8f,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_u64 v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x90,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_u64 v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x90,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_max_u64 v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0x90,0xd8,0x01,0xfe,0x00,0x00]
|
|
|
|
ds_max_u64 v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0x90,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_u64 v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x90,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_u64 v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0x90,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_u64 v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x91,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_and_b64 v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x92,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_and_b64 v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x92,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_and_b64 v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0x92,0xd8,0x01,0xfe,0x00,0x00]
|
|
|
|
ds_and_b64 v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0x92,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_and_b64 v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x92,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_and_b64 v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0x92,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_and_b64 v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x93,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_or_b64 v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x94,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_or_b64 v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x94,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_or_b64 v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0x94,0xd8,0x01,0xfe,0x00,0x00]
|
|
|
|
ds_or_b64 v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0x94,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_or_b64 v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x94,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_or_b64 v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0x94,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_or_b64 v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x95,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_xor_b64 v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x96,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_xor_b64 v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x96,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_xor_b64 v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0x96,0xd8,0x01,0xfe,0x00,0x00]
|
|
|
|
ds_xor_b64 v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0x96,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_xor_b64 v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x96,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_xor_b64 v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0x96,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_xor_b64 v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x97,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_mskor_b64 v1, v[2:3], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0x98,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_mskor_b64 v255, v[2:3], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0x98,0xd8,0xff,0x02,0x03,0x00]
|
|
|
|
ds_mskor_b64 v1, v[254:255], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0x98,0xd8,0x01,0xfe,0x03,0x00]
|
|
|
|
ds_mskor_b64 v1, v[2:3], v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0x98,0xd8,0x01,0x02,0xfe,0x00]
|
|
|
|
ds_mskor_b64 v1, v[2:3], v[3:4]
|
|
// CHECK: [0x00,0x00,0x98,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_mskor_b64 v1, v[2:3], v[3:4] offset:0
|
|
// CHECK: [0x00,0x00,0x98,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_mskor_b64 v1, v[2:3], v[3:4] offset:4
|
|
// CHECK: [0x04,0x00,0x98,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_mskor_b64 v1, v[2:3], v[3:4] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x99,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write_b64 v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x9a,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b64 v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0x9a,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_write_b64 v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0x9a,0xd8,0x01,0xfe,0x00,0x00]
|
|
|
|
ds_write_b64 v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0x9a,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b64 v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x9a,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b64 v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0x9a,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b64 v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x9b,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write2_b64 v1, v[2:3], v[3:4] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x9c,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2_b64 v255, v[2:3], v[3:4] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x9c,0xd8,0xff,0x02,0x03,0x00]
|
|
|
|
ds_write2_b64 v1, v[254:255], v[3:4] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x9c,0xd8,0x01,0xfe,0x03,0x00]
|
|
|
|
ds_write2_b64 v1, v[2:3], v[254:255] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x9c,0xd8,0x01,0x02,0xfe,0x00]
|
|
|
|
ds_write2_b64 v1, v[2:3], v[3:4] offset1:255
|
|
// CHECK: [0x00,0xff,0x9c,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2_b64 v1, v[2:3], v[3:4] offset0:0 offset1:255
|
|
// CHECK: [0x00,0xff,0x9c,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2_b64 v1, v[2:3], v[3:4] offset0:16 offset1:255
|
|
// CHECK: [0x10,0xff,0x9c,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2_b64 v1, v[2:3], v[3:4] offset0:127
|
|
// CHECK: [0x7f,0x00,0x9c,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2_b64 v1, v[2:3], v[3:4] offset0:127 offset1:0
|
|
// CHECK: [0x7f,0x00,0x9c,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2_b64 v1, v[2:3], v[3:4] offset0:127 offset1:1
|
|
// CHECK: [0x7f,0x01,0x9c,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2_b64 v1, v[2:3], v[3:4] offset0:127 offset1:255 gds
|
|
// CHECK: [0x7f,0xff,0x9d,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b64 v1, v[2:3], v[3:4] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x9e,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b64 v255, v[2:3], v[3:4] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x9e,0xd8,0xff,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b64 v1, v[254:255], v[3:4] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x9e,0xd8,0x01,0xfe,0x03,0x00]
|
|
|
|
ds_write2st64_b64 v1, v[2:3], v[254:255] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0x9e,0xd8,0x01,0x02,0xfe,0x00]
|
|
|
|
ds_write2st64_b64 v1, v[2:3], v[3:4] offset1:255
|
|
// CHECK: [0x00,0xff,0x9e,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b64 v1, v[2:3], v[3:4] offset0:0 offset1:255
|
|
// CHECK: [0x00,0xff,0x9e,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b64 v1, v[2:3], v[3:4] offset0:16 offset1:255
|
|
// CHECK: [0x10,0xff,0x9e,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b64 v1, v[2:3], v[3:4] offset0:127
|
|
// CHECK: [0x7f,0x00,0x9e,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b64 v1, v[2:3], v[3:4] offset0:127 offset1:0
|
|
// CHECK: [0x7f,0x00,0x9e,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b64 v1, v[2:3], v[3:4] offset0:127 offset1:1
|
|
// CHECK: [0x7f,0x01,0x9e,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_write2st64_b64 v1, v[2:3], v[3:4] offset0:127 offset1:255 gds
|
|
// CHECK: [0x7f,0xff,0x9f,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_b64 v1, v[2:3], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xa0,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_b64 v255, v[2:3], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xa0,0xd8,0xff,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_b64 v1, v[254:255], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xa0,0xd8,0x01,0xfe,0x03,0x00]
|
|
|
|
ds_cmpst_b64 v1, v[2:3], v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xa0,0xd8,0x01,0x02,0xfe,0x00]
|
|
|
|
ds_cmpst_b64 v1, v[2:3], v[3:4]
|
|
// CHECK: [0x00,0x00,0xa0,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_b64 v1, v[2:3], v[3:4] offset:0
|
|
// CHECK: [0x00,0x00,0xa0,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_b64 v1, v[2:3], v[3:4] offset:4
|
|
// CHECK: [0x04,0x00,0xa0,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_b64 v1, v[2:3], v[3:4] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xa1,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_f64 v1, v[2:3], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xa2,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_f64 v255, v[2:3], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xa2,0xd8,0xff,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_f64 v1, v[254:255], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xa2,0xd8,0x01,0xfe,0x03,0x00]
|
|
|
|
ds_cmpst_f64 v1, v[2:3], v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xa2,0xd8,0x01,0x02,0xfe,0x00]
|
|
|
|
ds_cmpst_f64 v1, v[2:3], v[3:4]
|
|
// CHECK: [0x00,0x00,0xa2,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_f64 v1, v[2:3], v[3:4] offset:0
|
|
// CHECK: [0x00,0x00,0xa2,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_f64 v1, v[2:3], v[3:4] offset:4
|
|
// CHECK: [0x04,0x00,0xa2,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_cmpst_f64 v1, v[2:3], v[3:4] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xa3,0xd8,0x01,0x02,0x03,0x00]
|
|
|
|
ds_min_f64 v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xa4,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_f64 v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xa4,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_min_f64 v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xa4,0xd8,0x01,0xfe,0x00,0x00]
|
|
|
|
ds_min_f64 v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xa4,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_f64 v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xa4,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_f64 v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xa4,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_min_f64 v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xa5,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_f64 v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xa6,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_f64 v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xa6,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_max_f64 v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xa6,0xd8,0x01,0xfe,0x00,0x00]
|
|
|
|
ds_max_f64 v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xa6,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_f64 v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xa6,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_f64 v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xa6,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_max_f64 v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xa7,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b8_d16_hi v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0xa8,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b8_d16_hi v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0xa8,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_write_b8_d16_hi v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0xa8,0xd8,0x01,0xff,0x00,0x00]
|
|
|
|
ds_write_b8_d16_hi v1, v2
|
|
// CHECK: [0x00,0x00,0xa8,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b8_d16_hi v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0xa8,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b8_d16_hi v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0xa8,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b8_d16_hi v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xa9,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b16_d16_hi v1, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0xaa,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b16_d16_hi v255, v2 offset:65535
|
|
// CHECK: [0xff,0xff,0xaa,0xd8,0xff,0x02,0x00,0x00]
|
|
|
|
ds_write_b16_d16_hi v1, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0xaa,0xd8,0x01,0xff,0x00,0x00]
|
|
|
|
ds_write_b16_d16_hi v1, v2
|
|
// CHECK: [0x00,0x00,0xaa,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b16_d16_hi v1, v2 offset:0
|
|
// CHECK: [0x00,0x00,0xaa,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b16_d16_hi v1, v2 offset:4
|
|
// CHECK: [0x04,0x00,0xaa,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b16_d16_hi v1, v2 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xab,0xd8,0x01,0x02,0x00,0x00]
|
|
|
|
ds_read_u8_d16 v5, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xac,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u8_d16 v255, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xac,0xd8,0x01,0x00,0x00,0xff]
|
|
|
|
ds_read_u8_d16 v5, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0xac,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read_u8_d16 v5, v1
|
|
// CHECK: [0x00,0x00,0xac,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u8_d16 v5, v1 offset:0
|
|
// CHECK: [0x00,0x00,0xac,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u8_d16 v5, v1 offset:4
|
|
// CHECK: [0x04,0x00,0xac,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u8_d16 v5, v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xad,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u8_d16_hi v5, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xae,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u8_d16_hi v255, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xae,0xd8,0x01,0x00,0x00,0xff]
|
|
|
|
ds_read_u8_d16_hi v5, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0xae,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read_u8_d16_hi v5, v1
|
|
// CHECK: [0x00,0x00,0xae,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u8_d16_hi v5, v1 offset:0
|
|
// CHECK: [0x00,0x00,0xae,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u8_d16_hi v5, v1 offset:4
|
|
// CHECK: [0x04,0x00,0xae,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u8_d16_hi v5, v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xaf,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i8_d16 v5, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xb0,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i8_d16 v255, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xb0,0xd8,0x01,0x00,0x00,0xff]
|
|
|
|
ds_read_i8_d16 v5, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0xb0,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read_i8_d16 v5, v1
|
|
// CHECK: [0x00,0x00,0xb0,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i8_d16 v5, v1 offset:0
|
|
// CHECK: [0x00,0x00,0xb0,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i8_d16 v5, v1 offset:4
|
|
// CHECK: [0x04,0x00,0xb0,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i8_d16 v5, v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xb1,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i8_d16_hi v5, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xb2,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i8_d16_hi v255, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xb2,0xd8,0x01,0x00,0x00,0xff]
|
|
|
|
ds_read_i8_d16_hi v5, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0xb2,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read_i8_d16_hi v5, v1
|
|
// CHECK: [0x00,0x00,0xb2,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i8_d16_hi v5, v1 offset:0
|
|
// CHECK: [0x00,0x00,0xb2,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i8_d16_hi v5, v1 offset:4
|
|
// CHECK: [0x04,0x00,0xb2,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_i8_d16_hi v5, v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xb3,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u16_d16 v5, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xb4,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u16_d16 v255, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xb4,0xd8,0x01,0x00,0x00,0xff]
|
|
|
|
ds_read_u16_d16 v5, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0xb4,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read_u16_d16 v5, v1
|
|
// CHECK: [0x00,0x00,0xb4,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u16_d16 v5, v1 offset:0
|
|
// CHECK: [0x00,0x00,0xb4,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u16_d16 v5, v1 offset:4
|
|
// CHECK: [0x04,0x00,0xb4,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u16_d16 v5, v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xb5,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u16_d16_hi v5, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xb6,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u16_d16_hi v255, v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xb6,0xd8,0x01,0x00,0x00,0xff]
|
|
|
|
ds_read_u16_d16_hi v5, v255 offset:65535
|
|
// CHECK: [0xff,0xff,0xb6,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read_u16_d16_hi v5, v1
|
|
// CHECK: [0x00,0x00,0xb6,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u16_d16_hi v5, v1 offset:0
|
|
// CHECK: [0x00,0x00,0xb6,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u16_d16_hi v5, v1 offset:4
|
|
// CHECK: [0x04,0x00,0xb6,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_u16_d16_hi v5, v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xb7,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_add_rtn_u64 v[5:6], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xc0,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_add_rtn_u64 v[254:255], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xc0,0xd8,0x01,0x02,0x00,0xfe]
|
|
|
|
ds_add_rtn_u64 v[5:6], v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xc0,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_add_rtn_u64 v[5:6], v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xc0,0xd8,0x01,0xfe,0x00,0x05]
|
|
|
|
ds_add_rtn_u64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xc0,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_add_rtn_u64 v[5:6], v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xc0,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_add_rtn_u64 v[5:6], v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xc0,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_add_rtn_u64 v[5:6], v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xc1,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_sub_rtn_u64 v[5:6], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xc2,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_sub_rtn_u64 v[254:255], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xc2,0xd8,0x01,0x02,0x00,0xfe]
|
|
|
|
ds_sub_rtn_u64 v[5:6], v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xc2,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_sub_rtn_u64 v[5:6], v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xc2,0xd8,0x01,0xfe,0x00,0x05]
|
|
|
|
ds_sub_rtn_u64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xc2,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_sub_rtn_u64 v[5:6], v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xc2,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_sub_rtn_u64 v[5:6], v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xc2,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_sub_rtn_u64 v[5:6], v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xc3,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_rsub_rtn_u64 v[5:6], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xc4,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_rsub_rtn_u64 v[254:255], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xc4,0xd8,0x01,0x02,0x00,0xfe]
|
|
|
|
ds_rsub_rtn_u64 v[5:6], v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xc4,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_rsub_rtn_u64 v[5:6], v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xc4,0xd8,0x01,0xfe,0x00,0x05]
|
|
|
|
ds_rsub_rtn_u64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xc4,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_rsub_rtn_u64 v[5:6], v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xc4,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_rsub_rtn_u64 v[5:6], v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xc4,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_rsub_rtn_u64 v[5:6], v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xc5,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_inc_rtn_u64 v[5:6], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xc6,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_inc_rtn_u64 v[254:255], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xc6,0xd8,0x01,0x02,0x00,0xfe]
|
|
|
|
ds_inc_rtn_u64 v[5:6], v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xc6,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_inc_rtn_u64 v[5:6], v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xc6,0xd8,0x01,0xfe,0x00,0x05]
|
|
|
|
ds_inc_rtn_u64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xc6,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_inc_rtn_u64 v[5:6], v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xc6,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_inc_rtn_u64 v[5:6], v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xc6,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_inc_rtn_u64 v[5:6], v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xc7,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xc8,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_dec_rtn_u64 v[254:255], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xc8,0xd8,0x01,0x02,0x00,0xfe]
|
|
|
|
ds_dec_rtn_u64 v[5:6], v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xc8,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_dec_rtn_u64 v[5:6], v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xc8,0xd8,0x01,0xfe,0x00,0x05]
|
|
|
|
ds_dec_rtn_u64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xc8,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xc8,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xc8,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xc9,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_i64 v[5:6], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xca,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_i64 v[254:255], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xca,0xd8,0x01,0x02,0x00,0xfe]
|
|
|
|
ds_min_rtn_i64 v[5:6], v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xca,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_i64 v[5:6], v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xca,0xd8,0x01,0xfe,0x00,0x05]
|
|
|
|
ds_min_rtn_i64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xca,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_i64 v[5:6], v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xca,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_i64 v[5:6], v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xca,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_i64 v[5:6], v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xcb,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_i64 v[5:6], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xcc,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_i64 v[254:255], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xcc,0xd8,0x01,0x02,0x00,0xfe]
|
|
|
|
ds_max_rtn_i64 v[5:6], v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xcc,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_i64 v[5:6], v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xcc,0xd8,0x01,0xfe,0x00,0x05]
|
|
|
|
ds_max_rtn_i64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xcc,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_i64 v[5:6], v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xcc,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_i64 v[5:6], v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xcc,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_i64 v[5:6], v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xcd,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_u64 v[5:6], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xce,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_u64 v[254:255], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xce,0xd8,0x01,0x02,0x00,0xfe]
|
|
|
|
ds_min_rtn_u64 v[5:6], v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xce,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_u64 v[5:6], v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xce,0xd8,0x01,0xfe,0x00,0x05]
|
|
|
|
ds_min_rtn_u64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xce,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_u64 v[5:6], v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xce,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_u64 v[5:6], v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xce,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_u64 v[5:6], v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xcf,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_u64 v[5:6], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xd0,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_u64 v[254:255], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xd0,0xd8,0x01,0x02,0x00,0xfe]
|
|
|
|
ds_max_rtn_u64 v[5:6], v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xd0,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_u64 v[5:6], v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xd0,0xd8,0x01,0xfe,0x00,0x05]
|
|
|
|
ds_max_rtn_u64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xd0,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_u64 v[5:6], v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xd0,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_u64 v[5:6], v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xd0,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_u64 v[5:6], v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xd1,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_and_rtn_b64 v[5:6], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xd2,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_and_rtn_b64 v[254:255], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xd2,0xd8,0x01,0x02,0x00,0xfe]
|
|
|
|
ds_and_rtn_b64 v[5:6], v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xd2,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_and_rtn_b64 v[5:6], v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xd2,0xd8,0x01,0xfe,0x00,0x05]
|
|
|
|
ds_and_rtn_b64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xd2,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_and_rtn_b64 v[5:6], v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xd2,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_and_rtn_b64 v[5:6], v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xd2,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_and_rtn_b64 v[5:6], v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xd3,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_or_rtn_b64 v[5:6], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xd4,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_or_rtn_b64 v[254:255], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xd4,0xd8,0x01,0x02,0x00,0xfe]
|
|
|
|
ds_or_rtn_b64 v[5:6], v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xd4,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_or_rtn_b64 v[5:6], v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xd4,0xd8,0x01,0xfe,0x00,0x05]
|
|
|
|
ds_or_rtn_b64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xd4,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_or_rtn_b64 v[5:6], v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xd4,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_or_rtn_b64 v[5:6], v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xd4,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_or_rtn_b64 v[5:6], v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xd5,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_xor_rtn_b64 v[5:6], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xd6,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_xor_rtn_b64 v[254:255], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xd6,0xd8,0x01,0x02,0x00,0xfe]
|
|
|
|
ds_xor_rtn_b64 v[5:6], v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xd6,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_xor_rtn_b64 v[5:6], v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xd6,0xd8,0x01,0xfe,0x00,0x05]
|
|
|
|
ds_xor_rtn_b64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xd6,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_xor_rtn_b64 v[5:6], v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xd6,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_xor_rtn_b64 v[5:6], v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xd6,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_xor_rtn_b64 v[5:6], v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xd7,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_mskor_rtn_b64 v[5:6], v1, v[2:3], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xd8,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_mskor_rtn_b64 v[254:255], v1, v[2:3], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xd8,0xd8,0x01,0x02,0x03,0xfe]
|
|
|
|
ds_mskor_rtn_b64 v[5:6], v255, v[2:3], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xd8,0xd8,0xff,0x02,0x03,0x05]
|
|
|
|
ds_mskor_rtn_b64 v[5:6], v1, v[254:255], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xd8,0xd8,0x01,0xfe,0x03,0x05]
|
|
|
|
ds_mskor_rtn_b64 v[5:6], v1, v[2:3], v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xd8,0xd8,0x01,0x02,0xfe,0x05]
|
|
|
|
ds_mskor_rtn_b64 v[5:6], v1, v[2:3], v[3:4]
|
|
// CHECK: [0x00,0x00,0xd8,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_mskor_rtn_b64 v[5:6], v1, v[2:3], v[3:4] offset:0
|
|
// CHECK: [0x00,0x00,0xd8,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_mskor_rtn_b64 v[5:6], v1, v[2:3], v[3:4] offset:4
|
|
// CHECK: [0x04,0x00,0xd8,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_mskor_rtn_b64 v[5:6], v1, v[2:3], v[3:4] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xd9,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg_rtn_b64 v[5:6], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xda,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_wrxchg_rtn_b64 v[254:255], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xda,0xd8,0x01,0x02,0x00,0xfe]
|
|
|
|
ds_wrxchg_rtn_b64 v[5:6], v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xda,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_wrxchg_rtn_b64 v[5:6], v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xda,0xd8,0x01,0xfe,0x00,0x05]
|
|
|
|
ds_wrxchg_rtn_b64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xda,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_wrxchg_rtn_b64 v[5:6], v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xda,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_wrxchg_rtn_b64 v[5:6], v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xda,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_wrxchg_rtn_b64 v[5:6], v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xdb,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_wrxchg2_rtn_b64 v[5:8], v1, v[2:3], v[3:4] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0xdc,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b64 v[252:255], v1, v[2:3], v[3:4] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0xdc,0xd8,0x01,0x02,0x03,0xfc]
|
|
|
|
ds_wrxchg2_rtn_b64 v[5:8], v255, v[2:3], v[3:4] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0xdc,0xd8,0xff,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b64 v[5:8], v1, v[254:255], v[3:4] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0xdc,0xd8,0x01,0xfe,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b64 v[5:8], v1, v[2:3], v[254:255] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0xdc,0xd8,0x01,0x02,0xfe,0x05]
|
|
|
|
ds_wrxchg2_rtn_b64 v[5:8], v1, v[2:3], v[3:4] offset1:255
|
|
// CHECK: [0x00,0xff,0xdc,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b64 v[5:8], v1, v[2:3], v[3:4] offset0:0 offset1:255
|
|
// CHECK: [0x00,0xff,0xdc,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b64 v[5:8], v1, v[2:3], v[3:4] offset0:16 offset1:255
|
|
// CHECK: [0x10,0xff,0xdc,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b64 v[5:8], v1, v[2:3], v[3:4] offset0:127
|
|
// CHECK: [0x7f,0x00,0xdc,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b64 v[5:8], v1, v[2:3], v[3:4] offset0:127 offset1:0
|
|
// CHECK: [0x7f,0x00,0xdc,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b64 v[5:8], v1, v[2:3], v[3:4] offset0:127 offset1:1
|
|
// CHECK: [0x7f,0x01,0xdc,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2_rtn_b64 v[5:8], v1, v[2:3], v[3:4] offset0:127 offset1:255 gds
|
|
// CHECK: [0x7f,0xff,0xdd,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b64 v[5:8], v1, v[2:3], v[3:4] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0xde,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b64 v[252:255], v1, v[2:3], v[3:4] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0xde,0xd8,0x01,0x02,0x03,0xfc]
|
|
|
|
ds_wrxchg2st64_rtn_b64 v[5:8], v255, v[2:3], v[3:4] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0xde,0xd8,0xff,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b64 v[5:8], v1, v[254:255], v[3:4] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0xde,0xd8,0x01,0xfe,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b64 v[5:8], v1, v[2:3], v[254:255] offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0xde,0xd8,0x01,0x02,0xfe,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b64 v[5:8], v1, v[2:3], v[3:4] offset1:255
|
|
// CHECK: [0x00,0xff,0xde,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b64 v[5:8], v1, v[2:3], v[3:4] offset0:0 offset1:255
|
|
// CHECK: [0x00,0xff,0xde,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b64 v[5:8], v1, v[2:3], v[3:4] offset0:16 offset1:255
|
|
// CHECK: [0x10,0xff,0xde,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b64 v[5:8], v1, v[2:3], v[3:4] offset0:127
|
|
// CHECK: [0x7f,0x00,0xde,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b64 v[5:8], v1, v[2:3], v[3:4] offset0:127 offset1:0
|
|
// CHECK: [0x7f,0x00,0xde,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b64 v[5:8], v1, v[2:3], v[3:4] offset0:127 offset1:1
|
|
// CHECK: [0x7f,0x01,0xde,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_wrxchg2st64_rtn_b64 v[5:8], v1, v[2:3], v[3:4] offset0:127 offset1:255 gds
|
|
// CHECK: [0x7f,0xff,0xdf,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_b64 v[5:6], v1, v[2:3], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xe0,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_b64 v[254:255], v1, v[2:3], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xe0,0xd8,0x01,0x02,0x03,0xfe]
|
|
|
|
ds_cmpst_rtn_b64 v[5:6], v255, v[2:3], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xe0,0xd8,0xff,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_b64 v[5:6], v1, v[254:255], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xe0,0xd8,0x01,0xfe,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_b64 v[5:6], v1, v[2:3], v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xe0,0xd8,0x01,0x02,0xfe,0x05]
|
|
|
|
ds_cmpst_rtn_b64 v[5:6], v1, v[2:3], v[3:4]
|
|
// CHECK: [0x00,0x00,0xe0,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_b64 v[5:6], v1, v[2:3], v[3:4] offset:0
|
|
// CHECK: [0x00,0x00,0xe0,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_b64 v[5:6], v1, v[2:3], v[3:4] offset:4
|
|
// CHECK: [0x04,0x00,0xe0,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_b64 v[5:6], v1, v[2:3], v[3:4] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xe1,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_f64 v[5:6], v1, v[2:3], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xe2,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_f64 v[254:255], v1, v[2:3], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xe2,0xd8,0x01,0x02,0x03,0xfe]
|
|
|
|
ds_cmpst_rtn_f64 v[5:6], v255, v[2:3], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xe2,0xd8,0xff,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_f64 v[5:6], v1, v[254:255], v[3:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xe2,0xd8,0x01,0xfe,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_f64 v[5:6], v1, v[2:3], v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xe2,0xd8,0x01,0x02,0xfe,0x05]
|
|
|
|
ds_cmpst_rtn_f64 v[5:6], v1, v[2:3], v[3:4]
|
|
// CHECK: [0x00,0x00,0xe2,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_f64 v[5:6], v1, v[2:3], v[3:4] offset:0
|
|
// CHECK: [0x00,0x00,0xe2,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_f64 v[5:6], v1, v[2:3], v[3:4] offset:4
|
|
// CHECK: [0x04,0x00,0xe2,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_cmpst_rtn_f64 v[5:6], v1, v[2:3], v[3:4] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xe3,0xd8,0x01,0x02,0x03,0x05]
|
|
|
|
ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xe4,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_f64 v[254:255], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xe4,0xd8,0x01,0x02,0x00,0xfe]
|
|
|
|
ds_min_rtn_f64 v[5:6], v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xe4,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_f64 v[5:6], v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xe4,0xd8,0x01,0xfe,0x00,0x05]
|
|
|
|
ds_min_rtn_f64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xe4,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xe4,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xe4,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xe5,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_f64 v[5:6], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xe6,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_f64 v[254:255], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xe6,0xd8,0x01,0x02,0x00,0xfe]
|
|
|
|
ds_max_rtn_f64 v[5:6], v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xe6,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_f64 v[5:6], v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xe6,0xd8,0x01,0xfe,0x00,0x05]
|
|
|
|
ds_max_rtn_f64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xe6,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_f64 v[5:6], v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xe6,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_f64 v[5:6], v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xe6,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_max_rtn_f64 v[5:6], v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xe7,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_read_b64 v[5:6], v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xec,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b64 v[254:255], v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xec,0xd8,0x01,0x00,0x00,0xfe]
|
|
|
|
ds_read_b64 v[5:6], v255 offset:65535
|
|
// CHECK: [0xff,0xff,0xec,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read_b64 v[5:6], v1
|
|
// CHECK: [0x00,0x00,0xec,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b64 v[5:6], v1 offset:0
|
|
// CHECK: [0x00,0x00,0xec,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b64 v[5:6], v1 offset:4
|
|
// CHECK: [0x04,0x00,0xec,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b64 v[5:6], v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xed,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2_b64 v[5:8], v1 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0xee,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2_b64 v[252:255], v1 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0xee,0xd8,0x01,0x00,0x00,0xfc]
|
|
|
|
ds_read2_b64 v[5:8], v255 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0xee,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read2_b64 v[5:8], v1 offset1:255
|
|
// CHECK: [0x00,0xff,0xee,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2_b64 v[5:8], v1 offset0:0 offset1:255
|
|
// CHECK: [0x00,0xff,0xee,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2_b64 v[5:8], v1 offset0:16 offset1:255
|
|
// CHECK: [0x10,0xff,0xee,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2_b64 v[5:8], v1 offset0:127
|
|
// CHECK: [0x7f,0x00,0xee,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2_b64 v[5:8], v1 offset0:127 offset1:0
|
|
// CHECK: [0x7f,0x00,0xee,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2_b64 v[5:8], v1 offset0:127 offset1:1
|
|
// CHECK: [0x7f,0x01,0xee,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2_b64 v[5:8], v1 offset0:127 offset1:255 gds
|
|
// CHECK: [0x7f,0xff,0xef,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b64 v[5:8], v1 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0xf0,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b64 v[252:255], v1 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0xf0,0xd8,0x01,0x00,0x00,0xfc]
|
|
|
|
ds_read2st64_b64 v[5:8], v255 offset0:127 offset1:255
|
|
// CHECK: [0x7f,0xff,0xf0,0xd8,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b64 v[5:8], v1 offset1:255
|
|
// CHECK: [0x00,0xff,0xf0,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b64 v[5:8], v1 offset0:0 offset1:255
|
|
// CHECK: [0x00,0xff,0xf0,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b64 v[5:8], v1 offset0:16 offset1:255
|
|
// CHECK: [0x10,0xff,0xf0,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b64 v[5:8], v1 offset0:127
|
|
// CHECK: [0x7f,0x00,0xf0,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b64 v[5:8], v1 offset0:127 offset1:0
|
|
// CHECK: [0x7f,0x00,0xf0,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b64 v[5:8], v1 offset0:127 offset1:1
|
|
// CHECK: [0x7f,0x01,0xf0,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read2st64_b64 v[5:8], v1 offset0:127 offset1:255 gds
|
|
// CHECK: [0x7f,0xff,0xf1,0xd8,0x01,0x00,0x00,0x05]
|
|
|
|
ds_condxchg32_rtn_b64 v[5:6], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xfc,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_condxchg32_rtn_b64 v[254:255], v1, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xfc,0xd8,0x01,0x02,0x00,0xfe]
|
|
|
|
ds_condxchg32_rtn_b64 v[5:6], v255, v[2:3] offset:65535
|
|
// CHECK: [0xff,0xff,0xfc,0xd8,0xff,0x02,0x00,0x05]
|
|
|
|
ds_condxchg32_rtn_b64 v[5:6], v1, v[254:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xfc,0xd8,0x01,0xfe,0x00,0x05]
|
|
|
|
ds_condxchg32_rtn_b64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x00,0x00,0xfc,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_condxchg32_rtn_b64 v[5:6], v1, v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xfc,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_condxchg32_rtn_b64 v[5:6], v1, v[2:3] offset:4
|
|
// CHECK: [0x04,0x00,0xfc,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_condxchg32_rtn_b64 v[5:6], v1, v[2:3] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xfd,0xd8,0x01,0x02,0x00,0x05]
|
|
|
|
ds_add_src2_u32 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x00,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_add_src2_u32 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x00,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_add_src2_u32 v1
|
|
// CHECK: [0x00,0x00,0x00,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_add_src2_u32 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x00,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_add_src2_u32 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x00,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_add_src2_u32 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x01,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_sub_src2_u32 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x02,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_sub_src2_u32 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x02,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_sub_src2_u32 v1
|
|
// CHECK: [0x00,0x00,0x02,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_sub_src2_u32 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x02,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_sub_src2_u32 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x02,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_sub_src2_u32 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x03,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_rsub_src2_u32 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x04,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_rsub_src2_u32 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x04,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_rsub_src2_u32 v1
|
|
// CHECK: [0x00,0x00,0x04,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_rsub_src2_u32 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x04,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_rsub_src2_u32 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x04,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_rsub_src2_u32 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x05,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_inc_src2_u32 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x06,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_inc_src2_u32 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x06,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_inc_src2_u32 v1
|
|
// CHECK: [0x00,0x00,0x06,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_inc_src2_u32 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x06,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_inc_src2_u32 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x06,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_inc_src2_u32 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x07,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_dec_src2_u32 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x08,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_dec_src2_u32 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x08,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_dec_src2_u32 v1
|
|
// CHECK: [0x00,0x00,0x08,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_dec_src2_u32 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x08,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_dec_src2_u32 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x08,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_dec_src2_u32 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x09,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_i32 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x0a,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_i32 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x0a,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_i32 v1
|
|
// CHECK: [0x00,0x00,0x0a,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_i32 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x0a,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_i32 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x0a,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_i32 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x0b,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_i32 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x0c,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_i32 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x0c,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_i32 v1
|
|
// CHECK: [0x00,0x00,0x0c,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_i32 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x0c,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_i32 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x0c,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_i32 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x0d,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_u32 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x0e,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_u32 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x0e,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_u32 v1
|
|
// CHECK: [0x00,0x00,0x0e,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_u32 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x0e,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_u32 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x0e,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_u32 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x0f,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_u32 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x10,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_u32 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x10,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_u32 v1
|
|
// CHECK: [0x00,0x00,0x10,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_u32 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x10,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_u32 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x10,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_u32 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x11,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_and_src2_b32 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x12,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_and_src2_b32 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x12,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_and_src2_b32 v1
|
|
// CHECK: [0x00,0x00,0x12,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_and_src2_b32 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x12,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_and_src2_b32 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x12,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_and_src2_b32 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x13,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_or_src2_b32 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x14,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_or_src2_b32 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x14,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_or_src2_b32 v1
|
|
// CHECK: [0x00,0x00,0x14,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_or_src2_b32 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x14,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_or_src2_b32 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x14,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_or_src2_b32 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x15,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_xor_src2_b32 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x16,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_xor_src2_b32 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x16,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_xor_src2_b32 v1
|
|
// CHECK: [0x00,0x00,0x16,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_xor_src2_b32 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x16,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_xor_src2_b32 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x16,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_xor_src2_b32 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x17,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_write_src2_b32 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x1a,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_write_src2_b32 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x1a,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_write_src2_b32 v1
|
|
// CHECK: [0x00,0x00,0x1a,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_write_src2_b32 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x1a,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_write_src2_b32 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x1a,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_write_src2_b32 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x1b,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_f32 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x24,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_f32 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x24,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_f32 v1
|
|
// CHECK: [0x00,0x00,0x24,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_f32 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x24,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_f32 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x24,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_f32 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x25,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_f32 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x26,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_f32 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x26,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_f32 v1
|
|
// CHECK: [0x00,0x00,0x26,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_f32 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x26,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_f32 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x26,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_f32 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x27,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_release_all offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x31,0xd9,0x00,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_release_all gds
|
|
// CHECK: [0x00,0x00,0x31,0xd9,0x00,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_release_all offset:0 gds
|
|
// CHECK: [0x00,0x00,0x31,0xd9,0x00,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_release_all offset:4 gds
|
|
// CHECK: [0x04,0x00,0x31,0xd9,0x00,0x00,0x00,0x00]
|
|
|
|
ds_gws_init v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x33,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_gws_init v255 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x33,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_gws_init v1 gds
|
|
// CHECK: [0x00,0x00,0x33,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_gws_init v1 offset:0 gds
|
|
// CHECK: [0x00,0x00,0x33,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_gws_init v1 offset:4 gds
|
|
// CHECK: [0x04,0x00,0x33,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_v offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x35,0xd9,0x00,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_v gds
|
|
// CHECK: [0x00,0x00,0x35,0xd9,0x00,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_v offset:0 gds
|
|
// CHECK: [0x00,0x00,0x35,0xd9,0x00,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_v offset:4 gds
|
|
// CHECK: [0x04,0x00,0x35,0xd9,0x00,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_br v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x37,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_br v255 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x37,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_br v1 gds
|
|
// CHECK: [0x00,0x00,0x37,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_br v1 offset:0 gds
|
|
// CHECK: [0x00,0x00,0x37,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_br v1 offset:4 gds
|
|
// CHECK: [0x04,0x00,0x37,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_p offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x39,0xd9,0x00,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_p gds
|
|
// CHECK: [0x00,0x00,0x39,0xd9,0x00,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_p offset:0 gds
|
|
// CHECK: [0x00,0x00,0x39,0xd9,0x00,0x00,0x00,0x00]
|
|
|
|
ds_gws_sema_p offset:4 gds
|
|
// CHECK: [0x04,0x00,0x39,0xd9,0x00,0x00,0x00,0x00]
|
|
|
|
ds_gws_barrier v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x3b,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_gws_barrier v255 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x3b,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_gws_barrier v1 gds
|
|
// CHECK: [0x00,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_gws_barrier v1 offset:0 gds
|
|
// CHECK: [0x00,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_gws_barrier v1 offset:4 gds
|
|
// CHECK: [0x04,0x00,0x3b,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_consume v5 offset:65535
|
|
// CHECK: [0xff,0xff,0x7a,0xd9,0x00,0x00,0x00,0x05]
|
|
|
|
ds_consume v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x7a,0xd9,0x00,0x00,0x00,0xff]
|
|
|
|
ds_consume v5
|
|
// CHECK: [0x00,0x00,0x7a,0xd9,0x00,0x00,0x00,0x05]
|
|
|
|
ds_consume v5 offset:0
|
|
// CHECK: [0x00,0x00,0x7a,0xd9,0x00,0x00,0x00,0x05]
|
|
|
|
ds_consume v5 offset:4
|
|
// CHECK: [0x04,0x00,0x7a,0xd9,0x00,0x00,0x00,0x05]
|
|
|
|
ds_consume v5 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x7b,0xd9,0x00,0x00,0x00,0x05]
|
|
|
|
ds_append v5 offset:65535
|
|
// CHECK: [0xff,0xff,0x7c,0xd9,0x00,0x00,0x00,0x05]
|
|
|
|
ds_append v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x7c,0xd9,0x00,0x00,0x00,0xff]
|
|
|
|
ds_append v5
|
|
// CHECK: [0x00,0x00,0x7c,0xd9,0x00,0x00,0x00,0x05]
|
|
|
|
ds_append v5 offset:0
|
|
// CHECK: [0x00,0x00,0x7c,0xd9,0x00,0x00,0x00,0x05]
|
|
|
|
ds_append v5 offset:4
|
|
// CHECK: [0x04,0x00,0x7c,0xd9,0x00,0x00,0x00,0x05]
|
|
|
|
ds_append v5 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x7d,0xd9,0x00,0x00,0x00,0x05]
|
|
|
|
ds_ordered_count v5, v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x7f,0xd9,0x01,0x00,0x00,0x05]
|
|
|
|
ds_ordered_count v255, v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x7f,0xd9,0x01,0x00,0x00,0xff]
|
|
|
|
ds_ordered_count v5, v255 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x7f,0xd9,0xff,0x00,0x00,0x05]
|
|
|
|
ds_ordered_count v5, v1 gds
|
|
// CHECK: [0x00,0x00,0x7f,0xd9,0x01,0x00,0x00,0x05]
|
|
|
|
ds_ordered_count v5, v1 offset:0 gds
|
|
// CHECK: [0x00,0x00,0x7f,0xd9,0x01,0x00,0x00,0x05]
|
|
|
|
ds_ordered_count v5, v1 offset:4 gds
|
|
// CHECK: [0x04,0x00,0x7f,0xd9,0x01,0x00,0x00,0x05]
|
|
|
|
ds_add_src2_u64 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x80,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_add_src2_u64 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x80,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_add_src2_u64 v1
|
|
// CHECK: [0x00,0x00,0x80,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_add_src2_u64 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x80,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_add_src2_u64 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x80,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_add_src2_u64 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x81,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_sub_src2_u64 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x82,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_sub_src2_u64 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x82,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_sub_src2_u64 v1
|
|
// CHECK: [0x00,0x00,0x82,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_sub_src2_u64 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x82,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_sub_src2_u64 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x82,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_sub_src2_u64 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x83,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_rsub_src2_u64 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x84,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_rsub_src2_u64 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x84,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_rsub_src2_u64 v1
|
|
// CHECK: [0x00,0x00,0x84,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_rsub_src2_u64 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x84,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_rsub_src2_u64 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x84,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_rsub_src2_u64 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x85,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_inc_src2_u64 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x86,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_inc_src2_u64 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x86,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_inc_src2_u64 v1
|
|
// CHECK: [0x00,0x00,0x86,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_inc_src2_u64 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x86,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_inc_src2_u64 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x86,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_inc_src2_u64 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x87,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_dec_src2_u64 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x88,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_dec_src2_u64 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x88,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_dec_src2_u64 v1
|
|
// CHECK: [0x00,0x00,0x88,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_dec_src2_u64 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x88,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_dec_src2_u64 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x88,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_dec_src2_u64 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x89,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_i64 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x8a,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_i64 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x8a,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_i64 v1
|
|
// CHECK: [0x00,0x00,0x8a,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_i64 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x8a,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_i64 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x8a,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_i64 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x8b,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_i64 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x8c,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_i64 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x8c,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_i64 v1
|
|
// CHECK: [0x00,0x00,0x8c,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_i64 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x8c,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_i64 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x8c,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_i64 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x8d,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_u64 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x8e,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_u64 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x8e,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_u64 v1
|
|
// CHECK: [0x00,0x00,0x8e,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_u64 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x8e,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_u64 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x8e,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_u64 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x8f,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_u64 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x90,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_u64 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x90,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_u64 v1
|
|
// CHECK: [0x00,0x00,0x90,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_u64 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x90,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_u64 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x90,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_u64 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x91,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_and_src2_b64 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x92,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_and_src2_b64 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x92,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_and_src2_b64 v1
|
|
// CHECK: [0x00,0x00,0x92,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_and_src2_b64 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x92,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_and_src2_b64 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x92,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_and_src2_b64 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x93,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_or_src2_b64 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x94,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_or_src2_b64 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x94,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_or_src2_b64 v1
|
|
// CHECK: [0x00,0x00,0x94,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_or_src2_b64 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x94,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_or_src2_b64 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x94,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_or_src2_b64 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x95,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_xor_src2_b64 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x96,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_xor_src2_b64 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x96,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_xor_src2_b64 v1
|
|
// CHECK: [0x00,0x00,0x96,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_xor_src2_b64 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x96,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_xor_src2_b64 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x96,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_xor_src2_b64 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x97,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_write_src2_b64 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0x9a,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_write_src2_b64 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0x9a,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_write_src2_b64 v1
|
|
// CHECK: [0x00,0x00,0x9a,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_write_src2_b64 v1 offset:0
|
|
// CHECK: [0x00,0x00,0x9a,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_write_src2_b64 v1 offset:4
|
|
// CHECK: [0x04,0x00,0x9a,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_write_src2_b64 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0x9b,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_f64 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xa4,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_f64 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0xa4,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_f64 v1
|
|
// CHECK: [0x00,0x00,0xa4,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_f64 v1 offset:0
|
|
// CHECK: [0x00,0x00,0xa4,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_f64 v1 offset:4
|
|
// CHECK: [0x04,0x00,0xa4,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_min_src2_f64 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xa5,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_f64 v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xa6,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_f64 v255 offset:65535
|
|
// CHECK: [0xff,0xff,0xa6,0xd9,0xff,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_f64 v1
|
|
// CHECK: [0x00,0x00,0xa6,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_f64 v1 offset:0
|
|
// CHECK: [0x00,0x00,0xa6,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_f64 v1 offset:4
|
|
// CHECK: [0x04,0x00,0xa6,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_max_src2_f64 v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xa7,0xd9,0x01,0x00,0x00,0x00]
|
|
|
|
ds_write_b96 v1, v[2:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xbc,0xd9,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b96 v255, v[2:4] offset:65535
|
|
// CHECK: [0xff,0xff,0xbc,0xd9,0xff,0x02,0x00,0x00]
|
|
|
|
ds_write_b96 v1, v[253:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xbc,0xd9,0x01,0xfd,0x00,0x00]
|
|
|
|
ds_write_b96 v1, v[2:4]
|
|
// CHECK: [0x00,0x00,0xbc,0xd9,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b96 v1, v[2:4] offset:0
|
|
// CHECK: [0x00,0x00,0xbc,0xd9,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b96 v1, v[2:4] offset:4
|
|
// CHECK: [0x04,0x00,0xbc,0xd9,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b96 v1, v[2:4] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xbd,0xd9,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b128 v1, v[2:5] offset:65535
|
|
// CHECK: [0xff,0xff,0xbe,0xd9,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b128 v255, v[2:5] offset:65535
|
|
// CHECK: [0xff,0xff,0xbe,0xd9,0xff,0x02,0x00,0x00]
|
|
|
|
ds_write_b128 v1, v[252:255] offset:65535
|
|
// CHECK: [0xff,0xff,0xbe,0xd9,0x01,0xfc,0x00,0x00]
|
|
|
|
ds_write_b128 v1, v[2:5]
|
|
// CHECK: [0x00,0x00,0xbe,0xd9,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b128 v1, v[2:5] offset:0
|
|
// CHECK: [0x00,0x00,0xbe,0xd9,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b128 v1, v[2:5] offset:4
|
|
// CHECK: [0x04,0x00,0xbe,0xd9,0x01,0x02,0x00,0x00]
|
|
|
|
ds_write_b128 v1, v[2:5] offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xbf,0xd9,0x01,0x02,0x00,0x00]
|
|
|
|
ds_read_b96 v[5:7], v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xfc,0xd9,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b96 v[253:255], v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xfc,0xd9,0x01,0x00,0x00,0xfd]
|
|
|
|
ds_read_b96 v[5:7], v255 offset:65535
|
|
// CHECK: [0xff,0xff,0xfc,0xd9,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read_b96 v[5:7], v1
|
|
// CHECK: [0x00,0x00,0xfc,0xd9,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b96 v[5:7], v1 offset:0
|
|
// CHECK: [0x00,0x00,0xfc,0xd9,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b96 v[5:7], v1 offset:4
|
|
// CHECK: [0x04,0x00,0xfc,0xd9,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b96 v[5:7], v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xfd,0xd9,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b128 v[5:8], v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xfe,0xd9,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b128 v[252:255], v1 offset:65535
|
|
// CHECK: [0xff,0xff,0xfe,0xd9,0x01,0x00,0x00,0xfc]
|
|
|
|
ds_read_b128 v[5:8], v255 offset:65535
|
|
// CHECK: [0xff,0xff,0xfe,0xd9,0xff,0x00,0x00,0x05]
|
|
|
|
ds_read_b128 v[5:8], v1
|
|
// CHECK: [0x00,0x00,0xfe,0xd9,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b128 v[5:8], v1 offset:0
|
|
// CHECK: [0x00,0x00,0xfe,0xd9,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b128 v[5:8], v1 offset:4
|
|
// CHECK: [0x04,0x00,0xfe,0xd9,0x01,0x00,0x00,0x05]
|
|
|
|
ds_read_b128 v[5:8], v1 offset:65535 gds
|
|
// CHECK: [0xff,0xff,0xff,0xd9,0x01,0x00,0x00,0x05]
|
|
|
|
exp mrt0 v0, v0, v0, v0
|
|
// CHECK: [0x0f,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrtz v0, v0, v0, v0
|
|
// CHECK: [0x8f,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp null v0, v0, v0, v0
|
|
// CHECK: [0x9f,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp pos0 v0, v0, v0, v0
|
|
// CHECK: [0xcf,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp param0 v0, v0, v0, v0
|
|
// CHECK: [0x0f,0x02,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 v255, v0, v0, v0
|
|
// CHECK: [0x0f,0x00,0x00,0xc4,0xff,0x00,0x00,0x00]
|
|
|
|
exp mrt0 v0, v255, v0, v0
|
|
// CHECK: [0x0f,0x00,0x00,0xc4,0x00,0xff,0x00,0x00]
|
|
|
|
exp mrt0 v0, v0, v255, v0
|
|
// CHECK: [0x0f,0x00,0x00,0xc4,0x00,0x00,0xff,0x00]
|
|
|
|
exp mrt0 v0, v0, v0, v255
|
|
// CHECK: [0x0f,0x00,0x00,0xc4,0x00,0x00,0x00,0xff]
|
|
|
|
exp mrt0 v0, off, off, off
|
|
// CHECK: [0x01,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 off, v0, off, off
|
|
// CHECK: [0x02,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 v0, v0, off, off
|
|
// CHECK: [0x03,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 off, off, v0, off
|
|
// CHECK: [0x04,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 v0, off, v0, off
|
|
// CHECK: [0x05,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 off, v0, v0, off
|
|
// CHECK: [0x06,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 v0, v0, v0, off
|
|
// CHECK: [0x07,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 off, off, off, v0
|
|
// CHECK: [0x08,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 v0, off, off, v0
|
|
// CHECK: [0x09,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 off, v0, off, v0
|
|
// CHECK: [0x0a,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 v0, v0, off, v0
|
|
// CHECK: [0x0b,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 off, off, v0, v0
|
|
// CHECK: [0x0c,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 v0, off, v0, v0
|
|
// CHECK: [0x0d,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 off, v0, v0, v0
|
|
// CHECK: [0x0e,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 off, off, off, off
|
|
// CHECK: [0x00,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 v0, v0, v0, v0 done
|
|
// CHECK: [0x0f,0x08,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 v0, v0, v0, v0 compr
|
|
// CHECK: [0x0f,0x04,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
exp mrt0 v0, v0, v0, v0 vm
|
|
// CHECK: [0x0f,0x10,0x00,0xc4,0x00,0x00,0x00,0x00]
|
|
|
|
flat_load_ubyte v5, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x40,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte v255, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x40,0xdc,0x01,0x00,0x00,0xff]
|
|
|
|
flat_load_ubyte v5, v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x40,0xdc,0xfe,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte v5, v[1:2]
|
|
// CHECK: [0x00,0x00,0x40,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte v5, v[1:2] offset:0
|
|
// CHECK: [0x00,0x00,0x40,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte v5, v[1:2] offset:7
|
|
// CHECK: [0x07,0x00,0x40,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte v5, v[1:2] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x41,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte v5, v[1:2] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x42,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte v5, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x44,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte v255, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x44,0xdc,0x01,0x00,0x00,0xff]
|
|
|
|
flat_load_sbyte v5, v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x44,0xdc,0xfe,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte v5, v[1:2]
|
|
// CHECK: [0x00,0x00,0x44,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte v5, v[1:2] offset:0
|
|
// CHECK: [0x00,0x00,0x44,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte v5, v[1:2] offset:7
|
|
// CHECK: [0x07,0x00,0x44,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte v5, v[1:2] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x45,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte v5, v[1:2] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x46,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ushort v5, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x48,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ushort v255, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x48,0xdc,0x01,0x00,0x00,0xff]
|
|
|
|
flat_load_ushort v5, v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x48,0xdc,0xfe,0x00,0x00,0x05]
|
|
|
|
flat_load_ushort v5, v[1:2]
|
|
// CHECK: [0x00,0x00,0x48,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ushort v5, v[1:2] offset:0
|
|
// CHECK: [0x00,0x00,0x48,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ushort v5, v[1:2] offset:7
|
|
// CHECK: [0x07,0x00,0x48,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ushort v5, v[1:2] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x49,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ushort v5, v[1:2] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x4a,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sshort v5, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x4c,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sshort v255, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x4c,0xdc,0x01,0x00,0x00,0xff]
|
|
|
|
flat_load_sshort v5, v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x4c,0xdc,0xfe,0x00,0x00,0x05]
|
|
|
|
flat_load_sshort v5, v[1:2]
|
|
// CHECK: [0x00,0x00,0x4c,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sshort v5, v[1:2] offset:0
|
|
// CHECK: [0x00,0x00,0x4c,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sshort v5, v[1:2] offset:7
|
|
// CHECK: [0x07,0x00,0x4c,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sshort v5, v[1:2] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x4d,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sshort v5, v[1:2] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x4e,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dword v5, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x50,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dword v255, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x50,0xdc,0x01,0x00,0x00,0xff]
|
|
|
|
flat_load_dword v5, v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x50,0xdc,0xfe,0x00,0x00,0x05]
|
|
|
|
flat_load_dword v5, v[1:2]
|
|
// CHECK: [0x00,0x00,0x50,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dword v5, v[1:2] offset:0
|
|
// CHECK: [0x00,0x00,0x50,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dword v5, v[1:2] offset:7
|
|
// CHECK: [0x07,0x00,0x50,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dword v5, v[1:2] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x51,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dword v5, v[1:2] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x52,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx2 v[5:6], v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x54,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx2 v[254:255], v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x54,0xdc,0x01,0x00,0x00,0xfe]
|
|
|
|
flat_load_dwordx2 v[5:6], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x54,0xdc,0xfe,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx2 v[5:6], v[1:2]
|
|
// CHECK: [0x00,0x00,0x54,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx2 v[5:6], v[1:2] offset:0
|
|
// CHECK: [0x00,0x00,0x54,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx2 v[5:6], v[1:2] offset:7
|
|
// CHECK: [0x07,0x00,0x54,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx2 v[5:6], v[1:2] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x55,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx2 v[5:6], v[1:2] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x56,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx3 v[5:7], v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x58,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx3 v[253:255], v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x58,0xdc,0x01,0x00,0x00,0xfd]
|
|
|
|
flat_load_dwordx3 v[5:7], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x58,0xdc,0xfe,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx3 v[5:7], v[1:2]
|
|
// CHECK: [0x00,0x00,0x58,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx3 v[5:7], v[1:2] offset:0
|
|
// CHECK: [0x00,0x00,0x58,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx3 v[5:7], v[1:2] offset:7
|
|
// CHECK: [0x07,0x00,0x58,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx3 v[5:7], v[1:2] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x59,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx3 v[5:7], v[1:2] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x5a,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx4 v[5:8], v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x5c,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx4 v[252:255], v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x5c,0xdc,0x01,0x00,0x00,0xfc]
|
|
|
|
flat_load_dwordx4 v[5:8], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x5c,0xdc,0xfe,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx4 v[5:8], v[1:2]
|
|
// CHECK: [0x00,0x00,0x5c,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx4 v[5:8], v[1:2] offset:0
|
|
// CHECK: [0x00,0x00,0x5c,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx4 v[5:8], v[1:2] offset:7
|
|
// CHECK: [0x07,0x00,0x5c,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx4 v[5:8], v[1:2] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x5d,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_dwordx4 v[5:8], v[1:2] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x5e,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_store_byte v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x60,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_byte v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x60,0xdc,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_store_byte v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x60,0xdc,0x01,0xff,0x00,0x00]
|
|
|
|
flat_store_byte v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x60,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_byte v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x60,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_byte v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x60,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_byte v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x61,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_byte v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x62,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_byte_d16_hi v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x64,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_byte_d16_hi v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x64,0xdc,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_store_byte_d16_hi v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x64,0xdc,0x01,0xff,0x00,0x00]
|
|
|
|
flat_store_byte_d16_hi v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x64,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_byte_d16_hi v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x64,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_byte_d16_hi v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x64,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_byte_d16_hi v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x65,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_byte_d16_hi v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x66,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_short v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x68,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_short v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x68,0xdc,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_store_short v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x68,0xdc,0x01,0xff,0x00,0x00]
|
|
|
|
flat_store_short v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x68,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_short v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x68,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_short v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x68,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_short v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x69,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_short v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x6a,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_short_d16_hi v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x6c,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_short_d16_hi v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x6c,0xdc,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_store_short_d16_hi v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x6c,0xdc,0x01,0xff,0x00,0x00]
|
|
|
|
flat_store_short_d16_hi v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x6c,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_short_d16_hi v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x6c,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_short_d16_hi v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x6c,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_short_d16_hi v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x6d,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_short_d16_hi v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x6e,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dword v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x70,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dword v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x70,0xdc,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_store_dword v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x70,0xdc,0x01,0xff,0x00,0x00]
|
|
|
|
flat_store_dword v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x70,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dword v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x70,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dword v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x70,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dword v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x71,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dword v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x72,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx2 v[1:2], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x74,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx2 v[254:255], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x74,0xdc,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx2 v[1:2], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x74,0xdc,0x01,0xfe,0x00,0x00]
|
|
|
|
flat_store_dwordx2 v[1:2], v[2:3]
|
|
// CHECK: [0x00,0x00,0x74,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx2 v[1:2], v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x74,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx2 v[1:2], v[2:3] offset:7
|
|
// CHECK: [0x07,0x00,0x74,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx2 v[1:2], v[2:3] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x75,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx2 v[1:2], v[2:3] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x76,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx3 v[1:2], v[2:4] offset:4095
|
|
// CHECK: [0xff,0x0f,0x78,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx3 v[254:255], v[2:4] offset:4095
|
|
// CHECK: [0xff,0x0f,0x78,0xdc,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx3 v[1:2], v[253:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x78,0xdc,0x01,0xfd,0x00,0x00]
|
|
|
|
flat_store_dwordx3 v[1:2], v[2:4]
|
|
// CHECK: [0x00,0x00,0x78,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx3 v[1:2], v[2:4] offset:0
|
|
// CHECK: [0x00,0x00,0x78,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx3 v[1:2], v[2:4] offset:7
|
|
// CHECK: [0x07,0x00,0x78,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx3 v[1:2], v[2:4] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x79,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx3 v[1:2], v[2:4] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x7a,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx4 v[1:2], v[2:5] offset:4095
|
|
// CHECK: [0xff,0x0f,0x7c,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx4 v[254:255], v[2:5] offset:4095
|
|
// CHECK: [0xff,0x0f,0x7c,0xdc,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx4 v[1:2], v[252:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x7c,0xdc,0x01,0xfc,0x00,0x00]
|
|
|
|
flat_store_dwordx4 v[1:2], v[2:5]
|
|
// CHECK: [0x00,0x00,0x7c,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx4 v[1:2], v[2:5] offset:0
|
|
// CHECK: [0x00,0x00,0x7c,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx4 v[1:2], v[2:5] offset:7
|
|
// CHECK: [0x07,0x00,0x7c,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx4 v[1:2], v[2:5] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x7d,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_store_dwordx4 v[1:2], v[2:5] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x7e,0xdc,0x01,0x02,0x00,0x00]
|
|
|
|
flat_load_ubyte_d16 v5, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte_d16 v255, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xdc,0x01,0x00,0x00,0xff]
|
|
|
|
flat_load_ubyte_d16 v5, v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xdc,0xfe,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte_d16 v5, v[1:2]
|
|
// CHECK: [0x00,0x00,0x80,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte_d16 v5, v[1:2] offset:0
|
|
// CHECK: [0x00,0x00,0x80,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte_d16 v5, v[1:2] offset:7
|
|
// CHECK: [0x07,0x00,0x80,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte_d16 v5, v[1:2] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x81,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte_d16 v5, v[1:2] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x82,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte_d16_hi v5, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte_d16_hi v255, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xdc,0x01,0x00,0x00,0xff]
|
|
|
|
flat_load_ubyte_d16_hi v5, v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xdc,0xfe,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte_d16_hi v5, v[1:2]
|
|
// CHECK: [0x00,0x00,0x84,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte_d16_hi v5, v[1:2] offset:0
|
|
// CHECK: [0x00,0x00,0x84,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte_d16_hi v5, v[1:2] offset:7
|
|
// CHECK: [0x07,0x00,0x84,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte_d16_hi v5, v[1:2] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x85,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_ubyte_d16_hi v5, v[1:2] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x86,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte_d16 v5, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte_d16 v255, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xdc,0x01,0x00,0x00,0xff]
|
|
|
|
flat_load_sbyte_d16 v5, v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xdc,0xfe,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte_d16 v5, v[1:2]
|
|
// CHECK: [0x00,0x00,0x88,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte_d16 v5, v[1:2] offset:0
|
|
// CHECK: [0x00,0x00,0x88,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte_d16 v5, v[1:2] offset:7
|
|
// CHECK: [0x07,0x00,0x88,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte_d16 v5, v[1:2] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x89,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte_d16 v5, v[1:2] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x8a,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte_d16_hi v5, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte_d16_hi v255, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xdc,0x01,0x00,0x00,0xff]
|
|
|
|
flat_load_sbyte_d16_hi v5, v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xdc,0xfe,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte_d16_hi v5, v[1:2]
|
|
// CHECK: [0x00,0x00,0x8c,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte_d16_hi v5, v[1:2] offset:0
|
|
// CHECK: [0x00,0x00,0x8c,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte_d16_hi v5, v[1:2] offset:7
|
|
// CHECK: [0x07,0x00,0x8c,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte_d16_hi v5, v[1:2] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x8d,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_sbyte_d16_hi v5, v[1:2] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x8e,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_short_d16 v5, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_short_d16 v255, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xdc,0x01,0x00,0x00,0xff]
|
|
|
|
flat_load_short_d16 v5, v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xdc,0xfe,0x00,0x00,0x05]
|
|
|
|
flat_load_short_d16 v5, v[1:2]
|
|
// CHECK: [0x00,0x00,0x90,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_short_d16 v5, v[1:2] offset:0
|
|
// CHECK: [0x00,0x00,0x90,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_short_d16 v5, v[1:2] offset:7
|
|
// CHECK: [0x07,0x00,0x90,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_short_d16 v5, v[1:2] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x91,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_short_d16 v5, v[1:2] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x92,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_short_d16_hi v5, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_short_d16_hi v255, v[1:2] offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xdc,0x01,0x00,0x00,0xff]
|
|
|
|
flat_load_short_d16_hi v5, v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xdc,0xfe,0x00,0x00,0x05]
|
|
|
|
flat_load_short_d16_hi v5, v[1:2]
|
|
// CHECK: [0x00,0x00,0x94,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_short_d16_hi v5, v[1:2] offset:0
|
|
// CHECK: [0x00,0x00,0x94,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_short_d16_hi v5, v[1:2] offset:7
|
|
// CHECK: [0x07,0x00,0x94,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_short_d16_hi v5, v[1:2] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x95,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_load_short_d16_hi v5, v[1:2] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x96,0xdc,0x01,0x00,0x00,0x05]
|
|
|
|
flat_atomic_swap v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_swap v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_swap v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xdd,0x01,0xff,0x00,0x00]
|
|
|
|
flat_atomic_swap v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x00,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_swap v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x00,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_swap v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x00,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_swap v0, v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x01,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_swap v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x02,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_cmpswap v[1:2], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_cmpswap v[254:255], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_cmpswap v[1:2], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xdd,0x01,0xfe,0x00,0x00]
|
|
|
|
flat_atomic_cmpswap v[1:2], v[2:3]
|
|
// CHECK: [0x00,0x00,0x04,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_cmpswap v[1:2], v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x04,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_cmpswap v[1:2], v[2:3] offset:7
|
|
// CHECK: [0x07,0x00,0x04,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_cmpswap v0, v[1:2], v[2:3] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x05,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_cmpswap v[1:2], v[2:3] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x06,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_add v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_add v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_add v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xdd,0x01,0xff,0x00,0x00]
|
|
|
|
flat_atomic_add v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x08,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_add v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x08,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_add v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x08,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_add v0, v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x09,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_add v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x0a,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_sub v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_sub v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_sub v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xdd,0x01,0xff,0x00,0x00]
|
|
|
|
flat_atomic_sub v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x0c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_sub v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x0c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_sub v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x0c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_sub v0, v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x0d,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_sub v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x0e,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smin v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smin v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smin v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xdd,0x01,0xff,0x00,0x00]
|
|
|
|
flat_atomic_smin v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x10,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smin v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x10,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smin v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x10,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smin v0, v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x11,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smin v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x12,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umin v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umin v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umin v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xdd,0x01,0xff,0x00,0x00]
|
|
|
|
flat_atomic_umin v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x14,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umin v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x14,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umin v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x14,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umin v0, v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x15,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umin v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x16,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smax v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smax v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smax v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xdd,0x01,0xff,0x00,0x00]
|
|
|
|
flat_atomic_smax v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x18,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smax v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x18,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smax v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x18,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smax v0, v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x19,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smax v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x1a,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umax v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umax v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umax v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xdd,0x01,0xff,0x00,0x00]
|
|
|
|
flat_atomic_umax v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x1c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umax v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x1c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umax v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x1c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umax v0, v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x1d,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umax v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x1e,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_and v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_and v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_and v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xdd,0x01,0xff,0x00,0x00]
|
|
|
|
flat_atomic_and v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x20,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_and v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x20,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_and v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x20,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_and v0, v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x21,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_and v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x22,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_or v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_or v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_or v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xdd,0x01,0xff,0x00,0x00]
|
|
|
|
flat_atomic_or v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x24,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_or v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x24,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_or v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x24,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_or v0, v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x25,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_or v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x26,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_xor v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_xor v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_xor v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xdd,0x01,0xff,0x00,0x00]
|
|
|
|
flat_atomic_xor v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x28,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_xor v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x28,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_xor v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x28,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_xor v0, v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x29,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_xor v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x2a,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_inc v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_inc v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_inc v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xdd,0x01,0xff,0x00,0x00]
|
|
|
|
flat_atomic_inc v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x2c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_inc v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x2c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_inc v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x2c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_inc v0, v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x2d,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_inc v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x2e,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_dec v[1:2], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_dec v[254:255], v2 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_dec v[1:2], v255 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xdd,0x01,0xff,0x00,0x00]
|
|
|
|
flat_atomic_dec v[1:2], v2
|
|
// CHECK: [0x00,0x00,0x30,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_dec v[1:2], v2 offset:0
|
|
// CHECK: [0x00,0x00,0x30,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_dec v[1:2], v2 offset:7
|
|
// CHECK: [0x07,0x00,0x30,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_dec v0, v[1:2], v2 offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x31,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_dec v[1:2], v2 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x32,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_swap_x2 v[1:2], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_swap_x2 v[254:255], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_swap_x2 v[1:2], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xdd,0x01,0xfe,0x00,0x00]
|
|
|
|
flat_atomic_swap_x2 v[1:2], v[2:3]
|
|
// CHECK: [0x00,0x00,0x80,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_swap_x2 v[1:2], v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x80,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_swap_x2 v[1:2], v[2:3] offset:7
|
|
// CHECK: [0x07,0x00,0x80,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_swap_x2 v[0:1], v[1:2], v[2:3] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x81,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_swap_x2 v[1:2], v[2:3] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x82,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_cmpswap_x2 v[1:2], v[2:5] offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_cmpswap_x2 v[254:255], v[2:5] offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_cmpswap_x2 v[1:2], v[252:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xdd,0x01,0xfc,0x00,0x00]
|
|
|
|
flat_atomic_cmpswap_x2 v[1:2], v[2:5]
|
|
// CHECK: [0x00,0x00,0x84,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_cmpswap_x2 v[1:2], v[2:5] offset:0
|
|
// CHECK: [0x00,0x00,0x84,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_cmpswap_x2 v[1:2], v[2:5] offset:7
|
|
// CHECK: [0x07,0x00,0x84,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_cmpswap_x2 v[0:1], v[1:2], v[2:5] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x85,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_cmpswap_x2 v[1:2], v[2:5] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x86,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_add_x2 v[1:2], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_add_x2 v[254:255], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_add_x2 v[1:2], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xdd,0x01,0xfe,0x00,0x00]
|
|
|
|
flat_atomic_add_x2 v[1:2], v[2:3]
|
|
// CHECK: [0x00,0x00,0x88,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_add_x2 v[1:2], v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x88,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_add_x2 v[1:2], v[2:3] offset:7
|
|
// CHECK: [0x07,0x00,0x88,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_add_x2 v[0:1], v[1:2], v[2:3] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x89,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_add_x2 v[1:2], v[2:3] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x8a,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_sub_x2 v[1:2], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_sub_x2 v[254:255], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_sub_x2 v[1:2], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xdd,0x01,0xfe,0x00,0x00]
|
|
|
|
flat_atomic_sub_x2 v[1:2], v[2:3]
|
|
// CHECK: [0x00,0x00,0x8c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_sub_x2 v[1:2], v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x8c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_sub_x2 v[1:2], v[2:3] offset:7
|
|
// CHECK: [0x07,0x00,0x8c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_sub_x2 v[0:1], v[1:2], v[2:3] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x8d,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_sub_x2 v[1:2], v[2:3] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x8e,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smin_x2 v[1:2], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smin_x2 v[254:255], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smin_x2 v[1:2], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xdd,0x01,0xfe,0x00,0x00]
|
|
|
|
flat_atomic_smin_x2 v[1:2], v[2:3]
|
|
// CHECK: [0x00,0x00,0x90,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smin_x2 v[1:2], v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x90,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smin_x2 v[1:2], v[2:3] offset:7
|
|
// CHECK: [0x07,0x00,0x90,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smin_x2 v[0:1], v[1:2], v[2:3] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x91,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smin_x2 v[1:2], v[2:3] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x92,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umin_x2 v[1:2], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umin_x2 v[254:255], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umin_x2 v[1:2], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xdd,0x01,0xfe,0x00,0x00]
|
|
|
|
flat_atomic_umin_x2 v[1:2], v[2:3]
|
|
// CHECK: [0x00,0x00,0x94,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umin_x2 v[1:2], v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x94,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umin_x2 v[1:2], v[2:3] offset:7
|
|
// CHECK: [0x07,0x00,0x94,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umin_x2 v[0:1], v[1:2], v[2:3] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x95,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umin_x2 v[1:2], v[2:3] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x96,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smax_x2 v[1:2], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x98,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smax_x2 v[254:255], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x98,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smax_x2 v[1:2], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x98,0xdd,0x01,0xfe,0x00,0x00]
|
|
|
|
flat_atomic_smax_x2 v[1:2], v[2:3]
|
|
// CHECK: [0x00,0x00,0x98,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smax_x2 v[1:2], v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x98,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smax_x2 v[1:2], v[2:3] offset:7
|
|
// CHECK: [0x07,0x00,0x98,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smax_x2 v[0:1], v[1:2], v[2:3] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x99,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_smax_x2 v[1:2], v[2:3] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x9a,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umax_x2 v[1:2], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x9c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umax_x2 v[254:255], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0x9c,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umax_x2 v[1:2], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0x9c,0xdd,0x01,0xfe,0x00,0x00]
|
|
|
|
flat_atomic_umax_x2 v[1:2], v[2:3]
|
|
// CHECK: [0x00,0x00,0x9c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umax_x2 v[1:2], v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0x9c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umax_x2 v[1:2], v[2:3] offset:7
|
|
// CHECK: [0x07,0x00,0x9c,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umax_x2 v[0:1], v[1:2], v[2:3] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0x9d,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_umax_x2 v[1:2], v[2:3] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x9e,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_and_x2 v[1:2], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0xa0,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_and_x2 v[254:255], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0xa0,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_and_x2 v[1:2], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0xa0,0xdd,0x01,0xfe,0x00,0x00]
|
|
|
|
flat_atomic_and_x2 v[1:2], v[2:3]
|
|
// CHECK: [0x00,0x00,0xa0,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_and_x2 v[1:2], v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xa0,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_and_x2 v[1:2], v[2:3] offset:7
|
|
// CHECK: [0x07,0x00,0xa0,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_and_x2 v[0:1], v[1:2], v[2:3] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0xa1,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_and_x2 v[1:2], v[2:3] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0xa2,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_or_x2 v[1:2], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0xa4,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_or_x2 v[254:255], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0xa4,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_or_x2 v[1:2], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0xa4,0xdd,0x01,0xfe,0x00,0x00]
|
|
|
|
flat_atomic_or_x2 v[1:2], v[2:3]
|
|
// CHECK: [0x00,0x00,0xa4,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_or_x2 v[1:2], v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xa4,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_or_x2 v[1:2], v[2:3] offset:7
|
|
// CHECK: [0x07,0x00,0xa4,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_or_x2 v[0:1], v[1:2], v[2:3] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0xa5,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_or_x2 v[1:2], v[2:3] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0xa6,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_xor_x2 v[1:2], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0xa8,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_xor_x2 v[254:255], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0xa8,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_xor_x2 v[1:2], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0xa8,0xdd,0x01,0xfe,0x00,0x00]
|
|
|
|
flat_atomic_xor_x2 v[1:2], v[2:3]
|
|
// CHECK: [0x00,0x00,0xa8,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_xor_x2 v[1:2], v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xa8,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_xor_x2 v[1:2], v[2:3] offset:7
|
|
// CHECK: [0x07,0x00,0xa8,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_xor_x2 v[0:1], v[1:2], v[2:3] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0xa9,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_xor_x2 v[1:2], v[2:3] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0xaa,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_inc_x2 v[1:2], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0xac,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_inc_x2 v[254:255], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0xac,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_inc_x2 v[1:2], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0xac,0xdd,0x01,0xfe,0x00,0x00]
|
|
|
|
flat_atomic_inc_x2 v[1:2], v[2:3]
|
|
// CHECK: [0x00,0x00,0xac,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_inc_x2 v[1:2], v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xac,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_inc_x2 v[1:2], v[2:3] offset:7
|
|
// CHECK: [0x07,0x00,0xac,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_inc_x2 v[0:1], v[1:2], v[2:3] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0xad,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_inc_x2 v[1:2], v[2:3] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0xae,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_dec_x2 v[1:2], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0xb0,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_dec_x2 v[254:255], v[2:3] offset:4095
|
|
// CHECK: [0xff,0x0f,0xb0,0xdd,0xfe,0x02,0x00,0x00]
|
|
|
|
flat_atomic_dec_x2 v[1:2], v[254:255] offset:4095
|
|
// CHECK: [0xff,0x0f,0xb0,0xdd,0x01,0xfe,0x00,0x00]
|
|
|
|
flat_atomic_dec_x2 v[1:2], v[2:3]
|
|
// CHECK: [0x00,0x00,0xb0,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_dec_x2 v[1:2], v[2:3] offset:0
|
|
// CHECK: [0x00,0x00,0xb0,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_dec_x2 v[1:2], v[2:3] offset:7
|
|
// CHECK: [0x07,0x00,0xb0,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_dec_x2 v[0:1], v[1:2], v[2:3] offset:4095 glc
|
|
// CHECK: [0xff,0x0f,0xb1,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
flat_atomic_dec_x2 v[1:2], v[2:3] offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0xb2,0xdd,0x01,0x02,0x00,0x00]
|
|
|
|
global_load_ubyte v5, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x40,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_ubyte v255, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x40,0xdc,0x01,0x00,0x7f,0xff]
|
|
|
|
global_load_ubyte v5, v[1:2], off
|
|
// CHECK: [0x00,0x80,0x40,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_sbyte v5, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x44,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_sbyte v255, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x44,0xdc,0x01,0x00,0x7f,0xff]
|
|
|
|
global_load_sbyte v5, v[1:2], off
|
|
// CHECK: [0x00,0x80,0x44,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_ushort v5, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x48,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_ushort v255, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x48,0xdc,0x01,0x00,0x7f,0xff]
|
|
|
|
global_load_ushort v5, v[1:2], off
|
|
// CHECK: [0x00,0x80,0x48,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_sshort v5, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x4c,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_sshort v255, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x4c,0xdc,0x01,0x00,0x7f,0xff]
|
|
|
|
global_load_sshort v5, v[1:2], off
|
|
// CHECK: [0x00,0x80,0x4c,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_dword v5, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x50,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_dword v255, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x50,0xdc,0x01,0x00,0x7f,0xff]
|
|
|
|
global_load_dword v5, v[1:2], off
|
|
// CHECK: [0x00,0x80,0x50,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_dwordx2 v[5:6], v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x54,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_dwordx2 v[254:255], v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x54,0xdc,0x01,0x00,0x7f,0xfe]
|
|
|
|
global_load_dwordx2 v[5:6], v[1:2], off
|
|
// CHECK: [0x00,0x80,0x54,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_dwordx3 v[5:7], v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x58,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_dwordx3 v[253:255], v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x58,0xdc,0x01,0x00,0x7f,0xfd]
|
|
|
|
global_load_dwordx3 v[5:7], v[1:2], off
|
|
// CHECK: [0x00,0x80,0x58,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_dwordx4 v[5:8], v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x5c,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_dwordx4 v[252:255], v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x5c,0xdc,0x01,0x00,0x7f,0xfc]
|
|
|
|
global_load_dwordx4 v[5:8], v[1:2], off
|
|
// CHECK: [0x00,0x80,0x5c,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_store_byte v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x60,0xdc,0x01,0x02,0x7f,0x00]
|
|
|
|
global_store_byte v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x60,0xdc,0x01,0xff,0x7f,0x00]
|
|
|
|
global_store_byte v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x60,0xdc,0x01,0x02,0x7f,0x00]
|
|
|
|
global_store_byte_d16_hi v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x64,0xdc,0x01,0x02,0x7f,0x00]
|
|
|
|
global_store_byte_d16_hi v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x64,0xdc,0x01,0xff,0x7f,0x00]
|
|
|
|
global_store_byte_d16_hi v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x64,0xdc,0x01,0x02,0x7f,0x00]
|
|
|
|
global_store_short v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x68,0xdc,0x01,0x02,0x7f,0x00]
|
|
|
|
global_store_short v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x68,0xdc,0x01,0xff,0x7f,0x00]
|
|
|
|
global_store_short v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x68,0xdc,0x01,0x02,0x7f,0x00]
|
|
|
|
global_store_short_d16_hi v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x6c,0xdc,0x01,0x02,0x7f,0x00]
|
|
|
|
global_store_short_d16_hi v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x6c,0xdc,0x01,0xff,0x7f,0x00]
|
|
|
|
global_store_short_d16_hi v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x6c,0xdc,0x01,0x02,0x7f,0x00]
|
|
|
|
global_store_dword v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x70,0xdc,0x01,0x02,0x7f,0x00]
|
|
|
|
global_store_dword v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x70,0xdc,0x01,0xff,0x7f,0x00]
|
|
|
|
global_store_dword v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x70,0xdc,0x01,0x02,0x7f,0x00]
|
|
|
|
global_store_dwordx2 v[1:2], v[2:3], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x74,0xdc,0x01,0x02,0x7f,0x00]
|
|
|
|
global_store_dwordx2 v[1:2], v[254:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x74,0xdc,0x01,0xfe,0x7f,0x00]
|
|
|
|
global_store_dwordx2 v[1:2], v[2:3], off
|
|
// CHECK: [0x00,0x80,0x74,0xdc,0x01,0x02,0x7f,0x00]
|
|
|
|
global_store_dwordx3 v[1:2], v[2:4], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x78,0xdc,0x01,0x02,0x7f,0x00]
|
|
|
|
global_store_dwordx3 v[1:2], v[253:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x78,0xdc,0x01,0xfd,0x7f,0x00]
|
|
|
|
global_store_dwordx3 v[1:2], v[2:4], off
|
|
// CHECK: [0x00,0x80,0x78,0xdc,0x01,0x02,0x7f,0x00]
|
|
|
|
global_store_dwordx4 v[1:2], v[2:5], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x7c,0xdc,0x01,0x02,0x7f,0x00]
|
|
|
|
global_store_dwordx4 v[1:2], v[252:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x7c,0xdc,0x01,0xfc,0x7f,0x00]
|
|
|
|
global_store_dwordx4 v[1:2], v[2:5], off
|
|
// CHECK: [0x00,0x80,0x7c,0xdc,0x01,0x02,0x7f,0x00]
|
|
|
|
global_load_ubyte_d16 v5, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x80,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_ubyte_d16 v255, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x80,0xdc,0x01,0x00,0x7f,0xff]
|
|
|
|
global_load_ubyte_d16 v5, v[1:2], off
|
|
// CHECK: [0x00,0x80,0x80,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_ubyte_d16_hi v5, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x84,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_ubyte_d16_hi v255, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x84,0xdc,0x01,0x00,0x7f,0xff]
|
|
|
|
global_load_ubyte_d16_hi v5, v[1:2], off
|
|
// CHECK: [0x00,0x80,0x84,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_sbyte_d16 v5, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x88,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_sbyte_d16 v255, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x88,0xdc,0x01,0x00,0x7f,0xff]
|
|
|
|
global_load_sbyte_d16 v5, v[1:2], off
|
|
// CHECK: [0x00,0x80,0x88,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_sbyte_d16_hi v5, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x8c,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_sbyte_d16_hi v255, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x8c,0xdc,0x01,0x00,0x7f,0xff]
|
|
|
|
global_load_sbyte_d16_hi v5, v[1:2], off
|
|
// CHECK: [0x00,0x80,0x8c,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_short_d16 v5, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x90,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_short_d16 v255, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x90,0xdc,0x01,0x00,0x7f,0xff]
|
|
|
|
global_load_short_d16 v5, v[1:2], off
|
|
// CHECK: [0x00,0x80,0x90,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_short_d16_hi v5, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x94,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_load_short_d16_hi v255, v[1:2], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x94,0xdc,0x01,0x00,0x7f,0xff]
|
|
|
|
global_load_short_d16_hi v5, v[1:2], off
|
|
// CHECK: [0x00,0x80,0x94,0xdc,0x01,0x00,0x7f,0x05]
|
|
|
|
global_atomic_swap v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x00,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_swap v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x00,0xdd,0x01,0xff,0x7f,0x00]
|
|
|
|
global_atomic_swap v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x00,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_cmpswap v[1:2], v[2:3], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x04,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_cmpswap v[1:2], v[254:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x04,0xdd,0x01,0xfe,0x7f,0x00]
|
|
|
|
global_atomic_cmpswap v[1:2], v[2:3], off
|
|
// CHECK: [0x00,0x80,0x04,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_add v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x08,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_add v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x08,0xdd,0x01,0xff,0x7f,0x00]
|
|
|
|
global_atomic_add v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x08,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_sub v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x0c,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_sub v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x0c,0xdd,0x01,0xff,0x7f,0x00]
|
|
|
|
global_atomic_sub v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x0c,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_smin v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x10,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_smin v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x10,0xdd,0x01,0xff,0x7f,0x00]
|
|
|
|
global_atomic_smin v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x10,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_umin v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x14,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_umin v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x14,0xdd,0x01,0xff,0x7f,0x00]
|
|
|
|
global_atomic_umin v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x14,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_smax v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x18,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_smax v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x18,0xdd,0x01,0xff,0x7f,0x00]
|
|
|
|
global_atomic_smax v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x18,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_umax v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x1c,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_umax v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x1c,0xdd,0x01,0xff,0x7f,0x00]
|
|
|
|
global_atomic_umax v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x1c,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_and v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x20,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_and v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x20,0xdd,0x01,0xff,0x7f,0x00]
|
|
|
|
global_atomic_and v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x20,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_or v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x24,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_or v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x24,0xdd,0x01,0xff,0x7f,0x00]
|
|
|
|
global_atomic_or v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x24,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_xor v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x28,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_xor v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x28,0xdd,0x01,0xff,0x7f,0x00]
|
|
|
|
global_atomic_xor v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x28,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_inc v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x2c,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_inc v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x2c,0xdd,0x01,0xff,0x7f,0x00]
|
|
|
|
global_atomic_inc v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x2c,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_dec v[1:2], v2, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x30,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_dec v[1:2], v255, off offset:-1
|
|
// CHECK: [0xff,0x9f,0x30,0xdd,0x01,0xff,0x7f,0x00]
|
|
|
|
global_atomic_dec v[1:2], v2, off
|
|
// CHECK: [0x00,0x80,0x30,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_swap_x2 v[1:2], v[2:3], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x80,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_swap_x2 v[1:2], v[254:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x80,0xdd,0x01,0xfe,0x7f,0x00]
|
|
|
|
global_atomic_swap_x2 v[1:2], v[2:3], off
|
|
// CHECK: [0x00,0x80,0x80,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_cmpswap_x2 v[1:2], v[2:5], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x84,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_cmpswap_x2 v[1:2], v[252:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x84,0xdd,0x01,0xfc,0x7f,0x00]
|
|
|
|
global_atomic_cmpswap_x2 v[1:2], v[2:5], off
|
|
// CHECK: [0x00,0x80,0x84,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_add_x2 v[1:2], v[2:3], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x88,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_add_x2 v[1:2], v[254:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x88,0xdd,0x01,0xfe,0x7f,0x00]
|
|
|
|
global_atomic_add_x2 v[1:2], v[2:3], off
|
|
// CHECK: [0x00,0x80,0x88,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_sub_x2 v[1:2], v[2:3], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x8c,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_sub_x2 v[1:2], v[254:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x8c,0xdd,0x01,0xfe,0x7f,0x00]
|
|
|
|
global_atomic_sub_x2 v[1:2], v[2:3], off
|
|
// CHECK: [0x00,0x80,0x8c,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_smin_x2 v[1:2], v[2:3], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x90,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_smin_x2 v[1:2], v[254:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x90,0xdd,0x01,0xfe,0x7f,0x00]
|
|
|
|
global_atomic_smin_x2 v[1:2], v[2:3], off
|
|
// CHECK: [0x00,0x80,0x90,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_umin_x2 v[1:2], v[2:3], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x94,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_umin_x2 v[1:2], v[254:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x94,0xdd,0x01,0xfe,0x7f,0x00]
|
|
|
|
global_atomic_umin_x2 v[1:2], v[2:3], off
|
|
// CHECK: [0x00,0x80,0x94,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_smax_x2 v[1:2], v[2:3], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x98,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_smax_x2 v[1:2], v[254:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x98,0xdd,0x01,0xfe,0x7f,0x00]
|
|
|
|
global_atomic_smax_x2 v[1:2], v[2:3], off
|
|
// CHECK: [0x00,0x80,0x98,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_umax_x2 v[1:2], v[2:3], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x9c,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_umax_x2 v[1:2], v[254:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0x9c,0xdd,0x01,0xfe,0x7f,0x00]
|
|
|
|
global_atomic_umax_x2 v[1:2], v[2:3], off
|
|
// CHECK: [0x00,0x80,0x9c,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_and_x2 v[1:2], v[2:3], off offset:-1
|
|
// CHECK: [0xff,0x9f,0xa0,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_and_x2 v[1:2], v[254:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0xa0,0xdd,0x01,0xfe,0x7f,0x00]
|
|
|
|
global_atomic_and_x2 v[1:2], v[2:3], off
|
|
// CHECK: [0x00,0x80,0xa0,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_or_x2 v[1:2], v[2:3], off offset:-1
|
|
// CHECK: [0xff,0x9f,0xa4,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_or_x2 v[1:2], v[254:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0xa4,0xdd,0x01,0xfe,0x7f,0x00]
|
|
|
|
global_atomic_or_x2 v[1:2], v[2:3], off
|
|
// CHECK: [0x00,0x80,0xa4,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_xor_x2 v[1:2], v[2:3], off offset:-1
|
|
// CHECK: [0xff,0x9f,0xa8,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_xor_x2 v[1:2], v[254:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0xa8,0xdd,0x01,0xfe,0x7f,0x00]
|
|
|
|
global_atomic_xor_x2 v[1:2], v[2:3], off
|
|
// CHECK: [0x00,0x80,0xa8,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_inc_x2 v[1:2], v[2:3], off offset:-1
|
|
// CHECK: [0xff,0x9f,0xac,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_inc_x2 v[1:2], v[254:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0xac,0xdd,0x01,0xfe,0x7f,0x00]
|
|
|
|
global_atomic_inc_x2 v[1:2], v[2:3], off
|
|
// CHECK: [0x00,0x80,0xac,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_dec_x2 v[1:2], v[2:3], off offset:-1
|
|
// CHECK: [0xff,0x9f,0xb0,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
global_atomic_dec_x2 v[1:2], v[254:255], off offset:-1
|
|
// CHECK: [0xff,0x9f,0xb0,0xdd,0x01,0xfe,0x7f,0x00]
|
|
|
|
global_atomic_dec_x2 v[1:2], v[2:3], off
|
|
// CHECK: [0x00,0x80,0xb0,0xdd,0x01,0x02,0x7f,0x00]
|
|
|
|
scratch_load_ubyte v5, off, s2 offset:-1
|
|
// CHECK: [0xff,0x5f,0x40,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_ubyte v255, off, s2 offset:-1
|
|
// CHECK: [0xff,0x5f,0x40,0xdc,0x00,0x00,0x02,0xff]
|
|
|
|
scratch_load_ubyte v5, off, s101 offset:-1
|
|
// CHECK: [0xff,0x5f,0x40,0xdc,0x00,0x00,0x65,0x05]
|
|
|
|
scratch_load_ubyte v5, off, flat_scratch_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x40,0xdc,0x00,0x00,0x66,0x05]
|
|
|
|
scratch_load_ubyte v5, off, flat_scratch_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x40,0xdc,0x00,0x00,0x67,0x05]
|
|
|
|
scratch_load_ubyte v5, off, vcc_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x40,0xdc,0x00,0x00,0x6a,0x05]
|
|
|
|
scratch_load_ubyte v5, off, vcc_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x40,0xdc,0x00,0x00,0x6b,0x05]
|
|
|
|
scratch_load_ubyte v5, v0, off offset:-1
|
|
// CHECK: [0xff,0x5f,0x40,0xdc,0x00,0x00,0x7f,0x05]
|
|
|
|
scratch_load_ubyte v5, off, s2
|
|
// CHECK: [0x00,0x40,0x40,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_ubyte v5, off, s2 offset:0
|
|
// CHECK: [0x00,0x40,0x40,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_ubyte v5, off, s2 offset:4095
|
|
// CHECK: [0xff,0x4f,0x40,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_ubyte v5, off, s2 offset:-4096
|
|
// CHECK: [0x00,0x50,0x40,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_ubyte v5, off, s2 offset:-1 glc
|
|
// CHECK: [0xff,0x5f,0x41,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_ubyte v5, off, s2 offset:-1 slc
|
|
// CHECK: [0xff,0x5f,0x42,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_sbyte v5, off, s2 offset:-1
|
|
// CHECK: [0xff,0x5f,0x44,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_sbyte v255, off, s2 offset:-1
|
|
// CHECK: [0xff,0x5f,0x44,0xdc,0x00,0x00,0x02,0xff]
|
|
|
|
scratch_load_sbyte v5, off, s101 offset:-1
|
|
// CHECK: [0xff,0x5f,0x44,0xdc,0x00,0x00,0x65,0x05]
|
|
|
|
scratch_load_sbyte v5, off, flat_scratch_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x44,0xdc,0x00,0x00,0x66,0x05]
|
|
|
|
scratch_load_sbyte v5, off, flat_scratch_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x44,0xdc,0x00,0x00,0x67,0x05]
|
|
|
|
scratch_load_sbyte v5, off, vcc_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x44,0xdc,0x00,0x00,0x6a,0x05]
|
|
|
|
scratch_load_sbyte v5, off, vcc_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x44,0xdc,0x00,0x00,0x6b,0x05]
|
|
|
|
scratch_load_sbyte v5, v0, off offset:-1
|
|
// CHECK: [0xff,0x5f,0x44,0xdc,0x00,0x00,0x7f,0x05]
|
|
|
|
scratch_load_sbyte v5, off, s2
|
|
// CHECK: [0x00,0x40,0x44,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_sbyte v5, off, s2 offset:0
|
|
// CHECK: [0x00,0x40,0x44,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_sbyte v5, off, s2 offset:4095
|
|
// CHECK: [0xff,0x4f,0x44,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_sbyte v5, off, s2 offset:-4096
|
|
// CHECK: [0x00,0x50,0x44,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_sbyte v5, off, s2 offset:-1 glc
|
|
// CHECK: [0xff,0x5f,0x45,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_sbyte v5, off, s2 offset:-1 slc
|
|
// CHECK: [0xff,0x5f,0x46,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_ushort v5, off, s2 offset:-1
|
|
// CHECK: [0xff,0x5f,0x48,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_ushort v255, off, s2 offset:-1
|
|
// CHECK: [0xff,0x5f,0x48,0xdc,0x00,0x00,0x02,0xff]
|
|
|
|
scratch_load_ushort v5, off, s101 offset:-1
|
|
// CHECK: [0xff,0x5f,0x48,0xdc,0x00,0x00,0x65,0x05]
|
|
|
|
scratch_load_ushort v5, off, flat_scratch_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x48,0xdc,0x00,0x00,0x66,0x05]
|
|
|
|
scratch_load_ushort v5, off, flat_scratch_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x48,0xdc,0x00,0x00,0x67,0x05]
|
|
|
|
scratch_load_ushort v5, off, vcc_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x48,0xdc,0x00,0x00,0x6a,0x05]
|
|
|
|
scratch_load_ushort v5, off, vcc_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x48,0xdc,0x00,0x00,0x6b,0x05]
|
|
|
|
scratch_load_ushort v5, v0, off offset:-1
|
|
// CHECK: [0xff,0x5f,0x48,0xdc,0x00,0x00,0x7f,0x05]
|
|
|
|
scratch_load_ushort v5, off, s2
|
|
// CHECK: [0x00,0x40,0x48,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_ushort v5, off, s2 offset:0
|
|
// CHECK: [0x00,0x40,0x48,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_ushort v5, off, s2 offset:4095
|
|
// CHECK: [0xff,0x4f,0x48,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_ushort v5, off, s2 offset:-4096
|
|
// CHECK: [0x00,0x50,0x48,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_ushort v5, off, s2 offset:-1 glc
|
|
// CHECK: [0xff,0x5f,0x49,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_ushort v5, off, s2 offset:-1 slc
|
|
// CHECK: [0xff,0x5f,0x4a,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_sshort v5, off, s2 offset:-1
|
|
// CHECK: [0xff,0x5f,0x4c,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_sshort v255, off, s2 offset:-1
|
|
// CHECK: [0xff,0x5f,0x4c,0xdc,0x00,0x00,0x02,0xff]
|
|
|
|
scratch_load_sshort v5, off, s101 offset:-1
|
|
// CHECK: [0xff,0x5f,0x4c,0xdc,0x00,0x00,0x65,0x05]
|
|
|
|
scratch_load_sshort v5, off, flat_scratch_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x4c,0xdc,0x00,0x00,0x66,0x05]
|
|
|
|
scratch_load_sshort v5, off, flat_scratch_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x4c,0xdc,0x00,0x00,0x67,0x05]
|
|
|
|
scratch_load_sshort v5, off, vcc_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x4c,0xdc,0x00,0x00,0x6a,0x05]
|
|
|
|
scratch_load_sshort v5, off, vcc_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x4c,0xdc,0x00,0x00,0x6b,0x05]
|
|
|
|
scratch_load_sshort v5, v0, off offset:-1
|
|
// CHECK: [0xff,0x5f,0x4c,0xdc,0x00,0x00,0x7f,0x05]
|
|
|
|
scratch_load_sshort v5, off, s2
|
|
// CHECK: [0x00,0x40,0x4c,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_sshort v5, off, s2 offset:0
|
|
// CHECK: [0x00,0x40,0x4c,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_sshort v5, off, s2 offset:4095
|
|
// CHECK: [0xff,0x4f,0x4c,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_sshort v5, off, s2 offset:-4096
|
|
// CHECK: [0x00,0x50,0x4c,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_sshort v5, off, s2 offset:-1 glc
|
|
// CHECK: [0xff,0x5f,0x4d,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_sshort v5, off, s2 offset:-1 slc
|
|
// CHECK: [0xff,0x5f,0x4e,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dword v5, off, s2 offset:-1
|
|
// CHECK: [0xff,0x5f,0x50,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dword v255, off, s2 offset:-1
|
|
// CHECK: [0xff,0x5f,0x50,0xdc,0x00,0x00,0x02,0xff]
|
|
|
|
scratch_load_dword v5, off, s101 offset:-1
|
|
// CHECK: [0xff,0x5f,0x50,0xdc,0x00,0x00,0x65,0x05]
|
|
|
|
scratch_load_dword v5, off, flat_scratch_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x50,0xdc,0x00,0x00,0x66,0x05]
|
|
|
|
scratch_load_dword v5, off, flat_scratch_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x50,0xdc,0x00,0x00,0x67,0x05]
|
|
|
|
scratch_load_dword v5, off, vcc_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x50,0xdc,0x00,0x00,0x6a,0x05]
|
|
|
|
scratch_load_dword v5, off, vcc_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x50,0xdc,0x00,0x00,0x6b,0x05]
|
|
|
|
scratch_load_dword v5, v0, off offset:-1
|
|
// CHECK: [0xff,0x5f,0x50,0xdc,0x00,0x00,0x7f,0x05]
|
|
|
|
scratch_load_dword v5, off, s2
|
|
// CHECK: [0x00,0x40,0x50,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dword v5, off, s2 offset:0
|
|
// CHECK: [0x00,0x40,0x50,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dword v5, off, s2 offset:4095
|
|
// CHECK: [0xff,0x4f,0x50,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dword v5, off, s2 offset:-4096
|
|
// CHECK: [0x00,0x50,0x50,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dword v5, off, s2 offset:-1 glc
|
|
// CHECK: [0xff,0x5f,0x51,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dword v5, off, s2 offset:-1 slc
|
|
// CHECK: [0xff,0x5f,0x52,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx2 v[5:6], off, s2 offset:-1
|
|
// CHECK: [0xff,0x5f,0x54,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx2 v[254:255], off, s2 offset:-1
|
|
// CHECK: [0xff,0x5f,0x54,0xdc,0x00,0x00,0x02,0xfe]
|
|
|
|
scratch_load_dwordx2 v[5:6], off, s101 offset:-1
|
|
// CHECK: [0xff,0x5f,0x54,0xdc,0x00,0x00,0x65,0x05]
|
|
|
|
scratch_load_dwordx2 v[5:6], off, flat_scratch_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x54,0xdc,0x00,0x00,0x66,0x05]
|
|
|
|
scratch_load_dwordx2 v[5:6], off, flat_scratch_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x54,0xdc,0x00,0x00,0x67,0x05]
|
|
|
|
scratch_load_dwordx2 v[5:6], off, vcc_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x54,0xdc,0x00,0x00,0x6a,0x05]
|
|
|
|
scratch_load_dwordx2 v[5:6], off, vcc_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x54,0xdc,0x00,0x00,0x6b,0x05]
|
|
|
|
scratch_load_dwordx2 v[5:6], v0, off offset:-1
|
|
// CHECK: [0xff,0x5f,0x54,0xdc,0x00,0x00,0x7f,0x05]
|
|
|
|
scratch_load_dwordx2 v[5:6], off, s2
|
|
// CHECK: [0x00,0x40,0x54,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx2 v[5:6], off, s2 offset:0
|
|
// CHECK: [0x00,0x40,0x54,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx2 v[5:6], off, s2 offset:4095
|
|
// CHECK: [0xff,0x4f,0x54,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx2 v[5:6], off, s2 offset:-4096
|
|
// CHECK: [0x00,0x50,0x54,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx2 v[5:6], off, s2 offset:-1 glc
|
|
// CHECK: [0xff,0x5f,0x55,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx2 v[5:6], off, s2 offset:-1 slc
|
|
// CHECK: [0xff,0x5f,0x56,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx3 v[5:7], off, s2 offset:-1
|
|
// CHECK: [0xff,0x5f,0x58,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx3 v[253:255], off, s2 offset:-1
|
|
// CHECK: [0xff,0x5f,0x58,0xdc,0x00,0x00,0x02,0xfd]
|
|
|
|
scratch_load_dwordx3 v[5:7], off, s101 offset:-1
|
|
// CHECK: [0xff,0x5f,0x58,0xdc,0x00,0x00,0x65,0x05]
|
|
|
|
scratch_load_dwordx3 v[5:7], off, flat_scratch_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x58,0xdc,0x00,0x00,0x66,0x05]
|
|
|
|
scratch_load_dwordx3 v[5:7], off, flat_scratch_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x58,0xdc,0x00,0x00,0x67,0x05]
|
|
|
|
scratch_load_dwordx3 v[5:7], off, vcc_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x58,0xdc,0x00,0x00,0x6a,0x05]
|
|
|
|
scratch_load_dwordx3 v[5:7], off, vcc_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x58,0xdc,0x00,0x00,0x6b,0x05]
|
|
|
|
scratch_load_dwordx3 v[5:7], v0, off offset:-1
|
|
// CHECK: [0xff,0x5f,0x58,0xdc,0x00,0x00,0x7f,0x05]
|
|
|
|
scratch_load_dwordx3 v[5:7], off, s2
|
|
// CHECK: [0x00,0x40,0x58,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx3 v[5:7], off, s2 offset:0
|
|
// CHECK: [0x00,0x40,0x58,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx3 v[5:7], off, s2 offset:4095
|
|
// CHECK: [0xff,0x4f,0x58,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx3 v[5:7], off, s2 offset:-4096
|
|
// CHECK: [0x00,0x50,0x58,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx3 v[5:7], off, s2 offset:-1 glc
|
|
// CHECK: [0xff,0x5f,0x59,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx3 v[5:7], off, s2 offset:-1 slc
|
|
// CHECK: [0xff,0x5f,0x5a,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx4 v[5:8], off, s2 offset:-1
|
|
// CHECK: [0xff,0x5f,0x5c,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx4 v[252:255], off, s2 offset:-1
|
|
// CHECK: [0xff,0x5f,0x5c,0xdc,0x00,0x00,0x02,0xfc]
|
|
|
|
scratch_load_dwordx4 v[5:8], off, s101 offset:-1
|
|
// CHECK: [0xff,0x5f,0x5c,0xdc,0x00,0x00,0x65,0x05]
|
|
|
|
scratch_load_dwordx4 v[5:8], off, flat_scratch_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x5c,0xdc,0x00,0x00,0x66,0x05]
|
|
|
|
scratch_load_dwordx4 v[5:8], off, flat_scratch_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x5c,0xdc,0x00,0x00,0x67,0x05]
|
|
|
|
scratch_load_dwordx4 v[5:8], off, vcc_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x5c,0xdc,0x00,0x00,0x6a,0x05]
|
|
|
|
scratch_load_dwordx4 v[5:8], off, vcc_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x5c,0xdc,0x00,0x00,0x6b,0x05]
|
|
|
|
scratch_load_dwordx4 v[5:8], v0, off offset:-1
|
|
// CHECK: [0xff,0x5f,0x5c,0xdc,0x00,0x00,0x7f,0x05]
|
|
|
|
scratch_load_dwordx4 v[5:8], off, s2
|
|
// CHECK: [0x00,0x40,0x5c,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx4 v[5:8], off, s2 offset:0
|
|
// CHECK: [0x00,0x40,0x5c,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx4 v[5:8], off, s2 offset:4095
|
|
// CHECK: [0xff,0x4f,0x5c,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx4 v[5:8], off, s2 offset:-4096
|
|
// CHECK: [0x00,0x50,0x5c,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx4 v[5:8], off, s2 offset:-1 glc
|
|
// CHECK: [0xff,0x5f,0x5d,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_load_dwordx4 v[5:8], off, s2 offset:-1 slc
|
|
// CHECK: [0xff,0x5f,0x5e,0xdc,0x00,0x00,0x02,0x05]
|
|
|
|
scratch_store_byte off, v2, s3 offset:-1
|
|
// CHECK: [0xff,0x5f,0x60,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_byte off, v255, s3 offset:-1
|
|
// CHECK: [0xff,0x5f,0x60,0xdc,0x00,0xff,0x03,0x00]
|
|
|
|
scratch_store_byte off, v2, s101 offset:-1
|
|
// CHECK: [0xff,0x5f,0x60,0xdc,0x00,0x02,0x65,0x00]
|
|
|
|
scratch_store_byte off, v2, flat_scratch_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x60,0xdc,0x00,0x02,0x66,0x00]
|
|
|
|
scratch_store_byte off, v2, flat_scratch_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x60,0xdc,0x00,0x02,0x67,0x00]
|
|
|
|
scratch_store_byte off, v2, vcc_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x60,0xdc,0x00,0x02,0x6a,0x00]
|
|
|
|
scratch_store_byte off, v2, vcc_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x60,0xdc,0x00,0x02,0x6b,0x00]
|
|
|
|
scratch_store_byte v0, v2, off offset:-1
|
|
// CHECK: [0xff,0x5f,0x60,0xdc,0x00,0x02,0x7f,0x00]
|
|
|
|
scratch_store_byte off, v2, s3
|
|
// CHECK: [0x00,0x40,0x60,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_byte off, v2, s3 offset:0
|
|
// CHECK: [0x00,0x40,0x60,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_byte off, v2, s3 offset:4095
|
|
// CHECK: [0xff,0x4f,0x60,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_byte off, v2, s3 offset:-4096
|
|
// CHECK: [0x00,0x50,0x60,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_byte off, v2, s3 offset:-1 glc
|
|
// CHECK: [0xff,0x5f,0x61,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_byte off, v2, s3 offset:-1 slc
|
|
// CHECK: [0xff,0x5f,0x62,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_byte_d16_hi off, v2, s3 offset:-1
|
|
// CHECK: [0xff,0x5f,0x64,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_byte_d16_hi off, v255, s3 offset:-1
|
|
// CHECK: [0xff,0x5f,0x64,0xdc,0x00,0xff,0x03,0x00]
|
|
|
|
scratch_store_byte_d16_hi off, v2, s101 offset:-1
|
|
// CHECK: [0xff,0x5f,0x64,0xdc,0x00,0x02,0x65,0x00]
|
|
|
|
scratch_store_byte_d16_hi off, v2, flat_scratch_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x64,0xdc,0x00,0x02,0x66,0x00]
|
|
|
|
scratch_store_byte_d16_hi off, v2, flat_scratch_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x64,0xdc,0x00,0x02,0x67,0x00]
|
|
|
|
scratch_store_byte_d16_hi off, v2, vcc_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x64,0xdc,0x00,0x02,0x6a,0x00]
|
|
|
|
scratch_store_byte_d16_hi off, v2, vcc_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x64,0xdc,0x00,0x02,0x6b,0x00]
|
|
|
|
scratch_store_byte_d16_hi v0, v2, off offset:-1
|
|
// CHECK: [0xff,0x5f,0x64,0xdc,0x00,0x02,0x7f,0x00]
|
|
|
|
scratch_store_byte_d16_hi off, v2, s3
|
|
// CHECK: [0x00,0x40,0x64,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_byte_d16_hi off, v2, s3 offset:0
|
|
// CHECK: [0x00,0x40,0x64,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_byte_d16_hi off, v2, s3 offset:4095
|
|
// CHECK: [0xff,0x4f,0x64,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_byte_d16_hi off, v2, s3 offset:-4096
|
|
// CHECK: [0x00,0x50,0x64,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_byte_d16_hi off, v2, s3 offset:-1 glc
|
|
// CHECK: [0xff,0x5f,0x65,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_byte_d16_hi off, v2, s3 offset:-1 slc
|
|
// CHECK: [0xff,0x5f,0x66,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_short off, v2, s3 offset:-1
|
|
// CHECK: [0xff,0x5f,0x68,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_short off, v255, s3 offset:-1
|
|
// CHECK: [0xff,0x5f,0x68,0xdc,0x00,0xff,0x03,0x00]
|
|
|
|
scratch_store_short off, v2, s101 offset:-1
|
|
// CHECK: [0xff,0x5f,0x68,0xdc,0x00,0x02,0x65,0x00]
|
|
|
|
scratch_store_short off, v2, flat_scratch_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x68,0xdc,0x00,0x02,0x66,0x00]
|
|
|
|
scratch_store_short off, v2, flat_scratch_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x68,0xdc,0x00,0x02,0x67,0x00]
|
|
|
|
scratch_store_short off, v2, vcc_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x68,0xdc,0x00,0x02,0x6a,0x00]
|
|
|
|
scratch_store_short off, v2, vcc_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x68,0xdc,0x00,0x02,0x6b,0x00]
|
|
|
|
scratch_store_short v0, v2, off offset:-1
|
|
// CHECK: [0xff,0x5f,0x68,0xdc,0x00,0x02,0x7f,0x00]
|
|
|
|
scratch_store_short off, v2, s3
|
|
// CHECK: [0x00,0x40,0x68,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_short off, v2, s3 offset:0
|
|
// CHECK: [0x00,0x40,0x68,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_short off, v2, s3 offset:4095
|
|
// CHECK: [0xff,0x4f,0x68,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_short off, v2, s3 offset:-4096
|
|
// CHECK: [0x00,0x50,0x68,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_short off, v2, s3 offset:-1 glc
|
|
// CHECK: [0xff,0x5f,0x69,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_short off, v2, s3 offset:-1 slc
|
|
// CHECK: [0xff,0x5f,0x6a,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_short_d16_hi off, v2, s3 offset:-1
|
|
// CHECK: [0xff,0x5f,0x6c,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_short_d16_hi off, v255, s3 offset:-1
|
|
// CHECK: [0xff,0x5f,0x6c,0xdc,0x00,0xff,0x03,0x00]
|
|
|
|
scratch_store_short_d16_hi off, v2, s101 offset:-1
|
|
// CHECK: [0xff,0x5f,0x6c,0xdc,0x00,0x02,0x65,0x00]
|
|
|
|
scratch_store_short_d16_hi off, v2, flat_scratch_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x6c,0xdc,0x00,0x02,0x66,0x00]
|
|
|
|
scratch_store_short_d16_hi off, v2, flat_scratch_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x6c,0xdc,0x00,0x02,0x67,0x00]
|
|
|
|
scratch_store_short_d16_hi off, v2, vcc_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x6c,0xdc,0x00,0x02,0x6a,0x00]
|
|
|
|
scratch_store_short_d16_hi off, v2, vcc_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x6c,0xdc,0x00,0x02,0x6b,0x00]
|
|
|
|
scratch_store_short_d16_hi v0, v2, off offset:-1
|
|
// CHECK: [0xff,0x5f,0x6c,0xdc,0x00,0x02,0x7f,0x00]
|
|
|
|
scratch_store_short_d16_hi off, v2, s3
|
|
// CHECK: [0x00,0x40,0x6c,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_short_d16_hi off, v2, s3 offset:0
|
|
// CHECK: [0x00,0x40,0x6c,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_short_d16_hi off, v2, s3 offset:4095
|
|
// CHECK: [0xff,0x4f,0x6c,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_short_d16_hi off, v2, s3 offset:-4096
|
|
// CHECK: [0x00,0x50,0x6c,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_short_d16_hi off, v2, s3 offset:-1 glc
|
|
// CHECK: [0xff,0x5f,0x6d,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_short_d16_hi off, v2, s3 offset:-1 slc
|
|
// CHECK: [0xff,0x5f,0x6e,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dword off, v2, s3 offset:-1
|
|
// CHECK: [0xff,0x5f,0x70,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dword off, v255, s3 offset:-1
|
|
// CHECK: [0xff,0x5f,0x70,0xdc,0x00,0xff,0x03,0x00]
|
|
|
|
scratch_store_dword off, v2, s101 offset:-1
|
|
// CHECK: [0xff,0x5f,0x70,0xdc,0x00,0x02,0x65,0x00]
|
|
|
|
scratch_store_dword off, v2, flat_scratch_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x70,0xdc,0x00,0x02,0x66,0x00]
|
|
|
|
scratch_store_dword off, v2, flat_scratch_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x70,0xdc,0x00,0x02,0x67,0x00]
|
|
|
|
scratch_store_dword off, v2, vcc_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x70,0xdc,0x00,0x02,0x6a,0x00]
|
|
|
|
scratch_store_dword off, v2, vcc_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x70,0xdc,0x00,0x02,0x6b,0x00]
|
|
|
|
scratch_store_dword v0, v2, off offset:-1
|
|
// CHECK: [0xff,0x5f,0x70,0xdc,0x00,0x02,0x7f,0x00]
|
|
|
|
scratch_store_dword off, v2, s3
|
|
// CHECK: [0x00,0x40,0x70,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dword off, v2, s3 offset:0
|
|
// CHECK: [0x00,0x40,0x70,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dword off, v2, s3 offset:4095
|
|
// CHECK: [0xff,0x4f,0x70,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dword off, v2, s3 offset:-4096
|
|
// CHECK: [0x00,0x50,0x70,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dword off, v2, s3 offset:-1 glc
|
|
// CHECK: [0xff,0x5f,0x71,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dword off, v2, s3 offset:-1 slc
|
|
// CHECK: [0xff,0x5f,0x72,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx2 off, v[2:3], s3 offset:-1
|
|
// CHECK: [0xff,0x5f,0x74,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx2 off, v[254:255], s3 offset:-1
|
|
// CHECK: [0xff,0x5f,0x74,0xdc,0x00,0xfe,0x03,0x00]
|
|
|
|
scratch_store_dwordx2 off, v[2:3], s101 offset:-1
|
|
// CHECK: [0xff,0x5f,0x74,0xdc,0x00,0x02,0x65,0x00]
|
|
|
|
scratch_store_dwordx2 off, v[2:3], flat_scratch_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x74,0xdc,0x00,0x02,0x66,0x00]
|
|
|
|
scratch_store_dwordx2 off, v[2:3], flat_scratch_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x74,0xdc,0x00,0x02,0x67,0x00]
|
|
|
|
scratch_store_dwordx2 off, v[2:3], vcc_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x74,0xdc,0x00,0x02,0x6a,0x00]
|
|
|
|
scratch_store_dwordx2 off, v[2:3], vcc_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x74,0xdc,0x00,0x02,0x6b,0x00]
|
|
|
|
scratch_store_dwordx2 v0, v[2:3], off offset:-1
|
|
// CHECK: [0xff,0x5f,0x74,0xdc,0x00,0x02,0x7f,0x00]
|
|
|
|
scratch_store_dwordx2 off, v[2:3], s3
|
|
// CHECK: [0x00,0x40,0x74,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx2 off, v[2:3], s3 offset:0
|
|
// CHECK: [0x00,0x40,0x74,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx2 off, v[2:3], s3 offset:4095
|
|
// CHECK: [0xff,0x4f,0x74,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx2 off, v[2:3], s3 offset:-4096
|
|
// CHECK: [0x00,0x50,0x74,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx2 off, v[2:3], s3 offset:-1 glc
|
|
// CHECK: [0xff,0x5f,0x75,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx2 off, v[2:3], s3 offset:-1 slc
|
|
// CHECK: [0xff,0x5f,0x76,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx3 off, v[2:4], s3 offset:-1
|
|
// CHECK: [0xff,0x5f,0x78,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx3 off, v[253:255], s3 offset:-1
|
|
// CHECK: [0xff,0x5f,0x78,0xdc,0x00,0xfd,0x03,0x00]
|
|
|
|
scratch_store_dwordx3 off, v[2:4], s101 offset:-1
|
|
// CHECK: [0xff,0x5f,0x78,0xdc,0x00,0x02,0x65,0x00]
|
|
|
|
scratch_store_dwordx3 off, v[2:4], flat_scratch_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x78,0xdc,0x00,0x02,0x66,0x00]
|
|
|
|
scratch_store_dwordx3 off, v[2:4], flat_scratch_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x78,0xdc,0x00,0x02,0x67,0x00]
|
|
|
|
scratch_store_dwordx3 off, v[2:4], vcc_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x78,0xdc,0x00,0x02,0x6a,0x00]
|
|
|
|
scratch_store_dwordx3 off, v[2:4], vcc_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x78,0xdc,0x00,0x02,0x6b,0x00]
|
|
|
|
scratch_store_dwordx3 v0, v[2:4], off offset:-1
|
|
// CHECK: [0xff,0x5f,0x78,0xdc,0x00,0x02,0x7f,0x00]
|
|
|
|
scratch_store_dwordx3 off, v[2:4], s3
|
|
// CHECK: [0x00,0x40,0x78,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx3 off, v[2:4], s3 offset:0
|
|
// CHECK: [0x00,0x40,0x78,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx3 off, v[2:4], s3 offset:4095
|
|
// CHECK: [0xff,0x4f,0x78,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx3 off, v[2:4], s3 offset:-4096
|
|
// CHECK: [0x00,0x50,0x78,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx3 off, v[2:4], s3 offset:-1 glc
|
|
// CHECK: [0xff,0x5f,0x79,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx3 off, v[2:4], s3 offset:-1 slc
|
|
// CHECK: [0xff,0x5f,0x7a,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx4 off, v[2:5], s3 offset:-1
|
|
// CHECK: [0xff,0x5f,0x7c,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx4 off, v[252:255], s3 offset:-1
|
|
// CHECK: [0xff,0x5f,0x7c,0xdc,0x00,0xfc,0x03,0x00]
|
|
|
|
scratch_store_dwordx4 off, v[2:5], s101 offset:-1
|
|
// CHECK: [0xff,0x5f,0x7c,0xdc,0x00,0x02,0x65,0x00]
|
|
|
|
scratch_store_dwordx4 off, v[2:5], flat_scratch_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x7c,0xdc,0x00,0x02,0x66,0x00]
|
|
|
|
scratch_store_dwordx4 off, v[2:5], flat_scratch_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x7c,0xdc,0x00,0x02,0x67,0x00]
|
|
|
|
scratch_store_dwordx4 off, v[2:5], vcc_lo offset:-1
|
|
// CHECK: [0xff,0x5f,0x7c,0xdc,0x00,0x02,0x6a,0x00]
|
|
|
|
scratch_store_dwordx4 off, v[2:5], vcc_hi offset:-1
|
|
// CHECK: [0xff,0x5f,0x7c,0xdc,0x00,0x02,0x6b,0x00]
|
|
|
|
scratch_store_dwordx4 v0, v[2:5], off offset:-1
|
|
// CHECK: [0xff,0x5f,0x7c,0xdc,0x00,0x02,0x7f,0x00]
|
|
|
|
scratch_store_dwordx4 off, v[2:5], s3
|
|
// CHECK: [0x00,0x40,0x7c,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx4 off, v[2:5], s3 offset:0
|
|
// CHECK: [0x00,0x40,0x7c,0xdc,0x00,0x02,0x03,0x00]
|
|
|
|
scratch_store_dwordx4 off, v[2:5], s3 offset:4095
|
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// CHECK: [0xff,0x4f,0x7c,0xdc,0x00,0x02,0x03,0x00]
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scratch_store_dwordx4 off, v[2:5], s3 offset:-4096
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// CHECK: [0x00,0x50,0x7c,0xdc,0x00,0x02,0x03,0x00]
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scratch_store_dwordx4 off, v[2:5], s3 offset:-1 glc
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// CHECK: [0xff,0x5f,0x7d,0xdc,0x00,0x02,0x03,0x00]
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scratch_store_dwordx4 off, v[2:5], s3 offset:-1 slc
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// CHECK: [0xff,0x5f,0x7e,0xdc,0x00,0x02,0x03,0x00]
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scratch_load_ubyte_d16 v5, off, s2 offset:-1
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// CHECK: [0xff,0x5f,0x80,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_ubyte_d16 v255, off, s2 offset:-1
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// CHECK: [0xff,0x5f,0x80,0xdc,0x00,0x00,0x02,0xff]
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scratch_load_ubyte_d16 v5, off, s101 offset:-1
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// CHECK: [0xff,0x5f,0x80,0xdc,0x00,0x00,0x65,0x05]
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scratch_load_ubyte_d16 v5, off, flat_scratch_lo offset:-1
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// CHECK: [0xff,0x5f,0x80,0xdc,0x00,0x00,0x66,0x05]
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scratch_load_ubyte_d16 v5, off, flat_scratch_hi offset:-1
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// CHECK: [0xff,0x5f,0x80,0xdc,0x00,0x00,0x67,0x05]
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scratch_load_ubyte_d16 v5, off, vcc_lo offset:-1
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// CHECK: [0xff,0x5f,0x80,0xdc,0x00,0x00,0x6a,0x05]
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scratch_load_ubyte_d16 v5, off, vcc_hi offset:-1
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// CHECK: [0xff,0x5f,0x80,0xdc,0x00,0x00,0x6b,0x05]
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scratch_load_ubyte_d16 v5, v0, off offset:-1
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// CHECK: [0xff,0x5f,0x80,0xdc,0x00,0x00,0x7f,0x05]
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scratch_load_ubyte_d16 v5, off, s2
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// CHECK: [0x00,0x40,0x80,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_ubyte_d16 v5, off, s2 offset:0
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// CHECK: [0x00,0x40,0x80,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_ubyte_d16 v5, off, s2 offset:4095
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// CHECK: [0xff,0x4f,0x80,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_ubyte_d16 v5, off, s2 offset:-4096
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// CHECK: [0x00,0x50,0x80,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_ubyte_d16 v5, off, s2 offset:-1 glc
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// CHECK: [0xff,0x5f,0x81,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_ubyte_d16 v5, off, s2 offset:-1 slc
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// CHECK: [0xff,0x5f,0x82,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_ubyte_d16_hi v5, off, s2 offset:-1
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// CHECK: [0xff,0x5f,0x84,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_ubyte_d16_hi v255, off, s2 offset:-1
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// CHECK: [0xff,0x5f,0x84,0xdc,0x00,0x00,0x02,0xff]
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scratch_load_ubyte_d16_hi v5, off, s101 offset:-1
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// CHECK: [0xff,0x5f,0x84,0xdc,0x00,0x00,0x65,0x05]
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scratch_load_ubyte_d16_hi v5, off, flat_scratch_lo offset:-1
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// CHECK: [0xff,0x5f,0x84,0xdc,0x00,0x00,0x66,0x05]
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scratch_load_ubyte_d16_hi v5, off, flat_scratch_hi offset:-1
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// CHECK: [0xff,0x5f,0x84,0xdc,0x00,0x00,0x67,0x05]
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scratch_load_ubyte_d16_hi v5, off, vcc_lo offset:-1
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// CHECK: [0xff,0x5f,0x84,0xdc,0x00,0x00,0x6a,0x05]
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scratch_load_ubyte_d16_hi v5, off, vcc_hi offset:-1
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// CHECK: [0xff,0x5f,0x84,0xdc,0x00,0x00,0x6b,0x05]
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scratch_load_ubyte_d16_hi v5, v0, off offset:-1
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// CHECK: [0xff,0x5f,0x84,0xdc,0x00,0x00,0x7f,0x05]
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scratch_load_ubyte_d16_hi v5, off, s2
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// CHECK: [0x00,0x40,0x84,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_ubyte_d16_hi v5, off, s2 offset:0
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// CHECK: [0x00,0x40,0x84,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_ubyte_d16_hi v5, off, s2 offset:4095
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// CHECK: [0xff,0x4f,0x84,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_ubyte_d16_hi v5, off, s2 offset:-4096
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// CHECK: [0x00,0x50,0x84,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_ubyte_d16_hi v5, off, s2 offset:-1 glc
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// CHECK: [0xff,0x5f,0x85,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_ubyte_d16_hi v5, off, s2 offset:-1 slc
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// CHECK: [0xff,0x5f,0x86,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_sbyte_d16 v5, off, s2 offset:-1
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// CHECK: [0xff,0x5f,0x88,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_sbyte_d16 v255, off, s2 offset:-1
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// CHECK: [0xff,0x5f,0x88,0xdc,0x00,0x00,0x02,0xff]
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scratch_load_sbyte_d16 v5, off, s101 offset:-1
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// CHECK: [0xff,0x5f,0x88,0xdc,0x00,0x00,0x65,0x05]
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scratch_load_sbyte_d16 v5, off, flat_scratch_lo offset:-1
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// CHECK: [0xff,0x5f,0x88,0xdc,0x00,0x00,0x66,0x05]
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scratch_load_sbyte_d16 v5, off, flat_scratch_hi offset:-1
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// CHECK: [0xff,0x5f,0x88,0xdc,0x00,0x00,0x67,0x05]
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scratch_load_sbyte_d16 v5, off, vcc_lo offset:-1
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// CHECK: [0xff,0x5f,0x88,0xdc,0x00,0x00,0x6a,0x05]
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scratch_load_sbyte_d16 v5, off, vcc_hi offset:-1
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// CHECK: [0xff,0x5f,0x88,0xdc,0x00,0x00,0x6b,0x05]
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scratch_load_sbyte_d16 v5, v0, off offset:-1
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// CHECK: [0xff,0x5f,0x88,0xdc,0x00,0x00,0x7f,0x05]
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scratch_load_sbyte_d16 v5, off, s2
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// CHECK: [0x00,0x40,0x88,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_sbyte_d16 v5, off, s2 offset:0
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// CHECK: [0x00,0x40,0x88,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_sbyte_d16 v5, off, s2 offset:4095
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// CHECK: [0xff,0x4f,0x88,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_sbyte_d16 v5, off, s2 offset:-4096
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// CHECK: [0x00,0x50,0x88,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_sbyte_d16 v5, off, s2 offset:-1 glc
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// CHECK: [0xff,0x5f,0x89,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_sbyte_d16 v5, off, s2 offset:-1 slc
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// CHECK: [0xff,0x5f,0x8a,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_sbyte_d16_hi v5, off, s2 offset:-1
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// CHECK: [0xff,0x5f,0x8c,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_sbyte_d16_hi v255, off, s2 offset:-1
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// CHECK: [0xff,0x5f,0x8c,0xdc,0x00,0x00,0x02,0xff]
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scratch_load_sbyte_d16_hi v5, off, s101 offset:-1
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// CHECK: [0xff,0x5f,0x8c,0xdc,0x00,0x00,0x65,0x05]
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scratch_load_sbyte_d16_hi v5, off, flat_scratch_lo offset:-1
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// CHECK: [0xff,0x5f,0x8c,0xdc,0x00,0x00,0x66,0x05]
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scratch_load_sbyte_d16_hi v5, off, flat_scratch_hi offset:-1
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// CHECK: [0xff,0x5f,0x8c,0xdc,0x00,0x00,0x67,0x05]
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scratch_load_sbyte_d16_hi v5, off, vcc_lo offset:-1
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// CHECK: [0xff,0x5f,0x8c,0xdc,0x00,0x00,0x6a,0x05]
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scratch_load_sbyte_d16_hi v5, off, vcc_hi offset:-1
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// CHECK: [0xff,0x5f,0x8c,0xdc,0x00,0x00,0x6b,0x05]
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scratch_load_sbyte_d16_hi v5, v0, off offset:-1
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// CHECK: [0xff,0x5f,0x8c,0xdc,0x00,0x00,0x7f,0x05]
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scratch_load_sbyte_d16_hi v5, off, s2
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// CHECK: [0x00,0x40,0x8c,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_sbyte_d16_hi v5, off, s2 offset:0
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// CHECK: [0x00,0x40,0x8c,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_sbyte_d16_hi v5, off, s2 offset:4095
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// CHECK: [0xff,0x4f,0x8c,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_sbyte_d16_hi v5, off, s2 offset:-4096
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// CHECK: [0x00,0x50,0x8c,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_sbyte_d16_hi v5, off, s2 offset:-1 glc
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// CHECK: [0xff,0x5f,0x8d,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_sbyte_d16_hi v5, off, s2 offset:-1 slc
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// CHECK: [0xff,0x5f,0x8e,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_short_d16 v5, off, s2 offset:-1
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// CHECK: [0xff,0x5f,0x90,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_short_d16 v255, off, s2 offset:-1
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// CHECK: [0xff,0x5f,0x90,0xdc,0x00,0x00,0x02,0xff]
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scratch_load_short_d16 v5, off, s101 offset:-1
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// CHECK: [0xff,0x5f,0x90,0xdc,0x00,0x00,0x65,0x05]
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scratch_load_short_d16 v5, off, flat_scratch_lo offset:-1
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// CHECK: [0xff,0x5f,0x90,0xdc,0x00,0x00,0x66,0x05]
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scratch_load_short_d16 v5, off, flat_scratch_hi offset:-1
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// CHECK: [0xff,0x5f,0x90,0xdc,0x00,0x00,0x67,0x05]
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scratch_load_short_d16 v5, off, vcc_lo offset:-1
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// CHECK: [0xff,0x5f,0x90,0xdc,0x00,0x00,0x6a,0x05]
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scratch_load_short_d16 v5, off, vcc_hi offset:-1
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// CHECK: [0xff,0x5f,0x90,0xdc,0x00,0x00,0x6b,0x05]
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scratch_load_short_d16 v5, v0, off offset:-1
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// CHECK: [0xff,0x5f,0x90,0xdc,0x00,0x00,0x7f,0x05]
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scratch_load_short_d16 v5, off, s2
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// CHECK: [0x00,0x40,0x90,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_short_d16 v5, off, s2 offset:0
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// CHECK: [0x00,0x40,0x90,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_short_d16 v5, off, s2 offset:4095
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// CHECK: [0xff,0x4f,0x90,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_short_d16 v5, off, s2 offset:-4096
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// CHECK: [0x00,0x50,0x90,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_short_d16 v5, off, s2 offset:-1 glc
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// CHECK: [0xff,0x5f,0x91,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_short_d16 v5, off, s2 offset:-1 slc
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// CHECK: [0xff,0x5f,0x92,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_short_d16_hi v5, off, s2 offset:-1
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// CHECK: [0xff,0x5f,0x94,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_short_d16_hi v255, off, s2 offset:-1
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// CHECK: [0xff,0x5f,0x94,0xdc,0x00,0x00,0x02,0xff]
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scratch_load_short_d16_hi v5, off, s101 offset:-1
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// CHECK: [0xff,0x5f,0x94,0xdc,0x00,0x00,0x65,0x05]
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scratch_load_short_d16_hi v5, off, flat_scratch_lo offset:-1
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// CHECK: [0xff,0x5f,0x94,0xdc,0x00,0x00,0x66,0x05]
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scratch_load_short_d16_hi v5, off, flat_scratch_hi offset:-1
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// CHECK: [0xff,0x5f,0x94,0xdc,0x00,0x00,0x67,0x05]
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scratch_load_short_d16_hi v5, off, vcc_lo offset:-1
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// CHECK: [0xff,0x5f,0x94,0xdc,0x00,0x00,0x6a,0x05]
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scratch_load_short_d16_hi v5, off, vcc_hi offset:-1
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// CHECK: [0xff,0x5f,0x94,0xdc,0x00,0x00,0x6b,0x05]
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scratch_load_short_d16_hi v5, v0, off offset:-1
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// CHECK: [0xff,0x5f,0x94,0xdc,0x00,0x00,0x7f,0x05]
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scratch_load_short_d16_hi v5, off, s2
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// CHECK: [0x00,0x40,0x94,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_short_d16_hi v5, off, s2 offset:0
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// CHECK: [0x00,0x40,0x94,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_short_d16_hi v5, off, s2 offset:4095
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// CHECK: [0xff,0x4f,0x94,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_short_d16_hi v5, off, s2 offset:-4096
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// CHECK: [0x00,0x50,0x94,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_short_d16_hi v5, off, s2 offset:-1 glc
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// CHECK: [0xff,0x5f,0x95,0xdc,0x00,0x00,0x02,0x05]
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scratch_load_short_d16_hi v5, off, s2 offset:-1 slc
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// CHECK: [0xff,0x5f,0x96,0xdc,0x00,0x00,0x02,0x05]
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image_load v5, v[1:4], s[8:15] dmask:0x1
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// CHECK: [0x00,0x01,0x00,0xf0,0x01,0x05,0x02,0x00]
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image_load v252, v[1:4], s[8:15] dmask:0x1
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// CHECK: [0x00,0x01,0x00,0xf0,0x01,0xfc,0x02,0x00]
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image_load v5, v[252:255], s[8:15] dmask:0x1
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// CHECK: [0x00,0x01,0x00,0xf0,0xfc,0x05,0x02,0x00]
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image_load v5, v[1:4], s[12:19] dmask:0x1
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// CHECK: [0x00,0x01,0x00,0xf0,0x01,0x05,0x03,0x00]
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image_load v5, v[1:4], s[92:99] dmask:0x1
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// CHECK: [0x00,0x01,0x00,0xf0,0x01,0x05,0x17,0x00]
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image_load v5, v[1:4], s[8:15] dmask:0x2
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// CHECK: [0x00,0x02,0x00,0xf0,0x01,0x05,0x02,0x00]
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image_load v[5:6], v[1:4], s[8:15] dmask:0x3
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// CHECK: [0x00,0x03,0x00,0xf0,0x01,0x05,0x02,0x00]
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image_load v5, v[1:4], s[8:15] dmask:0x4
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// CHECK: [0x00,0x04,0x00,0xf0,0x01,0x05,0x02,0x00]
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image_load v[5:6], v[1:4], s[8:15] dmask:0x5
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// CHECK: [0x00,0x05,0x00,0xf0,0x01,0x05,0x02,0x00]
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image_load v[5:6], v[1:4], s[8:15] dmask:0x6
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// CHECK: [0x00,0x06,0x00,0xf0,0x01,0x05,0x02,0x00]
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image_load v[5:7], v[1:4], s[8:15] dmask:0x7
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// CHECK: [0x00,0x07,0x00,0xf0,0x01,0x05,0x02,0x00]
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image_load v5, v[1:4], s[8:15] dmask:0x8
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// CHECK: [0x00,0x08,0x00,0xf0,0x01,0x05,0x02,0x00]
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image_load v[5:6], v[1:4], s[8:15] dmask:0x9
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// CHECK: [0x00,0x09,0x00,0xf0,0x01,0x05,0x02,0x00]
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image_load v[5:6], v[1:4], s[8:15] dmask:0xa
|
|
// CHECK: [0x00,0x0a,0x00,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load v[5:7], v[1:4], s[8:15] dmask:0xb
|
|
// CHECK: [0x00,0x0b,0x00,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load v[5:6], v[1:4], s[8:15] dmask:0xc
|
|
// CHECK: [0x00,0x0c,0x00,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load v[5:7], v[1:4], s[8:15] dmask:0xd
|
|
// CHECK: [0x00,0x0d,0x00,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load v[5:7], v[1:4], s[8:15] dmask:0xe
|
|
// CHECK: [0x00,0x0e,0x00,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load v5, v[1:4], s[8:15] dmask:0x0
|
|
// CHECK: [0x00,0x00,0x00,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load v5, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x00,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load v5, v[1:4], s[8:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0x00,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load v5, v[1:4], s[8:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0x00,0xf2,0x01,0x05,0x02,0x00]
|
|
|
|
image_load v[5:6], v[1:4], s[8:15] dmask:0x1 tfe
|
|
// CHECK: [0x00,0x01,0x01,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load v5, v[1:4], s[8:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0x02,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load v5, v[1:4], s[8:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0x00,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load v5, v[1:4], s[8:15] dmask:0x1 d16
|
|
// CHECK: [0x00,0x01,0x00,0xf0,0x01,0x05,0x02,0x80]
|
|
|
|
image_load v[0:4], v5, s[0:7] dmask:0xf unorm tfe
|
|
// CHECK: [0x00,0x1f,0x01,0xf0,0x05,0x00,0x00,0x00]
|
|
|
|
image_load_mip v5, v[1:4], s[8:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v252, v[1:4], s[8:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x04,0xf0,0x01,0xfc,0x02,0x00]
|
|
|
|
image_load_mip v5, v[252:255], s[8:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x04,0xf0,0xfc,0x05,0x02,0x00]
|
|
|
|
image_load_mip v5, v[1:4], s[12:19] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x04,0xf0,0x01,0x05,0x03,0x00]
|
|
|
|
image_load_mip v5, v[1:4], s[92:99] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x04,0xf0,0x01,0x05,0x17,0x00]
|
|
|
|
image_load_mip v5, v[1:4], s[8:15] dmask:0x2
|
|
// CHECK: [0x00,0x02,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v[5:6], v[1:4], s[8:15] dmask:0x3
|
|
// CHECK: [0x00,0x03,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v5, v[1:4], s[8:15] dmask:0x4
|
|
// CHECK: [0x00,0x04,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v[5:6], v[1:4], s[8:15] dmask:0x5
|
|
// CHECK: [0x00,0x05,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v[5:6], v[1:4], s[8:15] dmask:0x6
|
|
// CHECK: [0x00,0x06,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v[5:7], v[1:4], s[8:15] dmask:0x7
|
|
// CHECK: [0x00,0x07,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v5, v[1:4], s[8:15] dmask:0x8
|
|
// CHECK: [0x00,0x08,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v[5:6], v[1:4], s[8:15] dmask:0x9
|
|
// CHECK: [0x00,0x09,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v[5:6], v[1:4], s[8:15] dmask:0xa
|
|
// CHECK: [0x00,0x0a,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v[5:7], v[1:4], s[8:15] dmask:0xb
|
|
// CHECK: [0x00,0x0b,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v[5:6], v[1:4], s[8:15] dmask:0xc
|
|
// CHECK: [0x00,0x0c,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v[5:7], v[1:4], s[8:15] dmask:0xd
|
|
// CHECK: [0x00,0x0d,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v[5:7], v[1:4], s[8:15] dmask:0xe
|
|
// CHECK: [0x00,0x0e,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v5, v[1:4], s[8:15] dmask:0x0
|
|
// CHECK: [0x00,0x00,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v5, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v5, v[1:4], s[8:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v5, v[1:4], s[8:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0x04,0xf2,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v[5:6], v[1:4], s[8:15] dmask:0x1 tfe
|
|
// CHECK: [0x00,0x01,0x05,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v5, v[1:4], s[8:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0x06,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v5, v[1:4], s[8:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0x04,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_load_mip v5, v[1:4], s[8:15] dmask:0x1 d16
|
|
// CHECK: [0x00,0x01,0x04,0xf0,0x01,0x05,0x02,0x80]
|
|
|
|
image_store v1, v[2:5], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v252, v[2:5], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x20,0xf0,0x02,0xfc,0x03,0x00]
|
|
|
|
image_store v1, v[252:255], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x20,0xf0,0xfc,0x01,0x03,0x00]
|
|
|
|
image_store v1, v[2:5], s[16:23] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x20,0xf0,0x02,0x01,0x04,0x00]
|
|
|
|
image_store v1, v[2:5], s[92:99] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x20,0xf0,0x02,0x01,0x17,0x00]
|
|
|
|
image_store v1, v[2:5], s[12:19] dmask:0x2 unorm
|
|
// CHECK: [0x00,0x12,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v[1:2], v[2:5], s[12:19] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v1, v[2:5], s[12:19] dmask:0x4 unorm
|
|
// CHECK: [0x00,0x14,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v[1:2], v[2:5], s[12:19] dmask:0x5 unorm
|
|
// CHECK: [0x00,0x15,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v[1:2], v[2:5], s[12:19] dmask:0x6 unorm
|
|
// CHECK: [0x00,0x16,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v[1:3], v[2:5], s[12:19] dmask:0x7 unorm
|
|
// CHECK: [0x00,0x17,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v1, v[2:5], s[12:19] dmask:0x8 unorm
|
|
// CHECK: [0x00,0x18,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v[1:2], v[2:5], s[12:19] dmask:0x9 unorm
|
|
// CHECK: [0x00,0x19,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v[1:2], v[2:5], s[12:19] dmask:0xa unorm
|
|
// CHECK: [0x00,0x1a,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v[1:3], v[2:5], s[12:19] dmask:0xb unorm
|
|
// CHECK: [0x00,0x1b,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v[1:2], v[2:5], s[12:19] dmask:0xc unorm
|
|
// CHECK: [0x00,0x1c,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v[1:3], v[2:5], s[12:19] dmask:0xd unorm
|
|
// CHECK: [0x00,0x1d,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v[1:3], v[2:5], s[12:19] dmask:0xe unorm
|
|
// CHECK: [0x00,0x1e,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v[1:4], v[2:5], s[12:19] dmask:0xf unorm
|
|
// CHECK: [0x00,0x1f,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v1, v[2:5], s[12:19] dmask:0x0 unorm
|
|
// CHECK: [0x00,0x10,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v1, v[2:5], s[12:19] dmask:0x1 unorm glc
|
|
// CHECK: [0x00,0x31,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v1, v[2:5], s[12:19] dmask:0x1 unorm slc
|
|
// CHECK: [0x00,0x11,0x20,0xf2,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v1, v[2:5], s[12:19] dmask:0x1 unorm lwe
|
|
// CHECK: [0x00,0x11,0x22,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v1, v[2:5], s[12:19] dmask:0x1 unorm da
|
|
// CHECK: [0x00,0x51,0x20,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store v1, v[2:5], s[12:19] dmask:0x1 unorm d16
|
|
// CHECK: [0x00,0x11,0x20,0xf0,0x02,0x01,0x03,0x80]
|
|
|
|
image_store_mip v1, v[2:5], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v252, v[2:5], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x24,0xf0,0x02,0xfc,0x03,0x00]
|
|
|
|
image_store_mip v1, v[252:255], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x24,0xf0,0xfc,0x01,0x03,0x00]
|
|
|
|
image_store_mip v1, v[2:5], s[16:23] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x24,0xf0,0x02,0x01,0x04,0x00]
|
|
|
|
image_store_mip v1, v[2:5], s[92:99] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x24,0xf0,0x02,0x01,0x17,0x00]
|
|
|
|
image_store_mip v1, v[2:5], s[12:19] dmask:0x2 unorm
|
|
// CHECK: [0x00,0x12,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v[1:2], v[2:5], s[12:19] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v1, v[2:5], s[12:19] dmask:0x4 unorm
|
|
// CHECK: [0x00,0x14,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v[1:2], v[2:5], s[12:19] dmask:0x5 unorm
|
|
// CHECK: [0x00,0x15,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v[1:2], v[2:5], s[12:19] dmask:0x6 unorm
|
|
// CHECK: [0x00,0x16,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v[1:3], v[2:5], s[12:19] dmask:0x7 unorm
|
|
// CHECK: [0x00,0x17,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v1, v[2:5], s[12:19] dmask:0x8 unorm
|
|
// CHECK: [0x00,0x18,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v[1:2], v[2:5], s[12:19] dmask:0x9 unorm
|
|
// CHECK: [0x00,0x19,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v[1:2], v[2:5], s[12:19] dmask:0xa unorm
|
|
// CHECK: [0x00,0x1a,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v[1:3], v[2:5], s[12:19] dmask:0xb unorm
|
|
// CHECK: [0x00,0x1b,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v[1:2], v[2:5], s[12:19] dmask:0xc unorm
|
|
// CHECK: [0x00,0x1c,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v[1:3], v[2:5], s[12:19] dmask:0xd unorm
|
|
// CHECK: [0x00,0x1d,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v[1:3], v[2:5], s[12:19] dmask:0xe unorm
|
|
// CHECK: [0x00,0x1e,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v[1:4], v[2:5], s[12:19] dmask:0xf unorm
|
|
// CHECK: [0x00,0x1f,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v1, v[2:5], s[12:19] dmask:0x0 unorm
|
|
// CHECK: [0x00,0x10,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v1, v[2:5], s[12:19] dmask:0x1 unorm glc
|
|
// CHECK: [0x00,0x31,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v1, v[2:5], s[12:19] dmask:0x1 unorm slc
|
|
// CHECK: [0x00,0x11,0x24,0xf2,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v1, v[2:5], s[12:19] dmask:0x1 unorm lwe
|
|
// CHECK: [0x00,0x11,0x26,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v1, v[2:5], s[12:19] dmask:0x1 unorm da
|
|
// CHECK: [0x00,0x51,0x24,0xf0,0x02,0x01,0x03,0x00]
|
|
|
|
image_store_mip v1, v[2:5], s[12:19] dmask:0x1 unorm d16
|
|
// CHECK: [0x00,0x11,0x24,0xf0,0x02,0x01,0x03,0x80]
|
|
|
|
image_get_resinfo v5, v1, s[8:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v252, v1, s[8:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x38,0xf0,0x01,0xfc,0x02,0x00]
|
|
|
|
image_get_resinfo v5, v255, s[8:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x38,0xf0,0xff,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v5, v1, s[12:19] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x38,0xf0,0x01,0x05,0x03,0x00]
|
|
|
|
image_get_resinfo v5, v1, s[92:99] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x38,0xf0,0x01,0x05,0x17,0x00]
|
|
|
|
image_get_resinfo v5, v1, s[8:15] dmask:0x2
|
|
// CHECK: [0x00,0x02,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v[5:6], v1, s[8:15] dmask:0x3
|
|
// CHECK: [0x00,0x03,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v5, v1, s[8:15] dmask:0x4
|
|
// CHECK: [0x00,0x04,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v[5:6], v1, s[8:15] dmask:0x5
|
|
// CHECK: [0x00,0x05,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v[5:6], v1, s[8:15] dmask:0x6
|
|
// CHECK: [0x00,0x06,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v[5:7], v1, s[8:15] dmask:0x7
|
|
// CHECK: [0x00,0x07,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v5, v1, s[8:15] dmask:0x8
|
|
// CHECK: [0x00,0x08,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v[5:6], v1, s[8:15] dmask:0x9
|
|
// CHECK: [0x00,0x09,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v[5:6], v1, s[8:15] dmask:0xa
|
|
// CHECK: [0x00,0x0a,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v[5:7], v1, s[8:15] dmask:0xb
|
|
// CHECK: [0x00,0x0b,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v[5:6], v1, s[8:15] dmask:0xc
|
|
// CHECK: [0x00,0x0c,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v[5:7], v1, s[8:15] dmask:0xd
|
|
// CHECK: [0x00,0x0d,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v[5:7], v1, s[8:15] dmask:0xe
|
|
// CHECK: [0x00,0x0e,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v5, v1, s[8:15] dmask:0x0
|
|
// CHECK: [0x00,0x00,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v5, v1, s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v5, v1, s[8:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v5, v1, s[8:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0x38,0xf2,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v[5:6], v1, s[8:15] dmask:0x1 tfe
|
|
// CHECK: [0x00,0x01,0x39,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v5, v1, s[8:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0x3a,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_get_resinfo v5, v1, s[8:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0x38,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_swap v5, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x40,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_swap v252, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x40,0xf0,0x01,0xfc,0x02,0x00]
|
|
|
|
image_atomic_swap v5, v[252:255], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x40,0xf0,0xfc,0x05,0x02,0x00]
|
|
|
|
image_atomic_swap v5, v[1:4], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x40,0xf0,0x01,0x05,0x03,0x00]
|
|
|
|
image_atomic_swap v5, v[1:4], s[92:99] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x40,0xf0,0x01,0x05,0x17,0x00]
|
|
|
|
image_atomic_swap v[5:6], v[1:4], s[8:15] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x40,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_swap v5, v[1:4], s[8:15] dmask:0x1 unorm glc
|
|
// CHECK: [0x00,0x31,0x40,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_swap v5, v[1:4], s[8:15] dmask:0x1 unorm slc
|
|
// CHECK: [0x00,0x11,0x40,0xf2,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_swap v5, v[1:4], s[8:15] dmask:0x1 unorm lwe
|
|
// CHECK: [0x00,0x11,0x42,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_swap v5, v[1:4], s[8:15] dmask:0x1 unorm da
|
|
// CHECK: [0x00,0x51,0x40,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_cmpswap v[5:6], v[1:4], s[8:15] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x44,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_cmpswap v[252:253], v[1:4], s[8:15] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x44,0xf0,0x01,0xfc,0x02,0x00]
|
|
|
|
image_atomic_cmpswap v[5:6], v[252:255], s[8:15] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x44,0xf0,0xfc,0x05,0x02,0x00]
|
|
|
|
image_atomic_cmpswap v[5:6], v[1:4], s[12:19] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x44,0xf0,0x01,0x05,0x03,0x00]
|
|
|
|
image_atomic_cmpswap v[5:6], v[1:4], s[92:99] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x44,0xf0,0x01,0x05,0x17,0x00]
|
|
|
|
image_atomic_cmpswap v[5:8], v[1:4], s[8:15] dmask:0xf unorm
|
|
// CHECK: [0x00,0x1f,0x44,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_cmpswap v[5:6], v[1:4], s[8:15] dmask:0x3 unorm glc
|
|
// CHECK: [0x00,0x33,0x44,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_cmpswap v[5:6], v[1:4], s[8:15] dmask:0x3 unorm slc
|
|
// CHECK: [0x00,0x13,0x44,0xf2,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_cmpswap v[5:6], v[1:4], s[8:15] dmask:0x3 unorm lwe
|
|
// CHECK: [0x00,0x13,0x46,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_cmpswap v[5:6], v[1:4], s[8:15] dmask:0x3 unorm da
|
|
// CHECK: [0x00,0x53,0x44,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_add v5, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x48,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_add v252, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x48,0xf0,0x01,0xfc,0x02,0x00]
|
|
|
|
image_atomic_add v5, v[252:255], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x48,0xf0,0xfc,0x05,0x02,0x00]
|
|
|
|
image_atomic_add v5, v[1:4], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x48,0xf0,0x01,0x05,0x03,0x00]
|
|
|
|
image_atomic_add v5, v[1:4], s[92:99] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x48,0xf0,0x01,0x05,0x17,0x00]
|
|
|
|
image_atomic_add v[5:6], v[1:4], s[8:15] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x48,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_add v5, v[1:4], s[8:15] dmask:0x1 unorm glc
|
|
// CHECK: [0x00,0x31,0x48,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_add v5, v[1:4], s[8:15] dmask:0x1 unorm slc
|
|
// CHECK: [0x00,0x11,0x48,0xf2,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_add v5, v[1:4], s[8:15] dmask:0x1 unorm lwe
|
|
// CHECK: [0x00,0x11,0x4a,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_add v5, v[1:4], s[8:15] dmask:0x1 unorm da
|
|
// CHECK: [0x00,0x51,0x48,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_sub v5, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x4c,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_sub v252, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x4c,0xf0,0x01,0xfc,0x02,0x00]
|
|
|
|
image_atomic_sub v5, v[252:255], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x4c,0xf0,0xfc,0x05,0x02,0x00]
|
|
|
|
image_atomic_sub v5, v[1:4], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x4c,0xf0,0x01,0x05,0x03,0x00]
|
|
|
|
image_atomic_sub v5, v[1:4], s[92:99] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x4c,0xf0,0x01,0x05,0x17,0x00]
|
|
|
|
image_atomic_sub v[5:6], v[1:4], s[8:15] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x4c,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_sub v5, v[1:4], s[8:15] dmask:0x1 unorm glc
|
|
// CHECK: [0x00,0x31,0x4c,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_sub v5, v[1:4], s[8:15] dmask:0x1 unorm slc
|
|
// CHECK: [0x00,0x11,0x4c,0xf2,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_sub v5, v[1:4], s[8:15] dmask:0x1 unorm lwe
|
|
// CHECK: [0x00,0x11,0x4e,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_sub v5, v[1:4], s[8:15] dmask:0x1 unorm da
|
|
// CHECK: [0x00,0x51,0x4c,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_smin v5, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x50,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_smin v252, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x50,0xf0,0x01,0xfc,0x02,0x00]
|
|
|
|
image_atomic_smin v5, v[252:255], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x50,0xf0,0xfc,0x05,0x02,0x00]
|
|
|
|
image_atomic_smin v5, v[1:4], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x50,0xf0,0x01,0x05,0x03,0x00]
|
|
|
|
image_atomic_smin v5, v[1:4], s[92:99] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x50,0xf0,0x01,0x05,0x17,0x00]
|
|
|
|
image_atomic_smin v[5:6], v[1:4], s[8:15] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x50,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_smin v5, v[1:4], s[8:15] dmask:0x1 unorm glc
|
|
// CHECK: [0x00,0x31,0x50,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_smin v5, v[1:4], s[8:15] dmask:0x1 unorm slc
|
|
// CHECK: [0x00,0x11,0x50,0xf2,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_smin v5, v[1:4], s[8:15] dmask:0x1 unorm lwe
|
|
// CHECK: [0x00,0x11,0x52,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_smin v5, v[1:4], s[8:15] dmask:0x1 unorm da
|
|
// CHECK: [0x00,0x51,0x50,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_umin v5, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x54,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_umin v252, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x54,0xf0,0x01,0xfc,0x02,0x00]
|
|
|
|
image_atomic_umin v5, v[252:255], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x54,0xf0,0xfc,0x05,0x02,0x00]
|
|
|
|
image_atomic_umin v5, v[1:4], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x54,0xf0,0x01,0x05,0x03,0x00]
|
|
|
|
image_atomic_umin v5, v[1:4], s[92:99] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x54,0xf0,0x01,0x05,0x17,0x00]
|
|
|
|
image_atomic_umin v[5:6], v[1:4], s[8:15] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x54,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_umin v5, v[1:4], s[8:15] dmask:0x1 unorm glc
|
|
// CHECK: [0x00,0x31,0x54,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_umin v5, v[1:4], s[8:15] dmask:0x1 unorm slc
|
|
// CHECK: [0x00,0x11,0x54,0xf2,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_umin v5, v[1:4], s[8:15] dmask:0x1 unorm lwe
|
|
// CHECK: [0x00,0x11,0x56,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_umin v5, v[1:4], s[8:15] dmask:0x1 unorm da
|
|
// CHECK: [0x00,0x51,0x54,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_smax v5, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x58,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_smax v252, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x58,0xf0,0x01,0xfc,0x02,0x00]
|
|
|
|
image_atomic_smax v5, v[252:255], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x58,0xf0,0xfc,0x05,0x02,0x00]
|
|
|
|
image_atomic_smax v5, v[1:4], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x58,0xf0,0x01,0x05,0x03,0x00]
|
|
|
|
image_atomic_smax v5, v[1:4], s[92:99] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x58,0xf0,0x01,0x05,0x17,0x00]
|
|
|
|
image_atomic_smax v[5:6], v[1:4], s[8:15] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x58,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_smax v5, v[1:4], s[8:15] dmask:0x1 unorm glc
|
|
// CHECK: [0x00,0x31,0x58,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_smax v5, v[1:4], s[8:15] dmask:0x1 unorm slc
|
|
// CHECK: [0x00,0x11,0x58,0xf2,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_smax v5, v[1:4], s[8:15] dmask:0x1 unorm lwe
|
|
// CHECK: [0x00,0x11,0x5a,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_smax v5, v[1:4], s[8:15] dmask:0x1 unorm da
|
|
// CHECK: [0x00,0x51,0x58,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_umax v5, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x5c,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_umax v252, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x5c,0xf0,0x01,0xfc,0x02,0x00]
|
|
|
|
image_atomic_umax v5, v[252:255], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x5c,0xf0,0xfc,0x05,0x02,0x00]
|
|
|
|
image_atomic_umax v5, v[1:4], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x5c,0xf0,0x01,0x05,0x03,0x00]
|
|
|
|
image_atomic_umax v5, v[1:4], s[92:99] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x5c,0xf0,0x01,0x05,0x17,0x00]
|
|
|
|
image_atomic_umax v[5:6], v[1:4], s[8:15] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x5c,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_umax v5, v[1:4], s[8:15] dmask:0x1 unorm glc
|
|
// CHECK: [0x00,0x31,0x5c,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_umax v5, v[1:4], s[8:15] dmask:0x1 unorm slc
|
|
// CHECK: [0x00,0x11,0x5c,0xf2,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_umax v5, v[1:4], s[8:15] dmask:0x1 unorm lwe
|
|
// CHECK: [0x00,0x11,0x5e,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_umax v5, v[1:4], s[8:15] dmask:0x1 unorm da
|
|
// CHECK: [0x00,0x51,0x5c,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_and v5, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x60,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_and v252, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x60,0xf0,0x01,0xfc,0x02,0x00]
|
|
|
|
image_atomic_and v5, v[252:255], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x60,0xf0,0xfc,0x05,0x02,0x00]
|
|
|
|
image_atomic_and v5, v[1:4], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x60,0xf0,0x01,0x05,0x03,0x00]
|
|
|
|
image_atomic_and v5, v[1:4], s[92:99] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x60,0xf0,0x01,0x05,0x17,0x00]
|
|
|
|
image_atomic_and v[5:6], v[1:4], s[8:15] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x60,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_and v5, v[1:4], s[8:15] dmask:0x1 unorm glc
|
|
// CHECK: [0x00,0x31,0x60,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_and v5, v[1:4], s[8:15] dmask:0x1 unorm slc
|
|
// CHECK: [0x00,0x11,0x60,0xf2,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_and v5, v[1:4], s[8:15] dmask:0x1 unorm lwe
|
|
// CHECK: [0x00,0x11,0x62,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_and v5, v[1:4], s[8:15] dmask:0x1 unorm da
|
|
// CHECK: [0x00,0x51,0x60,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_or v5, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x64,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_or v252, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x64,0xf0,0x01,0xfc,0x02,0x00]
|
|
|
|
image_atomic_or v5, v[252:255], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x64,0xf0,0xfc,0x05,0x02,0x00]
|
|
|
|
image_atomic_or v5, v[1:4], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x64,0xf0,0x01,0x05,0x03,0x00]
|
|
|
|
image_atomic_or v5, v[1:4], s[92:99] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x64,0xf0,0x01,0x05,0x17,0x00]
|
|
|
|
image_atomic_or v[5:6], v[1:4], s[8:15] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x64,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_or v5, v[1:4], s[8:15] dmask:0x1 unorm glc
|
|
// CHECK: [0x00,0x31,0x64,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_or v5, v[1:4], s[8:15] dmask:0x1 unorm slc
|
|
// CHECK: [0x00,0x11,0x64,0xf2,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_or v5, v[1:4], s[8:15] dmask:0x1 unorm lwe
|
|
// CHECK: [0x00,0x11,0x66,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_or v5, v[1:4], s[8:15] dmask:0x1 unorm da
|
|
// CHECK: [0x00,0x51,0x64,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_xor v5, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x68,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_xor v252, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x68,0xf0,0x01,0xfc,0x02,0x00]
|
|
|
|
image_atomic_xor v5, v[252:255], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x68,0xf0,0xfc,0x05,0x02,0x00]
|
|
|
|
image_atomic_xor v5, v[1:4], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x68,0xf0,0x01,0x05,0x03,0x00]
|
|
|
|
image_atomic_xor v5, v[1:4], s[92:99] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x68,0xf0,0x01,0x05,0x17,0x00]
|
|
|
|
image_atomic_xor v[5:6], v[1:4], s[8:15] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x68,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_xor v5, v[1:4], s[8:15] dmask:0x1 unorm glc
|
|
// CHECK: [0x00,0x31,0x68,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_xor v5, v[1:4], s[8:15] dmask:0x1 unorm slc
|
|
// CHECK: [0x00,0x11,0x68,0xf2,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_xor v5, v[1:4], s[8:15] dmask:0x1 unorm lwe
|
|
// CHECK: [0x00,0x11,0x6a,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_xor v5, v[1:4], s[8:15] dmask:0x1 unorm da
|
|
// CHECK: [0x00,0x51,0x68,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_inc v5, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x6c,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_inc v252, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x6c,0xf0,0x01,0xfc,0x02,0x00]
|
|
|
|
image_atomic_inc v5, v[252:255], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x6c,0xf0,0xfc,0x05,0x02,0x00]
|
|
|
|
image_atomic_inc v5, v[1:4], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x6c,0xf0,0x01,0x05,0x03,0x00]
|
|
|
|
image_atomic_inc v5, v[1:4], s[92:99] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x6c,0xf0,0x01,0x05,0x17,0x00]
|
|
|
|
image_atomic_inc v[5:6], v[1:4], s[8:15] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x6c,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_inc v5, v[1:4], s[8:15] dmask:0x1 unorm glc
|
|
// CHECK: [0x00,0x31,0x6c,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_inc v5, v[1:4], s[8:15] dmask:0x1 unorm slc
|
|
// CHECK: [0x00,0x11,0x6c,0xf2,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_inc v5, v[1:4], s[8:15] dmask:0x1 unorm lwe
|
|
// CHECK: [0x00,0x11,0x6e,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_inc v5, v[1:4], s[8:15] dmask:0x1 unorm da
|
|
// CHECK: [0x00,0x51,0x6c,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_dec v5, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x70,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_dec v252, v[1:4], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x70,0xf0,0x01,0xfc,0x02,0x00]
|
|
|
|
image_atomic_dec v5, v[252:255], s[8:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x70,0xf0,0xfc,0x05,0x02,0x00]
|
|
|
|
image_atomic_dec v5, v[1:4], s[12:19] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x70,0xf0,0x01,0x05,0x03,0x00]
|
|
|
|
image_atomic_dec v5, v[1:4], s[92:99] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x70,0xf0,0x01,0x05,0x17,0x00]
|
|
|
|
image_atomic_dec v[5:6], v[1:4], s[8:15] dmask:0x3 unorm
|
|
// CHECK: [0x00,0x13,0x70,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_dec v5, v[1:4], s[8:15] dmask:0x1 unorm glc
|
|
// CHECK: [0x00,0x31,0x70,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_dec v5, v[1:4], s[8:15] dmask:0x1 unorm slc
|
|
// CHECK: [0x00,0x11,0x70,0xf2,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_dec v5, v[1:4], s[8:15] dmask:0x1 unorm lwe
|
|
// CHECK: [0x00,0x11,0x72,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_atomic_dec v5, v[1:4], s[8:15] dmask:0x1 unorm da
|
|
// CHECK: [0x00,0x51,0x70,0xf0,0x01,0x05,0x02,0x00]
|
|
|
|
image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v252, v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x84,0xf0,0x01,0xfc,0x62,0x00]
|
|
|
|
image_sample_cl v5, v[252:255], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x84,0xf0,0xfc,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v5, v[1:4], s[12:19], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x84,0xf0,0x01,0x05,0x63,0x00]
|
|
|
|
image_sample_cl v5, v[1:4], s[92:99], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x84,0xf0,0x01,0x05,0x77,0x00]
|
|
|
|
image_sample_cl v5, v[1:4], s[8:15], s[16:19] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x84,0xf0,0x01,0x05,0x82,0x00]
|
|
|
|
image_sample_cl v5, v[1:4], s[8:15], s[96:99] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x84,0xf0,0x01,0x05,0x02,0x03]
|
|
|
|
image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x2
|
|
// CHECK: [0x00,0x02,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
|
|
// CHECK: [0x00,0x03,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x4
|
|
// CHECK: [0x00,0x04,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x5
|
|
// CHECK: [0x00,0x05,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x6
|
|
// CHECK: [0x00,0x06,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v[5:7], v[1:4], s[8:15], s[12:15] dmask:0x7
|
|
// CHECK: [0x00,0x07,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x8
|
|
// CHECK: [0x00,0x08,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x9
|
|
// CHECK: [0x00,0x09,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v[5:6], v[1:4], s[8:15], s[12:15] dmask:0xa
|
|
// CHECK: [0x00,0x0a,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xb
|
|
// CHECK: [0x00,0x0b,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v[5:6], v[1:4], s[8:15], s[12:15] dmask:0xc
|
|
// CHECK: [0x00,0x0c,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xd
|
|
// CHECK: [0x00,0x0d,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
|
|
// CHECK: [0x00,0x0e,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x0
|
|
// CHECK: [0x00,0x00,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0x84,0xf2,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
|
|
// CHECK: [0x00,0x01,0x85,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0x86,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0x84,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_cl v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
|
|
// CHECK: [0x00,0x01,0x84,0xf0,0x01,0x05,0x62,0x80]
|
|
|
|
image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v252, v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x90,0xf0,0x01,0xfc,0x62,0x00]
|
|
|
|
image_sample_l v5, v[252:255], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x90,0xf0,0xfc,0x05,0x62,0x00]
|
|
|
|
image_sample_l v5, v[1:4], s[12:19], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x90,0xf0,0x01,0x05,0x63,0x00]
|
|
|
|
image_sample_l v5, v[1:4], s[92:99], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x90,0xf0,0x01,0x05,0x77,0x00]
|
|
|
|
image_sample_l v5, v[1:4], s[8:15], s[16:19] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x90,0xf0,0x01,0x05,0x82,0x00]
|
|
|
|
image_sample_l v5, v[1:4], s[8:15], s[96:99] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x90,0xf0,0x01,0x05,0x02,0x03]
|
|
|
|
image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x2
|
|
// CHECK: [0x00,0x02,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
|
|
// CHECK: [0x00,0x03,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x4
|
|
// CHECK: [0x00,0x04,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x5
|
|
// CHECK: [0x00,0x05,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x6
|
|
// CHECK: [0x00,0x06,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v[5:7], v[1:4], s[8:15], s[12:15] dmask:0x7
|
|
// CHECK: [0x00,0x07,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x8
|
|
// CHECK: [0x00,0x08,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x9
|
|
// CHECK: [0x00,0x09,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v[5:6], v[1:4], s[8:15], s[12:15] dmask:0xa
|
|
// CHECK: [0x00,0x0a,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xb
|
|
// CHECK: [0x00,0x0b,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v[5:6], v[1:4], s[8:15], s[12:15] dmask:0xc
|
|
// CHECK: [0x00,0x0c,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xd
|
|
// CHECK: [0x00,0x0d,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
|
|
// CHECK: [0x00,0x0e,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x0
|
|
// CHECK: [0x00,0x00,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0x90,0xf2,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
|
|
// CHECK: [0x00,0x01,0x91,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0x92,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0x90,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_l v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
|
|
// CHECK: [0x00,0x01,0x90,0xf0,0x01,0x05,0x62,0x80]
|
|
|
|
image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v252, v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x94,0xf0,0x01,0xfc,0x62,0x00]
|
|
|
|
image_sample_b v5, v[252:255], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x94,0xf0,0xfc,0x05,0x62,0x00]
|
|
|
|
image_sample_b v5, v[1:4], s[12:19], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x94,0xf0,0x01,0x05,0x63,0x00]
|
|
|
|
image_sample_b v5, v[1:4], s[92:99], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x94,0xf0,0x01,0x05,0x77,0x00]
|
|
|
|
image_sample_b v5, v[1:4], s[8:15], s[16:19] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x94,0xf0,0x01,0x05,0x82,0x00]
|
|
|
|
image_sample_b v5, v[1:4], s[8:15], s[96:99] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x94,0xf0,0x01,0x05,0x02,0x03]
|
|
|
|
image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x2
|
|
// CHECK: [0x00,0x02,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
|
|
// CHECK: [0x00,0x03,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x4
|
|
// CHECK: [0x00,0x04,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x5
|
|
// CHECK: [0x00,0x05,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x6
|
|
// CHECK: [0x00,0x06,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v[5:7], v[1:4], s[8:15], s[12:15] dmask:0x7
|
|
// CHECK: [0x00,0x07,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x8
|
|
// CHECK: [0x00,0x08,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x9
|
|
// CHECK: [0x00,0x09,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v[5:6], v[1:4], s[8:15], s[12:15] dmask:0xa
|
|
// CHECK: [0x00,0x0a,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xb
|
|
// CHECK: [0x00,0x0b,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v[5:6], v[1:4], s[8:15], s[12:15] dmask:0xc
|
|
// CHECK: [0x00,0x0c,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xd
|
|
// CHECK: [0x00,0x0d,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
|
|
// CHECK: [0x00,0x0e,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x0
|
|
// CHECK: [0x00,0x00,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0x94,0xf2,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
|
|
// CHECK: [0x00,0x01,0x95,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0x96,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0x94,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_b v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
|
|
// CHECK: [0x00,0x01,0x94,0xf0,0x01,0x05,0x62,0x80]
|
|
|
|
image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v252, v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xa0,0xf0,0x01,0xfc,0x62,0x00]
|
|
|
|
image_sample_c v5, v[252:255], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xa0,0xf0,0xfc,0x05,0x62,0x00]
|
|
|
|
image_sample_c v5, v[1:4], s[12:19], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xa0,0xf0,0x01,0x05,0x63,0x00]
|
|
|
|
image_sample_c v5, v[1:4], s[92:99], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xa0,0xf0,0x01,0x05,0x77,0x00]
|
|
|
|
image_sample_c v5, v[1:4], s[8:15], s[16:19] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xa0,0xf0,0x01,0x05,0x82,0x00]
|
|
|
|
image_sample_c v5, v[1:4], s[8:15], s[96:99] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xa0,0xf0,0x01,0x05,0x02,0x03]
|
|
|
|
image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x2
|
|
// CHECK: [0x00,0x02,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
|
|
// CHECK: [0x00,0x03,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x4
|
|
// CHECK: [0x00,0x04,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x5
|
|
// CHECK: [0x00,0x05,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x6
|
|
// CHECK: [0x00,0x06,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v[5:7], v[1:4], s[8:15], s[12:15] dmask:0x7
|
|
// CHECK: [0x00,0x07,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x8
|
|
// CHECK: [0x00,0x08,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x9
|
|
// CHECK: [0x00,0x09,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v[5:6], v[1:4], s[8:15], s[12:15] dmask:0xa
|
|
// CHECK: [0x00,0x0a,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xb
|
|
// CHECK: [0x00,0x0b,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v[5:6], v[1:4], s[8:15], s[12:15] dmask:0xc
|
|
// CHECK: [0x00,0x0c,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xd
|
|
// CHECK: [0x00,0x0d,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
|
|
// CHECK: [0x00,0x0e,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x0
|
|
// CHECK: [0x00,0x00,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0xa0,0xf2,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
|
|
// CHECK: [0x00,0x01,0xa1,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0xa2,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0xa0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
|
|
// CHECK: [0x00,0x01,0xa0,0xf0,0x01,0x05,0x62,0x80]
|
|
|
|
image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xbc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c_lz v252, v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xbc,0xf0,0x01,0xfc,0x62,0x00]
|
|
|
|
image_sample_c_lz v5, v[252:255], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xbc,0xf0,0xfc,0x05,0x62,0x00]
|
|
|
|
image_sample_c_lz v5, v[1:4], s[12:19], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xbc,0xf0,0x01,0x05,0x63,0x00]
|
|
|
|
image_sample_c_lz v5, v[1:4], s[92:99], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xbc,0xf0,0x01,0x05,0x77,0x00]
|
|
|
|
image_sample_c_lz v5, v[1:4], s[8:15], s[16:19] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xbc,0xf0,0x01,0x05,0x82,0x00]
|
|
|
|
image_sample_c_lz v5, v[1:4], s[8:15], s[96:99] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xbc,0xf0,0x01,0x05,0x02,0x03]
|
|
|
|
image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x2
|
|
// CHECK: [0x00,0x02,0xbc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c_lz v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
|
|
// CHECK: [0x00,0x03,0xbc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x4
|
|
// CHECK: [0x00,0x04,0xbc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c_lz v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x5
|
|
// CHECK: [0x00,0x05,0xbc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c_lz v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x6
|
|
// CHECK: [0x00,0x06,0xbc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c_lz v[5:7], v[1:4], s[8:15], s[12:15] dmask:0x7
|
|
// CHECK: [0x00,0x07,0xbc,0xf0,0x01,0x05,0x62,0x00]
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|
|
|
image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x8
|
|
// CHECK: [0x00,0x08,0xbc,0xf0,0x01,0x05,0x62,0x00]
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|
|
|
image_sample_c_lz v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x9
|
|
// CHECK: [0x00,0x09,0xbc,0xf0,0x01,0x05,0x62,0x00]
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|
|
|
image_sample_c_lz v[5:6], v[1:4], s[8:15], s[12:15] dmask:0xa
|
|
// CHECK: [0x00,0x0a,0xbc,0xf0,0x01,0x05,0x62,0x00]
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|
|
|
image_sample_c_lz v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xb
|
|
// CHECK: [0x00,0x0b,0xbc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_c_lz v[5:6], v[1:4], s[8:15], s[12:15] dmask:0xc
|
|
// CHECK: [0x00,0x0c,0xbc,0xf0,0x01,0x05,0x62,0x00]
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|
|
|
image_sample_c_lz v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xd
|
|
// CHECK: [0x00,0x0d,0xbc,0xf0,0x01,0x05,0x62,0x00]
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|
|
|
image_sample_c_lz v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
|
|
// CHECK: [0x00,0x0e,0xbc,0xf0,0x01,0x05,0x62,0x00]
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|
|
|
image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x0
|
|
// CHECK: [0x00,0x00,0xbc,0xf0,0x01,0x05,0x62,0x00]
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|
|
|
image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0xbc,0xf0,0x01,0x05,0x62,0x00]
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|
|
|
image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0xbc,0xf0,0x01,0x05,0x62,0x00]
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|
|
|
image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0xbc,0xf2,0x01,0x05,0x62,0x00]
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|
|
|
image_sample_c_lz v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
|
|
// CHECK: [0x00,0x01,0xbd,0xf0,0x01,0x05,0x62,0x00]
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|
|
|
image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0xbe,0xf0,0x01,0x05,0x62,0x00]
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|
|
|
image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0xbc,0xf0,0x01,0x05,0x62,0x00]
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|
|
|
image_sample_c_lz v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
|
|
// CHECK: [0x00,0x01,0xbc,0xf0,0x01,0x05,0x62,0x80]
|
|
|
|
image_sample_o v5, v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v252, v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xc0,0xf0,0x01,0xfc,0x62,0x00]
|
|
|
|
image_sample_o v5, v[252:255], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xc0,0xf0,0xfc,0x05,0x62,0x00]
|
|
|
|
image_sample_o v5, v[1:4], s[12:19], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xc0,0xf0,0x01,0x05,0x63,0x00]
|
|
|
|
image_sample_o v5, v[1:4], s[92:99], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xc0,0xf0,0x01,0x05,0x77,0x00]
|
|
|
|
image_sample_o v5, v[1:4], s[8:15], s[16:19] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xc0,0xf0,0x01,0x05,0x82,0x00]
|
|
|
|
image_sample_o v5, v[1:4], s[8:15], s[96:99] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xc0,0xf0,0x01,0x05,0x02,0x03]
|
|
|
|
image_sample_o v5, v[1:4], s[8:15], s[12:15] dmask:0x2
|
|
// CHECK: [0x00,0x02,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
|
|
// CHECK: [0x00,0x03,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v5, v[1:4], s[8:15], s[12:15] dmask:0x4
|
|
// CHECK: [0x00,0x04,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x5
|
|
// CHECK: [0x00,0x05,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x6
|
|
// CHECK: [0x00,0x06,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v[5:7], v[1:4], s[8:15], s[12:15] dmask:0x7
|
|
// CHECK: [0x00,0x07,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v5, v[1:4], s[8:15], s[12:15] dmask:0x8
|
|
// CHECK: [0x00,0x08,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x9
|
|
// CHECK: [0x00,0x09,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v[5:6], v[1:4], s[8:15], s[12:15] dmask:0xa
|
|
// CHECK: [0x00,0x0a,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xb
|
|
// CHECK: [0x00,0x0b,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v[5:6], v[1:4], s[8:15], s[12:15] dmask:0xc
|
|
// CHECK: [0x00,0x0c,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xd
|
|
// CHECK: [0x00,0x0d,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
|
|
// CHECK: [0x00,0x0e,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v5, v[1:4], s[8:15], s[12:15] dmask:0x0
|
|
// CHECK: [0x00,0x00,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0xc0,0xf2,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
|
|
// CHECK: [0x00,0x01,0xc1,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0xc2,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0xc0,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_o v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
|
|
// CHECK: [0x00,0x01,0xc0,0xf0,0x01,0x05,0x62,0x80]
|
|
|
|
image_sample_lz_o v5, v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v252, v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xdc,0xf0,0x01,0xfc,0x62,0x00]
|
|
|
|
image_sample_lz_o v5, v[252:255], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xdc,0xf0,0xfc,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v5, v[1:4], s[12:19], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xdc,0xf0,0x01,0x05,0x63,0x00]
|
|
|
|
image_sample_lz_o v5, v[1:4], s[92:99], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xdc,0xf0,0x01,0x05,0x77,0x00]
|
|
|
|
image_sample_lz_o v5, v[1:4], s[8:15], s[16:19] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xdc,0xf0,0x01,0x05,0x82,0x00]
|
|
|
|
image_sample_lz_o v5, v[1:4], s[8:15], s[96:99] dmask:0x1
|
|
// CHECK: [0x00,0x01,0xdc,0xf0,0x01,0x05,0x02,0x03]
|
|
|
|
image_sample_lz_o v5, v[1:4], s[8:15], s[12:15] dmask:0x2
|
|
// CHECK: [0x00,0x02,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
|
|
// CHECK: [0x00,0x03,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v5, v[1:4], s[8:15], s[12:15] dmask:0x4
|
|
// CHECK: [0x00,0x04,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x5
|
|
// CHECK: [0x00,0x05,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x6
|
|
// CHECK: [0x00,0x06,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v[5:7], v[1:4], s[8:15], s[12:15] dmask:0x7
|
|
// CHECK: [0x00,0x07,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v5, v[1:4], s[8:15], s[12:15] dmask:0x8
|
|
// CHECK: [0x00,0x08,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x9
|
|
// CHECK: [0x00,0x09,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v[5:6], v[1:4], s[8:15], s[12:15] dmask:0xa
|
|
// CHECK: [0x00,0x0a,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xb
|
|
// CHECK: [0x00,0x0b,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v[5:6], v[1:4], s[8:15], s[12:15] dmask:0xc
|
|
// CHECK: [0x00,0x0c,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xd
|
|
// CHECK: [0x00,0x0d,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v[5:7], v[1:4], s[8:15], s[12:15] dmask:0xe
|
|
// CHECK: [0x00,0x0e,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v5, v[1:4], s[8:15], s[12:15] dmask:0x0
|
|
// CHECK: [0x00,0x00,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v5, v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v5, v[1:4], s[8:15], s[12:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v5, v[1:4], s[8:15], s[12:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0xdc,0xf2,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 tfe
|
|
// CHECK: [0x00,0x01,0xdd,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v5, v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0xde,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v5, v[1:4], s[8:15], s[12:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0xdc,0xf0,0x01,0x05,0x62,0x00]
|
|
|
|
image_sample_lz_o v5, v[1:4], s[8:15], s[12:15] dmask:0x1 d16
|
|
// CHECK: [0x00,0x01,0xdc,0xf0,0x01,0x05,0x62,0x80]
|
|
|
|
image_gather4_cl v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x04,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_cl v[252:255], v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x04,0xf1,0x01,0xfc,0x62,0x00]
|
|
|
|
image_gather4_cl v[5:8], v[252:255], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x04,0xf1,0xfc,0x05,0x62,0x00]
|
|
|
|
image_gather4_cl v[5:8], v[1:4], s[12:19], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x04,0xf1,0x01,0x05,0x63,0x00]
|
|
|
|
image_gather4_cl v[5:8], v[1:4], s[92:99], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x04,0xf1,0x01,0x05,0x77,0x00]
|
|
|
|
image_gather4_cl v[5:8], v[1:4], s[8:15], s[16:19] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x04,0xf1,0x01,0x05,0x82,0x00]
|
|
|
|
image_gather4_cl v[5:8], v[1:4], s[8:15], s[96:99] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x04,0xf1,0x01,0x05,0x02,0x03]
|
|
|
|
image_gather4_cl v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x2
|
|
// CHECK: [0x00,0x02,0x04,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_cl v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x4
|
|
// CHECK: [0x00,0x04,0x04,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_cl v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x8
|
|
// CHECK: [0x00,0x08,0x04,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_cl v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x04,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_cl v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0x04,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_cl v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0x04,0xf3,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_cl v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0x06,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_cl v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0x04,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_cl v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 d16
|
|
// CHECK: [0x00,0x01,0x04,0xf1,0x01,0x05,0x62,0x80]
|
|
|
|
image_gather4_l v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x10,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_l v[252:255], v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x10,0xf1,0x01,0xfc,0x62,0x00]
|
|
|
|
image_gather4_l v[5:8], v[252:255], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x10,0xf1,0xfc,0x05,0x62,0x00]
|
|
|
|
image_gather4_l v[5:8], v[1:4], s[12:19], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x10,0xf1,0x01,0x05,0x63,0x00]
|
|
|
|
image_gather4_l v[5:8], v[1:4], s[92:99], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x10,0xf1,0x01,0x05,0x77,0x00]
|
|
|
|
image_gather4_l v[5:8], v[1:4], s[8:15], s[16:19] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x10,0xf1,0x01,0x05,0x82,0x00]
|
|
|
|
image_gather4_l v[5:8], v[1:4], s[8:15], s[96:99] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x10,0xf1,0x01,0x05,0x02,0x03]
|
|
|
|
image_gather4_l v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x2
|
|
// CHECK: [0x00,0x02,0x10,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_l v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x4
|
|
// CHECK: [0x00,0x04,0x10,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_l v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x8
|
|
// CHECK: [0x00,0x08,0x10,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_l v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x10,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_l v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0x10,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_l v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0x10,0xf3,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_l v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0x12,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_l v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0x10,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_l v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 d16
|
|
// CHECK: [0x00,0x01,0x10,0xf1,0x01,0x05,0x62,0x80]
|
|
|
|
image_gather4_b v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x14,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_b v[252:255], v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x14,0xf1,0x01,0xfc,0x62,0x00]
|
|
|
|
image_gather4_b v[5:8], v[252:255], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x14,0xf1,0xfc,0x05,0x62,0x00]
|
|
|
|
image_gather4_b v[5:8], v[1:4], s[12:19], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x14,0xf1,0x01,0x05,0x63,0x00]
|
|
|
|
image_gather4_b v[5:8], v[1:4], s[92:99], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x14,0xf1,0x01,0x05,0x77,0x00]
|
|
|
|
image_gather4_b v[5:8], v[1:4], s[8:15], s[16:19] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x14,0xf1,0x01,0x05,0x82,0x00]
|
|
|
|
image_gather4_b v[5:8], v[1:4], s[8:15], s[96:99] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x14,0xf1,0x01,0x05,0x02,0x03]
|
|
|
|
image_gather4_b v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x2
|
|
// CHECK: [0x00,0x02,0x14,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_b v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x4
|
|
// CHECK: [0x00,0x04,0x14,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_b v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x8
|
|
// CHECK: [0x00,0x08,0x14,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_b v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x14,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_b v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0x14,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_b v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0x14,0xf3,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_b v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0x16,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_b v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0x14,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_b v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 d16
|
|
// CHECK: [0x00,0x01,0x14,0xf1,0x01,0x05,0x62,0x80]
|
|
|
|
image_gather4_c v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x20,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c v[252:255], v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x20,0xf1,0x01,0xfc,0x62,0x00]
|
|
|
|
image_gather4_c v[5:8], v[252:255], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x20,0xf1,0xfc,0x05,0x62,0x00]
|
|
|
|
image_gather4_c v[5:8], v[1:4], s[12:19], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x20,0xf1,0x01,0x05,0x63,0x00]
|
|
|
|
image_gather4_c v[5:8], v[1:4], s[92:99], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x20,0xf1,0x01,0x05,0x77,0x00]
|
|
|
|
image_gather4_c v[5:8], v[1:4], s[8:15], s[16:19] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x20,0xf1,0x01,0x05,0x82,0x00]
|
|
|
|
image_gather4_c v[5:8], v[1:4], s[8:15], s[96:99] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x20,0xf1,0x01,0x05,0x02,0x03]
|
|
|
|
image_gather4_c v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x2
|
|
// CHECK: [0x00,0x02,0x20,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x4
|
|
// CHECK: [0x00,0x04,0x20,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x8
|
|
// CHECK: [0x00,0x08,0x20,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x20,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0x20,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0x20,0xf3,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0x22,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0x20,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 d16
|
|
// CHECK: [0x00,0x01,0x20,0xf1,0x01,0x05,0x62,0x80]
|
|
|
|
image_gather4_c_lz v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x3c,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c_lz v[252:255], v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x3c,0xf1,0x01,0xfc,0x62,0x00]
|
|
|
|
image_gather4_c_lz v[5:8], v[252:255], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x3c,0xf1,0xfc,0x05,0x62,0x00]
|
|
|
|
image_gather4_c_lz v[5:8], v[1:4], s[12:19], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x3c,0xf1,0x01,0x05,0x63,0x00]
|
|
|
|
image_gather4_c_lz v[5:8], v[1:4], s[92:99], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x3c,0xf1,0x01,0x05,0x77,0x00]
|
|
|
|
image_gather4_c_lz v[5:8], v[1:4], s[8:15], s[16:19] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x3c,0xf1,0x01,0x05,0x82,0x00]
|
|
|
|
image_gather4_c_lz v[5:8], v[1:4], s[8:15], s[96:99] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x3c,0xf1,0x01,0x05,0x02,0x03]
|
|
|
|
image_gather4_c_lz v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x2
|
|
// CHECK: [0x00,0x02,0x3c,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c_lz v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x4
|
|
// CHECK: [0x00,0x04,0x3c,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c_lz v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x8
|
|
// CHECK: [0x00,0x08,0x3c,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c_lz v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x3c,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c_lz v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0x3c,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c_lz v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0x3c,0xf3,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c_lz v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0x3e,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c_lz v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0x3c,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_c_lz v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 d16
|
|
// CHECK: [0x00,0x01,0x3c,0xf1,0x01,0x05,0x62,0x80]
|
|
|
|
image_gather4_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x40,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_o v[252:255], v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x40,0xf1,0x01,0xfc,0x62,0x00]
|
|
|
|
image_gather4_o v[5:8], v[252:255], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x40,0xf1,0xfc,0x05,0x62,0x00]
|
|
|
|
image_gather4_o v[5:8], v[1:4], s[12:19], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x40,0xf1,0x01,0x05,0x63,0x00]
|
|
|
|
image_gather4_o v[5:8], v[1:4], s[92:99], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x40,0xf1,0x01,0x05,0x77,0x00]
|
|
|
|
image_gather4_o v[5:8], v[1:4], s[8:15], s[16:19] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x40,0xf1,0x01,0x05,0x82,0x00]
|
|
|
|
image_gather4_o v[5:8], v[1:4], s[8:15], s[96:99] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x40,0xf1,0x01,0x05,0x02,0x03]
|
|
|
|
image_gather4_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x2
|
|
// CHECK: [0x00,0x02,0x40,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x4
|
|
// CHECK: [0x00,0x04,0x40,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x8
|
|
// CHECK: [0x00,0x08,0x40,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x40,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0x40,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0x40,0xf3,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0x42,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0x40,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_o v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 d16
|
|
// CHECK: [0x00,0x01,0x40,0xf1,0x01,0x05,0x62,0x80]
|
|
|
|
image_gather4_lz_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x5c,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_lz_o v[252:255], v[1:4], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x5c,0xf1,0x01,0xfc,0x62,0x00]
|
|
|
|
image_gather4_lz_o v[5:8], v[252:255], s[8:15], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x5c,0xf1,0xfc,0x05,0x62,0x00]
|
|
|
|
image_gather4_lz_o v[5:8], v[1:4], s[12:19], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x5c,0xf1,0x01,0x05,0x63,0x00]
|
|
|
|
image_gather4_lz_o v[5:8], v[1:4], s[92:99], s[12:15] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x5c,0xf1,0x01,0x05,0x77,0x00]
|
|
|
|
image_gather4_lz_o v[5:8], v[1:4], s[8:15], s[16:19] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x5c,0xf1,0x01,0x05,0x82,0x00]
|
|
|
|
image_gather4_lz_o v[5:8], v[1:4], s[8:15], s[96:99] dmask:0x1
|
|
// CHECK: [0x00,0x01,0x5c,0xf1,0x01,0x05,0x02,0x03]
|
|
|
|
image_gather4_lz_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x2
|
|
// CHECK: [0x00,0x02,0x5c,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_lz_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x4
|
|
// CHECK: [0x00,0x04,0x5c,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_lz_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x8
|
|
// CHECK: [0x00,0x08,0x5c,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_lz_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 unorm
|
|
// CHECK: [0x00,0x11,0x5c,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_lz_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 glc
|
|
// CHECK: [0x00,0x21,0x5c,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_lz_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 slc
|
|
// CHECK: [0x00,0x01,0x5c,0xf3,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_lz_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 lwe
|
|
// CHECK: [0x00,0x01,0x5e,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_lz_o v[5:8], v[1:4], s[8:15], s[12:15] dmask:0x1 da
|
|
// CHECK: [0x00,0x41,0x5c,0xf1,0x01,0x05,0x62,0x00]
|
|
|
|
image_gather4_lz_o v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x1 d16
|
|
// CHECK: [0x00,0x01,0x5c,0xf1,0x01,0x05,0x62,0x80]
|
|
|
|
buffer_load_format_x v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_x v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe0,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_load_format_x v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_format_x v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_format_x v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_format_x v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_format_x v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_format_x v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_format_x v5, off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_format_x v5, off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_format_x v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x00,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_x v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x00,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_x v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x00,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_x v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x00,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_x v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x00,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_x v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x00,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_x v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x02,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_x v5, off, s[8:11], s3 offset:4095 lds
|
|
// CHECK: [0xff,0x0f,0x01,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xy v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_load_format_xy v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_format_xy v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_format_xy v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_format_xy v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_format_xy v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_format_xy v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_format_xy v[5:6], off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_format_xy v[5:6], off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_format_xy v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x04,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xy v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x04,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xy v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x04,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x04,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x04,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x04,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x06,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xyz v[5:7], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xyz v[253:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe0,0x00,0xfd,0x02,0x03]
|
|
|
|
buffer_load_format_xyz v[5:7], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_format_xyz v[5:7], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_format_xyz v[5:7], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_format_xyz v[5:7], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_format_xyz v[5:7], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_format_xyz v[5:7], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_format_xyz v[5:7], off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_format_xyz v[5:7], off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_format_xyz v[5:7], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x08,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xyz v[5:7], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x08,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xyz v[5:7], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x08,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xyz v[5:7], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x08,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xyz v[5:7], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x08,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xyz v[5:7], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x08,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xyz v[5:7], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x0a,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xyzw v[5:8], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xyzw v[252:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe0,0x00,0xfc,0x02,0x03]
|
|
|
|
buffer_load_format_xyzw v[5:8], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_format_xyzw v[5:8], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_format_xyzw v[5:8], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_format_xyzw v[5:8], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_format_xyzw v[5:8], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_format_xyzw v[5:8], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_format_xyzw v[5:8], off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_format_xyzw v[5:8], off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_format_xyzw v[5:8], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x0c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xyzw v[5:8], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x0c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xyzw v[5:8], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x0c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xyzw v[5:8], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x0c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xyzw v[5:8], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x0c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xyzw v[5:8], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x0c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_xyzw v[5:8], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x0e,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_store_format_x v1, off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_x v255, off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe0,0x00,0xff,0x03,0x04]
|
|
|
|
buffer_store_format_x v1, off, s[16:19], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe0,0x00,0x01,0x04,0x04]
|
|
|
|
buffer_store_format_x v1, off, s[96:99], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe0,0x00,0x01,0x18,0x04]
|
|
|
|
buffer_store_format_x v1, off, s[12:15], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe0,0x00,0x01,0x03,0x65]
|
|
|
|
buffer_store_format_x v1, off, s[12:15], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe0,0x00,0x01,0x03,0x7c]
|
|
|
|
buffer_store_format_x v1, off, s[12:15], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe0,0x00,0x01,0x03,0x80]
|
|
|
|
buffer_store_format_x v1, off, s[12:15], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe0,0x00,0x01,0x03,0xc1]
|
|
|
|
buffer_store_format_x v1, off, s[12:15], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe0,0x00,0x01,0x03,0xf0]
|
|
|
|
buffer_store_format_x v1, off, s[12:15], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe0,0x00,0x01,0x03,0xf7]
|
|
|
|
buffer_store_format_x v1, v0, s[12:15], s4 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x10,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_x v1, v0, s[12:15], s4 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x10,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_x v1, off, s[12:15], s4
|
|
// CHECK: [0x00,0x00,0x10,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_x v1, off, s[12:15], s4 offset:0
|
|
// CHECK: [0x00,0x00,0x10,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_x v1, off, s[12:15], s4 offset:7
|
|
// CHECK: [0x07,0x00,0x10,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_x v1, off, s[12:15], s4 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x10,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_x v1, off, s[12:15], s4 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x12,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xy v[1:2], off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xy v[254:255], off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe0,0x00,0xfe,0x03,0x04]
|
|
|
|
buffer_store_format_xy v[1:2], off, s[16:19], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe0,0x00,0x01,0x04,0x04]
|
|
|
|
buffer_store_format_xy v[1:2], off, s[96:99], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe0,0x00,0x01,0x18,0x04]
|
|
|
|
buffer_store_format_xy v[1:2], off, s[12:15], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe0,0x00,0x01,0x03,0x65]
|
|
|
|
buffer_store_format_xy v[1:2], off, s[12:15], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe0,0x00,0x01,0x03,0x7c]
|
|
|
|
buffer_store_format_xy v[1:2], off, s[12:15], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe0,0x00,0x01,0x03,0x80]
|
|
|
|
buffer_store_format_xy v[1:2], off, s[12:15], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe0,0x00,0x01,0x03,0xc1]
|
|
|
|
buffer_store_format_xy v[1:2], off, s[12:15], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe0,0x00,0x01,0x03,0xf0]
|
|
|
|
buffer_store_format_xy v[1:2], off, s[12:15], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe0,0x00,0x01,0x03,0xf7]
|
|
|
|
buffer_store_format_xy v[1:2], v0, s[12:15], s4 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x14,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xy v[1:2], v0, s[12:15], s4 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x14,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xy v[1:2], off, s[12:15], s4
|
|
// CHECK: [0x00,0x00,0x14,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xy v[1:2], off, s[12:15], s4 offset:0
|
|
// CHECK: [0x00,0x00,0x14,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xy v[1:2], off, s[12:15], s4 offset:7
|
|
// CHECK: [0x07,0x00,0x14,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xy v[1:2], off, s[12:15], s4 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x14,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xy v[1:2], off, s[12:15], s4 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x16,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xyz v[1:3], off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xyz v[253:255], off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe0,0x00,0xfd,0x03,0x04]
|
|
|
|
buffer_store_format_xyz v[1:3], off, s[16:19], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe0,0x00,0x01,0x04,0x04]
|
|
|
|
buffer_store_format_xyz v[1:3], off, s[96:99], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe0,0x00,0x01,0x18,0x04]
|
|
|
|
buffer_store_format_xyz v[1:3], off, s[12:15], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe0,0x00,0x01,0x03,0x65]
|
|
|
|
buffer_store_format_xyz v[1:3], off, s[12:15], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe0,0x00,0x01,0x03,0x7c]
|
|
|
|
buffer_store_format_xyz v[1:3], off, s[12:15], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe0,0x00,0x01,0x03,0x80]
|
|
|
|
buffer_store_format_xyz v[1:3], off, s[12:15], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe0,0x00,0x01,0x03,0xc1]
|
|
|
|
buffer_store_format_xyz v[1:3], off, s[12:15], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe0,0x00,0x01,0x03,0xf0]
|
|
|
|
buffer_store_format_xyz v[1:3], off, s[12:15], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe0,0x00,0x01,0x03,0xf7]
|
|
|
|
buffer_store_format_xyz v[1:3], v0, s[12:15], s4 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x18,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xyz v[1:3], v0, s[12:15], s4 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x18,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xyz v[1:3], off, s[12:15], s4
|
|
// CHECK: [0x00,0x00,0x18,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xyz v[1:3], off, s[12:15], s4 offset:0
|
|
// CHECK: [0x00,0x00,0x18,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xyz v[1:3], off, s[12:15], s4 offset:7
|
|
// CHECK: [0x07,0x00,0x18,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xyz v[1:3], off, s[12:15], s4 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x18,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xyz v[1:3], off, s[12:15], s4 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x1a,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xyzw v[1:4], off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xyzw v[252:255], off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe0,0x00,0xfc,0x03,0x04]
|
|
|
|
buffer_store_format_xyzw v[1:4], off, s[16:19], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe0,0x00,0x01,0x04,0x04]
|
|
|
|
buffer_store_format_xyzw v[1:4], off, s[96:99], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe0,0x00,0x01,0x18,0x04]
|
|
|
|
buffer_store_format_xyzw v[1:4], off, s[12:15], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe0,0x00,0x01,0x03,0x65]
|
|
|
|
buffer_store_format_xyzw v[1:4], off, s[12:15], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe0,0x00,0x01,0x03,0x7c]
|
|
|
|
buffer_store_format_xyzw v[1:4], off, s[12:15], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe0,0x00,0x01,0x03,0x80]
|
|
|
|
buffer_store_format_xyzw v[1:4], off, s[12:15], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe0,0x00,0x01,0x03,0xc1]
|
|
|
|
buffer_store_format_xyzw v[1:4], off, s[12:15], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe0,0x00,0x01,0x03,0xf0]
|
|
|
|
buffer_store_format_xyzw v[1:4], off, s[12:15], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe0,0x00,0x01,0x03,0xf7]
|
|
|
|
buffer_store_format_xyzw v[1:4], v0, s[12:15], s4 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x1c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xyzw v[1:4], v0, s[12:15], s4 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x1c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xyzw v[1:4], off, s[12:15], s4
|
|
// CHECK: [0x00,0x00,0x1c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xyzw v[1:4], off, s[12:15], s4 offset:0
|
|
// CHECK: [0x00,0x00,0x1c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xyzw v[1:4], off, s[12:15], s4 offset:7
|
|
// CHECK: [0x07,0x00,0x1c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xyzw v[1:4], off, s[12:15], s4 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x1c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_xyzw v[1:4], off, s[12:15], s4 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x1e,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_load_format_d16_x v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_x v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_load_format_d16_x v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_format_d16_x v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_format_d16_x v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_format_d16_x v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_format_d16_x v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_format_d16_x v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_format_d16_x v5, off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_format_d16_x v5, off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_format_d16_x v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x20,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_x v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x20,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_x v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x20,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_x v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x20,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_x v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x20,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_x v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x20,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_x v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x22,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xy v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xy v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xy v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_format_d16_xy v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_format_d16_xy v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_format_d16_xy v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_format_d16_xy v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_format_d16_xy v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_format_d16_xy v5, off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_format_d16_xy v5, off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_format_d16_xy v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x24,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xy v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x24,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xy v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x24,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xy v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x24,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xy v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x24,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xy v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x24,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xy v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x26,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyz v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyz v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyz v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_format_d16_xyz v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_format_d16_xyz v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_format_d16_xyz v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_format_d16_xyz v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_format_d16_xyz v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_format_d16_xyz v[5:6], off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_format_d16_xyz v[5:6], off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_format_d16_xyz v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x28,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyz v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x28,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyz v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x28,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyz v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x28,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyz v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x28,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyz v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x28,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyz v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x2a,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyzw v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyzw v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyzw v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_format_d16_xyzw v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_format_d16_xyzw v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_format_d16_xyzw v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_format_d16_xyzw v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_format_d16_xyzw v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_format_d16_xyzw v[5:6], off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_format_d16_xyzw v[5:6], off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_format_d16_xyzw v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x2c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyzw v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x2c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyzw v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x2c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyzw v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x2c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyzw v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x2c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyzw v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x2c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_format_d16_xyzw v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x2e,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_store_format_d16_x v1, off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_x v255, off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0xff,0x03,0x04]
|
|
|
|
buffer_store_format_d16_x v1, off, s[16:19], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x04,0x04]
|
|
|
|
buffer_store_format_d16_x v1, off, s[96:99], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x18,0x04]
|
|
|
|
buffer_store_format_d16_x v1, off, s[12:15], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x03,0x65]
|
|
|
|
buffer_store_format_d16_x v1, off, s[12:15], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x03,0x7c]
|
|
|
|
buffer_store_format_d16_x v1, off, s[12:15], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x03,0x80]
|
|
|
|
buffer_store_format_d16_x v1, off, s[12:15], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x03,0xc1]
|
|
|
|
buffer_store_format_d16_x v1, off, s[12:15], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x03,0xf0]
|
|
|
|
buffer_store_format_d16_x v1, off, s[12:15], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x01,0x03,0xf7]
|
|
|
|
buffer_store_format_d16_x v1, v0, s[12:15], s4 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x30,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_x v1, v0, s[12:15], s4 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x30,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_x v1, off, s[12:15], s4
|
|
// CHECK: [0x00,0x00,0x30,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_x v1, off, s[12:15], s4 offset:0
|
|
// CHECK: [0x00,0x00,0x30,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_x v1, off, s[12:15], s4 offset:7
|
|
// CHECK: [0x07,0x00,0x30,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_x v1, off, s[12:15], s4 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x30,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_x v1, off, s[12:15], s4 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x32,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xy v1, off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xy v255, off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0xff,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xy v1, off, s[16:19], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x04,0x04]
|
|
|
|
buffer_store_format_d16_xy v1, off, s[96:99], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x18,0x04]
|
|
|
|
buffer_store_format_d16_xy v1, off, s[12:15], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x03,0x65]
|
|
|
|
buffer_store_format_d16_xy v1, off, s[12:15], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x03,0x7c]
|
|
|
|
buffer_store_format_d16_xy v1, off, s[12:15], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x03,0x80]
|
|
|
|
buffer_store_format_d16_xy v1, off, s[12:15], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x03,0xc1]
|
|
|
|
buffer_store_format_d16_xy v1, off, s[12:15], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x03,0xf0]
|
|
|
|
buffer_store_format_d16_xy v1, off, s[12:15], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x01,0x03,0xf7]
|
|
|
|
buffer_store_format_d16_xy v1, v0, s[12:15], s4 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x34,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xy v1, v0, s[12:15], s4 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x34,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xy v1, off, s[12:15], s4
|
|
// CHECK: [0x00,0x00,0x34,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xy v1, off, s[12:15], s4 offset:0
|
|
// CHECK: [0x00,0x00,0x34,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xy v1, off, s[12:15], s4 offset:7
|
|
// CHECK: [0x07,0x00,0x34,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xy v1, off, s[12:15], s4 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x34,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xy v1, off, s[12:15], s4 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x36,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyz v[1:2], off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyz v[254:255], off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0xfe,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyz v[1:2], off, s[16:19], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x04,0x04]
|
|
|
|
buffer_store_format_d16_xyz v[1:2], off, s[96:99], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x18,0x04]
|
|
|
|
buffer_store_format_d16_xyz v[1:2], off, s[12:15], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x03,0x65]
|
|
|
|
buffer_store_format_d16_xyz v[1:2], off, s[12:15], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x03,0x7c]
|
|
|
|
buffer_store_format_d16_xyz v[1:2], off, s[12:15], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x03,0x80]
|
|
|
|
buffer_store_format_d16_xyz v[1:2], off, s[12:15], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x03,0xc1]
|
|
|
|
buffer_store_format_d16_xyz v[1:2], off, s[12:15], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x03,0xf0]
|
|
|
|
buffer_store_format_d16_xyz v[1:2], off, s[12:15], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x38,0xe0,0x00,0x01,0x03,0xf7]
|
|
|
|
buffer_store_format_d16_xyz v[1:2], v0, s[12:15], s4 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x38,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyz v[1:2], v0, s[12:15], s4 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x38,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyz v[1:2], off, s[12:15], s4
|
|
// CHECK: [0x00,0x00,0x38,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyz v[1:2], off, s[12:15], s4 offset:0
|
|
// CHECK: [0x00,0x00,0x38,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyz v[1:2], off, s[12:15], s4 offset:7
|
|
// CHECK: [0x07,0x00,0x38,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyz v[1:2], off, s[12:15], s4 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x38,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyz v[1:2], off, s[12:15], s4 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x3a,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyzw v[1:2], off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyzw v[254:255], off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0xfe,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyzw v[1:2], off, s[16:19], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x04,0x04]
|
|
|
|
buffer_store_format_d16_xyzw v[1:2], off, s[96:99], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x18,0x04]
|
|
|
|
buffer_store_format_d16_xyzw v[1:2], off, s[12:15], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x03,0x65]
|
|
|
|
buffer_store_format_d16_xyzw v[1:2], off, s[12:15], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x03,0x7c]
|
|
|
|
buffer_store_format_d16_xyzw v[1:2], off, s[12:15], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x03,0x80]
|
|
|
|
buffer_store_format_d16_xyzw v[1:2], off, s[12:15], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x03,0xc1]
|
|
|
|
buffer_store_format_d16_xyzw v[1:2], off, s[12:15], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x03,0xf0]
|
|
|
|
buffer_store_format_d16_xyzw v[1:2], off, s[12:15], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x3c,0xe0,0x00,0x01,0x03,0xf7]
|
|
|
|
buffer_store_format_d16_xyzw v[1:2], v0, s[12:15], s4 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x3c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyzw v[1:2], v0, s[12:15], s4 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x3c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyzw v[1:2], off, s[12:15], s4
|
|
// CHECK: [0x00,0x00,0x3c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyzw v[1:2], off, s[12:15], s4 offset:0
|
|
// CHECK: [0x00,0x00,0x3c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyzw v[1:2], off, s[12:15], s4 offset:7
|
|
// CHECK: [0x07,0x00,0x3c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyzw v[1:2], off, s[12:15], s4 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x3c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_format_d16_xyzw v[1:2], off, s[12:15], s4 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x3e,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_load_ubyte v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x40,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x40,0xe0,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_load_ubyte v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x40,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_ubyte v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x40,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_ubyte v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x40,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_ubyte v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x40,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_ubyte v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x40,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_ubyte v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x40,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_ubyte v5, off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x40,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_ubyte v5, off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x40,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_ubyte v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x40,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x40,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x40,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x40,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x40,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x40,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x42,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 lds
|
|
// CHECK: [0xff,0x0f,0x41,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x44,0xe0,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_load_sbyte v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_sbyte v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_sbyte v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_sbyte v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_sbyte v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_sbyte v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_sbyte v5, off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_sbyte v5, off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_sbyte v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x44,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x44,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x44,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x44,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x44,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x44,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x46,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 lds
|
|
// CHECK: [0xff,0x0f,0x45,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ushort v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ushort v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x48,0xe0,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_load_ushort v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_ushort v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_ushort v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_ushort v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_ushort v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_ushort v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_ushort v5, off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_ushort v5, off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_ushort v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x48,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ushort v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x48,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ushort v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x48,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ushort v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x48,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ushort v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x48,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ushort v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x48,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ushort v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x4a,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ushort v5, off, s[8:11], s3 offset:4095 lds
|
|
// CHECK: [0xff,0x0f,0x49,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sshort v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sshort v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_load_sshort v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_sshort v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_sshort v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_sshort v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_sshort v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_sshort v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_sshort v5, off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_sshort v5, off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_sshort v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x4c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sshort v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x4c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sshort v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x4c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sshort v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x4c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sshort v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x4c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sshort v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x4c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sshort v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x4e,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sshort v5, off, s[8:11], s3 offset:4095 lds
|
|
// CHECK: [0xff,0x0f,0x4d,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dword v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dword v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x50,0xe0,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_load_dword v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_dword v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_dword v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_dword v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_dword v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_dword v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_dword v5, off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_dword v5, off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_dword v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x50,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dword v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x50,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dword v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x50,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dword v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x50,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dword v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x50,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dword v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x50,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dword v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x52,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dword v5, off, s[8:11], s3 offset:4095 lds
|
|
// CHECK: [0xff,0x0f,0x51,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx2 v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx2 v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x54,0xe0,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_load_dwordx2 v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_dwordx2 v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_dwordx2 v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_dwordx2 v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_dwordx2 v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_dwordx2 v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_dwordx2 v[5:6], off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_dwordx2 v[5:6], off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_dwordx2 v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x54,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx2 v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x54,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx2 v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x54,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx2 v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x54,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx2 v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x54,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx2 v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x54,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx2 v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x56,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx3 v[5:7], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x58,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx3 v[253:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x58,0xe0,0x00,0xfd,0x02,0x03]
|
|
|
|
buffer_load_dwordx3 v[5:7], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x58,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_dwordx3 v[5:7], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x58,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_dwordx3 v[5:7], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x58,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_dwordx3 v[5:7], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x58,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_dwordx3 v[5:7], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x58,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_dwordx3 v[5:7], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x58,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_dwordx3 v[5:7], off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x58,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_dwordx3 v[5:7], off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x58,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_dwordx3 v[5:7], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x58,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx3 v[5:7], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x58,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx3 v[5:7], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x58,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx3 v[5:7], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x58,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx3 v[5:7], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x58,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx3 v[5:7], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x58,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx3 v[5:7], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x5a,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx4 v[5:8], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x5c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx4 v[252:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x5c,0xe0,0x00,0xfc,0x02,0x03]
|
|
|
|
buffer_load_dwordx4 v[5:8], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x5c,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_dwordx4 v[5:8], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x5c,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_dwordx4 v[5:8], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x5c,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_dwordx4 v[5:8], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x5c,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_dwordx4 v[5:8], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x5c,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_dwordx4 v[5:8], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x5c,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_dwordx4 v[5:8], off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x5c,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_dwordx4 v[5:8], off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x5c,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_dwordx4 v[5:8], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x5c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx4 v[5:8], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x5c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx4 v[5:8], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x5c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx4 v[5:8], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x5c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx4 v[5:8], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x5c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx4 v[5:8], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x5c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_dwordx4 v[5:8], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x5e,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_store_byte v1, off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x60,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_byte v255, off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x60,0xe0,0x00,0xff,0x03,0x04]
|
|
|
|
buffer_store_byte v1, off, s[16:19], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x60,0xe0,0x00,0x01,0x04,0x04]
|
|
|
|
buffer_store_byte v1, off, s[96:99], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x60,0xe0,0x00,0x01,0x18,0x04]
|
|
|
|
buffer_store_byte v1, off, s[12:15], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x60,0xe0,0x00,0x01,0x03,0x65]
|
|
|
|
buffer_store_byte v1, off, s[12:15], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x60,0xe0,0x00,0x01,0x03,0x7c]
|
|
|
|
buffer_store_byte v1, off, s[12:15], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x60,0xe0,0x00,0x01,0x03,0x80]
|
|
|
|
buffer_store_byte v1, off, s[12:15], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x60,0xe0,0x00,0x01,0x03,0xc1]
|
|
|
|
buffer_store_byte v1, off, s[12:15], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x60,0xe0,0x00,0x01,0x03,0xf0]
|
|
|
|
buffer_store_byte v1, off, s[12:15], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x60,0xe0,0x00,0x01,0x03,0xf7]
|
|
|
|
buffer_store_byte v1, v0, s[12:15], s4 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x60,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_byte v1, v0, s[12:15], s4 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x60,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_byte v1, off, s[12:15], s4
|
|
// CHECK: [0x00,0x00,0x60,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_byte v1, off, s[12:15], s4 offset:0
|
|
// CHECK: [0x00,0x00,0x60,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_byte v1, off, s[12:15], s4 offset:7
|
|
// CHECK: [0x07,0x00,0x60,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_byte v1, off, s[12:15], s4 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x60,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_byte v1, off, s[12:15], s4 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x62,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_byte_d16_hi v1, off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x64,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_byte_d16_hi v255, off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x64,0xe0,0x00,0xff,0x03,0x04]
|
|
|
|
buffer_store_byte_d16_hi v1, off, s[16:19], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x64,0xe0,0x00,0x01,0x04,0x04]
|
|
|
|
buffer_store_byte_d16_hi v1, off, s[96:99], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x64,0xe0,0x00,0x01,0x18,0x04]
|
|
|
|
buffer_store_byte_d16_hi v1, off, s[12:15], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x64,0xe0,0x00,0x01,0x03,0x65]
|
|
|
|
buffer_store_byte_d16_hi v1, off, s[12:15], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x64,0xe0,0x00,0x01,0x03,0x7c]
|
|
|
|
buffer_store_byte_d16_hi v1, off, s[12:15], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x64,0xe0,0x00,0x01,0x03,0x80]
|
|
|
|
buffer_store_byte_d16_hi v1, off, s[12:15], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x64,0xe0,0x00,0x01,0x03,0xc1]
|
|
|
|
buffer_store_byte_d16_hi v1, off, s[12:15], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x64,0xe0,0x00,0x01,0x03,0xf0]
|
|
|
|
buffer_store_byte_d16_hi v1, off, s[12:15], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x64,0xe0,0x00,0x01,0x03,0xf7]
|
|
|
|
buffer_store_byte_d16_hi v1, v0, s[12:15], s4 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x64,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_byte_d16_hi v1, v0, s[12:15], s4 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x64,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_byte_d16_hi v1, off, s[12:15], s4
|
|
// CHECK: [0x00,0x00,0x64,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_byte_d16_hi v1, off, s[12:15], s4 offset:0
|
|
// CHECK: [0x00,0x00,0x64,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_byte_d16_hi v1, off, s[12:15], s4 offset:7
|
|
// CHECK: [0x07,0x00,0x64,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_byte_d16_hi v1, off, s[12:15], s4 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x64,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_byte_d16_hi v1, off, s[12:15], s4 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x66,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_short v1, off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x68,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_short v255, off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x68,0xe0,0x00,0xff,0x03,0x04]
|
|
|
|
buffer_store_short v1, off, s[16:19], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x68,0xe0,0x00,0x01,0x04,0x04]
|
|
|
|
buffer_store_short v1, off, s[96:99], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x68,0xe0,0x00,0x01,0x18,0x04]
|
|
|
|
buffer_store_short v1, off, s[12:15], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x68,0xe0,0x00,0x01,0x03,0x65]
|
|
|
|
buffer_store_short v1, off, s[12:15], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x68,0xe0,0x00,0x01,0x03,0x7c]
|
|
|
|
buffer_store_short v1, off, s[12:15], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x68,0xe0,0x00,0x01,0x03,0x80]
|
|
|
|
buffer_store_short v1, off, s[12:15], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x68,0xe0,0x00,0x01,0x03,0xc1]
|
|
|
|
buffer_store_short v1, off, s[12:15], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x68,0xe0,0x00,0x01,0x03,0xf0]
|
|
|
|
buffer_store_short v1, off, s[12:15], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x68,0xe0,0x00,0x01,0x03,0xf7]
|
|
|
|
buffer_store_short v1, v0, s[12:15], s4 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x68,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_short v1, v0, s[12:15], s4 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x68,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_short v1, off, s[12:15], s4
|
|
// CHECK: [0x00,0x00,0x68,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_short v1, off, s[12:15], s4 offset:0
|
|
// CHECK: [0x00,0x00,0x68,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_short v1, off, s[12:15], s4 offset:7
|
|
// CHECK: [0x07,0x00,0x68,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_short v1, off, s[12:15], s4 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x68,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_short v1, off, s[12:15], s4 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x6a,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_short_d16_hi v1, off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x6c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_short_d16_hi v255, off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x6c,0xe0,0x00,0xff,0x03,0x04]
|
|
|
|
buffer_store_short_d16_hi v1, off, s[16:19], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x6c,0xe0,0x00,0x01,0x04,0x04]
|
|
|
|
buffer_store_short_d16_hi v1, off, s[96:99], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x6c,0xe0,0x00,0x01,0x18,0x04]
|
|
|
|
buffer_store_short_d16_hi v1, off, s[12:15], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x6c,0xe0,0x00,0x01,0x03,0x65]
|
|
|
|
buffer_store_short_d16_hi v1, off, s[12:15], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x6c,0xe0,0x00,0x01,0x03,0x7c]
|
|
|
|
buffer_store_short_d16_hi v1, off, s[12:15], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x6c,0xe0,0x00,0x01,0x03,0x80]
|
|
|
|
buffer_store_short_d16_hi v1, off, s[12:15], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x6c,0xe0,0x00,0x01,0x03,0xc1]
|
|
|
|
buffer_store_short_d16_hi v1, off, s[12:15], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x6c,0xe0,0x00,0x01,0x03,0xf0]
|
|
|
|
buffer_store_short_d16_hi v1, off, s[12:15], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x6c,0xe0,0x00,0x01,0x03,0xf7]
|
|
|
|
buffer_store_short_d16_hi v1, v0, s[12:15], s4 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x6c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_short_d16_hi v1, v0, s[12:15], s4 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x6c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_short_d16_hi v1, off, s[12:15], s4
|
|
// CHECK: [0x00,0x00,0x6c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_short_d16_hi v1, off, s[12:15], s4 offset:0
|
|
// CHECK: [0x00,0x00,0x6c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_short_d16_hi v1, off, s[12:15], s4 offset:7
|
|
// CHECK: [0x07,0x00,0x6c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_short_d16_hi v1, off, s[12:15], s4 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x6c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_short_d16_hi v1, off, s[12:15], s4 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x6e,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dword v1, off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x70,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dword v255, off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x70,0xe0,0x00,0xff,0x03,0x04]
|
|
|
|
buffer_store_dword v1, off, s[16:19], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x70,0xe0,0x00,0x01,0x04,0x04]
|
|
|
|
buffer_store_dword v1, off, s[96:99], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x70,0xe0,0x00,0x01,0x18,0x04]
|
|
|
|
buffer_store_dword v1, off, s[12:15], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x70,0xe0,0x00,0x01,0x03,0x65]
|
|
|
|
buffer_store_dword v1, off, s[12:15], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x70,0xe0,0x00,0x01,0x03,0x7c]
|
|
|
|
buffer_store_dword v1, off, s[12:15], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x70,0xe0,0x00,0x01,0x03,0x80]
|
|
|
|
buffer_store_dword v1, off, s[12:15], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x70,0xe0,0x00,0x01,0x03,0xc1]
|
|
|
|
buffer_store_dword v1, off, s[12:15], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x70,0xe0,0x00,0x01,0x03,0xf0]
|
|
|
|
buffer_store_dword v1, off, s[12:15], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x70,0xe0,0x00,0x01,0x03,0xf7]
|
|
|
|
buffer_store_dword v1, v0, s[12:15], s4 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x70,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dword v1, v0, s[12:15], s4 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x70,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dword v1, off, s[12:15], s4
|
|
// CHECK: [0x00,0x00,0x70,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dword v1, off, s[12:15], s4 offset:0
|
|
// CHECK: [0x00,0x00,0x70,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dword v1, off, s[12:15], s4 offset:7
|
|
// CHECK: [0x07,0x00,0x70,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dword v1, off, s[12:15], s4 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x70,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dword v1, off, s[12:15], s4 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x72,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx2 v[1:2], off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x74,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx2 v[254:255], off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x74,0xe0,0x00,0xfe,0x03,0x04]
|
|
|
|
buffer_store_dwordx2 v[1:2], off, s[16:19], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x74,0xe0,0x00,0x01,0x04,0x04]
|
|
|
|
buffer_store_dwordx2 v[1:2], off, s[96:99], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x74,0xe0,0x00,0x01,0x18,0x04]
|
|
|
|
buffer_store_dwordx2 v[1:2], off, s[12:15], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x74,0xe0,0x00,0x01,0x03,0x65]
|
|
|
|
buffer_store_dwordx2 v[1:2], off, s[12:15], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x74,0xe0,0x00,0x01,0x03,0x7c]
|
|
|
|
buffer_store_dwordx2 v[1:2], off, s[12:15], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x74,0xe0,0x00,0x01,0x03,0x80]
|
|
|
|
buffer_store_dwordx2 v[1:2], off, s[12:15], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x74,0xe0,0x00,0x01,0x03,0xc1]
|
|
|
|
buffer_store_dwordx2 v[1:2], off, s[12:15], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x74,0xe0,0x00,0x01,0x03,0xf0]
|
|
|
|
buffer_store_dwordx2 v[1:2], off, s[12:15], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x74,0xe0,0x00,0x01,0x03,0xf7]
|
|
|
|
buffer_store_dwordx2 v[1:2], v0, s[12:15], s4 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x74,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx2 v[1:2], v0, s[12:15], s4 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x74,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx2 v[1:2], off, s[12:15], s4
|
|
// CHECK: [0x00,0x00,0x74,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx2 v[1:2], off, s[12:15], s4 offset:0
|
|
// CHECK: [0x00,0x00,0x74,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx2 v[1:2], off, s[12:15], s4 offset:7
|
|
// CHECK: [0x07,0x00,0x74,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx2 v[1:2], off, s[12:15], s4 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x74,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx2 v[1:2], off, s[12:15], s4 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x76,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx3 v[1:3], off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x78,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx3 v[253:255], off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x78,0xe0,0x00,0xfd,0x03,0x04]
|
|
|
|
buffer_store_dwordx3 v[1:3], off, s[16:19], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x78,0xe0,0x00,0x01,0x04,0x04]
|
|
|
|
buffer_store_dwordx3 v[1:3], off, s[96:99], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x78,0xe0,0x00,0x01,0x18,0x04]
|
|
|
|
buffer_store_dwordx3 v[1:3], off, s[12:15], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x78,0xe0,0x00,0x01,0x03,0x65]
|
|
|
|
buffer_store_dwordx3 v[1:3], off, s[12:15], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x78,0xe0,0x00,0x01,0x03,0x7c]
|
|
|
|
buffer_store_dwordx3 v[1:3], off, s[12:15], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x78,0xe0,0x00,0x01,0x03,0x80]
|
|
|
|
buffer_store_dwordx3 v[1:3], off, s[12:15], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x78,0xe0,0x00,0x01,0x03,0xc1]
|
|
|
|
buffer_store_dwordx3 v[1:3], off, s[12:15], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x78,0xe0,0x00,0x01,0x03,0xf0]
|
|
|
|
buffer_store_dwordx3 v[1:3], off, s[12:15], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x78,0xe0,0x00,0x01,0x03,0xf7]
|
|
|
|
buffer_store_dwordx3 v[1:3], v0, s[12:15], s4 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x78,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx3 v[1:3], v0, s[12:15], s4 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x78,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx3 v[1:3], off, s[12:15], s4
|
|
// CHECK: [0x00,0x00,0x78,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx3 v[1:3], off, s[12:15], s4 offset:0
|
|
// CHECK: [0x00,0x00,0x78,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx3 v[1:3], off, s[12:15], s4 offset:7
|
|
// CHECK: [0x07,0x00,0x78,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx3 v[1:3], off, s[12:15], s4 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x78,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx3 v[1:3], off, s[12:15], s4 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x7a,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx4 v[1:4], off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x7c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx4 v[252:255], off, s[12:15], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x7c,0xe0,0x00,0xfc,0x03,0x04]
|
|
|
|
buffer_store_dwordx4 v[1:4], off, s[16:19], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x7c,0xe0,0x00,0x01,0x04,0x04]
|
|
|
|
buffer_store_dwordx4 v[1:4], off, s[96:99], s4 offset:4095
|
|
// CHECK: [0xff,0x0f,0x7c,0xe0,0x00,0x01,0x18,0x04]
|
|
|
|
buffer_store_dwordx4 v[1:4], off, s[12:15], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x7c,0xe0,0x00,0x01,0x03,0x65]
|
|
|
|
buffer_store_dwordx4 v[1:4], off, s[12:15], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x7c,0xe0,0x00,0x01,0x03,0x7c]
|
|
|
|
buffer_store_dwordx4 v[1:4], off, s[12:15], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x7c,0xe0,0x00,0x01,0x03,0x80]
|
|
|
|
buffer_store_dwordx4 v[1:4], off, s[12:15], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x7c,0xe0,0x00,0x01,0x03,0xc1]
|
|
|
|
buffer_store_dwordx4 v[1:4], off, s[12:15], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x7c,0xe0,0x00,0x01,0x03,0xf0]
|
|
|
|
buffer_store_dwordx4 v[1:4], off, s[12:15], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x7c,0xe0,0x00,0x01,0x03,0xf7]
|
|
|
|
buffer_store_dwordx4 v[1:4], v0, s[12:15], s4 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x7c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx4 v[1:4], v0, s[12:15], s4 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x7c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx4 v[1:4], off, s[12:15], s4
|
|
// CHECK: [0x00,0x00,0x7c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx4 v[1:4], off, s[12:15], s4 offset:0
|
|
// CHECK: [0x00,0x00,0x7c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx4 v[1:4], off, s[12:15], s4 offset:7
|
|
// CHECK: [0x07,0x00,0x7c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx4 v[1:4], off, s[12:15], s4 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x7c,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_store_dwordx4 v[1:4], off, s[12:15], s4 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x7e,0xe0,0x00,0x01,0x03,0x04]
|
|
|
|
buffer_load_ubyte_d16 v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16 v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe0,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16 v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_ubyte_d16 v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_ubyte_d16 v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_ubyte_d16 v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_ubyte_d16 v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_ubyte_d16 v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_ubyte_d16 v5, off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_ubyte_d16 v5, off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_ubyte_d16 v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x80,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16 v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x80,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16 v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x80,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16 v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x80,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16 v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x80,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16 v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x80,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16 v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x82,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16_hi v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16_hi v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe0,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16_hi v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_ubyte_d16_hi v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_ubyte_d16_hi v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_ubyte_d16_hi v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_ubyte_d16_hi v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_ubyte_d16_hi v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_ubyte_d16_hi v5, off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_ubyte_d16_hi v5, off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_ubyte_d16_hi v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x84,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16_hi v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x84,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16_hi v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x84,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16_hi v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x84,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16_hi v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x84,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16_hi v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x84,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_ubyte_d16_hi v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x86,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16 v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16 v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe0,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16 v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_sbyte_d16 v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_sbyte_d16 v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_sbyte_d16 v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_sbyte_d16 v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_sbyte_d16 v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_sbyte_d16 v5, off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_sbyte_d16 v5, off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_sbyte_d16 v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x88,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16 v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x88,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16 v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x88,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16 v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x88,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16 v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x88,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16 v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x88,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16 v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x8a,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16_hi v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16_hi v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe0,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16_hi v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_sbyte_d16_hi v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_sbyte_d16_hi v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_sbyte_d16_hi v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_sbyte_d16_hi v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_sbyte_d16_hi v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_sbyte_d16_hi v5, off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_sbyte_d16_hi v5, off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_sbyte_d16_hi v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x8c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16_hi v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x8c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16_hi v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x8c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16_hi v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x8c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16_hi v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x8c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16_hi v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x8c,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_sbyte_d16_hi v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x8e,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_short_d16 v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_short_d16 v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe0,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_load_short_d16 v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_short_d16 v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_short_d16 v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_short_d16 v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_short_d16 v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_short_d16 v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_short_d16 v5, off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_short_d16 v5, off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_short_d16 v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x90,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_short_d16 v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x90,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_short_d16 v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x90,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_short_d16 v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x90,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_short_d16 v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x90,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_short_d16 v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x90,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_short_d16 v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x92,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_short_d16_hi v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_short_d16_hi v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe0,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_load_short_d16_hi v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe0,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_load_short_d16_hi v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe0,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_load_short_d16_hi v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe0,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_load_short_d16_hi v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe0,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_load_short_d16_hi v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe0,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_load_short_d16_hi v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe0,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_load_short_d16_hi v5, off, s[8:11], 0.5 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe0,0x00,0x05,0x02,0xf0]
|
|
|
|
buffer_load_short_d16_hi v5, off, s[8:11], -4.0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe0,0x00,0x05,0x02,0xf7]
|
|
|
|
buffer_load_short_d16_hi v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x94,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_short_d16_hi v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x94,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_short_d16_hi v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x94,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_short_d16_hi v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x94,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_short_d16_hi v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x94,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_short_d16_hi v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x94,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_load_short_d16_hi v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x96,0xe0,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_wbinvl1
|
|
// CHECK: [0x00,0x00,0xf8,0xe0,0x00,0x00,0x00,0x00]
|
|
|
|
buffer_wbinvl1_vol
|
|
// CHECK: [0x00,0x00,0xfc,0xe0,0x00,0x00,0x00,0x00]
|
|
|
|
buffer_atomic_swap v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_swap v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe1,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_atomic_swap v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_swap v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_swap v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_swap v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_swap v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_swap v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x00,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_swap v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x00,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_swap v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x00,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_swap v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x00,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_swap v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x00,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_swap v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x00,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_swap v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x00,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_swap v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x02,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe1,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_cmpswap v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_cmpswap v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_cmpswap v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_cmpswap v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_cmpswap v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x04,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_cmpswap v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x04,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x04,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x04,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x04,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x04,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x04,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x06,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_add v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_add v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe1,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_atomic_add v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_add v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_add v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_add v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_add v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_add v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x08,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_add v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x08,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_add v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x08,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_add v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x08,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_add v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x08,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_add v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x08,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_add v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x08,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_add v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x0a,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_sub v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_sub v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe1,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_atomic_sub v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_sub v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_sub v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_sub v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_sub v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_sub v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x0c,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_sub v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x0c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_sub v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x0c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_sub v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x0c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_sub v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x0c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_sub v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x0c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_sub v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x0c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_sub v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x0e,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smin v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smin v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe1,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_atomic_smin v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_smin v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_smin v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_smin v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_smin v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_smin v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x10,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_smin v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x10,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smin v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x10,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smin v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x10,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smin v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x10,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smin v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x10,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smin v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x10,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smin v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x12,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umin v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umin v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe1,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_atomic_umin v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_umin v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_umin v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_umin v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_umin v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_umin v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x14,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_umin v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x14,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umin v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x14,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umin v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x14,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umin v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x14,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umin v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x14,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umin v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x14,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umin v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x16,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smax v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smax v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe1,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_atomic_smax v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_smax v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_smax v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_smax v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_smax v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_smax v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x18,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_smax v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x18,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smax v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x18,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smax v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x18,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smax v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x18,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smax v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x18,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smax v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x18,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smax v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x1a,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umax v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umax v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe1,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_atomic_umax v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_umax v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_umax v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_umax v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_umax v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_umax v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x1c,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_umax v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x1c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umax v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x1c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umax v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x1c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umax v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x1c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umax v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x1c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umax v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x1c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umax v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x1e,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_and v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_and v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe1,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_atomic_and v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_and v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_and v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_and v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_and v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_and v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x20,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_and v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x20,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_and v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x20,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_and v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x20,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_and v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x20,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_and v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x20,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_and v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x20,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_and v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x22,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_or v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_or v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe1,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_atomic_or v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_or v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_or v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_or v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_or v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_or v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x24,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_or v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x24,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_or v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x24,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_or v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x24,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_or v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x24,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_or v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x24,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_or v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x24,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_or v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x26,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_xor v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_xor v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe1,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_atomic_xor v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_xor v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_xor v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_xor v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_xor v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_xor v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x28,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_xor v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x28,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_xor v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x28,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_xor v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x28,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_xor v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x28,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_xor v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x28,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_xor v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x28,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_xor v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x2a,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_inc v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_inc v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe1,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_atomic_inc v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_inc v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_inc v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_inc v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_inc v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_inc v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x2c,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_inc v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x2c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_inc v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x2c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_inc v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x2c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_inc v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x2c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_inc v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x2c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_inc v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x2c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_inc v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x2e,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_dec v5, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_dec v255, off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe1,0x00,0xff,0x02,0x03]
|
|
|
|
buffer_atomic_dec v5, off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_dec v5, off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_dec v5, off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_dec v5, off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_dec v5, off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_dec v5, off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x30,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_dec v5, v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x30,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_dec v5, v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x30,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_dec v5, off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x30,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_dec v5, off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x30,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_dec v5, off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x30,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_dec v5, off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x30,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_dec v5, off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x32,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_swap_x2 v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_swap_x2 v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe1,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_atomic_swap_x2 v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_swap_x2 v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_swap_x2 v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_swap_x2 v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_swap_x2 v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_swap_x2 v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x80,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_swap_x2 v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x80,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_swap_x2 v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x80,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_swap_x2 v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x80,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_swap_x2 v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x80,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_swap_x2 v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x80,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_swap_x2 v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x80,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_swap_x2 v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x82,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap_x2 v[5:8], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap_x2 v[252:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe1,0x00,0xfc,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap_x2 v[5:8], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_cmpswap_x2 v[5:8], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_cmpswap_x2 v[5:8], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_cmpswap_x2 v[5:8], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_cmpswap_x2 v[5:8], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_cmpswap_x2 v[5:8], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x84,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_cmpswap_x2 v[5:8], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x84,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap_x2 v[5:8], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x84,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap_x2 v[5:8], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x84,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap_x2 v[5:8], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x84,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap_x2 v[5:8], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x84,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap_x2 v[5:8], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x84,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_cmpswap_x2 v[5:8], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x86,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_add_x2 v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_add_x2 v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe1,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_atomic_add_x2 v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_add_x2 v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_add_x2 v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_add_x2 v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_add_x2 v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_add_x2 v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x88,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_add_x2 v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x88,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_add_x2 v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x88,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_add_x2 v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x88,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_add_x2 v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x88,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_add_x2 v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x88,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_add_x2 v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x88,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_add_x2 v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x8a,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_sub_x2 v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_sub_x2 v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe1,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_atomic_sub_x2 v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_sub_x2 v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_sub_x2 v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_sub_x2 v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_sub_x2 v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_sub_x2 v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x8c,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_sub_x2 v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x8c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_sub_x2 v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x8c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_sub_x2 v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x8c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_sub_x2 v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x8c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_sub_x2 v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x8c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_sub_x2 v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x8c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_sub_x2 v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x8e,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smin_x2 v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smin_x2 v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe1,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_atomic_smin_x2 v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_smin_x2 v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_smin_x2 v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_smin_x2 v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_smin_x2 v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_smin_x2 v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x90,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_smin_x2 v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x90,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smin_x2 v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x90,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smin_x2 v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x90,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smin_x2 v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x90,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smin_x2 v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x90,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smin_x2 v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x90,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smin_x2 v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x92,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umin_x2 v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umin_x2 v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe1,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_atomic_umin_x2 v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_umin_x2 v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_umin_x2 v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_umin_x2 v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_umin_x2 v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_umin_x2 v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x94,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_umin_x2 v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x94,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umin_x2 v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x94,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umin_x2 v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x94,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umin_x2 v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x94,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umin_x2 v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x94,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umin_x2 v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x94,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umin_x2 v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x96,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smax_x2 v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x98,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smax_x2 v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x98,0xe1,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_atomic_smax_x2 v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x98,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_smax_x2 v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x98,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_smax_x2 v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x98,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_smax_x2 v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x98,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_smax_x2 v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x98,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_smax_x2 v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x98,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_smax_x2 v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x98,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smax_x2 v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x98,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smax_x2 v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x98,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smax_x2 v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x98,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smax_x2 v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x98,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smax_x2 v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x98,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_smax_x2 v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x9a,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umax_x2 v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x9c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umax_x2 v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x9c,0xe1,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_atomic_umax_x2 v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x9c,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_umax_x2 v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0x9c,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_umax_x2 v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0x9c,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_umax_x2 v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x9c,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_umax_x2 v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0x9c,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_umax_x2 v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0x9c,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_umax_x2 v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0x9c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umax_x2 v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0x9c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umax_x2 v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0x9c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umax_x2 v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0x9c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umax_x2 v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0x9c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umax_x2 v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0x9c,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_umax_x2 v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0x9e,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_and_x2 v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa0,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_and_x2 v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa0,0xe1,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_atomic_and_x2 v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa0,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_and_x2 v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa0,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_and_x2 v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa0,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_and_x2 v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa0,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_and_x2 v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa0,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_and_x2 v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa0,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_and_x2 v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0xa0,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_and_x2 v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0xa0,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_and_x2 v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0xa0,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_and_x2 v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0xa0,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_and_x2 v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0xa0,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_and_x2 v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0xa0,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_and_x2 v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0xa2,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_or_x2 v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa4,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_or_x2 v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa4,0xe1,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_atomic_or_x2 v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa4,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_or_x2 v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa4,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_or_x2 v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa4,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_or_x2 v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa4,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_or_x2 v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa4,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_or_x2 v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa4,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_or_x2 v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0xa4,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_or_x2 v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0xa4,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_or_x2 v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0xa4,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_or_x2 v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0xa4,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_or_x2 v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0xa4,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_or_x2 v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0xa4,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_or_x2 v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0xa6,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_xor_x2 v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa8,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_xor_x2 v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa8,0xe1,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_atomic_xor_x2 v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa8,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_xor_x2 v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa8,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_xor_x2 v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa8,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_xor_x2 v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa8,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_xor_x2 v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa8,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_xor_x2 v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0xa8,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_xor_x2 v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0xa8,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_xor_x2 v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0xa8,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_xor_x2 v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0xa8,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_xor_x2 v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0xa8,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_xor_x2 v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0xa8,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_xor_x2 v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0xa8,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_xor_x2 v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0xaa,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_inc_x2 v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xac,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_inc_x2 v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xac,0xe1,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_atomic_inc_x2 v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xac,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_inc_x2 v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xac,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_inc_x2 v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0xac,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_inc_x2 v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0xac,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_inc_x2 v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0xac,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_inc_x2 v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0xac,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_inc_x2 v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0xac,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_inc_x2 v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0xac,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_inc_x2 v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0xac,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_inc_x2 v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0xac,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_inc_x2 v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0xac,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_inc_x2 v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0xac,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_inc_x2 v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0xae,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_dec_x2 v[5:6], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xb0,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_dec_x2 v[254:255], off, s[8:11], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xb0,0xe1,0x00,0xfe,0x02,0x03]
|
|
|
|
buffer_atomic_dec_x2 v[5:6], off, s[12:15], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xb0,0xe1,0x00,0x05,0x03,0x03]
|
|
|
|
buffer_atomic_dec_x2 v[5:6], off, s[96:99], s3 offset:4095
|
|
// CHECK: [0xff,0x0f,0xb0,0xe1,0x00,0x05,0x18,0x03]
|
|
|
|
buffer_atomic_dec_x2 v[5:6], off, s[8:11], s101 offset:4095
|
|
// CHECK: [0xff,0x0f,0xb0,0xe1,0x00,0x05,0x02,0x65]
|
|
|
|
buffer_atomic_dec_x2 v[5:6], off, s[8:11], m0 offset:4095
|
|
// CHECK: [0xff,0x0f,0xb0,0xe1,0x00,0x05,0x02,0x7c]
|
|
|
|
buffer_atomic_dec_x2 v[5:6], off, s[8:11], 0 offset:4095
|
|
// CHECK: [0xff,0x0f,0xb0,0xe1,0x00,0x05,0x02,0x80]
|
|
|
|
buffer_atomic_dec_x2 v[5:6], off, s[8:11], -1 offset:4095
|
|
// CHECK: [0xff,0x0f,0xb0,0xe1,0x00,0x05,0x02,0xc1]
|
|
|
|
buffer_atomic_dec_x2 v[5:6], v0, s[8:11], s3 idxen offset:4095
|
|
// CHECK: [0xff,0x2f,0xb0,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_dec_x2 v[5:6], v0, s[8:11], s3 offen offset:4095
|
|
// CHECK: [0xff,0x1f,0xb0,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_dec_x2 v[5:6], off, s[8:11], s3
|
|
// CHECK: [0x00,0x00,0xb0,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_dec_x2 v[5:6], off, s[8:11], s3 offset:0
|
|
// CHECK: [0x00,0x00,0xb0,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_dec_x2 v[5:6], off, s[8:11], s3 offset:7
|
|
// CHECK: [0x07,0x00,0xb0,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_dec_x2 v[5:6], off, s[8:11], s3 offset:4095 glc
|
|
// CHECK: [0xff,0x4f,0xb0,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
buffer_atomic_dec_x2 v[5:6], off, s[8:11], s3 offset:4095 slc
|
|
// CHECK: [0xff,0x0f,0xb2,0xe1,0x00,0x05,0x02,0x03]
|
|
|
|
s_load_dword s5, s[2:3], s0
|
|
// CHECK: [0x41,0x01,0x00,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dword s101, s[2:3], s0
|
|
// CHECK: [0x41,0x19,0x00,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dword flat_scratch_lo, s[2:3], s0
|
|
// CHECK: [0x81,0x19,0x00,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dword flat_scratch_hi, s[2:3], s0
|
|
// CHECK: [0xc1,0x19,0x00,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dword vcc_lo, s[2:3], s0
|
|
// CHECK: [0x81,0x1a,0x00,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dword vcc_hi, s[2:3], s0
|
|
// CHECK: [0xc1,0x1a,0x00,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dword s5, s[4:5], s0
|
|
// CHECK: [0x42,0x01,0x00,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dword s5, s[100:101], s0
|
|
// CHECK: [0x72,0x01,0x00,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dword s5, flat_scratch, s0
|
|
// CHECK: [0x73,0x01,0x00,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dword s5, vcc, s0
|
|
// CHECK: [0x75,0x01,0x00,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dword s5, s[2:3], s101
|
|
// CHECK: [0x41,0x01,0x00,0xc0,0x65,0x00,0x00,0x00]
|
|
|
|
s_load_dword s5, s[2:3], flat_scratch_lo
|
|
// CHECK: [0x41,0x01,0x00,0xc0,0x66,0x00,0x00,0x00]
|
|
|
|
s_load_dword s5, s[2:3], flat_scratch_hi
|
|
// CHECK: [0x41,0x01,0x00,0xc0,0x67,0x00,0x00,0x00]
|
|
|
|
s_load_dword s5, s[2:3], vcc_lo
|
|
// CHECK: [0x41,0x01,0x00,0xc0,0x6a,0x00,0x00,0x00]
|
|
|
|
s_load_dword s5, s[2:3], vcc_hi
|
|
// CHECK: [0x41,0x01,0x00,0xc0,0x6b,0x00,0x00,0x00]
|
|
|
|
s_load_dword s5, s[2:3], m0
|
|
// CHECK: [0x41,0x01,0x00,0xc0,0x7c,0x00,0x00,0x00]
|
|
|
|
s_load_dword s5, s[2:3], 0x0
|
|
// CHECK: [0x41,0x01,0x02,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dword s5, s[2:3], s0 glc
|
|
// CHECK: [0x41,0x01,0x01,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 s[10:11], s[2:3], s0
|
|
// CHECK: [0x81,0x02,0x04,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 s[12:13], s[2:3], s0
|
|
// CHECK: [0x01,0x03,0x04,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 s[100:101], s[2:3], s0
|
|
// CHECK: [0x01,0x19,0x04,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 flat_scratch, s[2:3], s0
|
|
// CHECK: [0x81,0x19,0x04,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 vcc, s[2:3], s0
|
|
// CHECK: [0x81,0x1a,0x04,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 s[10:11], s[4:5], s0
|
|
// CHECK: [0x82,0x02,0x04,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 s[10:11], s[100:101], s0
|
|
// CHECK: [0xb2,0x02,0x04,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 s[10:11], flat_scratch, s0
|
|
// CHECK: [0xb3,0x02,0x04,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 s[10:11], vcc, s0
|
|
// CHECK: [0xb5,0x02,0x04,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 s[10:11], s[2:3], s101
|
|
// CHECK: [0x81,0x02,0x04,0xc0,0x65,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 s[10:11], s[2:3], flat_scratch_lo
|
|
// CHECK: [0x81,0x02,0x04,0xc0,0x66,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 s[10:11], s[2:3], flat_scratch_hi
|
|
// CHECK: [0x81,0x02,0x04,0xc0,0x67,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 s[10:11], s[2:3], vcc_lo
|
|
// CHECK: [0x81,0x02,0x04,0xc0,0x6a,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 s[10:11], s[2:3], vcc_hi
|
|
// CHECK: [0x81,0x02,0x04,0xc0,0x6b,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 s[10:11], s[2:3], m0
|
|
// CHECK: [0x81,0x02,0x04,0xc0,0x7c,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 s[10:11], s[2:3], 0x0
|
|
// CHECK: [0x81,0x02,0x06,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx2 s[10:11], s[2:3], s0 glc
|
|
// CHECK: [0x81,0x02,0x05,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx4 s[20:23], s[2:3], s0
|
|
// CHECK: [0x01,0x05,0x08,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx4 s[24:27], s[2:3], s0
|
|
// CHECK: [0x01,0x06,0x08,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx4 s[96:99], s[2:3], s0
|
|
// CHECK: [0x01,0x18,0x08,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx4 s[20:23], s[4:5], s0
|
|
// CHECK: [0x02,0x05,0x08,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx4 s[20:23], s[100:101], s0
|
|
// CHECK: [0x32,0x05,0x08,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx4 s[20:23], flat_scratch, s0
|
|
// CHECK: [0x33,0x05,0x08,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx4 s[20:23], vcc, s0
|
|
// CHECK: [0x35,0x05,0x08,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx4 s[20:23], s[2:3], s101
|
|
// CHECK: [0x01,0x05,0x08,0xc0,0x65,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx4 s[20:23], s[2:3], flat_scratch_lo
|
|
// CHECK: [0x01,0x05,0x08,0xc0,0x66,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx4 s[20:23], s[2:3], flat_scratch_hi
|
|
// CHECK: [0x01,0x05,0x08,0xc0,0x67,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx4 s[20:23], s[2:3], vcc_lo
|
|
// CHECK: [0x01,0x05,0x08,0xc0,0x6a,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx4 s[20:23], s[2:3], vcc_hi
|
|
// CHECK: [0x01,0x05,0x08,0xc0,0x6b,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx4 s[20:23], s[2:3], m0
|
|
// CHECK: [0x01,0x05,0x08,0xc0,0x7c,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx4 s[20:23], s[2:3], 0x0
|
|
// CHECK: [0x01,0x05,0x0a,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx4 s[20:23], s[2:3], s0 glc
|
|
// CHECK: [0x01,0x05,0x09,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx8 s[20:27], s[2:3], s0
|
|
// CHECK: [0x01,0x05,0x0c,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx8 s[24:31], s[2:3], s0
|
|
// CHECK: [0x01,0x06,0x0c,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx8 s[92:99], s[2:3], s0
|
|
// CHECK: [0x01,0x17,0x0c,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx8 s[20:27], s[4:5], s0
|
|
// CHECK: [0x02,0x05,0x0c,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx8 s[20:27], s[100:101], s0
|
|
// CHECK: [0x32,0x05,0x0c,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx8 s[20:27], flat_scratch, s0
|
|
// CHECK: [0x33,0x05,0x0c,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx8 s[20:27], vcc, s0
|
|
// CHECK: [0x35,0x05,0x0c,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx8 s[20:27], s[2:3], s101
|
|
// CHECK: [0x01,0x05,0x0c,0xc0,0x65,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx8 s[20:27], s[2:3], flat_scratch_lo
|
|
// CHECK: [0x01,0x05,0x0c,0xc0,0x66,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx8 s[20:27], s[2:3], flat_scratch_hi
|
|
// CHECK: [0x01,0x05,0x0c,0xc0,0x67,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx8 s[20:27], s[2:3], vcc_lo
|
|
// CHECK: [0x01,0x05,0x0c,0xc0,0x6a,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx8 s[20:27], s[2:3], vcc_hi
|
|
// CHECK: [0x01,0x05,0x0c,0xc0,0x6b,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx8 s[20:27], s[2:3], m0
|
|
// CHECK: [0x01,0x05,0x0c,0xc0,0x7c,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx8 s[20:27], s[2:3], 0x0
|
|
// CHECK: [0x01,0x05,0x0e,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx8 s[20:27], s[2:3], s0 glc
|
|
// CHECK: [0x01,0x05,0x0d,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx16 s[20:35], s[2:3], s0
|
|
// CHECK: [0x01,0x05,0x10,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx16 s[24:39], s[2:3], s0
|
|
// CHECK: [0x01,0x06,0x10,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx16 s[84:99], s[2:3], s0
|
|
// CHECK: [0x01,0x15,0x10,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx16 s[20:35], s[4:5], s0
|
|
// CHECK: [0x02,0x05,0x10,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx16 s[20:35], s[100:101], s0
|
|
// CHECK: [0x32,0x05,0x10,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx16 s[20:35], flat_scratch, s0
|
|
// CHECK: [0x33,0x05,0x10,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx16 s[20:35], vcc, s0
|
|
// CHECK: [0x35,0x05,0x10,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx16 s[20:35], s[2:3], s101
|
|
// CHECK: [0x01,0x05,0x10,0xc0,0x65,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx16 s[20:35], s[2:3], flat_scratch_lo
|
|
// CHECK: [0x01,0x05,0x10,0xc0,0x66,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx16 s[20:35], s[2:3], flat_scratch_hi
|
|
// CHECK: [0x01,0x05,0x10,0xc0,0x67,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx16 s[20:35], s[2:3], vcc_lo
|
|
// CHECK: [0x01,0x05,0x10,0xc0,0x6a,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx16 s[20:35], s[2:3], vcc_hi
|
|
// CHECK: [0x01,0x05,0x10,0xc0,0x6b,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx16 s[20:35], s[2:3], m0
|
|
// CHECK: [0x01,0x05,0x10,0xc0,0x7c,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx16 s[20:35], s[2:3], 0x0
|
|
// CHECK: [0x01,0x05,0x12,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_load_dwordx16 s[20:35], s[2:3], s0 glc
|
|
// CHECK: [0x01,0x05,0x11,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dword s5, s[4:7], s0
|
|
// CHECK: [0x42,0x01,0x20,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dword s101, s[4:7], s0
|
|
// CHECK: [0x42,0x19,0x20,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dword flat_scratch_lo, s[4:7], s0
|
|
// CHECK: [0x82,0x19,0x20,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dword flat_scratch_hi, s[4:7], s0
|
|
// CHECK: [0xc2,0x19,0x20,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dword vcc_lo, s[4:7], s0
|
|
// CHECK: [0x82,0x1a,0x20,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dword vcc_hi, s[4:7], s0
|
|
// CHECK: [0xc2,0x1a,0x20,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dword s5, s[8:11], s0
|
|
// CHECK: [0x44,0x01,0x20,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dword s5, s[96:99], s0
|
|
// CHECK: [0x70,0x01,0x20,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dword s5, s[4:7], s101
|
|
// CHECK: [0x42,0x01,0x20,0xc0,0x65,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dword s5, s[4:7], flat_scratch_lo
|
|
// CHECK: [0x42,0x01,0x20,0xc0,0x66,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dword s5, s[4:7], flat_scratch_hi
|
|
// CHECK: [0x42,0x01,0x20,0xc0,0x67,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dword s5, s[4:7], vcc_lo
|
|
// CHECK: [0x42,0x01,0x20,0xc0,0x6a,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dword s5, s[4:7], vcc_hi
|
|
// CHECK: [0x42,0x01,0x20,0xc0,0x6b,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dword s5, s[4:7], m0
|
|
// CHECK: [0x42,0x01,0x20,0xc0,0x7c,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dword s5, s[4:7], 0x0
|
|
// CHECK: [0x42,0x01,0x22,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dword s5, s[4:7], s0 glc
|
|
// CHECK: [0x42,0x01,0x21,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx2 s[10:11], s[4:7], s0
|
|
// CHECK: [0x82,0x02,0x24,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx2 s[12:13], s[4:7], s0
|
|
// CHECK: [0x02,0x03,0x24,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx2 s[100:101], s[4:7], s0
|
|
// CHECK: [0x02,0x19,0x24,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx2 flat_scratch, s[4:7], s0
|
|
// CHECK: [0x82,0x19,0x24,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx2 vcc, s[4:7], s0
|
|
// CHECK: [0x82,0x1a,0x24,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx2 s[10:11], s[8:11], s0
|
|
// CHECK: [0x84,0x02,0x24,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx2 s[10:11], s[96:99], s0
|
|
// CHECK: [0xb0,0x02,0x24,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx2 s[10:11], s[4:7], s101
|
|
// CHECK: [0x82,0x02,0x24,0xc0,0x65,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx2 s[10:11], s[4:7], flat_scratch_lo
|
|
// CHECK: [0x82,0x02,0x24,0xc0,0x66,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx2 s[10:11], s[4:7], flat_scratch_hi
|
|
// CHECK: [0x82,0x02,0x24,0xc0,0x67,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx2 s[10:11], s[4:7], vcc_lo
|
|
// CHECK: [0x82,0x02,0x24,0xc0,0x6a,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx2 s[10:11], s[4:7], vcc_hi
|
|
// CHECK: [0x82,0x02,0x24,0xc0,0x6b,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx2 s[10:11], s[4:7], m0
|
|
// CHECK: [0x82,0x02,0x24,0xc0,0x7c,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx2 s[10:11], s[4:7], 0x0
|
|
// CHECK: [0x82,0x02,0x26,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx2 s[10:11], s[4:7], s0 glc
|
|
// CHECK: [0x82,0x02,0x25,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx4 s[20:23], s[4:7], s0
|
|
// CHECK: [0x02,0x05,0x28,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx4 s[24:27], s[4:7], s0
|
|
// CHECK: [0x02,0x06,0x28,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx4 s[96:99], s[4:7], s0
|
|
// CHECK: [0x02,0x18,0x28,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx4 s[20:23], s[8:11], s0
|
|
// CHECK: [0x04,0x05,0x28,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx4 s[20:23], s[96:99], s0
|
|
// CHECK: [0x30,0x05,0x28,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx4 s[20:23], s[4:7], s101
|
|
// CHECK: [0x02,0x05,0x28,0xc0,0x65,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx4 s[20:23], s[4:7], flat_scratch_lo
|
|
// CHECK: [0x02,0x05,0x28,0xc0,0x66,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx4 s[20:23], s[4:7], flat_scratch_hi
|
|
// CHECK: [0x02,0x05,0x28,0xc0,0x67,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx4 s[20:23], s[4:7], vcc_lo
|
|
// CHECK: [0x02,0x05,0x28,0xc0,0x6a,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx4 s[20:23], s[4:7], vcc_hi
|
|
// CHECK: [0x02,0x05,0x28,0xc0,0x6b,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx4 s[20:23], s[4:7], m0
|
|
// CHECK: [0x02,0x05,0x28,0xc0,0x7c,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx4 s[20:23], s[4:7], 0x0
|
|
// CHECK: [0x02,0x05,0x2a,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx4 s[20:23], s[4:7], s0 glc
|
|
// CHECK: [0x02,0x05,0x29,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx8 s[20:27], s[4:7], s0
|
|
// CHECK: [0x02,0x05,0x2c,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx8 s[24:31], s[4:7], s0
|
|
// CHECK: [0x02,0x06,0x2c,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx8 s[92:99], s[4:7], s0
|
|
// CHECK: [0x02,0x17,0x2c,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx8 s[20:27], s[8:11], s0
|
|
// CHECK: [0x04,0x05,0x2c,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx8 s[20:27], s[96:99], s0
|
|
// CHECK: [0x30,0x05,0x2c,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx8 s[20:27], s[4:7], s101
|
|
// CHECK: [0x02,0x05,0x2c,0xc0,0x65,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx8 s[20:27], s[4:7], flat_scratch_lo
|
|
// CHECK: [0x02,0x05,0x2c,0xc0,0x66,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx8 s[20:27], s[4:7], flat_scratch_hi
|
|
// CHECK: [0x02,0x05,0x2c,0xc0,0x67,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx8 s[20:27], s[4:7], vcc_lo
|
|
// CHECK: [0x02,0x05,0x2c,0xc0,0x6a,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx8 s[20:27], s[4:7], vcc_hi
|
|
// CHECK: [0x02,0x05,0x2c,0xc0,0x6b,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx8 s[20:27], s[4:7], m0
|
|
// CHECK: [0x02,0x05,0x2c,0xc0,0x7c,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx8 s[20:27], s[4:7], 0x0
|
|
// CHECK: [0x02,0x05,0x2e,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx8 s[20:27], s[4:7], s0 glc
|
|
// CHECK: [0x02,0x05,0x2d,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx16 s[20:35], s[4:7], s0
|
|
// CHECK: [0x02,0x05,0x30,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx16 s[24:39], s[4:7], s0
|
|
// CHECK: [0x02,0x06,0x30,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx16 s[84:99], s[4:7], s0
|
|
// CHECK: [0x02,0x15,0x30,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx16 s[20:35], s[8:11], s0
|
|
// CHECK: [0x04,0x05,0x30,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx16 s[20:35], s[96:99], s0
|
|
// CHECK: [0x30,0x05,0x30,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx16 s[20:35], s[4:7], s101
|
|
// CHECK: [0x02,0x05,0x30,0xc0,0x65,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx16 s[20:35], s[4:7], flat_scratch_lo
|
|
// CHECK: [0x02,0x05,0x30,0xc0,0x66,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx16 s[20:35], s[4:7], flat_scratch_hi
|
|
// CHECK: [0x02,0x05,0x30,0xc0,0x67,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx16 s[20:35], s[4:7], vcc_lo
|
|
// CHECK: [0x02,0x05,0x30,0xc0,0x6a,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx16 s[20:35], s[4:7], vcc_hi
|
|
// CHECK: [0x02,0x05,0x30,0xc0,0x6b,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx16 s[20:35], s[4:7], m0
|
|
// CHECK: [0x02,0x05,0x30,0xc0,0x7c,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx16 s[20:35], s[4:7], 0x0
|
|
// CHECK: [0x02,0x05,0x32,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_load_dwordx16 s[20:35], s[4:7], s0 glc
|
|
// CHECK: [0x02,0x05,0x31,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dword s1, s[4:5], s0
|
|
// CHECK: [0x42,0x00,0x40,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dword s101, s[4:5], s0
|
|
// CHECK: [0x42,0x19,0x40,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dword flat_scratch_lo, s[4:5], s0
|
|
// CHECK: [0x82,0x19,0x40,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dword flat_scratch_hi, s[4:5], s0
|
|
// CHECK: [0xc2,0x19,0x40,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dword vcc_lo, s[4:5], s0
|
|
// CHECK: [0x82,0x1a,0x40,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dword vcc_hi, s[4:5], s0
|
|
// CHECK: [0xc2,0x1a,0x40,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dword s1, s[6:7], s0
|
|
// CHECK: [0x43,0x00,0x40,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dword s1, s[100:101], s0
|
|
// CHECK: [0x72,0x00,0x40,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dword s1, flat_scratch, s0
|
|
// CHECK: [0x73,0x00,0x40,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dword s1, vcc, s0
|
|
// CHECK: [0x75,0x00,0x40,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dword s1, s[4:5], s101
|
|
// CHECK: [0x42,0x00,0x40,0xc0,0x65,0x00,0x00,0x00]
|
|
|
|
s_store_dword s1, s[4:5], flat_scratch_lo
|
|
// CHECK: [0x42,0x00,0x40,0xc0,0x66,0x00,0x00,0x00]
|
|
|
|
s_store_dword s1, s[4:5], flat_scratch_hi
|
|
// CHECK: [0x42,0x00,0x40,0xc0,0x67,0x00,0x00,0x00]
|
|
|
|
s_store_dword s1, s[4:5], vcc_lo
|
|
// CHECK: [0x42,0x00,0x40,0xc0,0x6a,0x00,0x00,0x00]
|
|
|
|
s_store_dword s1, s[4:5], vcc_hi
|
|
// CHECK: [0x42,0x00,0x40,0xc0,0x6b,0x00,0x00,0x00]
|
|
|
|
s_store_dword s1, s[4:5], m0
|
|
// CHECK: [0x42,0x00,0x40,0xc0,0x7c,0x00,0x00,0x00]
|
|
|
|
s_store_dword s1, s[4:5], 0x0
|
|
// CHECK: [0x42,0x00,0x42,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dword s1, s[4:5], s0 glc
|
|
// CHECK: [0x42,0x00,0x41,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 s[2:3], s[4:5], s0
|
|
// CHECK: [0x82,0x00,0x44,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 s[4:5], s[4:5], s0
|
|
// CHECK: [0x02,0x01,0x44,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 s[100:101], s[4:5], s0
|
|
// CHECK: [0x02,0x19,0x44,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 flat_scratch, s[4:5], s0
|
|
// CHECK: [0x82,0x19,0x44,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 vcc, s[4:5], s0
|
|
// CHECK: [0x82,0x1a,0x44,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 s[2:3], s[6:7], s0
|
|
// CHECK: [0x83,0x00,0x44,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 s[2:3], s[100:101], s0
|
|
// CHECK: [0xb2,0x00,0x44,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 s[2:3], flat_scratch, s0
|
|
// CHECK: [0xb3,0x00,0x44,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 s[2:3], vcc, s0
|
|
// CHECK: [0xb5,0x00,0x44,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 s[2:3], s[4:5], s101
|
|
// CHECK: [0x82,0x00,0x44,0xc0,0x65,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 s[2:3], s[4:5], flat_scratch_lo
|
|
// CHECK: [0x82,0x00,0x44,0xc0,0x66,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 s[2:3], s[4:5], flat_scratch_hi
|
|
// CHECK: [0x82,0x00,0x44,0xc0,0x67,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 s[2:3], s[4:5], vcc_lo
|
|
// CHECK: [0x82,0x00,0x44,0xc0,0x6a,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 s[2:3], s[4:5], vcc_hi
|
|
// CHECK: [0x82,0x00,0x44,0xc0,0x6b,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 s[2:3], s[4:5], m0
|
|
// CHECK: [0x82,0x00,0x44,0xc0,0x7c,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 s[2:3], s[4:5], 0x0
|
|
// CHECK: [0x82,0x00,0x46,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx2 s[2:3], s[4:5], s0 glc
|
|
// CHECK: [0x82,0x00,0x45,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx4 s[4:7], s[4:5], s0
|
|
// CHECK: [0x02,0x01,0x48,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx4 s[8:11], s[4:5], s0
|
|
// CHECK: [0x02,0x02,0x48,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx4 s[96:99], s[4:5], s0
|
|
// CHECK: [0x02,0x18,0x48,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx4 s[4:7], s[6:7], s0
|
|
// CHECK: [0x03,0x01,0x48,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx4 s[4:7], s[100:101], s0
|
|
// CHECK: [0x32,0x01,0x48,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx4 s[4:7], flat_scratch, s0
|
|
// CHECK: [0x33,0x01,0x48,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx4 s[4:7], vcc, s0
|
|
// CHECK: [0x35,0x01,0x48,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx4 s[4:7], s[4:5], s101
|
|
// CHECK: [0x02,0x01,0x48,0xc0,0x65,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx4 s[4:7], s[4:5], flat_scratch_lo
|
|
// CHECK: [0x02,0x01,0x48,0xc0,0x66,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx4 s[4:7], s[4:5], flat_scratch_hi
|
|
// CHECK: [0x02,0x01,0x48,0xc0,0x67,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx4 s[4:7], s[4:5], vcc_lo
|
|
// CHECK: [0x02,0x01,0x48,0xc0,0x6a,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx4 s[4:7], s[4:5], vcc_hi
|
|
// CHECK: [0x02,0x01,0x48,0xc0,0x6b,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx4 s[4:7], s[4:5], m0
|
|
// CHECK: [0x02,0x01,0x48,0xc0,0x7c,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx4 s[4:7], s[4:5], 0x0
|
|
// CHECK: [0x02,0x01,0x4a,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_store_dwordx4 s[4:7], s[4:5], s0 glc
|
|
// CHECK: [0x02,0x01,0x49,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dword s1, s[8:11], s0
|
|
// CHECK: [0x44,0x00,0x60,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dword s101, s[8:11], s0
|
|
// CHECK: [0x44,0x19,0x60,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dword flat_scratch_lo, s[8:11], s0
|
|
// CHECK: [0x84,0x19,0x60,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dword flat_scratch_hi, s[8:11], s0
|
|
// CHECK: [0xc4,0x19,0x60,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dword vcc_lo, s[8:11], s0
|
|
// CHECK: [0x84,0x1a,0x60,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dword vcc_hi, s[8:11], s0
|
|
// CHECK: [0xc4,0x1a,0x60,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dword s1, s[12:15], s0
|
|
// CHECK: [0x46,0x00,0x60,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dword s1, s[96:99], s0
|
|
// CHECK: [0x70,0x00,0x60,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dword s1, s[8:11], s101
|
|
// CHECK: [0x44,0x00,0x60,0xc0,0x65,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dword s1, s[8:11], flat_scratch_lo
|
|
// CHECK: [0x44,0x00,0x60,0xc0,0x66,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dword s1, s[8:11], flat_scratch_hi
|
|
// CHECK: [0x44,0x00,0x60,0xc0,0x67,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dword s1, s[8:11], vcc_lo
|
|
// CHECK: [0x44,0x00,0x60,0xc0,0x6a,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dword s1, s[8:11], vcc_hi
|
|
// CHECK: [0x44,0x00,0x60,0xc0,0x6b,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dword s1, s[8:11], m0
|
|
// CHECK: [0x44,0x00,0x60,0xc0,0x7c,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dword s1, s[8:11], 0x0
|
|
// CHECK: [0x44,0x00,0x62,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dword s1, s[8:11], s0 glc
|
|
// CHECK: [0x44,0x00,0x61,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx2 s[2:3], s[8:11], s0
|
|
// CHECK: [0x84,0x00,0x64,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx2 s[4:5], s[8:11], s0
|
|
// CHECK: [0x04,0x01,0x64,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx2 s[100:101], s[8:11], s0
|
|
// CHECK: [0x04,0x19,0x64,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx2 flat_scratch, s[8:11], s0
|
|
// CHECK: [0x84,0x19,0x64,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx2 vcc, s[8:11], s0
|
|
// CHECK: [0x84,0x1a,0x64,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx2 s[2:3], s[12:15], s0
|
|
// CHECK: [0x86,0x00,0x64,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx2 s[2:3], s[96:99], s0
|
|
// CHECK: [0xb0,0x00,0x64,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx2 s[2:3], s[8:11], s101
|
|
// CHECK: [0x84,0x00,0x64,0xc0,0x65,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx2 s[2:3], s[8:11], flat_scratch_lo
|
|
// CHECK: [0x84,0x00,0x64,0xc0,0x66,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx2 s[2:3], s[8:11], flat_scratch_hi
|
|
// CHECK: [0x84,0x00,0x64,0xc0,0x67,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx2 s[2:3], s[8:11], vcc_lo
|
|
// CHECK: [0x84,0x00,0x64,0xc0,0x6a,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx2 s[2:3], s[8:11], vcc_hi
|
|
// CHECK: [0x84,0x00,0x64,0xc0,0x6b,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx2 s[2:3], s[8:11], m0
|
|
// CHECK: [0x84,0x00,0x64,0xc0,0x7c,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx2 s[2:3], s[8:11], 0x0
|
|
// CHECK: [0x84,0x00,0x66,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx2 s[2:3], s[8:11], s0 glc
|
|
// CHECK: [0x84,0x00,0x65,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx4 s[4:7], s[8:11], s0
|
|
// CHECK: [0x04,0x01,0x68,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx4 s[8:11], s[8:11], s0
|
|
// CHECK: [0x04,0x02,0x68,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx4 s[96:99], s[8:11], s0
|
|
// CHECK: [0x04,0x18,0x68,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx4 s[4:7], s[12:15], s0
|
|
// CHECK: [0x06,0x01,0x68,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx4 s[4:7], s[96:99], s0
|
|
// CHECK: [0x30,0x01,0x68,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx4 s[4:7], s[8:11], s101
|
|
// CHECK: [0x04,0x01,0x68,0xc0,0x65,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx4 s[4:7], s[8:11], flat_scratch_lo
|
|
// CHECK: [0x04,0x01,0x68,0xc0,0x66,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx4 s[4:7], s[8:11], flat_scratch_hi
|
|
// CHECK: [0x04,0x01,0x68,0xc0,0x67,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx4 s[4:7], s[8:11], vcc_lo
|
|
// CHECK: [0x04,0x01,0x68,0xc0,0x6a,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx4 s[4:7], s[8:11], vcc_hi
|
|
// CHECK: [0x04,0x01,0x68,0xc0,0x6b,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx4 s[4:7], s[8:11], m0
|
|
// CHECK: [0x04,0x01,0x68,0xc0,0x7c,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx4 s[4:7], s[8:11], 0x0
|
|
// CHECK: [0x04,0x01,0x6a,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_buffer_store_dwordx4 s[4:7], s[8:11], s0 glc
|
|
// CHECK: [0x04,0x01,0x69,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_dcache_inv
|
|
// CHECK: [0x00,0x00,0x80,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_dcache_wb
|
|
// CHECK: [0x00,0x00,0x84,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_dcache_inv_vol
|
|
// CHECK: [0x00,0x00,0x88,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_dcache_wb_vol
|
|
// CHECK: [0x00,0x00,0x8c,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_memtime s[10:11]
|
|
// CHECK: [0x80,0x02,0x90,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_memtime s[12:13]
|
|
// CHECK: [0x00,0x03,0x90,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_memtime s[100:101]
|
|
// CHECK: [0x00,0x19,0x90,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_memtime flat_scratch
|
|
// CHECK: [0x80,0x19,0x90,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_memtime vcc
|
|
// CHECK: [0x80,0x1a,0x90,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_memrealtime s[10:11]
|
|
// CHECK: [0x80,0x02,0x94,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_memrealtime s[12:13]
|
|
// CHECK: [0x00,0x03,0x94,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_memrealtime s[100:101]
|
|
// CHECK: [0x00,0x19,0x94,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_memrealtime flat_scratch
|
|
// CHECK: [0x80,0x19,0x94,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_memrealtime vcc
|
|
// CHECK: [0x80,0x1a,0x94,0xc0,0x00,0x00,0x00,0x00]
|
|
|
|
s_mov_b32 s5, s1
|
|
// CHECK: [0x01,0x00,0x85,0xbe]
|
|
|
|
s_mov_b32 s101, s1
|
|
// CHECK: [0x01,0x00,0xe5,0xbe]
|
|
|
|
s_mov_b32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x00,0xe6,0xbe]
|
|
|
|
s_mov_b32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x00,0xe7,0xbe]
|
|
|
|
s_mov_b32 vcc_lo, s1
|
|
// CHECK: [0x01,0x00,0xea,0xbe]
|
|
|
|
s_mov_b32 vcc_hi, s1
|
|
// CHECK: [0x01,0x00,0xeb,0xbe]
|
|
|
|
s_mov_b32 m0, s1
|
|
// CHECK: [0x01,0x00,0xfc,0xbe]
|
|
|
|
s_mov_b32 exec_lo, s1
|
|
// CHECK: [0x01,0x00,0xfe,0xbe]
|
|
|
|
s_mov_b32 exec_hi, s1
|
|
// CHECK: [0x01,0x00,0xff,0xbe]
|
|
|
|
s_mov_b32 s5, s101
|
|
// CHECK: [0x65,0x00,0x85,0xbe]
|
|
|
|
s_mov_b32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x00,0x85,0xbe]
|
|
|
|
s_mov_b32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x00,0x85,0xbe]
|
|
|
|
s_mov_b32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x00,0x85,0xbe]
|
|
|
|
s_mov_b32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x00,0x85,0xbe]
|
|
|
|
s_mov_b32 s5, m0
|
|
// CHECK: [0x7c,0x00,0x85,0xbe]
|
|
|
|
s_mov_b32 s5, exec_lo
|
|
// CHECK: [0x7e,0x00,0x85,0xbe]
|
|
|
|
s_mov_b32 s5, exec_hi
|
|
// CHECK: [0x7f,0x00,0x85,0xbe]
|
|
|
|
s_mov_b32 s5, 0
|
|
// CHECK: [0x80,0x00,0x85,0xbe]
|
|
|
|
s_mov_b32 s5, -1
|
|
// CHECK: [0xc1,0x00,0x85,0xbe]
|
|
|
|
s_mov_b32 s5, 0.5
|
|
// CHECK: [0xf0,0x00,0x85,0xbe]
|
|
|
|
s_mov_b32 s5, -4.0
|
|
// CHECK: [0xf7,0x00,0x85,0xbe]
|
|
|
|
s_mov_b32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x00,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_mov_b32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x00,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_mov_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x01,0x8a,0xbe]
|
|
|
|
s_mov_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x01,0x8c,0xbe]
|
|
|
|
s_mov_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x01,0xe4,0xbe]
|
|
|
|
s_mov_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x01,0xe6,0xbe]
|
|
|
|
s_mov_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x01,0xea,0xbe]
|
|
|
|
s_mov_b64 exec, s[2:3]
|
|
// CHECK: [0x02,0x01,0xfe,0xbe]
|
|
|
|
s_mov_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x01,0x8a,0xbe]
|
|
|
|
s_mov_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x01,0x8a,0xbe]
|
|
|
|
s_mov_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x01,0x8a,0xbe]
|
|
|
|
s_mov_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x01,0x8a,0xbe]
|
|
|
|
s_mov_b64 s[10:11], exec
|
|
// CHECK: [0x7e,0x01,0x8a,0xbe]
|
|
|
|
s_mov_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x01,0x8a,0xbe]
|
|
|
|
s_mov_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x01,0x8a,0xbe]
|
|
|
|
s_mov_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x01,0x8a,0xbe]
|
|
|
|
s_mov_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x01,0x8a,0xbe]
|
|
|
|
s_mov_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x01,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_mov_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x01,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmov_b32 s5, s1
|
|
// CHECK: [0x01,0x02,0x85,0xbe]
|
|
|
|
s_cmov_b32 s101, s1
|
|
// CHECK: [0x01,0x02,0xe5,0xbe]
|
|
|
|
s_cmov_b32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x02,0xe6,0xbe]
|
|
|
|
s_cmov_b32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x02,0xe7,0xbe]
|
|
|
|
s_cmov_b32 vcc_lo, s1
|
|
// CHECK: [0x01,0x02,0xea,0xbe]
|
|
|
|
s_cmov_b32 vcc_hi, s1
|
|
// CHECK: [0x01,0x02,0xeb,0xbe]
|
|
|
|
s_cmov_b32 m0, s1
|
|
// CHECK: [0x01,0x02,0xfc,0xbe]
|
|
|
|
s_cmov_b32 exec_lo, s1
|
|
// CHECK: [0x01,0x02,0xfe,0xbe]
|
|
|
|
s_cmov_b32 exec_hi, s1
|
|
// CHECK: [0x01,0x02,0xff,0xbe]
|
|
|
|
s_cmov_b32 s5, s101
|
|
// CHECK: [0x65,0x02,0x85,0xbe]
|
|
|
|
s_cmov_b32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x02,0x85,0xbe]
|
|
|
|
s_cmov_b32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x02,0x85,0xbe]
|
|
|
|
s_cmov_b32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x02,0x85,0xbe]
|
|
|
|
s_cmov_b32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x02,0x85,0xbe]
|
|
|
|
s_cmov_b32 s5, m0
|
|
// CHECK: [0x7c,0x02,0x85,0xbe]
|
|
|
|
s_cmov_b32 s5, exec_lo
|
|
// CHECK: [0x7e,0x02,0x85,0xbe]
|
|
|
|
s_cmov_b32 s5, exec_hi
|
|
// CHECK: [0x7f,0x02,0x85,0xbe]
|
|
|
|
s_cmov_b32 s5, 0
|
|
// CHECK: [0x80,0x02,0x85,0xbe]
|
|
|
|
s_cmov_b32 s5, -1
|
|
// CHECK: [0xc1,0x02,0x85,0xbe]
|
|
|
|
s_cmov_b32 s5, 0.5
|
|
// CHECK: [0xf0,0x02,0x85,0xbe]
|
|
|
|
s_cmov_b32 s5, -4.0
|
|
// CHECK: [0xf7,0x02,0x85,0xbe]
|
|
|
|
s_cmov_b32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x02,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmov_b32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x02,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmov_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x03,0x8a,0xbe]
|
|
|
|
s_cmov_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x03,0x8c,0xbe]
|
|
|
|
s_cmov_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x03,0xe4,0xbe]
|
|
|
|
s_cmov_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x03,0xe6,0xbe]
|
|
|
|
s_cmov_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x03,0xea,0xbe]
|
|
|
|
s_cmov_b64 exec, s[2:3]
|
|
// CHECK: [0x02,0x03,0xfe,0xbe]
|
|
|
|
s_cmov_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x03,0x8a,0xbe]
|
|
|
|
s_cmov_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x03,0x8a,0xbe]
|
|
|
|
s_cmov_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x03,0x8a,0xbe]
|
|
|
|
s_cmov_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x03,0x8a,0xbe]
|
|
|
|
s_cmov_b64 s[10:11], exec
|
|
// CHECK: [0x7e,0x03,0x8a,0xbe]
|
|
|
|
s_cmov_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x03,0x8a,0xbe]
|
|
|
|
s_cmov_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x03,0x8a,0xbe]
|
|
|
|
s_cmov_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x03,0x8a,0xbe]
|
|
|
|
s_cmov_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x03,0x8a,0xbe]
|
|
|
|
s_cmov_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x03,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmov_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x03,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_not_b32 s5, s1
|
|
// CHECK: [0x01,0x04,0x85,0xbe]
|
|
|
|
s_not_b32 s101, s1
|
|
// CHECK: [0x01,0x04,0xe5,0xbe]
|
|
|
|
s_not_b32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x04,0xe6,0xbe]
|
|
|
|
s_not_b32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x04,0xe7,0xbe]
|
|
|
|
s_not_b32 vcc_lo, s1
|
|
// CHECK: [0x01,0x04,0xea,0xbe]
|
|
|
|
s_not_b32 vcc_hi, s1
|
|
// CHECK: [0x01,0x04,0xeb,0xbe]
|
|
|
|
s_not_b32 m0, s1
|
|
// CHECK: [0x01,0x04,0xfc,0xbe]
|
|
|
|
s_not_b32 exec_lo, s1
|
|
// CHECK: [0x01,0x04,0xfe,0xbe]
|
|
|
|
s_not_b32 exec_hi, s1
|
|
// CHECK: [0x01,0x04,0xff,0xbe]
|
|
|
|
s_not_b32 s5, s101
|
|
// CHECK: [0x65,0x04,0x85,0xbe]
|
|
|
|
s_not_b32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x04,0x85,0xbe]
|
|
|
|
s_not_b32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x04,0x85,0xbe]
|
|
|
|
s_not_b32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x04,0x85,0xbe]
|
|
|
|
s_not_b32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x04,0x85,0xbe]
|
|
|
|
s_not_b32 s5, m0
|
|
// CHECK: [0x7c,0x04,0x85,0xbe]
|
|
|
|
s_not_b32 s5, exec_lo
|
|
// CHECK: [0x7e,0x04,0x85,0xbe]
|
|
|
|
s_not_b32 s5, exec_hi
|
|
// CHECK: [0x7f,0x04,0x85,0xbe]
|
|
|
|
s_not_b32 s5, 0
|
|
// CHECK: [0x80,0x04,0x85,0xbe]
|
|
|
|
s_not_b32 s5, -1
|
|
// CHECK: [0xc1,0x04,0x85,0xbe]
|
|
|
|
s_not_b32 s5, 0.5
|
|
// CHECK: [0xf0,0x04,0x85,0xbe]
|
|
|
|
s_not_b32 s5, -4.0
|
|
// CHECK: [0xf7,0x04,0x85,0xbe]
|
|
|
|
s_not_b32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x04,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_not_b32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x04,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_not_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x05,0x8a,0xbe]
|
|
|
|
s_not_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x05,0x8c,0xbe]
|
|
|
|
s_not_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x05,0xe4,0xbe]
|
|
|
|
s_not_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x05,0xe6,0xbe]
|
|
|
|
s_not_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x05,0xea,0xbe]
|
|
|
|
s_not_b64 exec, s[2:3]
|
|
// CHECK: [0x02,0x05,0xfe,0xbe]
|
|
|
|
s_not_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x05,0x8a,0xbe]
|
|
|
|
s_not_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x05,0x8a,0xbe]
|
|
|
|
s_not_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x05,0x8a,0xbe]
|
|
|
|
s_not_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x05,0x8a,0xbe]
|
|
|
|
s_not_b64 s[10:11], exec
|
|
// CHECK: [0x7e,0x05,0x8a,0xbe]
|
|
|
|
s_not_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x05,0x8a,0xbe]
|
|
|
|
s_not_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x05,0x8a,0xbe]
|
|
|
|
s_not_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x05,0x8a,0xbe]
|
|
|
|
s_not_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x05,0x8a,0xbe]
|
|
|
|
s_not_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x05,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_not_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x05,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_wqm_b32 s5, s1
|
|
// CHECK: [0x01,0x06,0x85,0xbe]
|
|
|
|
s_wqm_b32 s101, s1
|
|
// CHECK: [0x01,0x06,0xe5,0xbe]
|
|
|
|
s_wqm_b32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x06,0xe6,0xbe]
|
|
|
|
s_wqm_b32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x06,0xe7,0xbe]
|
|
|
|
s_wqm_b32 vcc_lo, s1
|
|
// CHECK: [0x01,0x06,0xea,0xbe]
|
|
|
|
s_wqm_b32 vcc_hi, s1
|
|
// CHECK: [0x01,0x06,0xeb,0xbe]
|
|
|
|
s_wqm_b32 m0, s1
|
|
// CHECK: [0x01,0x06,0xfc,0xbe]
|
|
|
|
s_wqm_b32 exec_lo, s1
|
|
// CHECK: [0x01,0x06,0xfe,0xbe]
|
|
|
|
s_wqm_b32 exec_hi, s1
|
|
// CHECK: [0x01,0x06,0xff,0xbe]
|
|
|
|
s_wqm_b32 s5, s101
|
|
// CHECK: [0x65,0x06,0x85,0xbe]
|
|
|
|
s_wqm_b32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x06,0x85,0xbe]
|
|
|
|
s_wqm_b32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x06,0x85,0xbe]
|
|
|
|
s_wqm_b32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x06,0x85,0xbe]
|
|
|
|
s_wqm_b32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x06,0x85,0xbe]
|
|
|
|
s_wqm_b32 s5, m0
|
|
// CHECK: [0x7c,0x06,0x85,0xbe]
|
|
|
|
s_wqm_b32 s5, exec_lo
|
|
// CHECK: [0x7e,0x06,0x85,0xbe]
|
|
|
|
s_wqm_b32 s5, exec_hi
|
|
// CHECK: [0x7f,0x06,0x85,0xbe]
|
|
|
|
s_wqm_b32 s5, 0
|
|
// CHECK: [0x80,0x06,0x85,0xbe]
|
|
|
|
s_wqm_b32 s5, -1
|
|
// CHECK: [0xc1,0x06,0x85,0xbe]
|
|
|
|
s_wqm_b32 s5, 0.5
|
|
// CHECK: [0xf0,0x06,0x85,0xbe]
|
|
|
|
s_wqm_b32 s5, -4.0
|
|
// CHECK: [0xf7,0x06,0x85,0xbe]
|
|
|
|
s_wqm_b32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x06,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_wqm_b32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x06,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_wqm_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x07,0x8a,0xbe]
|
|
|
|
s_wqm_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x07,0x8c,0xbe]
|
|
|
|
s_wqm_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x07,0xe4,0xbe]
|
|
|
|
s_wqm_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x07,0xe6,0xbe]
|
|
|
|
s_wqm_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x07,0xea,0xbe]
|
|
|
|
s_wqm_b64 exec, s[2:3]
|
|
// CHECK: [0x02,0x07,0xfe,0xbe]
|
|
|
|
s_wqm_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x07,0x8a,0xbe]
|
|
|
|
s_wqm_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x07,0x8a,0xbe]
|
|
|
|
s_wqm_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x07,0x8a,0xbe]
|
|
|
|
s_wqm_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x07,0x8a,0xbe]
|
|
|
|
s_wqm_b64 s[10:11], exec
|
|
// CHECK: [0x7e,0x07,0x8a,0xbe]
|
|
|
|
s_wqm_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x07,0x8a,0xbe]
|
|
|
|
s_wqm_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x07,0x8a,0xbe]
|
|
|
|
s_wqm_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x07,0x8a,0xbe]
|
|
|
|
s_wqm_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x07,0x8a,0xbe]
|
|
|
|
s_wqm_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x07,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_wqm_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x07,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_brev_b32 s5, s1
|
|
// CHECK: [0x01,0x08,0x85,0xbe]
|
|
|
|
s_brev_b32 s101, s1
|
|
// CHECK: [0x01,0x08,0xe5,0xbe]
|
|
|
|
s_brev_b32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x08,0xe6,0xbe]
|
|
|
|
s_brev_b32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x08,0xe7,0xbe]
|
|
|
|
s_brev_b32 vcc_lo, s1
|
|
// CHECK: [0x01,0x08,0xea,0xbe]
|
|
|
|
s_brev_b32 vcc_hi, s1
|
|
// CHECK: [0x01,0x08,0xeb,0xbe]
|
|
|
|
s_brev_b32 m0, s1
|
|
// CHECK: [0x01,0x08,0xfc,0xbe]
|
|
|
|
s_brev_b32 exec_lo, s1
|
|
// CHECK: [0x01,0x08,0xfe,0xbe]
|
|
|
|
s_brev_b32 exec_hi, s1
|
|
// CHECK: [0x01,0x08,0xff,0xbe]
|
|
|
|
s_brev_b32 s5, s101
|
|
// CHECK: [0x65,0x08,0x85,0xbe]
|
|
|
|
s_brev_b32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x08,0x85,0xbe]
|
|
|
|
s_brev_b32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x08,0x85,0xbe]
|
|
|
|
s_brev_b32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x08,0x85,0xbe]
|
|
|
|
s_brev_b32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x08,0x85,0xbe]
|
|
|
|
s_brev_b32 s5, m0
|
|
// CHECK: [0x7c,0x08,0x85,0xbe]
|
|
|
|
s_brev_b32 s5, exec_lo
|
|
// CHECK: [0x7e,0x08,0x85,0xbe]
|
|
|
|
s_brev_b32 s5, exec_hi
|
|
// CHECK: [0x7f,0x08,0x85,0xbe]
|
|
|
|
s_brev_b32 s5, 0
|
|
// CHECK: [0x80,0x08,0x85,0xbe]
|
|
|
|
s_brev_b32 s5, -1
|
|
// CHECK: [0xc1,0x08,0x85,0xbe]
|
|
|
|
s_brev_b32 s5, 0.5
|
|
// CHECK: [0xf0,0x08,0x85,0xbe]
|
|
|
|
s_brev_b32 s5, -4.0
|
|
// CHECK: [0xf7,0x08,0x85,0xbe]
|
|
|
|
s_brev_b32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x08,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_brev_b32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x08,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_brev_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x09,0x8a,0xbe]
|
|
|
|
s_brev_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x09,0x8c,0xbe]
|
|
|
|
s_brev_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x09,0xe4,0xbe]
|
|
|
|
s_brev_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x09,0xe6,0xbe]
|
|
|
|
s_brev_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x09,0xea,0xbe]
|
|
|
|
s_brev_b64 exec, s[2:3]
|
|
// CHECK: [0x02,0x09,0xfe,0xbe]
|
|
|
|
s_brev_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x09,0x8a,0xbe]
|
|
|
|
s_brev_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x09,0x8a,0xbe]
|
|
|
|
s_brev_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x09,0x8a,0xbe]
|
|
|
|
s_brev_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x09,0x8a,0xbe]
|
|
|
|
s_brev_b64 s[10:11], exec
|
|
// CHECK: [0x7e,0x09,0x8a,0xbe]
|
|
|
|
s_brev_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x09,0x8a,0xbe]
|
|
|
|
s_brev_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x09,0x8a,0xbe]
|
|
|
|
s_brev_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x09,0x8a,0xbe]
|
|
|
|
s_brev_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x09,0x8a,0xbe]
|
|
|
|
s_brev_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x09,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_brev_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x09,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bcnt0_i32_b32 s5, s1
|
|
// CHECK: [0x01,0x0a,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b32 s101, s1
|
|
// CHECK: [0x01,0x0a,0xe5,0xbe]
|
|
|
|
s_bcnt0_i32_b32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x0a,0xe6,0xbe]
|
|
|
|
s_bcnt0_i32_b32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x0a,0xe7,0xbe]
|
|
|
|
s_bcnt0_i32_b32 vcc_lo, s1
|
|
// CHECK: [0x01,0x0a,0xea,0xbe]
|
|
|
|
s_bcnt0_i32_b32 vcc_hi, s1
|
|
// CHECK: [0x01,0x0a,0xeb,0xbe]
|
|
|
|
s_bcnt0_i32_b32 m0, s1
|
|
// CHECK: [0x01,0x0a,0xfc,0xbe]
|
|
|
|
s_bcnt0_i32_b32 exec_lo, s1
|
|
// CHECK: [0x01,0x0a,0xfe,0xbe]
|
|
|
|
s_bcnt0_i32_b32 exec_hi, s1
|
|
// CHECK: [0x01,0x0a,0xff,0xbe]
|
|
|
|
s_bcnt0_i32_b32 s5, s101
|
|
// CHECK: [0x65,0x0a,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x0a,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x0a,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x0a,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x0a,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b32 s5, m0
|
|
// CHECK: [0x7c,0x0a,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b32 s5, exec_lo
|
|
// CHECK: [0x7e,0x0a,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b32 s5, exec_hi
|
|
// CHECK: [0x7f,0x0a,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b32 s5, 0
|
|
// CHECK: [0x80,0x0a,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b32 s5, -1
|
|
// CHECK: [0xc1,0x0a,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b32 s5, 0.5
|
|
// CHECK: [0xf0,0x0a,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b32 s5, -4.0
|
|
// CHECK: [0xf7,0x0a,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x0a,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bcnt0_i32_b32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x0a,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bcnt0_i32_b64 s5, s[2:3]
|
|
// CHECK: [0x02,0x0b,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b64 s101, s[2:3]
|
|
// CHECK: [0x02,0x0b,0xe5,0xbe]
|
|
|
|
s_bcnt0_i32_b64 flat_scratch_lo, s[2:3]
|
|
// CHECK: [0x02,0x0b,0xe6,0xbe]
|
|
|
|
s_bcnt0_i32_b64 flat_scratch_hi, s[2:3]
|
|
// CHECK: [0x02,0x0b,0xe7,0xbe]
|
|
|
|
s_bcnt0_i32_b64 vcc_lo, s[2:3]
|
|
// CHECK: [0x02,0x0b,0xea,0xbe]
|
|
|
|
s_bcnt0_i32_b64 vcc_hi, s[2:3]
|
|
// CHECK: [0x02,0x0b,0xeb,0xbe]
|
|
|
|
s_bcnt0_i32_b64 m0, s[2:3]
|
|
// CHECK: [0x02,0x0b,0xfc,0xbe]
|
|
|
|
s_bcnt0_i32_b64 exec_lo, s[2:3]
|
|
// CHECK: [0x02,0x0b,0xfe,0xbe]
|
|
|
|
s_bcnt0_i32_b64 exec_hi, s[2:3]
|
|
// CHECK: [0x02,0x0b,0xff,0xbe]
|
|
|
|
s_bcnt0_i32_b64 s5, s[4:5]
|
|
// CHECK: [0x04,0x0b,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b64 s5, s[100:101]
|
|
// CHECK: [0x64,0x0b,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b64 s5, flat_scratch
|
|
// CHECK: [0x66,0x0b,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b64 s5, vcc
|
|
// CHECK: [0x6a,0x0b,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b64 s5, exec
|
|
// CHECK: [0x7e,0x0b,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b64 s5, 0
|
|
// CHECK: [0x80,0x0b,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b64 s5, -1
|
|
// CHECK: [0xc1,0x0b,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b64 s5, 0.5
|
|
// CHECK: [0xf0,0x0b,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b64 s5, -4.0
|
|
// CHECK: [0xf7,0x0b,0x85,0xbe]
|
|
|
|
s_bcnt0_i32_b64 s5, 0xaf123456
|
|
// CHECK: [0xff,0x0b,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bcnt0_i32_b64 s5, 0x3f717273
|
|
// CHECK: [0xff,0x0b,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bcnt1_i32_b32 s5, s1
|
|
// CHECK: [0x01,0x0c,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b32 s101, s1
|
|
// CHECK: [0x01,0x0c,0xe5,0xbe]
|
|
|
|
s_bcnt1_i32_b32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x0c,0xe6,0xbe]
|
|
|
|
s_bcnt1_i32_b32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x0c,0xe7,0xbe]
|
|
|
|
s_bcnt1_i32_b32 vcc_lo, s1
|
|
// CHECK: [0x01,0x0c,0xea,0xbe]
|
|
|
|
s_bcnt1_i32_b32 vcc_hi, s1
|
|
// CHECK: [0x01,0x0c,0xeb,0xbe]
|
|
|
|
s_bcnt1_i32_b32 m0, s1
|
|
// CHECK: [0x01,0x0c,0xfc,0xbe]
|
|
|
|
s_bcnt1_i32_b32 exec_lo, s1
|
|
// CHECK: [0x01,0x0c,0xfe,0xbe]
|
|
|
|
s_bcnt1_i32_b32 exec_hi, s1
|
|
// CHECK: [0x01,0x0c,0xff,0xbe]
|
|
|
|
s_bcnt1_i32_b32 s5, s101
|
|
// CHECK: [0x65,0x0c,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x0c,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x0c,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x0c,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x0c,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b32 s5, m0
|
|
// CHECK: [0x7c,0x0c,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b32 s5, exec_lo
|
|
// CHECK: [0x7e,0x0c,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b32 s5, exec_hi
|
|
// CHECK: [0x7f,0x0c,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b32 s5, 0
|
|
// CHECK: [0x80,0x0c,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b32 s5, -1
|
|
// CHECK: [0xc1,0x0c,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b32 s5, 0.5
|
|
// CHECK: [0xf0,0x0c,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b32 s5, -4.0
|
|
// CHECK: [0xf7,0x0c,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x0c,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bcnt1_i32_b32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x0c,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bcnt1_i32_b64 s5, s[2:3]
|
|
// CHECK: [0x02,0x0d,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b64 s101, s[2:3]
|
|
// CHECK: [0x02,0x0d,0xe5,0xbe]
|
|
|
|
s_bcnt1_i32_b64 flat_scratch_lo, s[2:3]
|
|
// CHECK: [0x02,0x0d,0xe6,0xbe]
|
|
|
|
s_bcnt1_i32_b64 flat_scratch_hi, s[2:3]
|
|
// CHECK: [0x02,0x0d,0xe7,0xbe]
|
|
|
|
s_bcnt1_i32_b64 vcc_lo, s[2:3]
|
|
// CHECK: [0x02,0x0d,0xea,0xbe]
|
|
|
|
s_bcnt1_i32_b64 vcc_hi, s[2:3]
|
|
// CHECK: [0x02,0x0d,0xeb,0xbe]
|
|
|
|
s_bcnt1_i32_b64 m0, s[2:3]
|
|
// CHECK: [0x02,0x0d,0xfc,0xbe]
|
|
|
|
s_bcnt1_i32_b64 exec_lo, s[2:3]
|
|
// CHECK: [0x02,0x0d,0xfe,0xbe]
|
|
|
|
s_bcnt1_i32_b64 exec_hi, s[2:3]
|
|
// CHECK: [0x02,0x0d,0xff,0xbe]
|
|
|
|
s_bcnt1_i32_b64 s5, s[4:5]
|
|
// CHECK: [0x04,0x0d,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b64 s5, s[100:101]
|
|
// CHECK: [0x64,0x0d,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b64 s5, flat_scratch
|
|
// CHECK: [0x66,0x0d,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b64 s5, vcc
|
|
// CHECK: [0x6a,0x0d,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b64 s5, exec
|
|
// CHECK: [0x7e,0x0d,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b64 s5, 0
|
|
// CHECK: [0x80,0x0d,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b64 s5, -1
|
|
// CHECK: [0xc1,0x0d,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b64 s5, 0.5
|
|
// CHECK: [0xf0,0x0d,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b64 s5, -4.0
|
|
// CHECK: [0xf7,0x0d,0x85,0xbe]
|
|
|
|
s_bcnt1_i32_b64 s5, 0xaf123456
|
|
// CHECK: [0xff,0x0d,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bcnt1_i32_b64 s5, 0x3f717273
|
|
// CHECK: [0xff,0x0d,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_ff0_i32_b32 s5, s1
|
|
// CHECK: [0x01,0x0e,0x85,0xbe]
|
|
|
|
s_ff0_i32_b32 s101, s1
|
|
// CHECK: [0x01,0x0e,0xe5,0xbe]
|
|
|
|
s_ff0_i32_b32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x0e,0xe6,0xbe]
|
|
|
|
s_ff0_i32_b32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x0e,0xe7,0xbe]
|
|
|
|
s_ff0_i32_b32 vcc_lo, s1
|
|
// CHECK: [0x01,0x0e,0xea,0xbe]
|
|
|
|
s_ff0_i32_b32 vcc_hi, s1
|
|
// CHECK: [0x01,0x0e,0xeb,0xbe]
|
|
|
|
s_ff0_i32_b32 m0, s1
|
|
// CHECK: [0x01,0x0e,0xfc,0xbe]
|
|
|
|
s_ff0_i32_b32 exec_lo, s1
|
|
// CHECK: [0x01,0x0e,0xfe,0xbe]
|
|
|
|
s_ff0_i32_b32 exec_hi, s1
|
|
// CHECK: [0x01,0x0e,0xff,0xbe]
|
|
|
|
s_ff0_i32_b32 s5, s101
|
|
// CHECK: [0x65,0x0e,0x85,0xbe]
|
|
|
|
s_ff0_i32_b32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x0e,0x85,0xbe]
|
|
|
|
s_ff0_i32_b32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x0e,0x85,0xbe]
|
|
|
|
s_ff0_i32_b32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x0e,0x85,0xbe]
|
|
|
|
s_ff0_i32_b32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x0e,0x85,0xbe]
|
|
|
|
s_ff0_i32_b32 s5, m0
|
|
// CHECK: [0x7c,0x0e,0x85,0xbe]
|
|
|
|
s_ff0_i32_b32 s5, exec_lo
|
|
// CHECK: [0x7e,0x0e,0x85,0xbe]
|
|
|
|
s_ff0_i32_b32 s5, exec_hi
|
|
// CHECK: [0x7f,0x0e,0x85,0xbe]
|
|
|
|
s_ff0_i32_b32 s5, 0
|
|
// CHECK: [0x80,0x0e,0x85,0xbe]
|
|
|
|
s_ff0_i32_b32 s5, -1
|
|
// CHECK: [0xc1,0x0e,0x85,0xbe]
|
|
|
|
s_ff0_i32_b32 s5, 0.5
|
|
// CHECK: [0xf0,0x0e,0x85,0xbe]
|
|
|
|
s_ff0_i32_b32 s5, -4.0
|
|
// CHECK: [0xf7,0x0e,0x85,0xbe]
|
|
|
|
s_ff0_i32_b32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x0e,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_ff0_i32_b32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x0e,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_ff0_i32_b64 s5, s[2:3]
|
|
// CHECK: [0x02,0x0f,0x85,0xbe]
|
|
|
|
s_ff0_i32_b64 s101, s[2:3]
|
|
// CHECK: [0x02,0x0f,0xe5,0xbe]
|
|
|
|
s_ff0_i32_b64 flat_scratch_lo, s[2:3]
|
|
// CHECK: [0x02,0x0f,0xe6,0xbe]
|
|
|
|
s_ff0_i32_b64 flat_scratch_hi, s[2:3]
|
|
// CHECK: [0x02,0x0f,0xe7,0xbe]
|
|
|
|
s_ff0_i32_b64 vcc_lo, s[2:3]
|
|
// CHECK: [0x02,0x0f,0xea,0xbe]
|
|
|
|
s_ff0_i32_b64 vcc_hi, s[2:3]
|
|
// CHECK: [0x02,0x0f,0xeb,0xbe]
|
|
|
|
s_ff0_i32_b64 m0, s[2:3]
|
|
// CHECK: [0x02,0x0f,0xfc,0xbe]
|
|
|
|
s_ff0_i32_b64 exec_lo, s[2:3]
|
|
// CHECK: [0x02,0x0f,0xfe,0xbe]
|
|
|
|
s_ff0_i32_b64 exec_hi, s[2:3]
|
|
// CHECK: [0x02,0x0f,0xff,0xbe]
|
|
|
|
s_ff0_i32_b64 s5, s[4:5]
|
|
// CHECK: [0x04,0x0f,0x85,0xbe]
|
|
|
|
s_ff0_i32_b64 s5, s[100:101]
|
|
// CHECK: [0x64,0x0f,0x85,0xbe]
|
|
|
|
s_ff0_i32_b64 s5, flat_scratch
|
|
// CHECK: [0x66,0x0f,0x85,0xbe]
|
|
|
|
s_ff0_i32_b64 s5, vcc
|
|
// CHECK: [0x6a,0x0f,0x85,0xbe]
|
|
|
|
s_ff0_i32_b64 s5, exec
|
|
// CHECK: [0x7e,0x0f,0x85,0xbe]
|
|
|
|
s_ff0_i32_b64 s5, 0
|
|
// CHECK: [0x80,0x0f,0x85,0xbe]
|
|
|
|
s_ff0_i32_b64 s5, -1
|
|
// CHECK: [0xc1,0x0f,0x85,0xbe]
|
|
|
|
s_ff0_i32_b64 s5, 0.5
|
|
// CHECK: [0xf0,0x0f,0x85,0xbe]
|
|
|
|
s_ff0_i32_b64 s5, -4.0
|
|
// CHECK: [0xf7,0x0f,0x85,0xbe]
|
|
|
|
s_ff0_i32_b64 s5, 0xaf123456
|
|
// CHECK: [0xff,0x0f,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_ff0_i32_b64 s5, 0x3f717273
|
|
// CHECK: [0xff,0x0f,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_ff1_i32_b32 s5, s1
|
|
// CHECK: [0x01,0x10,0x85,0xbe]
|
|
|
|
s_ff1_i32_b32 s101, s1
|
|
// CHECK: [0x01,0x10,0xe5,0xbe]
|
|
|
|
s_ff1_i32_b32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x10,0xe6,0xbe]
|
|
|
|
s_ff1_i32_b32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x10,0xe7,0xbe]
|
|
|
|
s_ff1_i32_b32 vcc_lo, s1
|
|
// CHECK: [0x01,0x10,0xea,0xbe]
|
|
|
|
s_ff1_i32_b32 vcc_hi, s1
|
|
// CHECK: [0x01,0x10,0xeb,0xbe]
|
|
|
|
s_ff1_i32_b32 m0, s1
|
|
// CHECK: [0x01,0x10,0xfc,0xbe]
|
|
|
|
s_ff1_i32_b32 exec_lo, s1
|
|
// CHECK: [0x01,0x10,0xfe,0xbe]
|
|
|
|
s_ff1_i32_b32 exec_hi, s1
|
|
// CHECK: [0x01,0x10,0xff,0xbe]
|
|
|
|
s_ff1_i32_b32 s5, s101
|
|
// CHECK: [0x65,0x10,0x85,0xbe]
|
|
|
|
s_ff1_i32_b32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x10,0x85,0xbe]
|
|
|
|
s_ff1_i32_b32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x10,0x85,0xbe]
|
|
|
|
s_ff1_i32_b32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x10,0x85,0xbe]
|
|
|
|
s_ff1_i32_b32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x10,0x85,0xbe]
|
|
|
|
s_ff1_i32_b32 s5, m0
|
|
// CHECK: [0x7c,0x10,0x85,0xbe]
|
|
|
|
s_ff1_i32_b32 s5, exec_lo
|
|
// CHECK: [0x7e,0x10,0x85,0xbe]
|
|
|
|
s_ff1_i32_b32 s5, exec_hi
|
|
// CHECK: [0x7f,0x10,0x85,0xbe]
|
|
|
|
s_ff1_i32_b32 s5, 0
|
|
// CHECK: [0x80,0x10,0x85,0xbe]
|
|
|
|
s_ff1_i32_b32 s5, -1
|
|
// CHECK: [0xc1,0x10,0x85,0xbe]
|
|
|
|
s_ff1_i32_b32 s5, 0.5
|
|
// CHECK: [0xf0,0x10,0x85,0xbe]
|
|
|
|
s_ff1_i32_b32 s5, -4.0
|
|
// CHECK: [0xf7,0x10,0x85,0xbe]
|
|
|
|
s_ff1_i32_b32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x10,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_ff1_i32_b32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x10,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_ff1_i32_b64 s5, s[2:3]
|
|
// CHECK: [0x02,0x11,0x85,0xbe]
|
|
|
|
s_ff1_i32_b64 s101, s[2:3]
|
|
// CHECK: [0x02,0x11,0xe5,0xbe]
|
|
|
|
s_ff1_i32_b64 flat_scratch_lo, s[2:3]
|
|
// CHECK: [0x02,0x11,0xe6,0xbe]
|
|
|
|
s_ff1_i32_b64 flat_scratch_hi, s[2:3]
|
|
// CHECK: [0x02,0x11,0xe7,0xbe]
|
|
|
|
s_ff1_i32_b64 vcc_lo, s[2:3]
|
|
// CHECK: [0x02,0x11,0xea,0xbe]
|
|
|
|
s_ff1_i32_b64 vcc_hi, s[2:3]
|
|
// CHECK: [0x02,0x11,0xeb,0xbe]
|
|
|
|
s_ff1_i32_b64 m0, s[2:3]
|
|
// CHECK: [0x02,0x11,0xfc,0xbe]
|
|
|
|
s_ff1_i32_b64 exec_lo, s[2:3]
|
|
// CHECK: [0x02,0x11,0xfe,0xbe]
|
|
|
|
s_ff1_i32_b64 exec_hi, s[2:3]
|
|
// CHECK: [0x02,0x11,0xff,0xbe]
|
|
|
|
s_ff1_i32_b64 s5, s[4:5]
|
|
// CHECK: [0x04,0x11,0x85,0xbe]
|
|
|
|
s_ff1_i32_b64 s5, s[100:101]
|
|
// CHECK: [0x64,0x11,0x85,0xbe]
|
|
|
|
s_ff1_i32_b64 s5, flat_scratch
|
|
// CHECK: [0x66,0x11,0x85,0xbe]
|
|
|
|
s_ff1_i32_b64 s5, vcc
|
|
// CHECK: [0x6a,0x11,0x85,0xbe]
|
|
|
|
s_ff1_i32_b64 s5, exec
|
|
// CHECK: [0x7e,0x11,0x85,0xbe]
|
|
|
|
s_ff1_i32_b64 s5, 0
|
|
// CHECK: [0x80,0x11,0x85,0xbe]
|
|
|
|
s_ff1_i32_b64 s5, -1
|
|
// CHECK: [0xc1,0x11,0x85,0xbe]
|
|
|
|
s_ff1_i32_b64 s5, 0.5
|
|
// CHECK: [0xf0,0x11,0x85,0xbe]
|
|
|
|
s_ff1_i32_b64 s5, -4.0
|
|
// CHECK: [0xf7,0x11,0x85,0xbe]
|
|
|
|
s_ff1_i32_b64 s5, 0xaf123456
|
|
// CHECK: [0xff,0x11,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_ff1_i32_b64 s5, 0x3f717273
|
|
// CHECK: [0xff,0x11,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_flbit_i32_b32 s5, s1
|
|
// CHECK: [0x01,0x12,0x85,0xbe]
|
|
|
|
s_flbit_i32_b32 s101, s1
|
|
// CHECK: [0x01,0x12,0xe5,0xbe]
|
|
|
|
s_flbit_i32_b32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x12,0xe6,0xbe]
|
|
|
|
s_flbit_i32_b32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x12,0xe7,0xbe]
|
|
|
|
s_flbit_i32_b32 vcc_lo, s1
|
|
// CHECK: [0x01,0x12,0xea,0xbe]
|
|
|
|
s_flbit_i32_b32 vcc_hi, s1
|
|
// CHECK: [0x01,0x12,0xeb,0xbe]
|
|
|
|
s_flbit_i32_b32 m0, s1
|
|
// CHECK: [0x01,0x12,0xfc,0xbe]
|
|
|
|
s_flbit_i32_b32 exec_lo, s1
|
|
// CHECK: [0x01,0x12,0xfe,0xbe]
|
|
|
|
s_flbit_i32_b32 exec_hi, s1
|
|
// CHECK: [0x01,0x12,0xff,0xbe]
|
|
|
|
s_flbit_i32_b32 s5, s101
|
|
// CHECK: [0x65,0x12,0x85,0xbe]
|
|
|
|
s_flbit_i32_b32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x12,0x85,0xbe]
|
|
|
|
s_flbit_i32_b32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x12,0x85,0xbe]
|
|
|
|
s_flbit_i32_b32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x12,0x85,0xbe]
|
|
|
|
s_flbit_i32_b32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x12,0x85,0xbe]
|
|
|
|
s_flbit_i32_b32 s5, m0
|
|
// CHECK: [0x7c,0x12,0x85,0xbe]
|
|
|
|
s_flbit_i32_b32 s5, exec_lo
|
|
// CHECK: [0x7e,0x12,0x85,0xbe]
|
|
|
|
s_flbit_i32_b32 s5, exec_hi
|
|
// CHECK: [0x7f,0x12,0x85,0xbe]
|
|
|
|
s_flbit_i32_b32 s5, 0
|
|
// CHECK: [0x80,0x12,0x85,0xbe]
|
|
|
|
s_flbit_i32_b32 s5, -1
|
|
// CHECK: [0xc1,0x12,0x85,0xbe]
|
|
|
|
s_flbit_i32_b32 s5, 0.5
|
|
// CHECK: [0xf0,0x12,0x85,0xbe]
|
|
|
|
s_flbit_i32_b32 s5, -4.0
|
|
// CHECK: [0xf7,0x12,0x85,0xbe]
|
|
|
|
s_flbit_i32_b32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x12,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_flbit_i32_b32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x12,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_flbit_i32_b64 s5, s[2:3]
|
|
// CHECK: [0x02,0x13,0x85,0xbe]
|
|
|
|
s_flbit_i32_b64 s101, s[2:3]
|
|
// CHECK: [0x02,0x13,0xe5,0xbe]
|
|
|
|
s_flbit_i32_b64 flat_scratch_lo, s[2:3]
|
|
// CHECK: [0x02,0x13,0xe6,0xbe]
|
|
|
|
s_flbit_i32_b64 flat_scratch_hi, s[2:3]
|
|
// CHECK: [0x02,0x13,0xe7,0xbe]
|
|
|
|
s_flbit_i32_b64 vcc_lo, s[2:3]
|
|
// CHECK: [0x02,0x13,0xea,0xbe]
|
|
|
|
s_flbit_i32_b64 vcc_hi, s[2:3]
|
|
// CHECK: [0x02,0x13,0xeb,0xbe]
|
|
|
|
s_flbit_i32_b64 m0, s[2:3]
|
|
// CHECK: [0x02,0x13,0xfc,0xbe]
|
|
|
|
s_flbit_i32_b64 exec_lo, s[2:3]
|
|
// CHECK: [0x02,0x13,0xfe,0xbe]
|
|
|
|
s_flbit_i32_b64 exec_hi, s[2:3]
|
|
// CHECK: [0x02,0x13,0xff,0xbe]
|
|
|
|
s_flbit_i32_b64 s5, s[4:5]
|
|
// CHECK: [0x04,0x13,0x85,0xbe]
|
|
|
|
s_flbit_i32_b64 s5, s[100:101]
|
|
// CHECK: [0x64,0x13,0x85,0xbe]
|
|
|
|
s_flbit_i32_b64 s5, flat_scratch
|
|
// CHECK: [0x66,0x13,0x85,0xbe]
|
|
|
|
s_flbit_i32_b64 s5, vcc
|
|
// CHECK: [0x6a,0x13,0x85,0xbe]
|
|
|
|
s_flbit_i32_b64 s5, exec
|
|
// CHECK: [0x7e,0x13,0x85,0xbe]
|
|
|
|
s_flbit_i32_b64 s5, 0
|
|
// CHECK: [0x80,0x13,0x85,0xbe]
|
|
|
|
s_flbit_i32_b64 s5, -1
|
|
// CHECK: [0xc1,0x13,0x85,0xbe]
|
|
|
|
s_flbit_i32_b64 s5, 0.5
|
|
// CHECK: [0xf0,0x13,0x85,0xbe]
|
|
|
|
s_flbit_i32_b64 s5, -4.0
|
|
// CHECK: [0xf7,0x13,0x85,0xbe]
|
|
|
|
s_flbit_i32_b64 s5, 0xaf123456
|
|
// CHECK: [0xff,0x13,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_flbit_i32_b64 s5, 0x3f717273
|
|
// CHECK: [0xff,0x13,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_flbit_i32 s5, s1
|
|
// CHECK: [0x01,0x14,0x85,0xbe]
|
|
|
|
s_flbit_i32 s101, s1
|
|
// CHECK: [0x01,0x14,0xe5,0xbe]
|
|
|
|
s_flbit_i32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x14,0xe6,0xbe]
|
|
|
|
s_flbit_i32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x14,0xe7,0xbe]
|
|
|
|
s_flbit_i32 vcc_lo, s1
|
|
// CHECK: [0x01,0x14,0xea,0xbe]
|
|
|
|
s_flbit_i32 vcc_hi, s1
|
|
// CHECK: [0x01,0x14,0xeb,0xbe]
|
|
|
|
s_flbit_i32 m0, s1
|
|
// CHECK: [0x01,0x14,0xfc,0xbe]
|
|
|
|
s_flbit_i32 exec_lo, s1
|
|
// CHECK: [0x01,0x14,0xfe,0xbe]
|
|
|
|
s_flbit_i32 exec_hi, s1
|
|
// CHECK: [0x01,0x14,0xff,0xbe]
|
|
|
|
s_flbit_i32 s5, s101
|
|
// CHECK: [0x65,0x14,0x85,0xbe]
|
|
|
|
s_flbit_i32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x14,0x85,0xbe]
|
|
|
|
s_flbit_i32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x14,0x85,0xbe]
|
|
|
|
s_flbit_i32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x14,0x85,0xbe]
|
|
|
|
s_flbit_i32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x14,0x85,0xbe]
|
|
|
|
s_flbit_i32 s5, m0
|
|
// CHECK: [0x7c,0x14,0x85,0xbe]
|
|
|
|
s_flbit_i32 s5, exec_lo
|
|
// CHECK: [0x7e,0x14,0x85,0xbe]
|
|
|
|
s_flbit_i32 s5, exec_hi
|
|
// CHECK: [0x7f,0x14,0x85,0xbe]
|
|
|
|
s_flbit_i32 s5, 0
|
|
// CHECK: [0x80,0x14,0x85,0xbe]
|
|
|
|
s_flbit_i32 s5, -1
|
|
// CHECK: [0xc1,0x14,0x85,0xbe]
|
|
|
|
s_flbit_i32 s5, 0.5
|
|
// CHECK: [0xf0,0x14,0x85,0xbe]
|
|
|
|
s_flbit_i32 s5, -4.0
|
|
// CHECK: [0xf7,0x14,0x85,0xbe]
|
|
|
|
s_flbit_i32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x14,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_flbit_i32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x14,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_flbit_i32_i64 s5, s[2:3]
|
|
// CHECK: [0x02,0x15,0x85,0xbe]
|
|
|
|
s_flbit_i32_i64 s101, s[2:3]
|
|
// CHECK: [0x02,0x15,0xe5,0xbe]
|
|
|
|
s_flbit_i32_i64 flat_scratch_lo, s[2:3]
|
|
// CHECK: [0x02,0x15,0xe6,0xbe]
|
|
|
|
s_flbit_i32_i64 flat_scratch_hi, s[2:3]
|
|
// CHECK: [0x02,0x15,0xe7,0xbe]
|
|
|
|
s_flbit_i32_i64 vcc_lo, s[2:3]
|
|
// CHECK: [0x02,0x15,0xea,0xbe]
|
|
|
|
s_flbit_i32_i64 vcc_hi, s[2:3]
|
|
// CHECK: [0x02,0x15,0xeb,0xbe]
|
|
|
|
s_flbit_i32_i64 m0, s[2:3]
|
|
// CHECK: [0x02,0x15,0xfc,0xbe]
|
|
|
|
s_flbit_i32_i64 exec_lo, s[2:3]
|
|
// CHECK: [0x02,0x15,0xfe,0xbe]
|
|
|
|
s_flbit_i32_i64 exec_hi, s[2:3]
|
|
// CHECK: [0x02,0x15,0xff,0xbe]
|
|
|
|
s_flbit_i32_i64 s5, s[4:5]
|
|
// CHECK: [0x04,0x15,0x85,0xbe]
|
|
|
|
s_flbit_i32_i64 s5, s[100:101]
|
|
// CHECK: [0x64,0x15,0x85,0xbe]
|
|
|
|
s_flbit_i32_i64 s5, flat_scratch
|
|
// CHECK: [0x66,0x15,0x85,0xbe]
|
|
|
|
s_flbit_i32_i64 s5, vcc
|
|
// CHECK: [0x6a,0x15,0x85,0xbe]
|
|
|
|
s_flbit_i32_i64 s5, exec
|
|
// CHECK: [0x7e,0x15,0x85,0xbe]
|
|
|
|
s_flbit_i32_i64 s5, 0
|
|
// CHECK: [0x80,0x15,0x85,0xbe]
|
|
|
|
s_flbit_i32_i64 s5, -1
|
|
// CHECK: [0xc1,0x15,0x85,0xbe]
|
|
|
|
s_flbit_i32_i64 s5, 0.5
|
|
// CHECK: [0xf0,0x15,0x85,0xbe]
|
|
|
|
s_flbit_i32_i64 s5, -4.0
|
|
// CHECK: [0xf7,0x15,0x85,0xbe]
|
|
|
|
s_flbit_i32_i64 s5, 0xaf123456
|
|
// CHECK: [0xff,0x15,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_flbit_i32_i64 s5, 0x3f717273
|
|
// CHECK: [0xff,0x15,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_sext_i32_i8 s5, s1
|
|
// CHECK: [0x01,0x16,0x85,0xbe]
|
|
|
|
s_sext_i32_i8 s101, s1
|
|
// CHECK: [0x01,0x16,0xe5,0xbe]
|
|
|
|
s_sext_i32_i8 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x16,0xe6,0xbe]
|
|
|
|
s_sext_i32_i8 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x16,0xe7,0xbe]
|
|
|
|
s_sext_i32_i8 vcc_lo, s1
|
|
// CHECK: [0x01,0x16,0xea,0xbe]
|
|
|
|
s_sext_i32_i8 vcc_hi, s1
|
|
// CHECK: [0x01,0x16,0xeb,0xbe]
|
|
|
|
s_sext_i32_i8 m0, s1
|
|
// CHECK: [0x01,0x16,0xfc,0xbe]
|
|
|
|
s_sext_i32_i8 exec_lo, s1
|
|
// CHECK: [0x01,0x16,0xfe,0xbe]
|
|
|
|
s_sext_i32_i8 exec_hi, s1
|
|
// CHECK: [0x01,0x16,0xff,0xbe]
|
|
|
|
s_sext_i32_i8 s5, s101
|
|
// CHECK: [0x65,0x16,0x85,0xbe]
|
|
|
|
s_sext_i32_i8 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x16,0x85,0xbe]
|
|
|
|
s_sext_i32_i8 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x16,0x85,0xbe]
|
|
|
|
s_sext_i32_i8 s5, vcc_lo
|
|
// CHECK: [0x6a,0x16,0x85,0xbe]
|
|
|
|
s_sext_i32_i8 s5, vcc_hi
|
|
// CHECK: [0x6b,0x16,0x85,0xbe]
|
|
|
|
s_sext_i32_i8 s5, m0
|
|
// CHECK: [0x7c,0x16,0x85,0xbe]
|
|
|
|
s_sext_i32_i8 s5, exec_lo
|
|
// CHECK: [0x7e,0x16,0x85,0xbe]
|
|
|
|
s_sext_i32_i8 s5, exec_hi
|
|
// CHECK: [0x7f,0x16,0x85,0xbe]
|
|
|
|
s_sext_i32_i8 s5, 0
|
|
// CHECK: [0x80,0x16,0x85,0xbe]
|
|
|
|
s_sext_i32_i8 s5, -1
|
|
// CHECK: [0xc1,0x16,0x85,0xbe]
|
|
|
|
s_sext_i32_i8 s5, 0.5
|
|
// CHECK: [0xf0,0x16,0x85,0xbe]
|
|
|
|
s_sext_i32_i8 s5, -4.0
|
|
// CHECK: [0xf7,0x16,0x85,0xbe]
|
|
|
|
s_sext_i32_i8 s5, 0x71
|
|
// CHECK: [0xff,0x16,0x85,0xbe,0x71,0x00,0x00,0x00]
|
|
|
|
s_sext_i32_i8 s5, 0xf0
|
|
// CHECK: [0xff,0x16,0x85,0xbe,0xf0,0x00,0x00,0x00]
|
|
|
|
s_sext_i32_i16 s5, s1
|
|
// CHECK: [0x01,0x17,0x85,0xbe]
|
|
|
|
s_sext_i32_i16 s101, s1
|
|
// CHECK: [0x01,0x17,0xe5,0xbe]
|
|
|
|
s_sext_i32_i16 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x17,0xe6,0xbe]
|
|
|
|
s_sext_i32_i16 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x17,0xe7,0xbe]
|
|
|
|
s_sext_i32_i16 vcc_lo, s1
|
|
// CHECK: [0x01,0x17,0xea,0xbe]
|
|
|
|
s_sext_i32_i16 vcc_hi, s1
|
|
// CHECK: [0x01,0x17,0xeb,0xbe]
|
|
|
|
s_sext_i32_i16 m0, s1
|
|
// CHECK: [0x01,0x17,0xfc,0xbe]
|
|
|
|
s_sext_i32_i16 exec_lo, s1
|
|
// CHECK: [0x01,0x17,0xfe,0xbe]
|
|
|
|
s_sext_i32_i16 exec_hi, s1
|
|
// CHECK: [0x01,0x17,0xff,0xbe]
|
|
|
|
s_sext_i32_i16 s5, s101
|
|
// CHECK: [0x65,0x17,0x85,0xbe]
|
|
|
|
s_sext_i32_i16 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x17,0x85,0xbe]
|
|
|
|
s_sext_i32_i16 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x17,0x85,0xbe]
|
|
|
|
s_sext_i32_i16 s5, vcc_lo
|
|
// CHECK: [0x6a,0x17,0x85,0xbe]
|
|
|
|
s_sext_i32_i16 s5, vcc_hi
|
|
// CHECK: [0x6b,0x17,0x85,0xbe]
|
|
|
|
s_sext_i32_i16 s5, m0
|
|
// CHECK: [0x7c,0x17,0x85,0xbe]
|
|
|
|
s_sext_i32_i16 s5, exec_lo
|
|
// CHECK: [0x7e,0x17,0x85,0xbe]
|
|
|
|
s_sext_i32_i16 s5, exec_hi
|
|
// CHECK: [0x7f,0x17,0x85,0xbe]
|
|
|
|
s_sext_i32_i16 s5, 0
|
|
// CHECK: [0x80,0x17,0x85,0xbe]
|
|
|
|
s_sext_i32_i16 s5, -1
|
|
// CHECK: [0xc1,0x17,0x85,0xbe]
|
|
|
|
s_sext_i32_i16 s5, 0.5
|
|
// CHECK: [0xf0,0x17,0x85,0xbe]
|
|
|
|
s_sext_i32_i16 s5, -4.0
|
|
// CHECK: [0xf7,0x17,0x85,0xbe]
|
|
|
|
s_sext_i32_i16 s5, 0xfe0b
|
|
// CHECK: [0xff,0x17,0x85,0xbe,0x0b,0xfe,0x00,0x00]
|
|
|
|
s_sext_i32_i16 s5, 0x3456
|
|
// CHECK: [0xff,0x17,0x85,0xbe,0x56,0x34,0x00,0x00]
|
|
|
|
s_bitset0_b32 s5, s1
|
|
// CHECK: [0x01,0x18,0x85,0xbe]
|
|
|
|
s_bitset0_b32 s101, s1
|
|
// CHECK: [0x01,0x18,0xe5,0xbe]
|
|
|
|
s_bitset0_b32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x18,0xe6,0xbe]
|
|
|
|
s_bitset0_b32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x18,0xe7,0xbe]
|
|
|
|
s_bitset0_b32 vcc_lo, s1
|
|
// CHECK: [0x01,0x18,0xea,0xbe]
|
|
|
|
s_bitset0_b32 vcc_hi, s1
|
|
// CHECK: [0x01,0x18,0xeb,0xbe]
|
|
|
|
s_bitset0_b32 m0, s1
|
|
// CHECK: [0x01,0x18,0xfc,0xbe]
|
|
|
|
s_bitset0_b32 exec_lo, s1
|
|
// CHECK: [0x01,0x18,0xfe,0xbe]
|
|
|
|
s_bitset0_b32 exec_hi, s1
|
|
// CHECK: [0x01,0x18,0xff,0xbe]
|
|
|
|
s_bitset0_b32 s5, s101
|
|
// CHECK: [0x65,0x18,0x85,0xbe]
|
|
|
|
s_bitset0_b32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x18,0x85,0xbe]
|
|
|
|
s_bitset0_b32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x18,0x85,0xbe]
|
|
|
|
s_bitset0_b32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x18,0x85,0xbe]
|
|
|
|
s_bitset0_b32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x18,0x85,0xbe]
|
|
|
|
s_bitset0_b32 s5, m0
|
|
// CHECK: [0x7c,0x18,0x85,0xbe]
|
|
|
|
s_bitset0_b32 s5, exec_lo
|
|
// CHECK: [0x7e,0x18,0x85,0xbe]
|
|
|
|
s_bitset0_b32 s5, exec_hi
|
|
// CHECK: [0x7f,0x18,0x85,0xbe]
|
|
|
|
s_bitset0_b32 s5, 0
|
|
// CHECK: [0x80,0x18,0x85,0xbe]
|
|
|
|
s_bitset0_b32 s5, -1
|
|
// CHECK: [0xc1,0x18,0x85,0xbe]
|
|
|
|
s_bitset0_b32 s5, 0.5
|
|
// CHECK: [0xf0,0x18,0x85,0xbe]
|
|
|
|
s_bitset0_b32 s5, -4.0
|
|
// CHECK: [0xf7,0x18,0x85,0xbe]
|
|
|
|
s_bitset0_b32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x18,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bitset0_b32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x18,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bitset0_b64 s[10:11], s1
|
|
// CHECK: [0x01,0x19,0x8a,0xbe]
|
|
|
|
s_bitset0_b64 s[12:13], s1
|
|
// CHECK: [0x01,0x19,0x8c,0xbe]
|
|
|
|
s_bitset0_b64 s[100:101], s1
|
|
// CHECK: [0x01,0x19,0xe4,0xbe]
|
|
|
|
s_bitset0_b64 flat_scratch, s1
|
|
// CHECK: [0x01,0x19,0xe6,0xbe]
|
|
|
|
s_bitset0_b64 vcc, s1
|
|
// CHECK: [0x01,0x19,0xea,0xbe]
|
|
|
|
s_bitset0_b64 exec, s1
|
|
// CHECK: [0x01,0x19,0xfe,0xbe]
|
|
|
|
s_bitset0_b64 s[10:11], s101
|
|
// CHECK: [0x65,0x19,0x8a,0xbe]
|
|
|
|
s_bitset0_b64 s[10:11], flat_scratch_lo
|
|
// CHECK: [0x66,0x19,0x8a,0xbe]
|
|
|
|
s_bitset0_b64 s[10:11], flat_scratch_hi
|
|
// CHECK: [0x67,0x19,0x8a,0xbe]
|
|
|
|
s_bitset0_b64 s[10:11], vcc_lo
|
|
// CHECK: [0x6a,0x19,0x8a,0xbe]
|
|
|
|
s_bitset0_b64 s[10:11], vcc_hi
|
|
// CHECK: [0x6b,0x19,0x8a,0xbe]
|
|
|
|
s_bitset0_b64 s[10:11], m0
|
|
// CHECK: [0x7c,0x19,0x8a,0xbe]
|
|
|
|
s_bitset0_b64 s[10:11], exec_lo
|
|
// CHECK: [0x7e,0x19,0x8a,0xbe]
|
|
|
|
s_bitset0_b64 s[10:11], exec_hi
|
|
// CHECK: [0x7f,0x19,0x8a,0xbe]
|
|
|
|
s_bitset0_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x19,0x8a,0xbe]
|
|
|
|
s_bitset0_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x19,0x8a,0xbe]
|
|
|
|
s_bitset0_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x19,0x8a,0xbe]
|
|
|
|
s_bitset0_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x19,0x8a,0xbe]
|
|
|
|
s_bitset0_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x19,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bitset0_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x19,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bitset1_b32 s5, s1
|
|
// CHECK: [0x01,0x1a,0x85,0xbe]
|
|
|
|
s_bitset1_b32 s101, s1
|
|
// CHECK: [0x01,0x1a,0xe5,0xbe]
|
|
|
|
s_bitset1_b32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x1a,0xe6,0xbe]
|
|
|
|
s_bitset1_b32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x1a,0xe7,0xbe]
|
|
|
|
s_bitset1_b32 vcc_lo, s1
|
|
// CHECK: [0x01,0x1a,0xea,0xbe]
|
|
|
|
s_bitset1_b32 vcc_hi, s1
|
|
// CHECK: [0x01,0x1a,0xeb,0xbe]
|
|
|
|
s_bitset1_b32 m0, s1
|
|
// CHECK: [0x01,0x1a,0xfc,0xbe]
|
|
|
|
s_bitset1_b32 exec_lo, s1
|
|
// CHECK: [0x01,0x1a,0xfe,0xbe]
|
|
|
|
s_bitset1_b32 exec_hi, s1
|
|
// CHECK: [0x01,0x1a,0xff,0xbe]
|
|
|
|
s_bitset1_b32 s5, s101
|
|
// CHECK: [0x65,0x1a,0x85,0xbe]
|
|
|
|
s_bitset1_b32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x1a,0x85,0xbe]
|
|
|
|
s_bitset1_b32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x1a,0x85,0xbe]
|
|
|
|
s_bitset1_b32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x1a,0x85,0xbe]
|
|
|
|
s_bitset1_b32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x1a,0x85,0xbe]
|
|
|
|
s_bitset1_b32 s5, m0
|
|
// CHECK: [0x7c,0x1a,0x85,0xbe]
|
|
|
|
s_bitset1_b32 s5, exec_lo
|
|
// CHECK: [0x7e,0x1a,0x85,0xbe]
|
|
|
|
s_bitset1_b32 s5, exec_hi
|
|
// CHECK: [0x7f,0x1a,0x85,0xbe]
|
|
|
|
s_bitset1_b32 s5, 0
|
|
// CHECK: [0x80,0x1a,0x85,0xbe]
|
|
|
|
s_bitset1_b32 s5, -1
|
|
// CHECK: [0xc1,0x1a,0x85,0xbe]
|
|
|
|
s_bitset1_b32 s5, 0.5
|
|
// CHECK: [0xf0,0x1a,0x85,0xbe]
|
|
|
|
s_bitset1_b32 s5, -4.0
|
|
// CHECK: [0xf7,0x1a,0x85,0xbe]
|
|
|
|
s_bitset1_b32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x1a,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bitset1_b32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x1a,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bitset1_b64 s[10:11], s1
|
|
// CHECK: [0x01,0x1b,0x8a,0xbe]
|
|
|
|
s_bitset1_b64 s[12:13], s1
|
|
// CHECK: [0x01,0x1b,0x8c,0xbe]
|
|
|
|
s_bitset1_b64 s[100:101], s1
|
|
// CHECK: [0x01,0x1b,0xe4,0xbe]
|
|
|
|
s_bitset1_b64 flat_scratch, s1
|
|
// CHECK: [0x01,0x1b,0xe6,0xbe]
|
|
|
|
s_bitset1_b64 vcc, s1
|
|
// CHECK: [0x01,0x1b,0xea,0xbe]
|
|
|
|
s_bitset1_b64 exec, s1
|
|
// CHECK: [0x01,0x1b,0xfe,0xbe]
|
|
|
|
s_bitset1_b64 s[10:11], s101
|
|
// CHECK: [0x65,0x1b,0x8a,0xbe]
|
|
|
|
s_bitset1_b64 s[10:11], flat_scratch_lo
|
|
// CHECK: [0x66,0x1b,0x8a,0xbe]
|
|
|
|
s_bitset1_b64 s[10:11], flat_scratch_hi
|
|
// CHECK: [0x67,0x1b,0x8a,0xbe]
|
|
|
|
s_bitset1_b64 s[10:11], vcc_lo
|
|
// CHECK: [0x6a,0x1b,0x8a,0xbe]
|
|
|
|
s_bitset1_b64 s[10:11], vcc_hi
|
|
// CHECK: [0x6b,0x1b,0x8a,0xbe]
|
|
|
|
s_bitset1_b64 s[10:11], m0
|
|
// CHECK: [0x7c,0x1b,0x8a,0xbe]
|
|
|
|
s_bitset1_b64 s[10:11], exec_lo
|
|
// CHECK: [0x7e,0x1b,0x8a,0xbe]
|
|
|
|
s_bitset1_b64 s[10:11], exec_hi
|
|
// CHECK: [0x7f,0x1b,0x8a,0xbe]
|
|
|
|
s_bitset1_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x1b,0x8a,0xbe]
|
|
|
|
s_bitset1_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x1b,0x8a,0xbe]
|
|
|
|
s_bitset1_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x1b,0x8a,0xbe]
|
|
|
|
s_bitset1_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x1b,0x8a,0xbe]
|
|
|
|
s_bitset1_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x1b,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bitset1_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x1b,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_getpc_b64 s[10:11]
|
|
// CHECK: [0x00,0x1c,0x8a,0xbe]
|
|
|
|
s_getpc_b64 s[12:13]
|
|
// CHECK: [0x00,0x1c,0x8c,0xbe]
|
|
|
|
s_getpc_b64 s[100:101]
|
|
// CHECK: [0x00,0x1c,0xe4,0xbe]
|
|
|
|
s_getpc_b64 flat_scratch
|
|
// CHECK: [0x00,0x1c,0xe6,0xbe]
|
|
|
|
s_getpc_b64 vcc
|
|
// CHECK: [0x00,0x1c,0xea,0xbe]
|
|
|
|
s_getpc_b64 exec
|
|
// CHECK: [0x00,0x1c,0xfe,0xbe]
|
|
|
|
s_setpc_b64 s[2:3]
|
|
// CHECK: [0x02,0x1d,0x80,0xbe]
|
|
|
|
s_setpc_b64 s[4:5]
|
|
// CHECK: [0x04,0x1d,0x80,0xbe]
|
|
|
|
s_setpc_b64 s[100:101]
|
|
// CHECK: [0x64,0x1d,0x80,0xbe]
|
|
|
|
s_setpc_b64 flat_scratch
|
|
// CHECK: [0x66,0x1d,0x80,0xbe]
|
|
|
|
s_setpc_b64 vcc
|
|
// CHECK: [0x6a,0x1d,0x80,0xbe]
|
|
|
|
s_swappc_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x1e,0x8a,0xbe]
|
|
|
|
s_swappc_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x1e,0x8c,0xbe]
|
|
|
|
s_swappc_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x1e,0xe4,0xbe]
|
|
|
|
s_swappc_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x1e,0xe6,0xbe]
|
|
|
|
s_swappc_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x1e,0xea,0xbe]
|
|
|
|
s_swappc_b64 exec, s[2:3]
|
|
// CHECK: [0x02,0x1e,0xfe,0xbe]
|
|
|
|
s_swappc_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x1e,0x8a,0xbe]
|
|
|
|
s_swappc_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x1e,0x8a,0xbe]
|
|
|
|
s_swappc_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x1e,0x8a,0xbe]
|
|
|
|
s_swappc_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x1e,0x8a,0xbe]
|
|
|
|
s_rfe_b64 s[2:3]
|
|
// CHECK: [0x02,0x1f,0x80,0xbe]
|
|
|
|
s_rfe_b64 s[4:5]
|
|
// CHECK: [0x04,0x1f,0x80,0xbe]
|
|
|
|
s_rfe_b64 s[100:101]
|
|
// CHECK: [0x64,0x1f,0x80,0xbe]
|
|
|
|
s_rfe_b64 flat_scratch
|
|
// CHECK: [0x66,0x1f,0x80,0xbe]
|
|
|
|
s_rfe_b64 vcc
|
|
// CHECK: [0x6a,0x1f,0x80,0xbe]
|
|
|
|
s_and_saveexec_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x20,0x8a,0xbe]
|
|
|
|
s_and_saveexec_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x20,0x8c,0xbe]
|
|
|
|
s_and_saveexec_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x20,0xe4,0xbe]
|
|
|
|
s_and_saveexec_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x20,0xe6,0xbe]
|
|
|
|
s_and_saveexec_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x20,0xea,0xbe]
|
|
|
|
s_and_saveexec_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x20,0x8a,0xbe]
|
|
|
|
s_and_saveexec_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x20,0x8a,0xbe]
|
|
|
|
s_and_saveexec_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x20,0x8a,0xbe]
|
|
|
|
s_and_saveexec_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x20,0x8a,0xbe]
|
|
|
|
s_and_saveexec_b64 s[10:11], exec
|
|
// CHECK: [0x7e,0x20,0x8a,0xbe]
|
|
|
|
s_and_saveexec_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x20,0x8a,0xbe]
|
|
|
|
s_and_saveexec_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x20,0x8a,0xbe]
|
|
|
|
s_and_saveexec_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x20,0x8a,0xbe]
|
|
|
|
s_and_saveexec_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x20,0x8a,0xbe]
|
|
|
|
s_and_saveexec_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x20,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_and_saveexec_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x20,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_or_saveexec_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x21,0x8a,0xbe]
|
|
|
|
s_or_saveexec_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x21,0x8c,0xbe]
|
|
|
|
s_or_saveexec_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x21,0xe4,0xbe]
|
|
|
|
s_or_saveexec_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x21,0xe6,0xbe]
|
|
|
|
s_or_saveexec_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x21,0xea,0xbe]
|
|
|
|
s_or_saveexec_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x21,0x8a,0xbe]
|
|
|
|
s_or_saveexec_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x21,0x8a,0xbe]
|
|
|
|
s_or_saveexec_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x21,0x8a,0xbe]
|
|
|
|
s_or_saveexec_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x21,0x8a,0xbe]
|
|
|
|
s_or_saveexec_b64 s[10:11], exec
|
|
// CHECK: [0x7e,0x21,0x8a,0xbe]
|
|
|
|
s_or_saveexec_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x21,0x8a,0xbe]
|
|
|
|
s_or_saveexec_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x21,0x8a,0xbe]
|
|
|
|
s_or_saveexec_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x21,0x8a,0xbe]
|
|
|
|
s_or_saveexec_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x21,0x8a,0xbe]
|
|
|
|
s_or_saveexec_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x21,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_or_saveexec_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x21,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_xor_saveexec_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x22,0x8a,0xbe]
|
|
|
|
s_xor_saveexec_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x22,0x8c,0xbe]
|
|
|
|
s_xor_saveexec_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x22,0xe4,0xbe]
|
|
|
|
s_xor_saveexec_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x22,0xe6,0xbe]
|
|
|
|
s_xor_saveexec_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x22,0xea,0xbe]
|
|
|
|
s_xor_saveexec_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x22,0x8a,0xbe]
|
|
|
|
s_xor_saveexec_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x22,0x8a,0xbe]
|
|
|
|
s_xor_saveexec_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x22,0x8a,0xbe]
|
|
|
|
s_xor_saveexec_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x22,0x8a,0xbe]
|
|
|
|
s_xor_saveexec_b64 s[10:11], exec
|
|
// CHECK: [0x7e,0x22,0x8a,0xbe]
|
|
|
|
s_xor_saveexec_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x22,0x8a,0xbe]
|
|
|
|
s_xor_saveexec_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x22,0x8a,0xbe]
|
|
|
|
s_xor_saveexec_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x22,0x8a,0xbe]
|
|
|
|
s_xor_saveexec_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x22,0x8a,0xbe]
|
|
|
|
s_xor_saveexec_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x22,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_xor_saveexec_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x22,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_andn2_saveexec_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x23,0x8a,0xbe]
|
|
|
|
s_andn2_saveexec_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x23,0x8c,0xbe]
|
|
|
|
s_andn2_saveexec_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x23,0xe4,0xbe]
|
|
|
|
s_andn2_saveexec_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x23,0xe6,0xbe]
|
|
|
|
s_andn2_saveexec_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x23,0xea,0xbe]
|
|
|
|
s_andn2_saveexec_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x23,0x8a,0xbe]
|
|
|
|
s_andn2_saveexec_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x23,0x8a,0xbe]
|
|
|
|
s_andn2_saveexec_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x23,0x8a,0xbe]
|
|
|
|
s_andn2_saveexec_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x23,0x8a,0xbe]
|
|
|
|
s_andn2_saveexec_b64 s[10:11], exec
|
|
// CHECK: [0x7e,0x23,0x8a,0xbe]
|
|
|
|
s_andn2_saveexec_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x23,0x8a,0xbe]
|
|
|
|
s_andn2_saveexec_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x23,0x8a,0xbe]
|
|
|
|
s_andn2_saveexec_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x23,0x8a,0xbe]
|
|
|
|
s_andn2_saveexec_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x23,0x8a,0xbe]
|
|
|
|
s_andn2_saveexec_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x23,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_andn2_saveexec_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x23,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_orn2_saveexec_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x24,0x8a,0xbe]
|
|
|
|
s_orn2_saveexec_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x24,0x8c,0xbe]
|
|
|
|
s_orn2_saveexec_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x24,0xe4,0xbe]
|
|
|
|
s_orn2_saveexec_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x24,0xe6,0xbe]
|
|
|
|
s_orn2_saveexec_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x24,0xea,0xbe]
|
|
|
|
s_orn2_saveexec_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x24,0x8a,0xbe]
|
|
|
|
s_orn2_saveexec_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x24,0x8a,0xbe]
|
|
|
|
s_orn2_saveexec_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x24,0x8a,0xbe]
|
|
|
|
s_orn2_saveexec_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x24,0x8a,0xbe]
|
|
|
|
s_orn2_saveexec_b64 s[10:11], exec
|
|
// CHECK: [0x7e,0x24,0x8a,0xbe]
|
|
|
|
s_orn2_saveexec_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x24,0x8a,0xbe]
|
|
|
|
s_orn2_saveexec_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x24,0x8a,0xbe]
|
|
|
|
s_orn2_saveexec_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x24,0x8a,0xbe]
|
|
|
|
s_orn2_saveexec_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x24,0x8a,0xbe]
|
|
|
|
s_orn2_saveexec_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x24,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_orn2_saveexec_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x24,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_nand_saveexec_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x25,0x8a,0xbe]
|
|
|
|
s_nand_saveexec_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x25,0x8c,0xbe]
|
|
|
|
s_nand_saveexec_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x25,0xe4,0xbe]
|
|
|
|
s_nand_saveexec_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x25,0xe6,0xbe]
|
|
|
|
s_nand_saveexec_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x25,0xea,0xbe]
|
|
|
|
s_nand_saveexec_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x25,0x8a,0xbe]
|
|
|
|
s_nand_saveexec_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x25,0x8a,0xbe]
|
|
|
|
s_nand_saveexec_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x25,0x8a,0xbe]
|
|
|
|
s_nand_saveexec_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x25,0x8a,0xbe]
|
|
|
|
s_nand_saveexec_b64 s[10:11], exec
|
|
// CHECK: [0x7e,0x25,0x8a,0xbe]
|
|
|
|
s_nand_saveexec_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x25,0x8a,0xbe]
|
|
|
|
s_nand_saveexec_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x25,0x8a,0xbe]
|
|
|
|
s_nand_saveexec_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x25,0x8a,0xbe]
|
|
|
|
s_nand_saveexec_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x25,0x8a,0xbe]
|
|
|
|
s_nand_saveexec_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x25,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_nand_saveexec_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x25,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_nor_saveexec_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x26,0x8a,0xbe]
|
|
|
|
s_nor_saveexec_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x26,0x8c,0xbe]
|
|
|
|
s_nor_saveexec_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x26,0xe4,0xbe]
|
|
|
|
s_nor_saveexec_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x26,0xe6,0xbe]
|
|
|
|
s_nor_saveexec_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x26,0xea,0xbe]
|
|
|
|
s_nor_saveexec_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x26,0x8a,0xbe]
|
|
|
|
s_nor_saveexec_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x26,0x8a,0xbe]
|
|
|
|
s_nor_saveexec_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x26,0x8a,0xbe]
|
|
|
|
s_nor_saveexec_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x26,0x8a,0xbe]
|
|
|
|
s_nor_saveexec_b64 s[10:11], exec
|
|
// CHECK: [0x7e,0x26,0x8a,0xbe]
|
|
|
|
s_nor_saveexec_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x26,0x8a,0xbe]
|
|
|
|
s_nor_saveexec_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x26,0x8a,0xbe]
|
|
|
|
s_nor_saveexec_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x26,0x8a,0xbe]
|
|
|
|
s_nor_saveexec_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x26,0x8a,0xbe]
|
|
|
|
s_nor_saveexec_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x26,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_nor_saveexec_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x26,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_xnor_saveexec_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x27,0x8a,0xbe]
|
|
|
|
s_xnor_saveexec_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x27,0x8c,0xbe]
|
|
|
|
s_xnor_saveexec_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x27,0xe4,0xbe]
|
|
|
|
s_xnor_saveexec_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x27,0xe6,0xbe]
|
|
|
|
s_xnor_saveexec_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x27,0xea,0xbe]
|
|
|
|
s_xnor_saveexec_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x27,0x8a,0xbe]
|
|
|
|
s_xnor_saveexec_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x27,0x8a,0xbe]
|
|
|
|
s_xnor_saveexec_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x27,0x8a,0xbe]
|
|
|
|
s_xnor_saveexec_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x27,0x8a,0xbe]
|
|
|
|
s_xnor_saveexec_b64 s[10:11], exec
|
|
// CHECK: [0x7e,0x27,0x8a,0xbe]
|
|
|
|
s_xnor_saveexec_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x27,0x8a,0xbe]
|
|
|
|
s_xnor_saveexec_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x27,0x8a,0xbe]
|
|
|
|
s_xnor_saveexec_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x27,0x8a,0xbe]
|
|
|
|
s_xnor_saveexec_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x27,0x8a,0xbe]
|
|
|
|
s_xnor_saveexec_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x27,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_xnor_saveexec_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x27,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_quadmask_b32 s5, s1
|
|
// CHECK: [0x01,0x28,0x85,0xbe]
|
|
|
|
s_quadmask_b32 s101, s1
|
|
// CHECK: [0x01,0x28,0xe5,0xbe]
|
|
|
|
s_quadmask_b32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x28,0xe6,0xbe]
|
|
|
|
s_quadmask_b32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x28,0xe7,0xbe]
|
|
|
|
s_quadmask_b32 vcc_lo, s1
|
|
// CHECK: [0x01,0x28,0xea,0xbe]
|
|
|
|
s_quadmask_b32 vcc_hi, s1
|
|
// CHECK: [0x01,0x28,0xeb,0xbe]
|
|
|
|
s_quadmask_b32 m0, s1
|
|
// CHECK: [0x01,0x28,0xfc,0xbe]
|
|
|
|
s_quadmask_b32 exec_lo, s1
|
|
// CHECK: [0x01,0x28,0xfe,0xbe]
|
|
|
|
s_quadmask_b32 exec_hi, s1
|
|
// CHECK: [0x01,0x28,0xff,0xbe]
|
|
|
|
s_quadmask_b32 s5, s101
|
|
// CHECK: [0x65,0x28,0x85,0xbe]
|
|
|
|
s_quadmask_b32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x28,0x85,0xbe]
|
|
|
|
s_quadmask_b32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x28,0x85,0xbe]
|
|
|
|
s_quadmask_b32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x28,0x85,0xbe]
|
|
|
|
s_quadmask_b32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x28,0x85,0xbe]
|
|
|
|
s_quadmask_b32 s5, m0
|
|
// CHECK: [0x7c,0x28,0x85,0xbe]
|
|
|
|
s_quadmask_b32 s5, exec_lo
|
|
// CHECK: [0x7e,0x28,0x85,0xbe]
|
|
|
|
s_quadmask_b32 s5, exec_hi
|
|
// CHECK: [0x7f,0x28,0x85,0xbe]
|
|
|
|
s_quadmask_b32 s5, 0
|
|
// CHECK: [0x80,0x28,0x85,0xbe]
|
|
|
|
s_quadmask_b32 s5, -1
|
|
// CHECK: [0xc1,0x28,0x85,0xbe]
|
|
|
|
s_quadmask_b32 s5, 0.5
|
|
// CHECK: [0xf0,0x28,0x85,0xbe]
|
|
|
|
s_quadmask_b32 s5, -4.0
|
|
// CHECK: [0xf7,0x28,0x85,0xbe]
|
|
|
|
s_quadmask_b32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x28,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_quadmask_b32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x28,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_quadmask_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x29,0x8a,0xbe]
|
|
|
|
s_quadmask_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x29,0x8c,0xbe]
|
|
|
|
s_quadmask_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x29,0xe4,0xbe]
|
|
|
|
s_quadmask_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x29,0xe6,0xbe]
|
|
|
|
s_quadmask_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x29,0xea,0xbe]
|
|
|
|
s_quadmask_b64 exec, s[2:3]
|
|
// CHECK: [0x02,0x29,0xfe,0xbe]
|
|
|
|
s_quadmask_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x29,0x8a,0xbe]
|
|
|
|
s_quadmask_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x29,0x8a,0xbe]
|
|
|
|
s_quadmask_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x29,0x8a,0xbe]
|
|
|
|
s_quadmask_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x29,0x8a,0xbe]
|
|
|
|
s_quadmask_b64 s[10:11], exec
|
|
// CHECK: [0x7e,0x29,0x8a,0xbe]
|
|
|
|
s_quadmask_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x29,0x8a,0xbe]
|
|
|
|
s_quadmask_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x29,0x8a,0xbe]
|
|
|
|
s_quadmask_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x29,0x8a,0xbe]
|
|
|
|
s_quadmask_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x29,0x8a,0xbe]
|
|
|
|
s_quadmask_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x29,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_quadmask_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x29,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_movrels_b32 s5, s1
|
|
// CHECK: [0x01,0x2a,0x85,0xbe]
|
|
|
|
s_movrels_b32 s101, s1
|
|
// CHECK: [0x01,0x2a,0xe5,0xbe]
|
|
|
|
s_movrels_b32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x2a,0xe6,0xbe]
|
|
|
|
s_movrels_b32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x2a,0xe7,0xbe]
|
|
|
|
s_movrels_b32 vcc_lo, s1
|
|
// CHECK: [0x01,0x2a,0xea,0xbe]
|
|
|
|
s_movrels_b32 vcc_hi, s1
|
|
// CHECK: [0x01,0x2a,0xeb,0xbe]
|
|
|
|
s_movrels_b32 m0, s1
|
|
// CHECK: [0x01,0x2a,0xfc,0xbe]
|
|
|
|
s_movrels_b32 exec_lo, s1
|
|
// CHECK: [0x01,0x2a,0xfe,0xbe]
|
|
|
|
s_movrels_b32 exec_hi, s1
|
|
// CHECK: [0x01,0x2a,0xff,0xbe]
|
|
|
|
s_movrels_b32 s5, s101
|
|
// CHECK: [0x65,0x2a,0x85,0xbe]
|
|
|
|
s_movrels_b32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x2a,0x85,0xbe]
|
|
|
|
s_movrels_b32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x2a,0x85,0xbe]
|
|
|
|
s_movrels_b32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x2a,0x85,0xbe]
|
|
|
|
s_movrels_b32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x2a,0x85,0xbe]
|
|
|
|
s_movrels_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x2b,0x8a,0xbe]
|
|
|
|
s_movrels_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x2b,0x8c,0xbe]
|
|
|
|
s_movrels_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x2b,0xe4,0xbe]
|
|
|
|
s_movrels_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x2b,0xe6,0xbe]
|
|
|
|
s_movrels_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x2b,0xea,0xbe]
|
|
|
|
s_movrels_b64 exec, s[2:3]
|
|
// CHECK: [0x02,0x2b,0xfe,0xbe]
|
|
|
|
s_movrels_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x2b,0x8a,0xbe]
|
|
|
|
s_movrels_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x2b,0x8a,0xbe]
|
|
|
|
s_movrels_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x2b,0x8a,0xbe]
|
|
|
|
s_movrels_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x2b,0x8a,0xbe]
|
|
|
|
s_movreld_b32 s5, s1
|
|
// CHECK: [0x01,0x2c,0x85,0xbe]
|
|
|
|
s_movreld_b32 s101, s1
|
|
// CHECK: [0x01,0x2c,0xe5,0xbe]
|
|
|
|
s_movreld_b32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x2c,0xe6,0xbe]
|
|
|
|
s_movreld_b32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x2c,0xe7,0xbe]
|
|
|
|
s_movreld_b32 vcc_lo, s1
|
|
// CHECK: [0x01,0x2c,0xea,0xbe]
|
|
|
|
s_movreld_b32 vcc_hi, s1
|
|
// CHECK: [0x01,0x2c,0xeb,0xbe]
|
|
|
|
s_movreld_b32 s5, s101
|
|
// CHECK: [0x65,0x2c,0x85,0xbe]
|
|
|
|
s_movreld_b32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x2c,0x85,0xbe]
|
|
|
|
s_movreld_b32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x2c,0x85,0xbe]
|
|
|
|
s_movreld_b32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x2c,0x85,0xbe]
|
|
|
|
s_movreld_b32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x2c,0x85,0xbe]
|
|
|
|
s_movreld_b32 s5, m0
|
|
// CHECK: [0x7c,0x2c,0x85,0xbe]
|
|
|
|
s_movreld_b32 s5, 0
|
|
// CHECK: [0x80,0x2c,0x85,0xbe]
|
|
|
|
s_movreld_b32 s5, -1
|
|
// CHECK: [0xc1,0x2c,0x85,0xbe]
|
|
|
|
s_movreld_b32 s5, 0.5
|
|
// CHECK: [0xf0,0x2c,0x85,0xbe]
|
|
|
|
s_movreld_b32 s5, -4.0
|
|
// CHECK: [0xf7,0x2c,0x85,0xbe]
|
|
|
|
s_movreld_b32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x2c,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_movreld_b32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x2c,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_movreld_b64 s[10:11], s[2:3]
|
|
// CHECK: [0x02,0x2d,0x8a,0xbe]
|
|
|
|
s_movreld_b64 s[12:13], s[2:3]
|
|
// CHECK: [0x02,0x2d,0x8c,0xbe]
|
|
|
|
s_movreld_b64 s[100:101], s[2:3]
|
|
// CHECK: [0x02,0x2d,0xe4,0xbe]
|
|
|
|
s_movreld_b64 flat_scratch, s[2:3]
|
|
// CHECK: [0x02,0x2d,0xe6,0xbe]
|
|
|
|
s_movreld_b64 vcc, s[2:3]
|
|
// CHECK: [0x02,0x2d,0xea,0xbe]
|
|
|
|
s_movreld_b64 s[10:11], s[4:5]
|
|
// CHECK: [0x04,0x2d,0x8a,0xbe]
|
|
|
|
s_movreld_b64 s[10:11], s[100:101]
|
|
// CHECK: [0x64,0x2d,0x8a,0xbe]
|
|
|
|
s_movreld_b64 s[10:11], flat_scratch
|
|
// CHECK: [0x66,0x2d,0x8a,0xbe]
|
|
|
|
s_movreld_b64 s[10:11], vcc
|
|
// CHECK: [0x6a,0x2d,0x8a,0xbe]
|
|
|
|
s_movreld_b64 s[10:11], 0
|
|
// CHECK: [0x80,0x2d,0x8a,0xbe]
|
|
|
|
s_movreld_b64 s[10:11], -1
|
|
// CHECK: [0xc1,0x2d,0x8a,0xbe]
|
|
|
|
s_movreld_b64 s[10:11], 0.5
|
|
// CHECK: [0xf0,0x2d,0x8a,0xbe]
|
|
|
|
s_movreld_b64 s[10:11], -4.0
|
|
// CHECK: [0xf7,0x2d,0x8a,0xbe]
|
|
|
|
s_movreld_b64 s[10:11], 0xaf123456
|
|
// CHECK: [0xff,0x2d,0x8a,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_movreld_b64 s[10:11], 0x3f717273
|
|
// CHECK: [0xff,0x2d,0x8a,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cbranch_join s1
|
|
// CHECK: [0x01,0x2e,0x80,0xbe]
|
|
|
|
s_cbranch_join s101
|
|
// CHECK: [0x65,0x2e,0x80,0xbe]
|
|
|
|
s_cbranch_join flat_scratch_lo
|
|
// CHECK: [0x66,0x2e,0x80,0xbe]
|
|
|
|
s_cbranch_join flat_scratch_hi
|
|
// CHECK: [0x67,0x2e,0x80,0xbe]
|
|
|
|
s_cbranch_join vcc_lo
|
|
// CHECK: [0x6a,0x2e,0x80,0xbe]
|
|
|
|
s_cbranch_join vcc_hi
|
|
// CHECK: [0x6b,0x2e,0x80,0xbe]
|
|
|
|
s_abs_i32 s5, s1
|
|
// CHECK: [0x01,0x30,0x85,0xbe]
|
|
|
|
s_abs_i32 s101, s1
|
|
// CHECK: [0x01,0x30,0xe5,0xbe]
|
|
|
|
s_abs_i32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x30,0xe6,0xbe]
|
|
|
|
s_abs_i32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x30,0xe7,0xbe]
|
|
|
|
s_abs_i32 vcc_lo, s1
|
|
// CHECK: [0x01,0x30,0xea,0xbe]
|
|
|
|
s_abs_i32 vcc_hi, s1
|
|
// CHECK: [0x01,0x30,0xeb,0xbe]
|
|
|
|
s_abs_i32 m0, s1
|
|
// CHECK: [0x01,0x30,0xfc,0xbe]
|
|
|
|
s_abs_i32 exec_lo, s1
|
|
// CHECK: [0x01,0x30,0xfe,0xbe]
|
|
|
|
s_abs_i32 exec_hi, s1
|
|
// CHECK: [0x01,0x30,0xff,0xbe]
|
|
|
|
s_abs_i32 s5, s101
|
|
// CHECK: [0x65,0x30,0x85,0xbe]
|
|
|
|
s_abs_i32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x30,0x85,0xbe]
|
|
|
|
s_abs_i32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x30,0x85,0xbe]
|
|
|
|
s_abs_i32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x30,0x85,0xbe]
|
|
|
|
s_abs_i32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x30,0x85,0xbe]
|
|
|
|
s_abs_i32 s5, m0
|
|
// CHECK: [0x7c,0x30,0x85,0xbe]
|
|
|
|
s_abs_i32 s5, exec_lo
|
|
// CHECK: [0x7e,0x30,0x85,0xbe]
|
|
|
|
s_abs_i32 s5, exec_hi
|
|
// CHECK: [0x7f,0x30,0x85,0xbe]
|
|
|
|
s_abs_i32 s5, 0
|
|
// CHECK: [0x80,0x30,0x85,0xbe]
|
|
|
|
s_abs_i32 s5, -1
|
|
// CHECK: [0xc1,0x30,0x85,0xbe]
|
|
|
|
s_abs_i32 s5, 0.5
|
|
// CHECK: [0xf0,0x30,0x85,0xbe]
|
|
|
|
s_abs_i32 s5, -4.0
|
|
// CHECK: [0xf7,0x30,0x85,0xbe]
|
|
|
|
s_abs_i32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x30,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_abs_i32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x30,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_mov_fed_b32 s5, s1
|
|
// CHECK: [0x01,0x31,0x85,0xbe]
|
|
|
|
s_mov_fed_b32 s101, s1
|
|
// CHECK: [0x01,0x31,0xe5,0xbe]
|
|
|
|
s_mov_fed_b32 flat_scratch_lo, s1
|
|
// CHECK: [0x01,0x31,0xe6,0xbe]
|
|
|
|
s_mov_fed_b32 flat_scratch_hi, s1
|
|
// CHECK: [0x01,0x31,0xe7,0xbe]
|
|
|
|
s_mov_fed_b32 vcc_lo, s1
|
|
// CHECK: [0x01,0x31,0xea,0xbe]
|
|
|
|
s_mov_fed_b32 vcc_hi, s1
|
|
// CHECK: [0x01,0x31,0xeb,0xbe]
|
|
|
|
s_mov_fed_b32 m0, s1
|
|
// CHECK: [0x01,0x31,0xfc,0xbe]
|
|
|
|
s_mov_fed_b32 exec_lo, s1
|
|
// CHECK: [0x01,0x31,0xfe,0xbe]
|
|
|
|
s_mov_fed_b32 exec_hi, s1
|
|
// CHECK: [0x01,0x31,0xff,0xbe]
|
|
|
|
s_mov_fed_b32 s5, s101
|
|
// CHECK: [0x65,0x31,0x85,0xbe]
|
|
|
|
s_mov_fed_b32 s5, flat_scratch_lo
|
|
// CHECK: [0x66,0x31,0x85,0xbe]
|
|
|
|
s_mov_fed_b32 s5, flat_scratch_hi
|
|
// CHECK: [0x67,0x31,0x85,0xbe]
|
|
|
|
s_mov_fed_b32 s5, vcc_lo
|
|
// CHECK: [0x6a,0x31,0x85,0xbe]
|
|
|
|
s_mov_fed_b32 s5, vcc_hi
|
|
// CHECK: [0x6b,0x31,0x85,0xbe]
|
|
|
|
s_mov_fed_b32 s5, m0
|
|
// CHECK: [0x7c,0x31,0x85,0xbe]
|
|
|
|
s_mov_fed_b32 s5, exec_lo
|
|
// CHECK: [0x7e,0x31,0x85,0xbe]
|
|
|
|
s_mov_fed_b32 s5, exec_hi
|
|
// CHECK: [0x7f,0x31,0x85,0xbe]
|
|
|
|
s_mov_fed_b32 s5, 0
|
|
// CHECK: [0x80,0x31,0x85,0xbe]
|
|
|
|
s_mov_fed_b32 s5, -1
|
|
// CHECK: [0xc1,0x31,0x85,0xbe]
|
|
|
|
s_mov_fed_b32 s5, 0.5
|
|
// CHECK: [0xf0,0x31,0x85,0xbe]
|
|
|
|
s_mov_fed_b32 s5, -4.0
|
|
// CHECK: [0xf7,0x31,0x85,0xbe]
|
|
|
|
s_mov_fed_b32 s5, 0xaf123456
|
|
// CHECK: [0xff,0x31,0x85,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_mov_fed_b32 s5, 0x3f717273
|
|
// CHECK: [0xff,0x31,0x85,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_set_gpr_idx_idx s1
|
|
// CHECK: [0x01,0x32,0x80,0xbe]
|
|
|
|
s_set_gpr_idx_idx s101
|
|
// CHECK: [0x65,0x32,0x80,0xbe]
|
|
|
|
s_set_gpr_idx_idx flat_scratch_lo
|
|
// CHECK: [0x66,0x32,0x80,0xbe]
|
|
|
|
s_set_gpr_idx_idx flat_scratch_hi
|
|
// CHECK: [0x67,0x32,0x80,0xbe]
|
|
|
|
s_set_gpr_idx_idx vcc_lo
|
|
// CHECK: [0x6a,0x32,0x80,0xbe]
|
|
|
|
s_set_gpr_idx_idx vcc_hi
|
|
// CHECK: [0x6b,0x32,0x80,0xbe]
|
|
|
|
s_set_gpr_idx_idx m0
|
|
// CHECK: [0x7c,0x32,0x80,0xbe]
|
|
|
|
s_set_gpr_idx_idx 0
|
|
// CHECK: [0x80,0x32,0x80,0xbe]
|
|
|
|
s_set_gpr_idx_idx -1
|
|
// CHECK: [0xc1,0x32,0x80,0xbe]
|
|
|
|
s_set_gpr_idx_idx 0.5
|
|
// CHECK: [0xf0,0x32,0x80,0xbe]
|
|
|
|
s_set_gpr_idx_idx -4.0
|
|
// CHECK: [0xf7,0x32,0x80,0xbe]
|
|
|
|
s_set_gpr_idx_idx 0xaf123456
|
|
// CHECK: [0xff,0x32,0x80,0xbe,0x56,0x34,0x12,0xaf]
|
|
|
|
s_set_gpr_idx_idx 0x3f717273
|
|
// CHECK: [0xff,0x32,0x80,0xbe,0x73,0x72,0x71,0x3f]
|
|
|
|
s_add_u32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x80]
|
|
|
|
s_add_u32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x80]
|
|
|
|
s_add_u32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x80]
|
|
|
|
s_add_u32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x80]
|
|
|
|
s_add_u32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x80]
|
|
|
|
s_add_u32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x80]
|
|
|
|
s_add_u32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x80]
|
|
|
|
s_add_u32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x80]
|
|
|
|
s_add_u32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x80]
|
|
|
|
s_add_u32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x80]
|
|
|
|
s_add_u32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x80]
|
|
|
|
s_add_u32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x80]
|
|
|
|
s_add_u32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x80]
|
|
|
|
s_add_u32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x80]
|
|
|
|
s_add_u32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x80]
|
|
|
|
s_add_u32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x80]
|
|
|
|
s_add_u32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x80]
|
|
|
|
s_add_u32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x80]
|
|
|
|
s_add_u32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x80]
|
|
|
|
s_add_u32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x80]
|
|
|
|
s_add_u32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x80]
|
|
|
|
s_add_u32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x80,0x56,0x34,0x12,0xaf]
|
|
|
|
s_add_u32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x80,0x73,0x72,0x71,0x3f]
|
|
|
|
s_add_u32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x80]
|
|
|
|
s_add_u32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x80]
|
|
|
|
s_add_u32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x80]
|
|
|
|
s_add_u32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x80]
|
|
|
|
s_add_u32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x80]
|
|
|
|
s_add_u32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x80]
|
|
|
|
s_add_u32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x80]
|
|
|
|
s_add_u32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x80]
|
|
|
|
s_add_u32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x80]
|
|
|
|
s_add_u32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x80]
|
|
|
|
s_add_u32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x80]
|
|
|
|
s_add_u32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x80]
|
|
|
|
s_add_u32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x80,0x56,0x34,0x12,0xaf]
|
|
|
|
s_add_u32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x80,0x73,0x72,0x71,0x3f]
|
|
|
|
s_sub_u32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x85,0x80]
|
|
|
|
s_sub_u32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0xe5,0x80]
|
|
|
|
s_sub_u32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xe6,0x80]
|
|
|
|
s_sub_u32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xe7,0x80]
|
|
|
|
s_sub_u32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xea,0x80]
|
|
|
|
s_sub_u32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xeb,0x80]
|
|
|
|
s_sub_u32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0xfc,0x80]
|
|
|
|
s_sub_u32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xfe,0x80]
|
|
|
|
s_sub_u32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xff,0x80]
|
|
|
|
s_sub_u32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x85,0x80]
|
|
|
|
s_sub_u32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x85,0x80]
|
|
|
|
s_sub_u32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x85,0x80]
|
|
|
|
s_sub_u32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x85,0x80]
|
|
|
|
s_sub_u32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x85,0x80]
|
|
|
|
s_sub_u32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x85,0x80]
|
|
|
|
s_sub_u32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x85,0x80]
|
|
|
|
s_sub_u32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x85,0x80]
|
|
|
|
s_sub_u32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x85,0x80]
|
|
|
|
s_sub_u32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x85,0x80]
|
|
|
|
s_sub_u32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x85,0x80]
|
|
|
|
s_sub_u32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x85,0x80]
|
|
|
|
s_sub_u32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x85,0x80,0x56,0x34,0x12,0xaf]
|
|
|
|
s_sub_u32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x85,0x80,0x73,0x72,0x71,0x3f]
|
|
|
|
s_sub_u32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x85,0x80]
|
|
|
|
s_sub_u32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x85,0x80]
|
|
|
|
s_sub_u32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x85,0x80]
|
|
|
|
s_sub_u32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x85,0x80]
|
|
|
|
s_sub_u32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x85,0x80]
|
|
|
|
s_sub_u32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x85,0x80]
|
|
|
|
s_sub_u32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x85,0x80]
|
|
|
|
s_sub_u32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x85,0x80]
|
|
|
|
s_sub_u32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x85,0x80]
|
|
|
|
s_sub_u32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x85,0x80]
|
|
|
|
s_sub_u32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x85,0x80]
|
|
|
|
s_sub_u32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x85,0x80]
|
|
|
|
s_sub_u32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x85,0x80,0x56,0x34,0x12,0xaf]
|
|
|
|
s_sub_u32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x85,0x80,0x73,0x72,0x71,0x3f]
|
|
|
|
s_add_i32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x81]
|
|
|
|
s_add_i32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x81]
|
|
|
|
s_add_i32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x81]
|
|
|
|
s_add_i32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x81]
|
|
|
|
s_add_i32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x81]
|
|
|
|
s_add_i32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x81]
|
|
|
|
s_add_i32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x81]
|
|
|
|
s_add_i32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x81]
|
|
|
|
s_add_i32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x81]
|
|
|
|
s_add_i32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x81]
|
|
|
|
s_add_i32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x81]
|
|
|
|
s_add_i32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x81]
|
|
|
|
s_add_i32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x81]
|
|
|
|
s_add_i32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x81]
|
|
|
|
s_add_i32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x81]
|
|
|
|
s_add_i32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x81]
|
|
|
|
s_add_i32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x81]
|
|
|
|
s_add_i32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x81]
|
|
|
|
s_add_i32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x81]
|
|
|
|
s_add_i32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x81]
|
|
|
|
s_add_i32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x81]
|
|
|
|
s_add_i32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x81,0x56,0x34,0x12,0xaf]
|
|
|
|
s_add_i32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x81,0x73,0x72,0x71,0x3f]
|
|
|
|
s_add_i32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x81]
|
|
|
|
s_add_i32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x81]
|
|
|
|
s_add_i32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x81]
|
|
|
|
s_add_i32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x81]
|
|
|
|
s_add_i32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x81]
|
|
|
|
s_add_i32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x81]
|
|
|
|
s_add_i32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x81]
|
|
|
|
s_add_i32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x81]
|
|
|
|
s_add_i32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x81]
|
|
|
|
s_add_i32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x81]
|
|
|
|
s_add_i32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x81]
|
|
|
|
s_add_i32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x81]
|
|
|
|
s_add_i32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x81,0x56,0x34,0x12,0xaf]
|
|
|
|
s_add_i32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x81,0x73,0x72,0x71,0x3f]
|
|
|
|
s_sub_i32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x85,0x81]
|
|
|
|
s_sub_i32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0xe5,0x81]
|
|
|
|
s_sub_i32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xe6,0x81]
|
|
|
|
s_sub_i32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xe7,0x81]
|
|
|
|
s_sub_i32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xea,0x81]
|
|
|
|
s_sub_i32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xeb,0x81]
|
|
|
|
s_sub_i32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0xfc,0x81]
|
|
|
|
s_sub_i32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xfe,0x81]
|
|
|
|
s_sub_i32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xff,0x81]
|
|
|
|
s_sub_i32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x85,0x81]
|
|
|
|
s_sub_i32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x85,0x81]
|
|
|
|
s_sub_i32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x85,0x81]
|
|
|
|
s_sub_i32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x85,0x81]
|
|
|
|
s_sub_i32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x85,0x81]
|
|
|
|
s_sub_i32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x85,0x81]
|
|
|
|
s_sub_i32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x85,0x81]
|
|
|
|
s_sub_i32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x85,0x81]
|
|
|
|
s_sub_i32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x85,0x81]
|
|
|
|
s_sub_i32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x85,0x81]
|
|
|
|
s_sub_i32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x85,0x81]
|
|
|
|
s_sub_i32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x85,0x81]
|
|
|
|
s_sub_i32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x85,0x81,0x56,0x34,0x12,0xaf]
|
|
|
|
s_sub_i32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x85,0x81,0x73,0x72,0x71,0x3f]
|
|
|
|
s_sub_i32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x85,0x81]
|
|
|
|
s_sub_i32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x85,0x81]
|
|
|
|
s_sub_i32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x85,0x81]
|
|
|
|
s_sub_i32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x85,0x81]
|
|
|
|
s_sub_i32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x85,0x81]
|
|
|
|
s_sub_i32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x85,0x81]
|
|
|
|
s_sub_i32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x85,0x81]
|
|
|
|
s_sub_i32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x85,0x81]
|
|
|
|
s_sub_i32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x85,0x81]
|
|
|
|
s_sub_i32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x85,0x81]
|
|
|
|
s_sub_i32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x85,0x81]
|
|
|
|
s_sub_i32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x85,0x81]
|
|
|
|
s_sub_i32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x85,0x81,0x56,0x34,0x12,0xaf]
|
|
|
|
s_sub_i32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x85,0x81,0x73,0x72,0x71,0x3f]
|
|
|
|
s_addc_u32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x82]
|
|
|
|
s_addc_u32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x82]
|
|
|
|
s_addc_u32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x82]
|
|
|
|
s_addc_u32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x82]
|
|
|
|
s_addc_u32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x82]
|
|
|
|
s_addc_u32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x82]
|
|
|
|
s_addc_u32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x82]
|
|
|
|
s_addc_u32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x82]
|
|
|
|
s_addc_u32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x82]
|
|
|
|
s_addc_u32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x82]
|
|
|
|
s_addc_u32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x82]
|
|
|
|
s_addc_u32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x82]
|
|
|
|
s_addc_u32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x82]
|
|
|
|
s_addc_u32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x82]
|
|
|
|
s_addc_u32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x82]
|
|
|
|
s_addc_u32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x82]
|
|
|
|
s_addc_u32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x82]
|
|
|
|
s_addc_u32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x82]
|
|
|
|
s_addc_u32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x82]
|
|
|
|
s_addc_u32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x82]
|
|
|
|
s_addc_u32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x82]
|
|
|
|
s_addc_u32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x82,0x56,0x34,0x12,0xaf]
|
|
|
|
s_addc_u32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x82,0x73,0x72,0x71,0x3f]
|
|
|
|
s_addc_u32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x82]
|
|
|
|
s_addc_u32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x82]
|
|
|
|
s_addc_u32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x82]
|
|
|
|
s_addc_u32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x82]
|
|
|
|
s_addc_u32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x82]
|
|
|
|
s_addc_u32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x82]
|
|
|
|
s_addc_u32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x82]
|
|
|
|
s_addc_u32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x82]
|
|
|
|
s_addc_u32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x82]
|
|
|
|
s_addc_u32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x82]
|
|
|
|
s_addc_u32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x82]
|
|
|
|
s_addc_u32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x82]
|
|
|
|
s_addc_u32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x82,0x56,0x34,0x12,0xaf]
|
|
|
|
s_addc_u32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x82,0x73,0x72,0x71,0x3f]
|
|
|
|
s_subb_u32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x85,0x82]
|
|
|
|
s_subb_u32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0xe5,0x82]
|
|
|
|
s_subb_u32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xe6,0x82]
|
|
|
|
s_subb_u32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xe7,0x82]
|
|
|
|
s_subb_u32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xea,0x82]
|
|
|
|
s_subb_u32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xeb,0x82]
|
|
|
|
s_subb_u32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0xfc,0x82]
|
|
|
|
s_subb_u32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xfe,0x82]
|
|
|
|
s_subb_u32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xff,0x82]
|
|
|
|
s_subb_u32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x85,0x82]
|
|
|
|
s_subb_u32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x85,0x82]
|
|
|
|
s_subb_u32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x85,0x82]
|
|
|
|
s_subb_u32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x85,0x82]
|
|
|
|
s_subb_u32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x85,0x82]
|
|
|
|
s_subb_u32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x85,0x82]
|
|
|
|
s_subb_u32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x85,0x82]
|
|
|
|
s_subb_u32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x85,0x82]
|
|
|
|
s_subb_u32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x85,0x82]
|
|
|
|
s_subb_u32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x85,0x82]
|
|
|
|
s_subb_u32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x85,0x82]
|
|
|
|
s_subb_u32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x85,0x82]
|
|
|
|
s_subb_u32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x85,0x82,0x56,0x34,0x12,0xaf]
|
|
|
|
s_subb_u32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x85,0x82,0x73,0x72,0x71,0x3f]
|
|
|
|
s_subb_u32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x85,0x82]
|
|
|
|
s_subb_u32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x85,0x82]
|
|
|
|
s_subb_u32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x85,0x82]
|
|
|
|
s_subb_u32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x85,0x82]
|
|
|
|
s_subb_u32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x85,0x82]
|
|
|
|
s_subb_u32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x85,0x82]
|
|
|
|
s_subb_u32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x85,0x82]
|
|
|
|
s_subb_u32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x85,0x82]
|
|
|
|
s_subb_u32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x85,0x82]
|
|
|
|
s_subb_u32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x85,0x82]
|
|
|
|
s_subb_u32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x85,0x82]
|
|
|
|
s_subb_u32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x85,0x82]
|
|
|
|
s_subb_u32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x85,0x82,0x56,0x34,0x12,0xaf]
|
|
|
|
s_subb_u32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x85,0x82,0x73,0x72,0x71,0x3f]
|
|
|
|
s_min_i32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x83]
|
|
|
|
s_min_i32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x83]
|
|
|
|
s_min_i32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x83]
|
|
|
|
s_min_i32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x83]
|
|
|
|
s_min_i32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x83]
|
|
|
|
s_min_i32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x83]
|
|
|
|
s_min_i32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x83]
|
|
|
|
s_min_i32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x83]
|
|
|
|
s_min_i32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x83]
|
|
|
|
s_min_i32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x83]
|
|
|
|
s_min_i32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x83]
|
|
|
|
s_min_i32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x83]
|
|
|
|
s_min_i32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x83]
|
|
|
|
s_min_i32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x83]
|
|
|
|
s_min_i32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x83]
|
|
|
|
s_min_i32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x83]
|
|
|
|
s_min_i32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x83]
|
|
|
|
s_min_i32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x83]
|
|
|
|
s_min_i32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x83]
|
|
|
|
s_min_i32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x83]
|
|
|
|
s_min_i32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x83]
|
|
|
|
s_min_i32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x83,0x56,0x34,0x12,0xaf]
|
|
|
|
s_min_i32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x83,0x73,0x72,0x71,0x3f]
|
|
|
|
s_min_i32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x83]
|
|
|
|
s_min_i32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x83]
|
|
|
|
s_min_i32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x83]
|
|
|
|
s_min_i32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x83]
|
|
|
|
s_min_i32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x83]
|
|
|
|
s_min_i32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x83]
|
|
|
|
s_min_i32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x83]
|
|
|
|
s_min_i32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x83]
|
|
|
|
s_min_i32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x83]
|
|
|
|
s_min_i32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x83]
|
|
|
|
s_min_i32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x83]
|
|
|
|
s_min_i32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x83]
|
|
|
|
s_min_i32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x83,0x56,0x34,0x12,0xaf]
|
|
|
|
s_min_i32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x83,0x73,0x72,0x71,0x3f]
|
|
|
|
s_min_u32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x85,0x83]
|
|
|
|
s_min_u32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0xe5,0x83]
|
|
|
|
s_min_u32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xe6,0x83]
|
|
|
|
s_min_u32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xe7,0x83]
|
|
|
|
s_min_u32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xea,0x83]
|
|
|
|
s_min_u32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xeb,0x83]
|
|
|
|
s_min_u32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0xfc,0x83]
|
|
|
|
s_min_u32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xfe,0x83]
|
|
|
|
s_min_u32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xff,0x83]
|
|
|
|
s_min_u32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x85,0x83]
|
|
|
|
s_min_u32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x85,0x83]
|
|
|
|
s_min_u32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x85,0x83]
|
|
|
|
s_min_u32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x85,0x83]
|
|
|
|
s_min_u32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x85,0x83]
|
|
|
|
s_min_u32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x85,0x83]
|
|
|
|
s_min_u32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x85,0x83]
|
|
|
|
s_min_u32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x85,0x83]
|
|
|
|
s_min_u32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x85,0x83]
|
|
|
|
s_min_u32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x85,0x83]
|
|
|
|
s_min_u32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x85,0x83]
|
|
|
|
s_min_u32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x85,0x83]
|
|
|
|
s_min_u32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x85,0x83,0x56,0x34,0x12,0xaf]
|
|
|
|
s_min_u32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x85,0x83,0x73,0x72,0x71,0x3f]
|
|
|
|
s_min_u32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x85,0x83]
|
|
|
|
s_min_u32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x85,0x83]
|
|
|
|
s_min_u32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x85,0x83]
|
|
|
|
s_min_u32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x85,0x83]
|
|
|
|
s_min_u32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x85,0x83]
|
|
|
|
s_min_u32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x85,0x83]
|
|
|
|
s_min_u32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x85,0x83]
|
|
|
|
s_min_u32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x85,0x83]
|
|
|
|
s_min_u32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x85,0x83]
|
|
|
|
s_min_u32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x85,0x83]
|
|
|
|
s_min_u32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x85,0x83]
|
|
|
|
s_min_u32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x85,0x83]
|
|
|
|
s_min_u32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x85,0x83,0x56,0x34,0x12,0xaf]
|
|
|
|
s_min_u32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x85,0x83,0x73,0x72,0x71,0x3f]
|
|
|
|
s_max_i32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x84]
|
|
|
|
s_max_i32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x84]
|
|
|
|
s_max_i32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x84]
|
|
|
|
s_max_i32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x84]
|
|
|
|
s_max_i32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x84]
|
|
|
|
s_max_i32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x84]
|
|
|
|
s_max_i32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x84]
|
|
|
|
s_max_i32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x84]
|
|
|
|
s_max_i32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x84]
|
|
|
|
s_max_i32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x84]
|
|
|
|
s_max_i32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x84]
|
|
|
|
s_max_i32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x84]
|
|
|
|
s_max_i32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x84]
|
|
|
|
s_max_i32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x84]
|
|
|
|
s_max_i32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x84]
|
|
|
|
s_max_i32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x84]
|
|
|
|
s_max_i32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x84]
|
|
|
|
s_max_i32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x84]
|
|
|
|
s_max_i32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x84]
|
|
|
|
s_max_i32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x84]
|
|
|
|
s_max_i32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x84]
|
|
|
|
s_max_i32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x84,0x56,0x34,0x12,0xaf]
|
|
|
|
s_max_i32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x84,0x73,0x72,0x71,0x3f]
|
|
|
|
s_max_i32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x84]
|
|
|
|
s_max_i32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x84]
|
|
|
|
s_max_i32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x84]
|
|
|
|
s_max_i32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x84]
|
|
|
|
s_max_i32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x84]
|
|
|
|
s_max_i32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x84]
|
|
|
|
s_max_i32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x84]
|
|
|
|
s_max_i32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x84]
|
|
|
|
s_max_i32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x84]
|
|
|
|
s_max_i32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x84]
|
|
|
|
s_max_i32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x84]
|
|
|
|
s_max_i32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x84]
|
|
|
|
s_max_i32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x84,0x56,0x34,0x12,0xaf]
|
|
|
|
s_max_i32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x84,0x73,0x72,0x71,0x3f]
|
|
|
|
s_max_u32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x85,0x84]
|
|
|
|
s_max_u32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0xe5,0x84]
|
|
|
|
s_max_u32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xe6,0x84]
|
|
|
|
s_max_u32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xe7,0x84]
|
|
|
|
s_max_u32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xea,0x84]
|
|
|
|
s_max_u32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xeb,0x84]
|
|
|
|
s_max_u32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0xfc,0x84]
|
|
|
|
s_max_u32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xfe,0x84]
|
|
|
|
s_max_u32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xff,0x84]
|
|
|
|
s_max_u32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x85,0x84]
|
|
|
|
s_max_u32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x85,0x84]
|
|
|
|
s_max_u32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x85,0x84]
|
|
|
|
s_max_u32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x85,0x84]
|
|
|
|
s_max_u32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x85,0x84]
|
|
|
|
s_max_u32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x85,0x84]
|
|
|
|
s_max_u32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x85,0x84]
|
|
|
|
s_max_u32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x85,0x84]
|
|
|
|
s_max_u32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x85,0x84]
|
|
|
|
s_max_u32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x85,0x84]
|
|
|
|
s_max_u32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x85,0x84]
|
|
|
|
s_max_u32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x85,0x84]
|
|
|
|
s_max_u32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x85,0x84,0x56,0x34,0x12,0xaf]
|
|
|
|
s_max_u32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x85,0x84,0x73,0x72,0x71,0x3f]
|
|
|
|
s_max_u32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x85,0x84]
|
|
|
|
s_max_u32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x85,0x84]
|
|
|
|
s_max_u32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x85,0x84]
|
|
|
|
s_max_u32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x85,0x84]
|
|
|
|
s_max_u32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x85,0x84]
|
|
|
|
s_max_u32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x85,0x84]
|
|
|
|
s_max_u32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x85,0x84]
|
|
|
|
s_max_u32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x85,0x84]
|
|
|
|
s_max_u32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x85,0x84]
|
|
|
|
s_max_u32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x85,0x84]
|
|
|
|
s_max_u32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x85,0x84]
|
|
|
|
s_max_u32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x85,0x84]
|
|
|
|
s_max_u32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x85,0x84,0x56,0x34,0x12,0xaf]
|
|
|
|
s_max_u32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x85,0x84,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cselect_b32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x85]
|
|
|
|
s_cselect_b32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x85]
|
|
|
|
s_cselect_b32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x85]
|
|
|
|
s_cselect_b32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x85]
|
|
|
|
s_cselect_b32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x85]
|
|
|
|
s_cselect_b32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x85]
|
|
|
|
s_cselect_b32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x85]
|
|
|
|
s_cselect_b32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x85]
|
|
|
|
s_cselect_b32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x85]
|
|
|
|
s_cselect_b32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x85,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cselect_b32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x85,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cselect_b32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x85]
|
|
|
|
s_cselect_b32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x85,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cselect_b32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x85,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cselect_b64 s[10:11], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[12:13], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8c,0x85]
|
|
|
|
s_cselect_b64 s[100:101], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe4,0x85]
|
|
|
|
s_cselect_b64 flat_scratch, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe6,0x85]
|
|
|
|
s_cselect_b64 vcc, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xea,0x85]
|
|
|
|
s_cselect_b64 exec, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xfe,0x85]
|
|
|
|
s_cselect_b64 s[10:11], s[4:5], s[4:5]
|
|
// CHECK: [0x04,0x04,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], s[100:101], s[4:5]
|
|
// CHECK: [0x64,0x04,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], flat_scratch, s[4:5]
|
|
// CHECK: [0x66,0x04,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], vcc, s[4:5]
|
|
// CHECK: [0x6a,0x04,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], exec, s[4:5]
|
|
// CHECK: [0x7e,0x04,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], 0, s[4:5]
|
|
// CHECK: [0x80,0x04,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], -1, s[4:5]
|
|
// CHECK: [0xc1,0x04,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], 0.5, s[4:5]
|
|
// CHECK: [0xf0,0x04,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], -4.0, s[4:5]
|
|
// CHECK: [0xf7,0x04,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], 0xaf123456, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x85,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cselect_b64 s[10:11], 0x3f717273, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x85,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cselect_b64 s[10:11], s[2:3], s[6:7]
|
|
// CHECK: [0x02,0x06,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], s[2:3], s[100:101]
|
|
// CHECK: [0x02,0x64,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], s[2:3], flat_scratch
|
|
// CHECK: [0x02,0x66,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], s[2:3], vcc
|
|
// CHECK: [0x02,0x6a,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], s[2:3], exec
|
|
// CHECK: [0x02,0x7e,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x8a,0x85]
|
|
|
|
s_cselect_b64 s[10:11], s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x8a,0x85,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cselect_b64 s[10:11], s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x8a,0x85,0x73,0x72,0x71,0x3f]
|
|
|
|
s_and_b32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x86]
|
|
|
|
s_and_b32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x86]
|
|
|
|
s_and_b32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x86]
|
|
|
|
s_and_b32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x86]
|
|
|
|
s_and_b32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x86]
|
|
|
|
s_and_b32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x86]
|
|
|
|
s_and_b32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x86]
|
|
|
|
s_and_b32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x86]
|
|
|
|
s_and_b32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x86]
|
|
|
|
s_and_b32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x86]
|
|
|
|
s_and_b32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x86]
|
|
|
|
s_and_b32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x86]
|
|
|
|
s_and_b32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x86]
|
|
|
|
s_and_b32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x86]
|
|
|
|
s_and_b32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x86]
|
|
|
|
s_and_b32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x86]
|
|
|
|
s_and_b32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x86]
|
|
|
|
s_and_b32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x86]
|
|
|
|
s_and_b32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x86]
|
|
|
|
s_and_b32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x86]
|
|
|
|
s_and_b32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x86]
|
|
|
|
s_and_b32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x86,0x56,0x34,0x12,0xaf]
|
|
|
|
s_and_b32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x86,0x73,0x72,0x71,0x3f]
|
|
|
|
s_and_b32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x86]
|
|
|
|
s_and_b32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x86]
|
|
|
|
s_and_b32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x86]
|
|
|
|
s_and_b32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x86]
|
|
|
|
s_and_b32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x86]
|
|
|
|
s_and_b32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x86]
|
|
|
|
s_and_b32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x86]
|
|
|
|
s_and_b32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x86]
|
|
|
|
s_and_b32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x86]
|
|
|
|
s_and_b32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x86]
|
|
|
|
s_and_b32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x86]
|
|
|
|
s_and_b32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x86]
|
|
|
|
s_and_b32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x86,0x56,0x34,0x12,0xaf]
|
|
|
|
s_and_b32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x86,0x73,0x72,0x71,0x3f]
|
|
|
|
s_and_b64 s[10:11], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8a,0x86]
|
|
|
|
s_and_b64 s[12:13], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8c,0x86]
|
|
|
|
s_and_b64 s[100:101], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe4,0x86]
|
|
|
|
s_and_b64 flat_scratch, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe6,0x86]
|
|
|
|
s_and_b64 vcc, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xea,0x86]
|
|
|
|
s_and_b64 exec, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xfe,0x86]
|
|
|
|
s_and_b64 s[10:11], s[4:5], s[4:5]
|
|
// CHECK: [0x04,0x04,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], s[100:101], s[4:5]
|
|
// CHECK: [0x64,0x04,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], flat_scratch, s[4:5]
|
|
// CHECK: [0x66,0x04,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], vcc, s[4:5]
|
|
// CHECK: [0x6a,0x04,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], exec, s[4:5]
|
|
// CHECK: [0x7e,0x04,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], 0, s[4:5]
|
|
// CHECK: [0x80,0x04,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], -1, s[4:5]
|
|
// CHECK: [0xc1,0x04,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], 0.5, s[4:5]
|
|
// CHECK: [0xf0,0x04,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], -4.0, s[4:5]
|
|
// CHECK: [0xf7,0x04,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], 0xaf123456, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x86,0x56,0x34,0x12,0xaf]
|
|
|
|
s_and_b64 s[10:11], 0x3f717273, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x86,0x73,0x72,0x71,0x3f]
|
|
|
|
s_and_b64 s[10:11], s[2:3], s[6:7]
|
|
// CHECK: [0x02,0x06,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], s[2:3], s[100:101]
|
|
// CHECK: [0x02,0x64,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], s[2:3], flat_scratch
|
|
// CHECK: [0x02,0x66,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], s[2:3], vcc
|
|
// CHECK: [0x02,0x6a,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], s[2:3], exec
|
|
// CHECK: [0x02,0x7e,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x8a,0x86]
|
|
|
|
s_and_b64 s[10:11], s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x8a,0x86,0x56,0x34,0x12,0xaf]
|
|
|
|
s_and_b64 s[10:11], s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x8a,0x86,0x73,0x72,0x71,0x3f]
|
|
|
|
s_or_b32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x87]
|
|
|
|
s_or_b32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x87]
|
|
|
|
s_or_b32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x87]
|
|
|
|
s_or_b32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x87]
|
|
|
|
s_or_b32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x87]
|
|
|
|
s_or_b32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x87]
|
|
|
|
s_or_b32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x87]
|
|
|
|
s_or_b32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x87]
|
|
|
|
s_or_b32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x87]
|
|
|
|
s_or_b32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x87]
|
|
|
|
s_or_b32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x87]
|
|
|
|
s_or_b32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x87]
|
|
|
|
s_or_b32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x87]
|
|
|
|
s_or_b32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x87]
|
|
|
|
s_or_b32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x87]
|
|
|
|
s_or_b32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x87]
|
|
|
|
s_or_b32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x87]
|
|
|
|
s_or_b32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x87]
|
|
|
|
s_or_b32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x87]
|
|
|
|
s_or_b32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x87]
|
|
|
|
s_or_b32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x87]
|
|
|
|
s_or_b32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x87,0x56,0x34,0x12,0xaf]
|
|
|
|
s_or_b32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x87,0x73,0x72,0x71,0x3f]
|
|
|
|
s_or_b32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x87]
|
|
|
|
s_or_b32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x87]
|
|
|
|
s_or_b32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x87]
|
|
|
|
s_or_b32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x87]
|
|
|
|
s_or_b32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x87]
|
|
|
|
s_or_b32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x87]
|
|
|
|
s_or_b32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x87]
|
|
|
|
s_or_b32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x87]
|
|
|
|
s_or_b32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x87]
|
|
|
|
s_or_b32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x87]
|
|
|
|
s_or_b32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x87]
|
|
|
|
s_or_b32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x87]
|
|
|
|
s_or_b32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x87,0x56,0x34,0x12,0xaf]
|
|
|
|
s_or_b32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x87,0x73,0x72,0x71,0x3f]
|
|
|
|
s_or_b64 s[10:11], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8a,0x87]
|
|
|
|
s_or_b64 s[12:13], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8c,0x87]
|
|
|
|
s_or_b64 s[100:101], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe4,0x87]
|
|
|
|
s_or_b64 flat_scratch, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe6,0x87]
|
|
|
|
s_or_b64 vcc, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xea,0x87]
|
|
|
|
s_or_b64 exec, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xfe,0x87]
|
|
|
|
s_or_b64 s[10:11], s[4:5], s[4:5]
|
|
// CHECK: [0x04,0x04,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], s[100:101], s[4:5]
|
|
// CHECK: [0x64,0x04,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], flat_scratch, s[4:5]
|
|
// CHECK: [0x66,0x04,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], vcc, s[4:5]
|
|
// CHECK: [0x6a,0x04,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], exec, s[4:5]
|
|
// CHECK: [0x7e,0x04,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], 0, s[4:5]
|
|
// CHECK: [0x80,0x04,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], -1, s[4:5]
|
|
// CHECK: [0xc1,0x04,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], 0.5, s[4:5]
|
|
// CHECK: [0xf0,0x04,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], -4.0, s[4:5]
|
|
// CHECK: [0xf7,0x04,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], 0xaf123456, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x87,0x56,0x34,0x12,0xaf]
|
|
|
|
s_or_b64 s[10:11], 0x3f717273, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x87,0x73,0x72,0x71,0x3f]
|
|
|
|
s_or_b64 s[10:11], s[2:3], s[6:7]
|
|
// CHECK: [0x02,0x06,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], s[2:3], s[100:101]
|
|
// CHECK: [0x02,0x64,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], s[2:3], flat_scratch
|
|
// CHECK: [0x02,0x66,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], s[2:3], vcc
|
|
// CHECK: [0x02,0x6a,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], s[2:3], exec
|
|
// CHECK: [0x02,0x7e,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x8a,0x87]
|
|
|
|
s_or_b64 s[10:11], s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x8a,0x87,0x56,0x34,0x12,0xaf]
|
|
|
|
s_or_b64 s[10:11], s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x8a,0x87,0x73,0x72,0x71,0x3f]
|
|
|
|
s_xor_b32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x88]
|
|
|
|
s_xor_b32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x88]
|
|
|
|
s_xor_b32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x88]
|
|
|
|
s_xor_b32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x88]
|
|
|
|
s_xor_b32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x88]
|
|
|
|
s_xor_b32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x88]
|
|
|
|
s_xor_b32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x88]
|
|
|
|
s_xor_b32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x88]
|
|
|
|
s_xor_b32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x88]
|
|
|
|
s_xor_b32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x88]
|
|
|
|
s_xor_b32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x88]
|
|
|
|
s_xor_b32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x88]
|
|
|
|
s_xor_b32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x88]
|
|
|
|
s_xor_b32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x88]
|
|
|
|
s_xor_b32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x88]
|
|
|
|
s_xor_b32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x88]
|
|
|
|
s_xor_b32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x88]
|
|
|
|
s_xor_b32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x88]
|
|
|
|
s_xor_b32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x88]
|
|
|
|
s_xor_b32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x88]
|
|
|
|
s_xor_b32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x88]
|
|
|
|
s_xor_b32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x88,0x56,0x34,0x12,0xaf]
|
|
|
|
s_xor_b32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x88,0x73,0x72,0x71,0x3f]
|
|
|
|
s_xor_b32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x88]
|
|
|
|
s_xor_b32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x88]
|
|
|
|
s_xor_b32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x88]
|
|
|
|
s_xor_b32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x88]
|
|
|
|
s_xor_b32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x88]
|
|
|
|
s_xor_b32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x88]
|
|
|
|
s_xor_b32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x88]
|
|
|
|
s_xor_b32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x88]
|
|
|
|
s_xor_b32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x88]
|
|
|
|
s_xor_b32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x88]
|
|
|
|
s_xor_b32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x88]
|
|
|
|
s_xor_b32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x88]
|
|
|
|
s_xor_b32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x88,0x56,0x34,0x12,0xaf]
|
|
|
|
s_xor_b32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x88,0x73,0x72,0x71,0x3f]
|
|
|
|
s_xor_b64 s[10:11], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8a,0x88]
|
|
|
|
s_xor_b64 s[12:13], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8c,0x88]
|
|
|
|
s_xor_b64 s[100:101], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe4,0x88]
|
|
|
|
s_xor_b64 flat_scratch, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe6,0x88]
|
|
|
|
s_xor_b64 vcc, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xea,0x88]
|
|
|
|
s_xor_b64 exec, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xfe,0x88]
|
|
|
|
s_xor_b64 s[10:11], s[4:5], s[4:5]
|
|
// CHECK: [0x04,0x04,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], s[100:101], s[4:5]
|
|
// CHECK: [0x64,0x04,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], flat_scratch, s[4:5]
|
|
// CHECK: [0x66,0x04,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], vcc, s[4:5]
|
|
// CHECK: [0x6a,0x04,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], exec, s[4:5]
|
|
// CHECK: [0x7e,0x04,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], 0, s[4:5]
|
|
// CHECK: [0x80,0x04,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], -1, s[4:5]
|
|
// CHECK: [0xc1,0x04,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], 0.5, s[4:5]
|
|
// CHECK: [0xf0,0x04,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], -4.0, s[4:5]
|
|
// CHECK: [0xf7,0x04,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], 0xaf123456, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x88,0x56,0x34,0x12,0xaf]
|
|
|
|
s_xor_b64 s[10:11], 0x3f717273, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x88,0x73,0x72,0x71,0x3f]
|
|
|
|
s_xor_b64 s[10:11], s[2:3], s[6:7]
|
|
// CHECK: [0x02,0x06,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], s[2:3], s[100:101]
|
|
// CHECK: [0x02,0x64,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], s[2:3], flat_scratch
|
|
// CHECK: [0x02,0x66,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], s[2:3], vcc
|
|
// CHECK: [0x02,0x6a,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], s[2:3], exec
|
|
// CHECK: [0x02,0x7e,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x8a,0x88]
|
|
|
|
s_xor_b64 s[10:11], s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x8a,0x88,0x56,0x34,0x12,0xaf]
|
|
|
|
s_xor_b64 s[10:11], s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x8a,0x88,0x73,0x72,0x71,0x3f]
|
|
|
|
s_andn2_b32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x89]
|
|
|
|
s_andn2_b32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x89]
|
|
|
|
s_andn2_b32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x89]
|
|
|
|
s_andn2_b32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x89]
|
|
|
|
s_andn2_b32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x89]
|
|
|
|
s_andn2_b32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x89]
|
|
|
|
s_andn2_b32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x89]
|
|
|
|
s_andn2_b32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x89]
|
|
|
|
s_andn2_b32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x89]
|
|
|
|
s_andn2_b32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x89,0x56,0x34,0x12,0xaf]
|
|
|
|
s_andn2_b32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x89,0x73,0x72,0x71,0x3f]
|
|
|
|
s_andn2_b32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x89]
|
|
|
|
s_andn2_b32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x89,0x56,0x34,0x12,0xaf]
|
|
|
|
s_andn2_b32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x89,0x73,0x72,0x71,0x3f]
|
|
|
|
s_andn2_b64 s[10:11], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[12:13], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8c,0x89]
|
|
|
|
s_andn2_b64 s[100:101], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe4,0x89]
|
|
|
|
s_andn2_b64 flat_scratch, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe6,0x89]
|
|
|
|
s_andn2_b64 vcc, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xea,0x89]
|
|
|
|
s_andn2_b64 exec, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xfe,0x89]
|
|
|
|
s_andn2_b64 s[10:11], s[4:5], s[4:5]
|
|
// CHECK: [0x04,0x04,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], s[100:101], s[4:5]
|
|
// CHECK: [0x64,0x04,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], flat_scratch, s[4:5]
|
|
// CHECK: [0x66,0x04,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], vcc, s[4:5]
|
|
// CHECK: [0x6a,0x04,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], exec, s[4:5]
|
|
// CHECK: [0x7e,0x04,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], 0, s[4:5]
|
|
// CHECK: [0x80,0x04,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], -1, s[4:5]
|
|
// CHECK: [0xc1,0x04,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], 0.5, s[4:5]
|
|
// CHECK: [0xf0,0x04,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], -4.0, s[4:5]
|
|
// CHECK: [0xf7,0x04,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], 0xaf123456, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x89,0x56,0x34,0x12,0xaf]
|
|
|
|
s_andn2_b64 s[10:11], 0x3f717273, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x89,0x73,0x72,0x71,0x3f]
|
|
|
|
s_andn2_b64 s[10:11], s[2:3], s[6:7]
|
|
// CHECK: [0x02,0x06,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], s[2:3], s[100:101]
|
|
// CHECK: [0x02,0x64,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], s[2:3], flat_scratch
|
|
// CHECK: [0x02,0x66,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], s[2:3], vcc
|
|
// CHECK: [0x02,0x6a,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], s[2:3], exec
|
|
// CHECK: [0x02,0x7e,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x8a,0x89]
|
|
|
|
s_andn2_b64 s[10:11], s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x8a,0x89,0x56,0x34,0x12,0xaf]
|
|
|
|
s_andn2_b64 s[10:11], s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x8a,0x89,0x73,0x72,0x71,0x3f]
|
|
|
|
s_orn2_b32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x8a]
|
|
|
|
s_orn2_b32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x8a]
|
|
|
|
s_orn2_b32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x8a]
|
|
|
|
s_orn2_b32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x8a]
|
|
|
|
s_orn2_b32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x8a]
|
|
|
|
s_orn2_b32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x8a]
|
|
|
|
s_orn2_b32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x8a]
|
|
|
|
s_orn2_b32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x8a]
|
|
|
|
s_orn2_b32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x8a]
|
|
|
|
s_orn2_b32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x8a,0x56,0x34,0x12,0xaf]
|
|
|
|
s_orn2_b32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x8a,0x73,0x72,0x71,0x3f]
|
|
|
|
s_orn2_b32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x8a]
|
|
|
|
s_orn2_b32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x8a,0x56,0x34,0x12,0xaf]
|
|
|
|
s_orn2_b32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x8a,0x73,0x72,0x71,0x3f]
|
|
|
|
s_orn2_b64 s[10:11], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[12:13], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8c,0x8a]
|
|
|
|
s_orn2_b64 s[100:101], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe4,0x8a]
|
|
|
|
s_orn2_b64 flat_scratch, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe6,0x8a]
|
|
|
|
s_orn2_b64 vcc, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xea,0x8a]
|
|
|
|
s_orn2_b64 exec, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xfe,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], s[4:5], s[4:5]
|
|
// CHECK: [0x04,0x04,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], s[100:101], s[4:5]
|
|
// CHECK: [0x64,0x04,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], flat_scratch, s[4:5]
|
|
// CHECK: [0x66,0x04,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], vcc, s[4:5]
|
|
// CHECK: [0x6a,0x04,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], exec, s[4:5]
|
|
// CHECK: [0x7e,0x04,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], 0, s[4:5]
|
|
// CHECK: [0x80,0x04,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], -1, s[4:5]
|
|
// CHECK: [0xc1,0x04,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], 0.5, s[4:5]
|
|
// CHECK: [0xf0,0x04,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], -4.0, s[4:5]
|
|
// CHECK: [0xf7,0x04,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], 0xaf123456, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x8a,0x56,0x34,0x12,0xaf]
|
|
|
|
s_orn2_b64 s[10:11], 0x3f717273, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x8a,0x73,0x72,0x71,0x3f]
|
|
|
|
s_orn2_b64 s[10:11], s[2:3], s[6:7]
|
|
// CHECK: [0x02,0x06,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], s[2:3], s[100:101]
|
|
// CHECK: [0x02,0x64,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], s[2:3], flat_scratch
|
|
// CHECK: [0x02,0x66,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], s[2:3], vcc
|
|
// CHECK: [0x02,0x6a,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], s[2:3], exec
|
|
// CHECK: [0x02,0x7e,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x8a,0x8a]
|
|
|
|
s_orn2_b64 s[10:11], s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x8a,0x8a,0x56,0x34,0x12,0xaf]
|
|
|
|
s_orn2_b64 s[10:11], s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x8a,0x8a,0x73,0x72,0x71,0x3f]
|
|
|
|
s_nand_b32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x8b]
|
|
|
|
s_nand_b32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x8b]
|
|
|
|
s_nand_b32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x8b]
|
|
|
|
s_nand_b32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x8b]
|
|
|
|
s_nand_b32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x8b]
|
|
|
|
s_nand_b32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x8b]
|
|
|
|
s_nand_b32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x8b]
|
|
|
|
s_nand_b32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x8b]
|
|
|
|
s_nand_b32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x8b]
|
|
|
|
s_nand_b32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x8b,0x56,0x34,0x12,0xaf]
|
|
|
|
s_nand_b32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x8b,0x73,0x72,0x71,0x3f]
|
|
|
|
s_nand_b32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x8b]
|
|
|
|
s_nand_b32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x8b,0x56,0x34,0x12,0xaf]
|
|
|
|
s_nand_b32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x8b,0x73,0x72,0x71,0x3f]
|
|
|
|
s_nand_b64 s[10:11], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[12:13], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8c,0x8b]
|
|
|
|
s_nand_b64 s[100:101], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe4,0x8b]
|
|
|
|
s_nand_b64 flat_scratch, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe6,0x8b]
|
|
|
|
s_nand_b64 vcc, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xea,0x8b]
|
|
|
|
s_nand_b64 exec, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xfe,0x8b]
|
|
|
|
s_nand_b64 s[10:11], s[4:5], s[4:5]
|
|
// CHECK: [0x04,0x04,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], s[100:101], s[4:5]
|
|
// CHECK: [0x64,0x04,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], flat_scratch, s[4:5]
|
|
// CHECK: [0x66,0x04,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], vcc, s[4:5]
|
|
// CHECK: [0x6a,0x04,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], exec, s[4:5]
|
|
// CHECK: [0x7e,0x04,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], 0, s[4:5]
|
|
// CHECK: [0x80,0x04,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], -1, s[4:5]
|
|
// CHECK: [0xc1,0x04,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], 0.5, s[4:5]
|
|
// CHECK: [0xf0,0x04,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], -4.0, s[4:5]
|
|
// CHECK: [0xf7,0x04,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], 0xaf123456, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x8b,0x56,0x34,0x12,0xaf]
|
|
|
|
s_nand_b64 s[10:11], 0x3f717273, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x8b,0x73,0x72,0x71,0x3f]
|
|
|
|
s_nand_b64 s[10:11], s[2:3], s[6:7]
|
|
// CHECK: [0x02,0x06,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], s[2:3], s[100:101]
|
|
// CHECK: [0x02,0x64,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], s[2:3], flat_scratch
|
|
// CHECK: [0x02,0x66,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], s[2:3], vcc
|
|
// CHECK: [0x02,0x6a,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], s[2:3], exec
|
|
// CHECK: [0x02,0x7e,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x8a,0x8b]
|
|
|
|
s_nand_b64 s[10:11], s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x8a,0x8b,0x56,0x34,0x12,0xaf]
|
|
|
|
s_nand_b64 s[10:11], s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x8a,0x8b,0x73,0x72,0x71,0x3f]
|
|
|
|
s_nor_b32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x8c]
|
|
|
|
s_nor_b32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x8c]
|
|
|
|
s_nor_b32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x8c]
|
|
|
|
s_nor_b32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x8c]
|
|
|
|
s_nor_b32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x8c]
|
|
|
|
s_nor_b32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x8c]
|
|
|
|
s_nor_b32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x8c]
|
|
|
|
s_nor_b32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x8c]
|
|
|
|
s_nor_b32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x8c]
|
|
|
|
s_nor_b32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x8c,0x56,0x34,0x12,0xaf]
|
|
|
|
s_nor_b32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x8c,0x73,0x72,0x71,0x3f]
|
|
|
|
s_nor_b32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x8c]
|
|
|
|
s_nor_b32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x8c,0x56,0x34,0x12,0xaf]
|
|
|
|
s_nor_b32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x8c,0x73,0x72,0x71,0x3f]
|
|
|
|
s_nor_b64 s[10:11], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[12:13], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8c,0x8c]
|
|
|
|
s_nor_b64 s[100:101], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe4,0x8c]
|
|
|
|
s_nor_b64 flat_scratch, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe6,0x8c]
|
|
|
|
s_nor_b64 vcc, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xea,0x8c]
|
|
|
|
s_nor_b64 exec, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xfe,0x8c]
|
|
|
|
s_nor_b64 s[10:11], s[4:5], s[4:5]
|
|
// CHECK: [0x04,0x04,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], s[100:101], s[4:5]
|
|
// CHECK: [0x64,0x04,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], flat_scratch, s[4:5]
|
|
// CHECK: [0x66,0x04,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], vcc, s[4:5]
|
|
// CHECK: [0x6a,0x04,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], exec, s[4:5]
|
|
// CHECK: [0x7e,0x04,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], 0, s[4:5]
|
|
// CHECK: [0x80,0x04,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], -1, s[4:5]
|
|
// CHECK: [0xc1,0x04,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], 0.5, s[4:5]
|
|
// CHECK: [0xf0,0x04,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], -4.0, s[4:5]
|
|
// CHECK: [0xf7,0x04,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], 0xaf123456, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x8c,0x56,0x34,0x12,0xaf]
|
|
|
|
s_nor_b64 s[10:11], 0x3f717273, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x8c,0x73,0x72,0x71,0x3f]
|
|
|
|
s_nor_b64 s[10:11], s[2:3], s[6:7]
|
|
// CHECK: [0x02,0x06,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], s[2:3], s[100:101]
|
|
// CHECK: [0x02,0x64,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], s[2:3], flat_scratch
|
|
// CHECK: [0x02,0x66,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], s[2:3], vcc
|
|
// CHECK: [0x02,0x6a,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], s[2:3], exec
|
|
// CHECK: [0x02,0x7e,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x8a,0x8c]
|
|
|
|
s_nor_b64 s[10:11], s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x8a,0x8c,0x56,0x34,0x12,0xaf]
|
|
|
|
s_nor_b64 s[10:11], s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x8a,0x8c,0x73,0x72,0x71,0x3f]
|
|
|
|
s_xnor_b32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x8d]
|
|
|
|
s_xnor_b32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x8d]
|
|
|
|
s_xnor_b32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x8d]
|
|
|
|
s_xnor_b32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x8d]
|
|
|
|
s_xnor_b32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x8d]
|
|
|
|
s_xnor_b32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x8d]
|
|
|
|
s_xnor_b32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x8d]
|
|
|
|
s_xnor_b32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x8d]
|
|
|
|
s_xnor_b32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x8d]
|
|
|
|
s_xnor_b32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x8d,0x56,0x34,0x12,0xaf]
|
|
|
|
s_xnor_b32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x8d,0x73,0x72,0x71,0x3f]
|
|
|
|
s_xnor_b32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x8d]
|
|
|
|
s_xnor_b32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x8d,0x56,0x34,0x12,0xaf]
|
|
|
|
s_xnor_b32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x8d,0x73,0x72,0x71,0x3f]
|
|
|
|
s_xnor_b64 s[10:11], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[12:13], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x8c,0x8d]
|
|
|
|
s_xnor_b64 s[100:101], s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe4,0x8d]
|
|
|
|
s_xnor_b64 flat_scratch, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xe6,0x8d]
|
|
|
|
s_xnor_b64 vcc, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xea,0x8d]
|
|
|
|
s_xnor_b64 exec, s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0xfe,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], s[4:5], s[4:5]
|
|
// CHECK: [0x04,0x04,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], s[100:101], s[4:5]
|
|
// CHECK: [0x64,0x04,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], flat_scratch, s[4:5]
|
|
// CHECK: [0x66,0x04,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], vcc, s[4:5]
|
|
// CHECK: [0x6a,0x04,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], exec, s[4:5]
|
|
// CHECK: [0x7e,0x04,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], 0, s[4:5]
|
|
// CHECK: [0x80,0x04,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], -1, s[4:5]
|
|
// CHECK: [0xc1,0x04,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], 0.5, s[4:5]
|
|
// CHECK: [0xf0,0x04,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], -4.0, s[4:5]
|
|
// CHECK: [0xf7,0x04,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], 0xaf123456, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x8d,0x56,0x34,0x12,0xaf]
|
|
|
|
s_xnor_b64 s[10:11], 0x3f717273, s[4:5]
|
|
// CHECK: [0xff,0x04,0x8a,0x8d,0x73,0x72,0x71,0x3f]
|
|
|
|
s_xnor_b64 s[10:11], s[2:3], s[6:7]
|
|
// CHECK: [0x02,0x06,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], s[2:3], s[100:101]
|
|
// CHECK: [0x02,0x64,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], s[2:3], flat_scratch
|
|
// CHECK: [0x02,0x66,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], s[2:3], vcc
|
|
// CHECK: [0x02,0x6a,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], s[2:3], exec
|
|
// CHECK: [0x02,0x7e,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x8a,0x8d]
|
|
|
|
s_xnor_b64 s[10:11], s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x8a,0x8d,0x56,0x34,0x12,0xaf]
|
|
|
|
s_xnor_b64 s[10:11], s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x8a,0x8d,0x73,0x72,0x71,0x3f]
|
|
|
|
s_lshl_b32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x8e]
|
|
|
|
s_lshl_b32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x8e]
|
|
|
|
s_lshl_b32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x8e]
|
|
|
|
s_lshl_b32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x8e]
|
|
|
|
s_lshl_b32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x8e]
|
|
|
|
s_lshl_b32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x8e]
|
|
|
|
s_lshl_b32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x8e]
|
|
|
|
s_lshl_b32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x8e]
|
|
|
|
s_lshl_b32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x8e]
|
|
|
|
s_lshl_b32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x8e,0x56,0x34,0x12,0xaf]
|
|
|
|
s_lshl_b32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x8e,0x73,0x72,0x71,0x3f]
|
|
|
|
s_lshl_b32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x8e]
|
|
|
|
s_lshl_b32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x8e,0x56,0x34,0x12,0xaf]
|
|
|
|
s_lshl_b32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x8e,0x73,0x72,0x71,0x3f]
|
|
|
|
s_lshl_b64 s[10:11], s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[12:13], s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x8c,0x8e]
|
|
|
|
s_lshl_b64 s[100:101], s[2:3], s2
|
|
// CHECK: [0x02,0x02,0xe4,0x8e]
|
|
|
|
s_lshl_b64 flat_scratch, s[2:3], s2
|
|
// CHECK: [0x02,0x02,0xe6,0x8e]
|
|
|
|
s_lshl_b64 vcc, s[2:3], s2
|
|
// CHECK: [0x02,0x02,0xea,0x8e]
|
|
|
|
s_lshl_b64 exec, s[2:3], s2
|
|
// CHECK: [0x02,0x02,0xfe,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], s[4:5], s2
|
|
// CHECK: [0x04,0x02,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], s[100:101], s2
|
|
// CHECK: [0x64,0x02,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], flat_scratch, s2
|
|
// CHECK: [0x66,0x02,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], vcc, s2
|
|
// CHECK: [0x6a,0x02,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], exec, s2
|
|
// CHECK: [0x7e,0x02,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], 0, s2
|
|
// CHECK: [0x80,0x02,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], -1, s2
|
|
// CHECK: [0xc1,0x02,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x8a,0x8e,0x56,0x34,0x12,0xaf]
|
|
|
|
s_lshl_b64 s[10:11], 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x8a,0x8e,0x73,0x72,0x71,0x3f]
|
|
|
|
s_lshl_b64 s[10:11], s[2:3], s101
|
|
// CHECK: [0x02,0x65,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], s[2:3], flat_scratch_lo
|
|
// CHECK: [0x02,0x66,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], s[2:3], flat_scratch_hi
|
|
// CHECK: [0x02,0x67,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], s[2:3], vcc_lo
|
|
// CHECK: [0x02,0x6a,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], s[2:3], vcc_hi
|
|
// CHECK: [0x02,0x6b,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], s[2:3], m0
|
|
// CHECK: [0x02,0x7c,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], s[2:3], exec_lo
|
|
// CHECK: [0x02,0x7e,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], s[2:3], exec_hi
|
|
// CHECK: [0x02,0x7f,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x8a,0x8e]
|
|
|
|
s_lshl_b64 s[10:11], s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x8a,0x8e,0x56,0x34,0x12,0xaf]
|
|
|
|
s_lshl_b64 s[10:11], s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x8a,0x8e,0x73,0x72,0x71,0x3f]
|
|
|
|
s_lshr_b32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x8f]
|
|
|
|
s_lshr_b32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x8f]
|
|
|
|
s_lshr_b32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x8f]
|
|
|
|
s_lshr_b32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x8f]
|
|
|
|
s_lshr_b32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x8f]
|
|
|
|
s_lshr_b32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x8f]
|
|
|
|
s_lshr_b32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x8f]
|
|
|
|
s_lshr_b32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x8f]
|
|
|
|
s_lshr_b32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x8f]
|
|
|
|
s_lshr_b32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x8f,0x56,0x34,0x12,0xaf]
|
|
|
|
s_lshr_b32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x8f,0x73,0x72,0x71,0x3f]
|
|
|
|
s_lshr_b32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x8f]
|
|
|
|
s_lshr_b32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x8f,0x56,0x34,0x12,0xaf]
|
|
|
|
s_lshr_b32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x8f,0x73,0x72,0x71,0x3f]
|
|
|
|
s_lshr_b64 s[10:11], s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[12:13], s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x8c,0x8f]
|
|
|
|
s_lshr_b64 s[100:101], s[2:3], s2
|
|
// CHECK: [0x02,0x02,0xe4,0x8f]
|
|
|
|
s_lshr_b64 flat_scratch, s[2:3], s2
|
|
// CHECK: [0x02,0x02,0xe6,0x8f]
|
|
|
|
s_lshr_b64 vcc, s[2:3], s2
|
|
// CHECK: [0x02,0x02,0xea,0x8f]
|
|
|
|
s_lshr_b64 exec, s[2:3], s2
|
|
// CHECK: [0x02,0x02,0xfe,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], s[4:5], s2
|
|
// CHECK: [0x04,0x02,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], s[100:101], s2
|
|
// CHECK: [0x64,0x02,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], flat_scratch, s2
|
|
// CHECK: [0x66,0x02,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], vcc, s2
|
|
// CHECK: [0x6a,0x02,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], exec, s2
|
|
// CHECK: [0x7e,0x02,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], 0, s2
|
|
// CHECK: [0x80,0x02,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], -1, s2
|
|
// CHECK: [0xc1,0x02,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x8a,0x8f,0x56,0x34,0x12,0xaf]
|
|
|
|
s_lshr_b64 s[10:11], 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x8a,0x8f,0x73,0x72,0x71,0x3f]
|
|
|
|
s_lshr_b64 s[10:11], s[2:3], s101
|
|
// CHECK: [0x02,0x65,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], s[2:3], flat_scratch_lo
|
|
// CHECK: [0x02,0x66,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], s[2:3], flat_scratch_hi
|
|
// CHECK: [0x02,0x67,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], s[2:3], vcc_lo
|
|
// CHECK: [0x02,0x6a,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], s[2:3], vcc_hi
|
|
// CHECK: [0x02,0x6b,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], s[2:3], m0
|
|
// CHECK: [0x02,0x7c,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], s[2:3], exec_lo
|
|
// CHECK: [0x02,0x7e,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], s[2:3], exec_hi
|
|
// CHECK: [0x02,0x7f,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x8a,0x8f]
|
|
|
|
s_lshr_b64 s[10:11], s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x8a,0x8f,0x56,0x34,0x12,0xaf]
|
|
|
|
s_lshr_b64 s[10:11], s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x8a,0x8f,0x73,0x72,0x71,0x3f]
|
|
|
|
s_ashr_i32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x90]
|
|
|
|
s_ashr_i32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x90]
|
|
|
|
s_ashr_i32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x90]
|
|
|
|
s_ashr_i32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x90]
|
|
|
|
s_ashr_i32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x90]
|
|
|
|
s_ashr_i32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x90]
|
|
|
|
s_ashr_i32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x90]
|
|
|
|
s_ashr_i32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x90]
|
|
|
|
s_ashr_i32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x90]
|
|
|
|
s_ashr_i32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x90,0x56,0x34,0x12,0xaf]
|
|
|
|
s_ashr_i32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x90,0x73,0x72,0x71,0x3f]
|
|
|
|
s_ashr_i32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x90]
|
|
|
|
s_ashr_i32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x90,0x56,0x34,0x12,0xaf]
|
|
|
|
s_ashr_i32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x90,0x73,0x72,0x71,0x3f]
|
|
|
|
s_ashr_i64 s[10:11], s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[12:13], s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x8c,0x90]
|
|
|
|
s_ashr_i64 s[100:101], s[2:3], s2
|
|
// CHECK: [0x02,0x02,0xe4,0x90]
|
|
|
|
s_ashr_i64 flat_scratch, s[2:3], s2
|
|
// CHECK: [0x02,0x02,0xe6,0x90]
|
|
|
|
s_ashr_i64 vcc, s[2:3], s2
|
|
// CHECK: [0x02,0x02,0xea,0x90]
|
|
|
|
s_ashr_i64 exec, s[2:3], s2
|
|
// CHECK: [0x02,0x02,0xfe,0x90]
|
|
|
|
s_ashr_i64 s[10:11], s[4:5], s2
|
|
// CHECK: [0x04,0x02,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], s[100:101], s2
|
|
// CHECK: [0x64,0x02,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], flat_scratch, s2
|
|
// CHECK: [0x66,0x02,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], vcc, s2
|
|
// CHECK: [0x6a,0x02,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], exec, s2
|
|
// CHECK: [0x7e,0x02,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], 0, s2
|
|
// CHECK: [0x80,0x02,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], -1, s2
|
|
// CHECK: [0xc1,0x02,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x8a,0x90,0x56,0x34,0x12,0xaf]
|
|
|
|
s_ashr_i64 s[10:11], 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x8a,0x90,0x73,0x72,0x71,0x3f]
|
|
|
|
s_ashr_i64 s[10:11], s[2:3], s101
|
|
// CHECK: [0x02,0x65,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], s[2:3], flat_scratch_lo
|
|
// CHECK: [0x02,0x66,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], s[2:3], flat_scratch_hi
|
|
// CHECK: [0x02,0x67,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], s[2:3], vcc_lo
|
|
// CHECK: [0x02,0x6a,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], s[2:3], vcc_hi
|
|
// CHECK: [0x02,0x6b,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], s[2:3], m0
|
|
// CHECK: [0x02,0x7c,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], s[2:3], exec_lo
|
|
// CHECK: [0x02,0x7e,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], s[2:3], exec_hi
|
|
// CHECK: [0x02,0x7f,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x8a,0x90]
|
|
|
|
s_ashr_i64 s[10:11], s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x8a,0x90,0x56,0x34,0x12,0xaf]
|
|
|
|
s_ashr_i64 s[10:11], s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x8a,0x90,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bfm_b32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x91]
|
|
|
|
s_bfm_b32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x91]
|
|
|
|
s_bfm_b32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x91]
|
|
|
|
s_bfm_b32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x91]
|
|
|
|
s_bfm_b32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x91]
|
|
|
|
s_bfm_b32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x91]
|
|
|
|
s_bfm_b32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x91]
|
|
|
|
s_bfm_b32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x91]
|
|
|
|
s_bfm_b32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x91]
|
|
|
|
s_bfm_b32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x91,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bfm_b32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x91,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bfm_b32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x91]
|
|
|
|
s_bfm_b32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x91,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bfm_b32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x91,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bfm_b64 s[10:11], s1, s2
|
|
// CHECK: [0x01,0x02,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[12:13], s1, s2
|
|
// CHECK: [0x01,0x02,0x8c,0x91]
|
|
|
|
s_bfm_b64 s[100:101], s1, s2
|
|
// CHECK: [0x01,0x02,0xe4,0x91]
|
|
|
|
s_bfm_b64 flat_scratch, s1, s2
|
|
// CHECK: [0x01,0x02,0xe6,0x91]
|
|
|
|
s_bfm_b64 vcc, s1, s2
|
|
// CHECK: [0x01,0x02,0xea,0x91]
|
|
|
|
s_bfm_b64 exec, s1, s2
|
|
// CHECK: [0x01,0x02,0xfe,0x91]
|
|
|
|
s_bfm_b64 s[10:11], s101, s2
|
|
// CHECK: [0x65,0x02,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], m0, s2
|
|
// CHECK: [0x7c,0x02,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], 0, s2
|
|
// CHECK: [0x80,0x02,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], -1, s2
|
|
// CHECK: [0xc1,0x02,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x8a,0x91,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bfm_b64 s[10:11], 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x8a,0x91,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bfm_b64 s[10:11], s1, s101
|
|
// CHECK: [0x01,0x65,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], s1, m0
|
|
// CHECK: [0x01,0x7c,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], s1, 0
|
|
// CHECK: [0x01,0x80,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], s1, -1
|
|
// CHECK: [0x01,0xc1,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x8a,0x91]
|
|
|
|
s_bfm_b64 s[10:11], s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x8a,0x91,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bfm_b64 s[10:11], s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x8a,0x91,0x73,0x72,0x71,0x3f]
|
|
|
|
s_mul_i32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x92]
|
|
|
|
s_mul_i32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x92]
|
|
|
|
s_mul_i32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x92]
|
|
|
|
s_mul_i32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x92]
|
|
|
|
s_mul_i32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x92]
|
|
|
|
s_mul_i32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x92]
|
|
|
|
s_mul_i32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x92]
|
|
|
|
s_mul_i32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x92]
|
|
|
|
s_mul_i32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x92]
|
|
|
|
s_mul_i32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x92]
|
|
|
|
s_mul_i32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x92]
|
|
|
|
s_mul_i32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x92]
|
|
|
|
s_mul_i32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x92]
|
|
|
|
s_mul_i32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x92]
|
|
|
|
s_mul_i32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x92]
|
|
|
|
s_mul_i32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x92]
|
|
|
|
s_mul_i32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x92]
|
|
|
|
s_mul_i32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x92]
|
|
|
|
s_mul_i32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x92]
|
|
|
|
s_mul_i32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x92]
|
|
|
|
s_mul_i32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x92]
|
|
|
|
s_mul_i32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x92,0x56,0x34,0x12,0xaf]
|
|
|
|
s_mul_i32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x92,0x73,0x72,0x71,0x3f]
|
|
|
|
s_mul_i32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x92]
|
|
|
|
s_mul_i32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x92]
|
|
|
|
s_mul_i32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x92]
|
|
|
|
s_mul_i32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x92]
|
|
|
|
s_mul_i32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x92]
|
|
|
|
s_mul_i32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x92]
|
|
|
|
s_mul_i32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x92]
|
|
|
|
s_mul_i32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x92]
|
|
|
|
s_mul_i32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x92]
|
|
|
|
s_mul_i32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x92]
|
|
|
|
s_mul_i32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x92]
|
|
|
|
s_mul_i32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x92]
|
|
|
|
s_mul_i32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x92,0x56,0x34,0x12,0xaf]
|
|
|
|
s_mul_i32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x92,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bfe_u32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x85,0x92]
|
|
|
|
s_bfe_u32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0xe5,0x92]
|
|
|
|
s_bfe_u32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xe6,0x92]
|
|
|
|
s_bfe_u32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xe7,0x92]
|
|
|
|
s_bfe_u32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xea,0x92]
|
|
|
|
s_bfe_u32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xeb,0x92]
|
|
|
|
s_bfe_u32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0xfc,0x92]
|
|
|
|
s_bfe_u32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xfe,0x92]
|
|
|
|
s_bfe_u32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xff,0x92]
|
|
|
|
s_bfe_u32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x85,0x92,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bfe_u32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x85,0x92,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bfe_u32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x85,0x92]
|
|
|
|
s_bfe_u32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x85,0x92,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bfe_u32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x85,0x92,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bfe_i32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x93]
|
|
|
|
s_bfe_i32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x93]
|
|
|
|
s_bfe_i32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x93]
|
|
|
|
s_bfe_i32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x93]
|
|
|
|
s_bfe_i32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x93]
|
|
|
|
s_bfe_i32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x93]
|
|
|
|
s_bfe_i32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x93]
|
|
|
|
s_bfe_i32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x93]
|
|
|
|
s_bfe_i32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x93]
|
|
|
|
s_bfe_i32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x93,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bfe_i32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x93,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bfe_i32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x93]
|
|
|
|
s_bfe_i32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x93,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bfe_i32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x93,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bfe_u64 s[10:11], s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[12:13], s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x8c,0x93]
|
|
|
|
s_bfe_u64 s[100:101], s[2:3], s2
|
|
// CHECK: [0x02,0x02,0xe4,0x93]
|
|
|
|
s_bfe_u64 flat_scratch, s[2:3], s2
|
|
// CHECK: [0x02,0x02,0xe6,0x93]
|
|
|
|
s_bfe_u64 vcc, s[2:3], s2
|
|
// CHECK: [0x02,0x02,0xea,0x93]
|
|
|
|
s_bfe_u64 exec, s[2:3], s2
|
|
// CHECK: [0x02,0x02,0xfe,0x93]
|
|
|
|
s_bfe_u64 s[10:11], s[4:5], s2
|
|
// CHECK: [0x04,0x02,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], s[100:101], s2
|
|
// CHECK: [0x64,0x02,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], flat_scratch, s2
|
|
// CHECK: [0x66,0x02,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], vcc, s2
|
|
// CHECK: [0x6a,0x02,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], exec, s2
|
|
// CHECK: [0x7e,0x02,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], 0, s2
|
|
// CHECK: [0x80,0x02,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], -1, s2
|
|
// CHECK: [0xc1,0x02,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x8a,0x93,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bfe_u64 s[10:11], 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x8a,0x93,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bfe_u64 s[10:11], s[2:3], s101
|
|
// CHECK: [0x02,0x65,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], s[2:3], flat_scratch_lo
|
|
// CHECK: [0x02,0x66,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], s[2:3], flat_scratch_hi
|
|
// CHECK: [0x02,0x67,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], s[2:3], vcc_lo
|
|
// CHECK: [0x02,0x6a,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], s[2:3], vcc_hi
|
|
// CHECK: [0x02,0x6b,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], s[2:3], m0
|
|
// CHECK: [0x02,0x7c,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], s[2:3], exec_lo
|
|
// CHECK: [0x02,0x7e,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], s[2:3], exec_hi
|
|
// CHECK: [0x02,0x7f,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x8a,0x93]
|
|
|
|
s_bfe_u64 s[10:11], s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x8a,0x93,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bfe_u64 s[10:11], s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x8a,0x93,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bfe_i64 s[10:11], s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[12:13], s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x0c,0x94]
|
|
|
|
s_bfe_i64 s[100:101], s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x64,0x94]
|
|
|
|
s_bfe_i64 flat_scratch, s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x66,0x94]
|
|
|
|
s_bfe_i64 vcc, s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x6a,0x94]
|
|
|
|
s_bfe_i64 exec, s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x7e,0x94]
|
|
|
|
s_bfe_i64 s[10:11], s[4:5], s2
|
|
// CHECK: [0x04,0x02,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], s[100:101], s2
|
|
// CHECK: [0x64,0x02,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], flat_scratch, s2
|
|
// CHECK: [0x66,0x02,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], vcc, s2
|
|
// CHECK: [0x6a,0x02,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], exec, s2
|
|
// CHECK: [0x7e,0x02,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], 0, s2
|
|
// CHECK: [0x80,0x02,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], -1, s2
|
|
// CHECK: [0xc1,0x02,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x0a,0x94,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bfe_i64 s[10:11], 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x0a,0x94,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bfe_i64 s[10:11], s[2:3], s101
|
|
// CHECK: [0x02,0x65,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], s[2:3], flat_scratch_lo
|
|
// CHECK: [0x02,0x66,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], s[2:3], flat_scratch_hi
|
|
// CHECK: [0x02,0x67,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], s[2:3], vcc_lo
|
|
// CHECK: [0x02,0x6a,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], s[2:3], vcc_hi
|
|
// CHECK: [0x02,0x6b,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], s[2:3], m0
|
|
// CHECK: [0x02,0x7c,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], s[2:3], exec_lo
|
|
// CHECK: [0x02,0x7e,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], s[2:3], exec_hi
|
|
// CHECK: [0x02,0x7f,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x0a,0x94]
|
|
|
|
s_bfe_i64 s[10:11], s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x0a,0x94,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bfe_i64 s[10:11], s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x0a,0x94,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cbranch_g_fork s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x80,0x94]
|
|
|
|
s_cbranch_g_fork s[4:5], s[4:5]
|
|
// CHECK: [0x04,0x04,0x80,0x94]
|
|
|
|
s_cbranch_g_fork s[100:101], s[4:5]
|
|
// CHECK: [0x64,0x04,0x80,0x94]
|
|
|
|
s_cbranch_g_fork flat_scratch, s[4:5]
|
|
// CHECK: [0x66,0x04,0x80,0x94]
|
|
|
|
s_cbranch_g_fork vcc, s[4:5]
|
|
// CHECK: [0x6a,0x04,0x80,0x94]
|
|
|
|
s_cbranch_g_fork exec, s[4:5]
|
|
// CHECK: [0x7e,0x04,0x80,0x94]
|
|
|
|
s_cbranch_g_fork 0, s[4:5]
|
|
// CHECK: [0x80,0x04,0x80,0x94]
|
|
|
|
s_cbranch_g_fork -1, s[4:5]
|
|
// CHECK: [0xc1,0x04,0x80,0x94]
|
|
|
|
s_cbranch_g_fork 0.5, s[4:5]
|
|
// CHECK: [0xf0,0x04,0x80,0x94]
|
|
|
|
s_cbranch_g_fork -4.0, s[4:5]
|
|
// CHECK: [0xf7,0x04,0x80,0x94]
|
|
|
|
s_cbranch_g_fork s[2:3], s[6:7]
|
|
// CHECK: [0x02,0x06,0x80,0x94]
|
|
|
|
s_cbranch_g_fork s[2:3], s[100:101]
|
|
// CHECK: [0x02,0x64,0x80,0x94]
|
|
|
|
s_cbranch_g_fork s[2:3], flat_scratch
|
|
// CHECK: [0x02,0x66,0x80,0x94]
|
|
|
|
s_cbranch_g_fork s[2:3], vcc
|
|
// CHECK: [0x02,0x6a,0x80,0x94]
|
|
|
|
s_cbranch_g_fork s[2:3], exec
|
|
// CHECK: [0x02,0x7e,0x80,0x94]
|
|
|
|
s_cbranch_g_fork s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x80,0x94]
|
|
|
|
s_cbranch_g_fork s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x80,0x94]
|
|
|
|
s_cbranch_g_fork s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x80,0x94]
|
|
|
|
s_cbranch_g_fork s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x80,0x94]
|
|
|
|
s_absdiff_i32 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x95]
|
|
|
|
s_absdiff_i32 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x95]
|
|
|
|
s_absdiff_i32 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x95]
|
|
|
|
s_absdiff_i32 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x95]
|
|
|
|
s_absdiff_i32 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x95]
|
|
|
|
s_absdiff_i32 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x95]
|
|
|
|
s_absdiff_i32 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x95]
|
|
|
|
s_absdiff_i32 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x95]
|
|
|
|
s_absdiff_i32 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x95]
|
|
|
|
s_absdiff_i32 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x95,0x56,0x34,0x12,0xaf]
|
|
|
|
s_absdiff_i32 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x95,0x73,0x72,0x71,0x3f]
|
|
|
|
s_absdiff_i32 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x95]
|
|
|
|
s_absdiff_i32 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x95,0x56,0x34,0x12,0xaf]
|
|
|
|
s_absdiff_i32 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x95,0x73,0x72,0x71,0x3f]
|
|
|
|
s_rfe_restore_b64 s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 s[4:5], s2
|
|
// CHECK: [0x04,0x02,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 s[100:101], s2
|
|
// CHECK: [0x64,0x02,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 flat_scratch, s2
|
|
// CHECK: [0x66,0x02,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 vcc, s2
|
|
// CHECK: [0x6a,0x02,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 exec, s2
|
|
// CHECK: [0x7e,0x02,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 0, s2
|
|
// CHECK: [0x80,0x02,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 -1, s2
|
|
// CHECK: [0xc1,0x02,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x80,0x95,0x56,0x34,0x12,0xaf]
|
|
|
|
s_rfe_restore_b64 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x80,0x95,0x73,0x72,0x71,0x3f]
|
|
|
|
s_rfe_restore_b64 s[2:3], s101
|
|
// CHECK: [0x02,0x65,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 s[2:3], flat_scratch_lo
|
|
// CHECK: [0x02,0x66,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 s[2:3], flat_scratch_hi
|
|
// CHECK: [0x02,0x67,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 s[2:3], vcc_lo
|
|
// CHECK: [0x02,0x6a,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 s[2:3], vcc_hi
|
|
// CHECK: [0x02,0x6b,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 s[2:3], m0
|
|
// CHECK: [0x02,0x7c,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 s[2:3], exec_lo
|
|
// CHECK: [0x02,0x7e,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 s[2:3], exec_hi
|
|
// CHECK: [0x02,0x7f,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x80,0x95]
|
|
|
|
s_rfe_restore_b64 s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x80,0x95,0x56,0x34,0x12,0xaf]
|
|
|
|
s_rfe_restore_b64 s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x80,0x95,0x73,0x72,0x71,0x3f]
|
|
|
|
s_pack_ll_b32_b16 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x99]
|
|
|
|
s_pack_ll_b32_b16 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x99]
|
|
|
|
s_pack_ll_b32_b16 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x99]
|
|
|
|
s_pack_ll_b32_b16 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x99]
|
|
|
|
s_pack_ll_b32_b16 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x99]
|
|
|
|
s_pack_ll_b32_b16 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x99]
|
|
|
|
s_pack_ll_b32_b16 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x99]
|
|
|
|
s_pack_ll_b32_b16 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, 0xfe0b, s2
|
|
// CHECK: [0xff,0x02,0x05,0x99,0x0b,0xfe,0x00,0x00]
|
|
|
|
s_pack_ll_b32_b16 s5, 0x3456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x99,0x56,0x34,0x00,0x00]
|
|
|
|
s_pack_ll_b32_b16 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x99]
|
|
|
|
s_pack_ll_b32_b16 s5, s1, 0xfe0b
|
|
// CHECK: [0x01,0xff,0x05,0x99,0x0b,0xfe,0x00,0x00]
|
|
|
|
s_pack_ll_b32_b16 s5, s1, 0x3456
|
|
// CHECK: [0x01,0xff,0x05,0x99,0x56,0x34,0x00,0x00]
|
|
|
|
s_pack_lh_b32_b16 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0xe5,0x99]
|
|
|
|
s_pack_lh_b32_b16 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xe6,0x99]
|
|
|
|
s_pack_lh_b32_b16 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xe7,0x99]
|
|
|
|
s_pack_lh_b32_b16 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xea,0x99]
|
|
|
|
s_pack_lh_b32_b16 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xeb,0x99]
|
|
|
|
s_pack_lh_b32_b16 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0xfc,0x99]
|
|
|
|
s_pack_lh_b32_b16 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0xfe,0x99]
|
|
|
|
s_pack_lh_b32_b16 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0xff,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, 0xfe0b, s2
|
|
// CHECK: [0xff,0x02,0x85,0x99,0x0b,0xfe,0x00,0x00]
|
|
|
|
s_pack_lh_b32_b16 s5, 0x3456, s2
|
|
// CHECK: [0xff,0x02,0x85,0x99,0x56,0x34,0x00,0x00]
|
|
|
|
s_pack_lh_b32_b16 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x85,0x99]
|
|
|
|
s_pack_lh_b32_b16 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x85,0x99,0x56,0x34,0x12,0xaf]
|
|
|
|
s_pack_lh_b32_b16 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x85,0x99,0x73,0x72,0x71,0x3f]
|
|
|
|
s_pack_hh_b32_b16 s5, s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s101, s1, s2
|
|
// CHECK: [0x01,0x02,0x65,0x9a]
|
|
|
|
s_pack_hh_b32_b16 flat_scratch_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x66,0x9a]
|
|
|
|
s_pack_hh_b32_b16 flat_scratch_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x67,0x9a]
|
|
|
|
s_pack_hh_b32_b16 vcc_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x6a,0x9a]
|
|
|
|
s_pack_hh_b32_b16 vcc_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x6b,0x9a]
|
|
|
|
s_pack_hh_b32_b16 m0, s1, s2
|
|
// CHECK: [0x01,0x02,0x7c,0x9a]
|
|
|
|
s_pack_hh_b32_b16 exec_lo, s1, s2
|
|
// CHECK: [0x01,0x02,0x7e,0x9a]
|
|
|
|
s_pack_hh_b32_b16 exec_hi, s1, s2
|
|
// CHECK: [0x01,0x02,0x7f,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0x9a,0x56,0x34,0x12,0xaf]
|
|
|
|
s_pack_hh_b32_b16 s5, 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0x9a,0x73,0x72,0x71,0x3f]
|
|
|
|
s_pack_hh_b32_b16 s5, s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0x9a]
|
|
|
|
s_pack_hh_b32_b16 s5, s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0x9a,0x56,0x34,0x12,0xaf]
|
|
|
|
s_pack_hh_b32_b16 s5, s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0x9a,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_eq_i32 s1, s2
|
|
// CHECK: [0x01,0x02,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 s101, s2
|
|
// CHECK: [0x65,0x02,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 m0, s2
|
|
// CHECK: [0x7c,0x02,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 0, s2
|
|
// CHECK: [0x80,0x02,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 -1, s2
|
|
// CHECK: [0xc1,0x02,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x00,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_eq_i32 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x00,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_eq_i32 s1, s101
|
|
// CHECK: [0x01,0x65,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 s1, m0
|
|
// CHECK: [0x01,0x7c,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 s1, 0
|
|
// CHECK: [0x01,0x80,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 s1, -1
|
|
// CHECK: [0x01,0xc1,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x00,0xbf]
|
|
|
|
s_cmp_eq_i32 s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x00,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_eq_i32 s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x00,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_lg_i32 s1, s2
|
|
// CHECK: [0x01,0x02,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 s101, s2
|
|
// CHECK: [0x65,0x02,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 m0, s2
|
|
// CHECK: [0x7c,0x02,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 0, s2
|
|
// CHECK: [0x80,0x02,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 -1, s2
|
|
// CHECK: [0xc1,0x02,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x01,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_lg_i32 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x01,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_lg_i32 s1, s101
|
|
// CHECK: [0x01,0x65,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 s1, m0
|
|
// CHECK: [0x01,0x7c,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 s1, 0
|
|
// CHECK: [0x01,0x80,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 s1, -1
|
|
// CHECK: [0x01,0xc1,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x01,0xbf]
|
|
|
|
s_cmp_lg_i32 s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x01,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_lg_i32 s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x01,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_gt_i32 s1, s2
|
|
// CHECK: [0x01,0x02,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 s101, s2
|
|
// CHECK: [0x65,0x02,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 m0, s2
|
|
// CHECK: [0x7c,0x02,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 0, s2
|
|
// CHECK: [0x80,0x02,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 -1, s2
|
|
// CHECK: [0xc1,0x02,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x02,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_gt_i32 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x02,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_gt_i32 s1, s101
|
|
// CHECK: [0x01,0x65,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 s1, m0
|
|
// CHECK: [0x01,0x7c,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 s1, 0
|
|
// CHECK: [0x01,0x80,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 s1, -1
|
|
// CHECK: [0x01,0xc1,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x02,0xbf]
|
|
|
|
s_cmp_gt_i32 s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x02,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_gt_i32 s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x02,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_ge_i32 s1, s2
|
|
// CHECK: [0x01,0x02,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 s101, s2
|
|
// CHECK: [0x65,0x02,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 m0, s2
|
|
// CHECK: [0x7c,0x02,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 0, s2
|
|
// CHECK: [0x80,0x02,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 -1, s2
|
|
// CHECK: [0xc1,0x02,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x03,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_ge_i32 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x03,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_ge_i32 s1, s101
|
|
// CHECK: [0x01,0x65,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 s1, m0
|
|
// CHECK: [0x01,0x7c,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 s1, 0
|
|
// CHECK: [0x01,0x80,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 s1, -1
|
|
// CHECK: [0x01,0xc1,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x03,0xbf]
|
|
|
|
s_cmp_ge_i32 s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x03,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_ge_i32 s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x03,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_lt_i32 s1, s2
|
|
// CHECK: [0x01,0x02,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 s101, s2
|
|
// CHECK: [0x65,0x02,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 m0, s2
|
|
// CHECK: [0x7c,0x02,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 0, s2
|
|
// CHECK: [0x80,0x02,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 -1, s2
|
|
// CHECK: [0xc1,0x02,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x04,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_lt_i32 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x04,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_lt_i32 s1, s101
|
|
// CHECK: [0x01,0x65,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 s1, m0
|
|
// CHECK: [0x01,0x7c,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 s1, 0
|
|
// CHECK: [0x01,0x80,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 s1, -1
|
|
// CHECK: [0x01,0xc1,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x04,0xbf]
|
|
|
|
s_cmp_lt_i32 s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x04,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_lt_i32 s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x04,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_le_i32 s1, s2
|
|
// CHECK: [0x01,0x02,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 s101, s2
|
|
// CHECK: [0x65,0x02,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 m0, s2
|
|
// CHECK: [0x7c,0x02,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 0, s2
|
|
// CHECK: [0x80,0x02,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 -1, s2
|
|
// CHECK: [0xc1,0x02,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x05,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_le_i32 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x05,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_le_i32 s1, s101
|
|
// CHECK: [0x01,0x65,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 s1, m0
|
|
// CHECK: [0x01,0x7c,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 s1, 0
|
|
// CHECK: [0x01,0x80,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 s1, -1
|
|
// CHECK: [0x01,0xc1,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x05,0xbf]
|
|
|
|
s_cmp_le_i32 s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x05,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_le_i32 s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x05,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_eq_u32 s1, s2
|
|
// CHECK: [0x01,0x02,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 s101, s2
|
|
// CHECK: [0x65,0x02,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 m0, s2
|
|
// CHECK: [0x7c,0x02,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 0, s2
|
|
// CHECK: [0x80,0x02,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 -1, s2
|
|
// CHECK: [0xc1,0x02,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x06,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_eq_u32 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x06,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_eq_u32 s1, s101
|
|
// CHECK: [0x01,0x65,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 s1, m0
|
|
// CHECK: [0x01,0x7c,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 s1, 0
|
|
// CHECK: [0x01,0x80,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 s1, -1
|
|
// CHECK: [0x01,0xc1,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x06,0xbf]
|
|
|
|
s_cmp_eq_u32 s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x06,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_eq_u32 s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x06,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_lg_u32 s1, s2
|
|
// CHECK: [0x01,0x02,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 s101, s2
|
|
// CHECK: [0x65,0x02,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 m0, s2
|
|
// CHECK: [0x7c,0x02,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 0, s2
|
|
// CHECK: [0x80,0x02,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 -1, s2
|
|
// CHECK: [0xc1,0x02,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x07,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_lg_u32 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x07,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_lg_u32 s1, s101
|
|
// CHECK: [0x01,0x65,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 s1, m0
|
|
// CHECK: [0x01,0x7c,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 s1, 0
|
|
// CHECK: [0x01,0x80,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 s1, -1
|
|
// CHECK: [0x01,0xc1,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x07,0xbf]
|
|
|
|
s_cmp_lg_u32 s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x07,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_lg_u32 s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x07,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_gt_u32 s1, s2
|
|
// CHECK: [0x01,0x02,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 s101, s2
|
|
// CHECK: [0x65,0x02,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 m0, s2
|
|
// CHECK: [0x7c,0x02,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 0, s2
|
|
// CHECK: [0x80,0x02,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 -1, s2
|
|
// CHECK: [0xc1,0x02,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x08,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_gt_u32 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x08,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_gt_u32 s1, s101
|
|
// CHECK: [0x01,0x65,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 s1, m0
|
|
// CHECK: [0x01,0x7c,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 s1, 0
|
|
// CHECK: [0x01,0x80,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 s1, -1
|
|
// CHECK: [0x01,0xc1,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x08,0xbf]
|
|
|
|
s_cmp_gt_u32 s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x08,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_gt_u32 s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x08,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_ge_u32 s1, s2
|
|
// CHECK: [0x01,0x02,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 s101, s2
|
|
// CHECK: [0x65,0x02,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 m0, s2
|
|
// CHECK: [0x7c,0x02,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 0, s2
|
|
// CHECK: [0x80,0x02,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 -1, s2
|
|
// CHECK: [0xc1,0x02,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x09,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_ge_u32 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x09,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_ge_u32 s1, s101
|
|
// CHECK: [0x01,0x65,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 s1, m0
|
|
// CHECK: [0x01,0x7c,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 s1, 0
|
|
// CHECK: [0x01,0x80,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 s1, -1
|
|
// CHECK: [0x01,0xc1,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x09,0xbf]
|
|
|
|
s_cmp_ge_u32 s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x09,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_ge_u32 s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x09,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_lt_u32 s1, s2
|
|
// CHECK: [0x01,0x02,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 s101, s2
|
|
// CHECK: [0x65,0x02,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 m0, s2
|
|
// CHECK: [0x7c,0x02,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 0, s2
|
|
// CHECK: [0x80,0x02,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 -1, s2
|
|
// CHECK: [0xc1,0x02,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x0a,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_lt_u32 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x0a,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_lt_u32 s1, s101
|
|
// CHECK: [0x01,0x65,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 s1, m0
|
|
// CHECK: [0x01,0x7c,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 s1, 0
|
|
// CHECK: [0x01,0x80,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 s1, -1
|
|
// CHECK: [0x01,0xc1,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x0a,0xbf]
|
|
|
|
s_cmp_lt_u32 s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x0a,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_lt_u32 s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x0a,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_le_u32 s1, s2
|
|
// CHECK: [0x01,0x02,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 s101, s2
|
|
// CHECK: [0x65,0x02,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 m0, s2
|
|
// CHECK: [0x7c,0x02,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 0, s2
|
|
// CHECK: [0x80,0x02,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 -1, s2
|
|
// CHECK: [0xc1,0x02,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x0b,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_le_u32 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x0b,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_le_u32 s1, s101
|
|
// CHECK: [0x01,0x65,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 s1, m0
|
|
// CHECK: [0x01,0x7c,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 s1, 0
|
|
// CHECK: [0x01,0x80,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 s1, -1
|
|
// CHECK: [0x01,0xc1,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x0b,0xbf]
|
|
|
|
s_cmp_le_u32 s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x0b,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_le_u32 s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x0b,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bitcmp0_b32 s1, s2
|
|
// CHECK: [0x01,0x02,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 s101, s2
|
|
// CHECK: [0x65,0x02,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 m0, s2
|
|
// CHECK: [0x7c,0x02,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 0, s2
|
|
// CHECK: [0x80,0x02,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 -1, s2
|
|
// CHECK: [0xc1,0x02,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x0c,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bitcmp0_b32 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x0c,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bitcmp0_b32 s1, s101
|
|
// CHECK: [0x01,0x65,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 s1, m0
|
|
// CHECK: [0x01,0x7c,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 s1, 0
|
|
// CHECK: [0x01,0x80,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 s1, -1
|
|
// CHECK: [0x01,0xc1,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x0c,0xbf]
|
|
|
|
s_bitcmp0_b32 s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x0c,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bitcmp0_b32 s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x0c,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bitcmp1_b32 s1, s2
|
|
// CHECK: [0x01,0x02,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 s101, s2
|
|
// CHECK: [0x65,0x02,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 m0, s2
|
|
// CHECK: [0x7c,0x02,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 0, s2
|
|
// CHECK: [0x80,0x02,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 -1, s2
|
|
// CHECK: [0xc1,0x02,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x0d,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bitcmp1_b32 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x0d,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bitcmp1_b32 s1, s101
|
|
// CHECK: [0x01,0x65,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 s1, m0
|
|
// CHECK: [0x01,0x7c,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 s1, 0
|
|
// CHECK: [0x01,0x80,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 s1, -1
|
|
// CHECK: [0x01,0xc1,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x0d,0xbf]
|
|
|
|
s_bitcmp1_b32 s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x0d,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bitcmp1_b32 s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x0d,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bitcmp0_b64 s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 s[4:5], s2
|
|
// CHECK: [0x04,0x02,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 s[100:101], s2
|
|
// CHECK: [0x64,0x02,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 flat_scratch, s2
|
|
// CHECK: [0x66,0x02,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 vcc, s2
|
|
// CHECK: [0x6a,0x02,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 exec, s2
|
|
// CHECK: [0x7e,0x02,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 0, s2
|
|
// CHECK: [0x80,0x02,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 -1, s2
|
|
// CHECK: [0xc1,0x02,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x0e,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bitcmp0_b64 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x0e,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bitcmp0_b64 s[2:3], s101
|
|
// CHECK: [0x02,0x65,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 s[2:3], flat_scratch_lo
|
|
// CHECK: [0x02,0x66,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 s[2:3], flat_scratch_hi
|
|
// CHECK: [0x02,0x67,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 s[2:3], vcc_lo
|
|
// CHECK: [0x02,0x6a,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 s[2:3], vcc_hi
|
|
// CHECK: [0x02,0x6b,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 s[2:3], m0
|
|
// CHECK: [0x02,0x7c,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 s[2:3], exec_lo
|
|
// CHECK: [0x02,0x7e,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 s[2:3], exec_hi
|
|
// CHECK: [0x02,0x7f,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x0e,0xbf]
|
|
|
|
s_bitcmp0_b64 s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x0e,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bitcmp0_b64 s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x0e,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bitcmp1_b64 s[2:3], s2
|
|
// CHECK: [0x02,0x02,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 s[4:5], s2
|
|
// CHECK: [0x04,0x02,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 s[100:101], s2
|
|
// CHECK: [0x64,0x02,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 flat_scratch, s2
|
|
// CHECK: [0x66,0x02,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 vcc, s2
|
|
// CHECK: [0x6a,0x02,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 exec, s2
|
|
// CHECK: [0x7e,0x02,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 0, s2
|
|
// CHECK: [0x80,0x02,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 -1, s2
|
|
// CHECK: [0xc1,0x02,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x0f,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bitcmp1_b64 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x0f,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_bitcmp1_b64 s[2:3], s101
|
|
// CHECK: [0x02,0x65,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 s[2:3], flat_scratch_lo
|
|
// CHECK: [0x02,0x66,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 s[2:3], flat_scratch_hi
|
|
// CHECK: [0x02,0x67,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 s[2:3], vcc_lo
|
|
// CHECK: [0x02,0x6a,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 s[2:3], vcc_hi
|
|
// CHECK: [0x02,0x6b,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 s[2:3], m0
|
|
// CHECK: [0x02,0x7c,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 s[2:3], exec_lo
|
|
// CHECK: [0x02,0x7e,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 s[2:3], exec_hi
|
|
// CHECK: [0x02,0x7f,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x0f,0xbf]
|
|
|
|
s_bitcmp1_b64 s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x0f,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_bitcmp1_b64 s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x0f,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_setvskip s1, s2
|
|
// CHECK: [0x01,0x02,0x10,0xbf]
|
|
|
|
s_setvskip s101, s2
|
|
// CHECK: [0x65,0x02,0x10,0xbf]
|
|
|
|
s_setvskip flat_scratch_lo, s2
|
|
// CHECK: [0x66,0x02,0x10,0xbf]
|
|
|
|
s_setvskip flat_scratch_hi, s2
|
|
// CHECK: [0x67,0x02,0x10,0xbf]
|
|
|
|
s_setvskip vcc_lo, s2
|
|
// CHECK: [0x6a,0x02,0x10,0xbf]
|
|
|
|
s_setvskip vcc_hi, s2
|
|
// CHECK: [0x6b,0x02,0x10,0xbf]
|
|
|
|
s_setvskip m0, s2
|
|
// CHECK: [0x7c,0x02,0x10,0xbf]
|
|
|
|
s_setvskip exec_lo, s2
|
|
// CHECK: [0x7e,0x02,0x10,0xbf]
|
|
|
|
s_setvskip exec_hi, s2
|
|
// CHECK: [0x7f,0x02,0x10,0xbf]
|
|
|
|
s_setvskip 0, s2
|
|
// CHECK: [0x80,0x02,0x10,0xbf]
|
|
|
|
s_setvskip -1, s2
|
|
// CHECK: [0xc1,0x02,0x10,0xbf]
|
|
|
|
s_setvskip 0.5, s2
|
|
// CHECK: [0xf0,0x02,0x10,0xbf]
|
|
|
|
s_setvskip -4.0, s2
|
|
// CHECK: [0xf7,0x02,0x10,0xbf]
|
|
|
|
s_setvskip 0xaf123456, s2
|
|
// CHECK: [0xff,0x02,0x10,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_setvskip 0x3f717273, s2
|
|
// CHECK: [0xff,0x02,0x10,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_setvskip s1, s101
|
|
// CHECK: [0x01,0x65,0x10,0xbf]
|
|
|
|
s_setvskip s1, flat_scratch_lo
|
|
// CHECK: [0x01,0x66,0x10,0xbf]
|
|
|
|
s_setvskip s1, flat_scratch_hi
|
|
// CHECK: [0x01,0x67,0x10,0xbf]
|
|
|
|
s_setvskip s1, vcc_lo
|
|
// CHECK: [0x01,0x6a,0x10,0xbf]
|
|
|
|
s_setvskip s1, vcc_hi
|
|
// CHECK: [0x01,0x6b,0x10,0xbf]
|
|
|
|
s_setvskip s1, m0
|
|
// CHECK: [0x01,0x7c,0x10,0xbf]
|
|
|
|
s_setvskip s1, exec_lo
|
|
// CHECK: [0x01,0x7e,0x10,0xbf]
|
|
|
|
s_setvskip s1, exec_hi
|
|
// CHECK: [0x01,0x7f,0x10,0xbf]
|
|
|
|
s_setvskip s1, 0
|
|
// CHECK: [0x01,0x80,0x10,0xbf]
|
|
|
|
s_setvskip s1, -1
|
|
// CHECK: [0x01,0xc1,0x10,0xbf]
|
|
|
|
s_setvskip s1, 0.5
|
|
// CHECK: [0x01,0xf0,0x10,0xbf]
|
|
|
|
s_setvskip s1, -4.0
|
|
// CHECK: [0x01,0xf7,0x10,0xbf]
|
|
|
|
s_setvskip s1, 0xaf123456
|
|
// CHECK: [0x01,0xff,0x10,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_setvskip s1, 0x3f717273
|
|
// CHECK: [0x01,0xff,0x10,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_set_gpr_idx_on s1, 0x0
|
|
// CHECK: [0x01,0x00,0x11,0xbf]
|
|
|
|
s_set_gpr_idx_on s101, 0x0
|
|
// CHECK: [0x65,0x00,0x11,0xbf]
|
|
|
|
s_set_gpr_idx_on flat_scratch_lo, 0x0
|
|
// CHECK: [0x66,0x00,0x11,0xbf]
|
|
|
|
s_set_gpr_idx_on flat_scratch_hi, 0x0
|
|
// CHECK: [0x67,0x00,0x11,0xbf]
|
|
|
|
s_set_gpr_idx_on vcc_lo, 0x0
|
|
// CHECK: [0x6a,0x00,0x11,0xbf]
|
|
|
|
s_set_gpr_idx_on vcc_hi, 0x0
|
|
// CHECK: [0x6b,0x00,0x11,0xbf]
|
|
|
|
s_set_gpr_idx_on m0, 0x0
|
|
// CHECK: [0x7c,0x00,0x11,0xbf]
|
|
|
|
s_set_gpr_idx_on 0, 0x0
|
|
// CHECK: [0x80,0x00,0x11,0xbf]
|
|
|
|
s_set_gpr_idx_on -1, 0x0
|
|
// CHECK: [0xc1,0x00,0x11,0xbf]
|
|
|
|
s_set_gpr_idx_on 0.5, 0x0
|
|
// CHECK: [0xf0,0x00,0x11,0xbf]
|
|
|
|
s_set_gpr_idx_on -4.0, 0x0
|
|
// CHECK: [0xf7,0x00,0x11,0xbf]
|
|
|
|
s_set_gpr_idx_on 0xaf123456, 0x0
|
|
// CHECK: [0xff,0x00,0x11,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_set_gpr_idx_on 0x3f717273, 0x0
|
|
// CHECK: [0xff,0x00,0x11,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_set_gpr_idx_on s1, 0x1
|
|
// CHECK: [0x01,0x01,0x11,0xbf]
|
|
|
|
s_set_gpr_idx_on s1, 0xF
|
|
// CHECK: [0x01,0x0f,0x11,0xbf]
|
|
|
|
s_cmp_eq_u64 s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 s[4:5], s[4:5]
|
|
// CHECK: [0x04,0x04,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 s[100:101], s[4:5]
|
|
// CHECK: [0x64,0x04,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 flat_scratch, s[4:5]
|
|
// CHECK: [0x66,0x04,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 vcc, s[4:5]
|
|
// CHECK: [0x6a,0x04,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 exec, s[4:5]
|
|
// CHECK: [0x7e,0x04,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 0, s[4:5]
|
|
// CHECK: [0x80,0x04,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 -1, s[4:5]
|
|
// CHECK: [0xc1,0x04,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 0.5, s[4:5]
|
|
// CHECK: [0xf0,0x04,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 -4.0, s[4:5]
|
|
// CHECK: [0xf7,0x04,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 0xaf123456, s[4:5]
|
|
// CHECK: [0xff,0x04,0x12,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_eq_u64 0x3f717273, s[4:5]
|
|
// CHECK: [0xff,0x04,0x12,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_eq_u64 s[2:3], s[6:7]
|
|
// CHECK: [0x02,0x06,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 s[2:3], s[100:101]
|
|
// CHECK: [0x02,0x64,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 s[2:3], flat_scratch
|
|
// CHECK: [0x02,0x66,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 s[2:3], vcc
|
|
// CHECK: [0x02,0x6a,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 s[2:3], exec
|
|
// CHECK: [0x02,0x7e,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x12,0xbf]
|
|
|
|
s_cmp_eq_u64 s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x12,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_eq_u64 s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x12,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_lg_u64 s[2:3], s[4:5]
|
|
// CHECK: [0x02,0x04,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 s[4:5], s[4:5]
|
|
// CHECK: [0x04,0x04,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 s[100:101], s[4:5]
|
|
// CHECK: [0x64,0x04,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 flat_scratch, s[4:5]
|
|
// CHECK: [0x66,0x04,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 vcc, s[4:5]
|
|
// CHECK: [0x6a,0x04,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 exec, s[4:5]
|
|
// CHECK: [0x7e,0x04,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 0, s[4:5]
|
|
// CHECK: [0x80,0x04,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 -1, s[4:5]
|
|
// CHECK: [0xc1,0x04,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 0.5, s[4:5]
|
|
// CHECK: [0xf0,0x04,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 -4.0, s[4:5]
|
|
// CHECK: [0xf7,0x04,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 0xaf123456, s[4:5]
|
|
// CHECK: [0xff,0x04,0x13,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_lg_u64 0x3f717273, s[4:5]
|
|
// CHECK: [0xff,0x04,0x13,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_cmp_lg_u64 s[2:3], s[6:7]
|
|
// CHECK: [0x02,0x06,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 s[2:3], s[100:101]
|
|
// CHECK: [0x02,0x64,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 s[2:3], flat_scratch
|
|
// CHECK: [0x02,0x66,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 s[2:3], vcc
|
|
// CHECK: [0x02,0x6a,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 s[2:3], exec
|
|
// CHECK: [0x02,0x7e,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 s[2:3], 0
|
|
// CHECK: [0x02,0x80,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 s[2:3], -1
|
|
// CHECK: [0x02,0xc1,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 s[2:3], 0.5
|
|
// CHECK: [0x02,0xf0,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 s[2:3], -4.0
|
|
// CHECK: [0x02,0xf7,0x13,0xbf]
|
|
|
|
s_cmp_lg_u64 s[2:3], 0xaf123456
|
|
// CHECK: [0x02,0xff,0x13,0xbf,0x56,0x34,0x12,0xaf]
|
|
|
|
s_cmp_lg_u64 s[2:3], 0x3f717273
|
|
// CHECK: [0x02,0xff,0x13,0xbf,0x73,0x72,0x71,0x3f]
|
|
|
|
s_movk_i32 s5, 0x3141
|
|
// CHECK: [0x41,0x31,0x05,0xb0]
|
|
|
|
s_movk_i32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0x65,0xb0]
|
|
|
|
s_movk_i32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x66,0xb0]
|
|
|
|
s_movk_i32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x67,0xb0]
|
|
|
|
s_movk_i32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x6a,0xb0]
|
|
|
|
s_movk_i32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x6b,0xb0]
|
|
|
|
s_movk_i32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0x7c,0xb0]
|
|
|
|
s_movk_i32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x7e,0xb0]
|
|
|
|
s_movk_i32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x7f,0xb0]
|
|
|
|
s_movk_i32 s5, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x05,0xb0]
|
|
|
|
s_cmovk_i32 s5, 0x3141
|
|
// CHECK: [0x41,0x31,0x85,0xb0]
|
|
|
|
s_cmovk_i32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0xe5,0xb0]
|
|
|
|
s_cmovk_i32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xe6,0xb0]
|
|
|
|
s_cmovk_i32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xe7,0xb0]
|
|
|
|
s_cmovk_i32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xea,0xb0]
|
|
|
|
s_cmovk_i32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xeb,0xb0]
|
|
|
|
s_cmovk_i32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0xfc,0xb0]
|
|
|
|
s_cmovk_i32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xfe,0xb0]
|
|
|
|
s_cmovk_i32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xff,0xb0]
|
|
|
|
s_cmovk_i32 s5, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x85,0xb0]
|
|
|
|
s_cmpk_eq_i32 s1, 0x3141
|
|
// CHECK: [0x41,0x31,0x01,0xb1]
|
|
|
|
s_cmpk_eq_i32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0x65,0xb1]
|
|
|
|
s_cmpk_eq_i32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x66,0xb1]
|
|
|
|
s_cmpk_eq_i32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x67,0xb1]
|
|
|
|
s_cmpk_eq_i32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x6a,0xb1]
|
|
|
|
s_cmpk_eq_i32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x6b,0xb1]
|
|
|
|
s_cmpk_eq_i32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0x7c,0xb1]
|
|
|
|
s_cmpk_eq_i32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x7e,0xb1]
|
|
|
|
s_cmpk_eq_i32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x7f,0xb1]
|
|
|
|
s_cmpk_eq_i32 s1, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x01,0xb1]
|
|
|
|
s_cmpk_lg_i32 s1, 0x3141
|
|
// CHECK: [0x41,0x31,0x81,0xb1]
|
|
|
|
s_cmpk_lg_i32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0xe5,0xb1]
|
|
|
|
s_cmpk_lg_i32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xe6,0xb1]
|
|
|
|
s_cmpk_lg_i32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xe7,0xb1]
|
|
|
|
s_cmpk_lg_i32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xea,0xb1]
|
|
|
|
s_cmpk_lg_i32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xeb,0xb1]
|
|
|
|
s_cmpk_lg_i32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0xfc,0xb1]
|
|
|
|
s_cmpk_lg_i32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xfe,0xb1]
|
|
|
|
s_cmpk_lg_i32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xff,0xb1]
|
|
|
|
s_cmpk_lg_i32 s1, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x81,0xb1]
|
|
|
|
s_cmpk_gt_i32 s1, 0x3141
|
|
// CHECK: [0x41,0x31,0x01,0xb2]
|
|
|
|
s_cmpk_gt_i32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0x65,0xb2]
|
|
|
|
s_cmpk_gt_i32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x66,0xb2]
|
|
|
|
s_cmpk_gt_i32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x67,0xb2]
|
|
|
|
s_cmpk_gt_i32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x6a,0xb2]
|
|
|
|
s_cmpk_gt_i32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x6b,0xb2]
|
|
|
|
s_cmpk_gt_i32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0x7c,0xb2]
|
|
|
|
s_cmpk_gt_i32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x7e,0xb2]
|
|
|
|
s_cmpk_gt_i32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x7f,0xb2]
|
|
|
|
s_cmpk_gt_i32 s1, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x01,0xb2]
|
|
|
|
s_cmpk_ge_i32 s1, 0x3141
|
|
// CHECK: [0x41,0x31,0x81,0xb2]
|
|
|
|
s_cmpk_ge_i32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0xe5,0xb2]
|
|
|
|
s_cmpk_ge_i32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xe6,0xb2]
|
|
|
|
s_cmpk_ge_i32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xe7,0xb2]
|
|
|
|
s_cmpk_ge_i32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xea,0xb2]
|
|
|
|
s_cmpk_ge_i32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xeb,0xb2]
|
|
|
|
s_cmpk_ge_i32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0xfc,0xb2]
|
|
|
|
s_cmpk_ge_i32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xfe,0xb2]
|
|
|
|
s_cmpk_ge_i32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xff,0xb2]
|
|
|
|
s_cmpk_ge_i32 s1, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x81,0xb2]
|
|
|
|
s_cmpk_lt_i32 s1, 0x3141
|
|
// CHECK: [0x41,0x31,0x01,0xb3]
|
|
|
|
s_cmpk_lt_i32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0x65,0xb3]
|
|
|
|
s_cmpk_lt_i32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x66,0xb3]
|
|
|
|
s_cmpk_lt_i32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x67,0xb3]
|
|
|
|
s_cmpk_lt_i32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x6a,0xb3]
|
|
|
|
s_cmpk_lt_i32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x6b,0xb3]
|
|
|
|
s_cmpk_lt_i32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0x7c,0xb3]
|
|
|
|
s_cmpk_lt_i32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x7e,0xb3]
|
|
|
|
s_cmpk_lt_i32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x7f,0xb3]
|
|
|
|
s_cmpk_lt_i32 s1, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x01,0xb3]
|
|
|
|
s_cmpk_le_i32 s1, 0x3141
|
|
// CHECK: [0x41,0x31,0x81,0xb3]
|
|
|
|
s_cmpk_le_i32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0xe5,0xb3]
|
|
|
|
s_cmpk_le_i32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xe6,0xb3]
|
|
|
|
s_cmpk_le_i32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xe7,0xb3]
|
|
|
|
s_cmpk_le_i32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xea,0xb3]
|
|
|
|
s_cmpk_le_i32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xeb,0xb3]
|
|
|
|
s_cmpk_le_i32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0xfc,0xb3]
|
|
|
|
s_cmpk_le_i32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xfe,0xb3]
|
|
|
|
s_cmpk_le_i32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xff,0xb3]
|
|
|
|
s_cmpk_le_i32 s1, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x81,0xb3]
|
|
|
|
s_cmpk_eq_u32 s1, 0x3141
|
|
// CHECK: [0x41,0x31,0x01,0xb4]
|
|
|
|
s_cmpk_eq_u32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0x65,0xb4]
|
|
|
|
s_cmpk_eq_u32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x66,0xb4]
|
|
|
|
s_cmpk_eq_u32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x67,0xb4]
|
|
|
|
s_cmpk_eq_u32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x6a,0xb4]
|
|
|
|
s_cmpk_eq_u32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x6b,0xb4]
|
|
|
|
s_cmpk_eq_u32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0x7c,0xb4]
|
|
|
|
s_cmpk_eq_u32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x7e,0xb4]
|
|
|
|
s_cmpk_eq_u32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x7f,0xb4]
|
|
|
|
s_cmpk_eq_u32 s1, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x01,0xb4]
|
|
|
|
s_cmpk_lg_u32 s1, 0x3141
|
|
// CHECK: [0x41,0x31,0x81,0xb4]
|
|
|
|
s_cmpk_lg_u32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0xe5,0xb4]
|
|
|
|
s_cmpk_lg_u32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xe6,0xb4]
|
|
|
|
s_cmpk_lg_u32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xe7,0xb4]
|
|
|
|
s_cmpk_lg_u32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xea,0xb4]
|
|
|
|
s_cmpk_lg_u32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xeb,0xb4]
|
|
|
|
s_cmpk_lg_u32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0xfc,0xb4]
|
|
|
|
s_cmpk_lg_u32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xfe,0xb4]
|
|
|
|
s_cmpk_lg_u32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xff,0xb4]
|
|
|
|
s_cmpk_lg_u32 s1, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x81,0xb4]
|
|
|
|
s_cmpk_gt_u32 s1, 0x3141
|
|
// CHECK: [0x41,0x31,0x01,0xb5]
|
|
|
|
s_cmpk_gt_u32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0x65,0xb5]
|
|
|
|
s_cmpk_gt_u32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x66,0xb5]
|
|
|
|
s_cmpk_gt_u32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x67,0xb5]
|
|
|
|
s_cmpk_gt_u32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x6a,0xb5]
|
|
|
|
s_cmpk_gt_u32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x6b,0xb5]
|
|
|
|
s_cmpk_gt_u32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0x7c,0xb5]
|
|
|
|
s_cmpk_gt_u32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x7e,0xb5]
|
|
|
|
s_cmpk_gt_u32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x7f,0xb5]
|
|
|
|
s_cmpk_gt_u32 s1, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x01,0xb5]
|
|
|
|
s_cmpk_ge_u32 s1, 0x3141
|
|
// CHECK: [0x41,0x31,0x81,0xb5]
|
|
|
|
s_cmpk_ge_u32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0xe5,0xb5]
|
|
|
|
s_cmpk_ge_u32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xe6,0xb5]
|
|
|
|
s_cmpk_ge_u32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xe7,0xb5]
|
|
|
|
s_cmpk_ge_u32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xea,0xb5]
|
|
|
|
s_cmpk_ge_u32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xeb,0xb5]
|
|
|
|
s_cmpk_ge_u32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0xfc,0xb5]
|
|
|
|
s_cmpk_ge_u32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xfe,0xb5]
|
|
|
|
s_cmpk_ge_u32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xff,0xb5]
|
|
|
|
s_cmpk_ge_u32 s1, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x81,0xb5]
|
|
|
|
s_cmpk_lt_u32 s1, 0x3141
|
|
// CHECK: [0x41,0x31,0x01,0xb6]
|
|
|
|
s_cmpk_lt_u32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0x65,0xb6]
|
|
|
|
s_cmpk_lt_u32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x66,0xb6]
|
|
|
|
s_cmpk_lt_u32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x67,0xb6]
|
|
|
|
s_cmpk_lt_u32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x6a,0xb6]
|
|
|
|
s_cmpk_lt_u32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x6b,0xb6]
|
|
|
|
s_cmpk_lt_u32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0x7c,0xb6]
|
|
|
|
s_cmpk_lt_u32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x7e,0xb6]
|
|
|
|
s_cmpk_lt_u32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x7f,0xb6]
|
|
|
|
s_cmpk_lt_u32 s1, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x01,0xb6]
|
|
|
|
s_cmpk_le_u32 s1, 0x3141
|
|
// CHECK: [0x41,0x31,0x81,0xb6]
|
|
|
|
s_cmpk_le_u32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0xe5,0xb6]
|
|
|
|
s_cmpk_le_u32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xe6,0xb6]
|
|
|
|
s_cmpk_le_u32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xe7,0xb6]
|
|
|
|
s_cmpk_le_u32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xea,0xb6]
|
|
|
|
s_cmpk_le_u32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xeb,0xb6]
|
|
|
|
s_cmpk_le_u32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0xfc,0xb6]
|
|
|
|
s_cmpk_le_u32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xfe,0xb6]
|
|
|
|
s_cmpk_le_u32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xff,0xb6]
|
|
|
|
s_cmpk_le_u32 s1, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x81,0xb6]
|
|
|
|
s_addk_i32 s5, 0x3141
|
|
// CHECK: [0x41,0x31,0x05,0xb7]
|
|
|
|
s_addk_i32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0x65,0xb7]
|
|
|
|
s_addk_i32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x66,0xb7]
|
|
|
|
s_addk_i32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x67,0xb7]
|
|
|
|
s_addk_i32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x6a,0xb7]
|
|
|
|
s_addk_i32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x6b,0xb7]
|
|
|
|
s_addk_i32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0x7c,0xb7]
|
|
|
|
s_addk_i32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0x7e,0xb7]
|
|
|
|
s_addk_i32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0x7f,0xb7]
|
|
|
|
s_addk_i32 s5, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x05,0xb7]
|
|
|
|
s_mulk_i32 s5, 0x3141
|
|
// CHECK: [0x41,0x31,0x85,0xb7]
|
|
|
|
s_mulk_i32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0xe5,0xb7]
|
|
|
|
s_mulk_i32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xe6,0xb7]
|
|
|
|
s_mulk_i32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xe7,0xb7]
|
|
|
|
s_mulk_i32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xea,0xb7]
|
|
|
|
s_mulk_i32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xeb,0xb7]
|
|
|
|
s_mulk_i32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0xfc,0xb7]
|
|
|
|
s_mulk_i32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xfe,0xb7]
|
|
|
|
s_mulk_i32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xff,0xb7]
|
|
|
|
s_mulk_i32 s5, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x85,0xb7]
|
|
|
|
s_cbranch_i_fork s[2:3], 12609
|
|
// CHECK: [0x41,0x31,0x02,0xb8]
|
|
|
|
s_cbranch_i_fork s[4:5], 12609
|
|
// CHECK: [0x41,0x31,0x04,0xb8]
|
|
|
|
s_cbranch_i_fork s[100:101], 12609
|
|
// CHECK: [0x41,0x31,0x64,0xb8]
|
|
|
|
s_cbranch_i_fork flat_scratch, 12609
|
|
// CHECK: [0x41,0x31,0x66,0xb8]
|
|
|
|
s_cbranch_i_fork vcc, 12609
|
|
// CHECK: [0x41,0x31,0x6a,0xb8]
|
|
|
|
s_cbranch_i_fork exec, 12609
|
|
// CHECK: [0x41,0x31,0x7e,0xb8]
|
|
|
|
s_cbranch_i_fork s[2:3], 49617
|
|
// CHECK: [0xd1,0xc1,0x02,0xb8]
|
|
|
|
s_getreg_b32 s5, 0x3141
|
|
// CHECK: [0x41,0x31,0x85,0xb8]
|
|
|
|
s_getreg_b32 s101, 0x3141
|
|
// CHECK: [0x41,0x31,0xe5,0xb8]
|
|
|
|
s_getreg_b32 flat_scratch_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xe6,0xb8]
|
|
|
|
s_getreg_b32 flat_scratch_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xe7,0xb8]
|
|
|
|
s_getreg_b32 vcc_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xea,0xb8]
|
|
|
|
s_getreg_b32 vcc_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xeb,0xb8]
|
|
|
|
s_getreg_b32 m0, 0x3141
|
|
// CHECK: [0x41,0x31,0xfc,0xb8]
|
|
|
|
s_getreg_b32 exec_lo, 0x3141
|
|
// CHECK: [0x41,0x31,0xfe,0xb8]
|
|
|
|
s_getreg_b32 exec_hi, 0x3141
|
|
// CHECK: [0x41,0x31,0xff,0xb8]
|
|
|
|
s_getreg_b32 s5, 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x85,0xb8]
|
|
|
|
s_setreg_b32 0x3141, s1
|
|
// CHECK: [0x41,0x31,0x01,0xb9]
|
|
|
|
s_setreg_b32 0xc1d1, s1
|
|
// CHECK: [0xd1,0xc1,0x01,0xb9]
|
|
|
|
s_setreg_b32 0x3141, s101
|
|
// CHECK: [0x41,0x31,0x65,0xb9]
|
|
|
|
s_setreg_b32 0x3141, flat_scratch_lo
|
|
// CHECK: [0x41,0x31,0x66,0xb9]
|
|
|
|
s_setreg_b32 0x3141, flat_scratch_hi
|
|
// CHECK: [0x41,0x31,0x67,0xb9]
|
|
|
|
s_setreg_b32 0x3141, vcc_lo
|
|
// CHECK: [0x41,0x31,0x6a,0xb9]
|
|
|
|
s_setreg_b32 0x3141, vcc_hi
|
|
// CHECK: [0x41,0x31,0x6b,0xb9]
|
|
|
|
s_setreg_b32 0x3141, m0
|
|
// CHECK: [0x41,0x31,0x7c,0xb9]
|
|
|
|
s_setreg_b32 0x3141, exec_lo
|
|
// CHECK: [0x41,0x31,0x7e,0xb9]
|
|
|
|
s_setreg_b32 0x3141, exec_hi
|
|
// CHECK: [0x41,0x31,0x7f,0xb9]
|
|
|
|
s_setreg_imm32_b32 0x3141, 0x11213141
|
|
// CHECK: [0x41,0x31,0x00,0xba,0x41,0x31,0x21,0x11]
|
|
|
|
s_setreg_imm32_b32 0xc1d1, 0x11213141
|
|
// CHECK: [0xd1,0xc1,0x00,0xba,0x41,0x31,0x21,0x11]
|
|
|
|
s_setreg_imm32_b32 0x3141, 0xa1b1c1d1
|
|
// CHECK: [0x41,0x31,0x00,0xba,0xd1,0xc1,0xb1,0xa1]
|
|
|
|
s_nop 0x3141
|
|
// CHECK: [0x41,0x31,0x80,0xbf]
|
|
|
|
s_nop 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x80,0xbf]
|
|
|
|
s_endpgm
|
|
// CHECK: [0x00,0x00,0x81,0xbf]
|
|
|
|
s_branch 12609
|
|
// CHECK: [0x41,0x31,0x82,0xbf]
|
|
|
|
s_branch 49617
|
|
// CHECK: [0xd1,0xc1,0x82,0xbf]
|
|
|
|
s_wakeup
|
|
// CHECK: [0x00,0x00,0x83,0xbf]
|
|
|
|
s_cbranch_scc0 12609
|
|
// CHECK: [0x41,0x31,0x84,0xbf]
|
|
|
|
s_cbranch_scc0 49617
|
|
// CHECK: [0xd1,0xc1,0x84,0xbf]
|
|
|
|
s_cbranch_scc1 12609
|
|
// CHECK: [0x41,0x31,0x85,0xbf]
|
|
|
|
s_cbranch_scc1 49617
|
|
// CHECK: [0xd1,0xc1,0x85,0xbf]
|
|
|
|
s_cbranch_vccz 12609
|
|
// CHECK: [0x41,0x31,0x86,0xbf]
|
|
|
|
s_cbranch_vccz 49617
|
|
// CHECK: [0xd1,0xc1,0x86,0xbf]
|
|
|
|
s_cbranch_vccnz 12609
|
|
// CHECK: [0x41,0x31,0x87,0xbf]
|
|
|
|
s_cbranch_vccnz 49617
|
|
// CHECK: [0xd1,0xc1,0x87,0xbf]
|
|
|
|
s_cbranch_execz 12609
|
|
// CHECK: [0x41,0x31,0x88,0xbf]
|
|
|
|
s_cbranch_execz 49617
|
|
// CHECK: [0xd1,0xc1,0x88,0xbf]
|
|
|
|
s_cbranch_execnz 12609
|
|
// CHECK: [0x41,0x31,0x89,0xbf]
|
|
|
|
s_cbranch_execnz 49617
|
|
// CHECK: [0xd1,0xc1,0x89,0xbf]
|
|
|
|
s_barrier
|
|
// CHECK: [0x00,0x00,0x8a,0xbf]
|
|
|
|
s_setkill 0x3141
|
|
// CHECK: [0x41,0x31,0x8b,0xbf]
|
|
|
|
s_setkill 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x8b,0xbf]
|
|
|
|
s_waitcnt 0x3141
|
|
// CHECK: [0x41,0x31,0x8c,0xbf]
|
|
|
|
s_waitcnt 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x8c,0xbf]
|
|
|
|
s_sethalt 0x3141
|
|
// CHECK: [0x41,0x31,0x8d,0xbf]
|
|
|
|
s_sethalt 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x8d,0xbf]
|
|
|
|
s_sleep 0x3141
|
|
// CHECK: [0x41,0x31,0x8e,0xbf]
|
|
|
|
s_sleep 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x8e,0xbf]
|
|
|
|
s_setprio 0x3141
|
|
// CHECK: [0x41,0x31,0x8f,0xbf]
|
|
|
|
s_setprio 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x8f,0xbf]
|
|
|
|
s_sendmsg 0x3141
|
|
// CHECK: [0x41,0x31,0x90,0xbf]
|
|
|
|
s_sendmsg 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x90,0xbf]
|
|
|
|
s_sendmsghalt 0x3141
|
|
// CHECK: [0x41,0x31,0x91,0xbf]
|
|
|
|
s_sendmsghalt 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x91,0xbf]
|
|
|
|
s_trap 0x3141
|
|
// CHECK: [0x41,0x31,0x92,0xbf]
|
|
|
|
s_trap 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x92,0xbf]
|
|
|
|
s_icache_inv
|
|
// CHECK: [0x00,0x00,0x93,0xbf]
|
|
|
|
s_incperflevel 0x3141
|
|
// CHECK: [0x41,0x31,0x94,0xbf]
|
|
|
|
s_incperflevel 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x94,0xbf]
|
|
|
|
s_decperflevel 0x3141
|
|
// CHECK: [0x41,0x31,0x95,0xbf]
|
|
|
|
s_decperflevel 0xc1d1
|
|
// CHECK: [0xd1,0xc1,0x95,0xbf]
|
|
|
|
s_ttracedata
|
|
// CHECK: [0x00,0x00,0x96,0xbf]
|
|
|
|
s_cbranch_cdbgsys 12609
|
|
// CHECK: [0x41,0x31,0x97,0xbf]
|
|
|
|
s_cbranch_cdbgsys 49617
|
|
// CHECK: [0xd1,0xc1,0x97,0xbf]
|
|
|
|
s_cbranch_cdbguser 12609
|
|
// CHECK: [0x41,0x31,0x98,0xbf]
|
|
|
|
s_cbranch_cdbguser 49617
|
|
// CHECK: [0xd1,0xc1,0x98,0xbf]
|
|
|
|
s_cbranch_cdbgsys_or_user 12609
|
|
// CHECK: [0x41,0x31,0x99,0xbf]
|
|
|
|
s_cbranch_cdbgsys_or_user 49617
|
|
// CHECK: [0xd1,0xc1,0x99,0xbf]
|
|
|
|
s_cbranch_cdbgsys_and_user 12609
|
|
// CHECK: [0x41,0x31,0x9a,0xbf]
|
|
|
|
s_cbranch_cdbgsys_and_user 49617
|
|
// CHECK: [0xd1,0xc1,0x9a,0xbf]
|
|
|
|
s_endpgm_saved
|
|
// CHECK: [0x00,0x00,0x9b,0xbf]
|
|
|
|
s_set_gpr_idx_off
|
|
// CHECK: [0x00,0x00,0x9c,0xbf]
|
|
|
|
s_set_gpr_idx_mode 0x0
|
|
// CHECK: [0x00,0x00,0x9d,0xbf]
|
|
|
|
s_set_gpr_idx_mode 0x1
|
|
// CHECK: [0x01,0x00,0x9d,0xbf]
|
|
|
|
s_set_gpr_idx_mode 0xF
|
|
// CHECK: [0x0f,0x00,0x9d,0xbf]
|
|
|
|
v_interp_p1_f32 v5, v1, attr0.x
|
|
// CHECK: [0x01,0x00,0x14,0xd4]
|
|
|
|
v_interp_p1_f32 v255, v1, attr0.x
|
|
// CHECK: [0x01,0x00,0xfc,0xd7]
|
|
|
|
v_interp_p1_f32 v5, v255, attr0.x
|
|
// CHECK: [0xff,0x00,0x14,0xd4]
|
|
|
|
v_interp_p1_f32 v5, v1, attr1.x
|
|
// CHECK: [0x01,0x04,0x14,0xd4]
|
|
|
|
v_interp_p1_f32 v5, v1, attr31.x
|
|
// CHECK: [0x01,0x7c,0x14,0xd4]
|
|
|
|
v_interp_p1_f32 v5, v1, attr32.x
|
|
// CHECK: [0x01,0x80,0x14,0xd4]
|
|
|
|
v_interp_p1_f32 v5, v1, attr0.y
|
|
// CHECK: [0x01,0x01,0x14,0xd4]
|
|
|
|
v_interp_p1_f32 v5, v1, attr0.z
|
|
// CHECK: [0x01,0x02,0x14,0xd4]
|
|
|
|
v_interp_p1_f32 v5, v1, attr0.w
|
|
// CHECK: [0x01,0x03,0x14,0xd4]
|
|
|
|
v_interp_p1_f32_e64 v5, v2, attr0.x
|
|
// CHECK: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x00]
|
|
|
|
v_interp_p1_f32_e64 v255, v2, attr0.x
|
|
// CHECK: [0xff,0x00,0x70,0xd2,0x00,0x04,0x02,0x00]
|
|
|
|
v_interp_p1_f32_e64 v5, v2, attr1.x
|
|
// CHECK: [0x05,0x00,0x70,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_interp_p1_f32_e64 v5, v2, attr31.x
|
|
// CHECK: [0x05,0x00,0x70,0xd2,0x1f,0x04,0x02,0x00]
|
|
|
|
v_interp_p1_f32_e64 v5, v2, attr32.x
|
|
// CHECK: [0x05,0x00,0x70,0xd2,0x20,0x04,0x02,0x00]
|
|
|
|
v_interp_p1_f32_e64 v5, v255, attr0.x
|
|
// CHECK: [0x05,0x00,0x70,0xd2,0x00,0xfe,0x03,0x00]
|
|
|
|
v_interp_p1_f32_e64 v5, -v2, attr0.x
|
|
// CHECK: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x40]
|
|
|
|
v_interp_p1_f32_e64 v5, |v2|, attr0.x
|
|
// CHECK: [0x05,0x02,0x70,0xd2,0x00,0x04,0x02,0x00]
|
|
|
|
v_interp_p1_f32_e64 v5, v2, attr0.y
|
|
// CHECK: [0x05,0x00,0x70,0xd2,0x40,0x04,0x02,0x00]
|
|
|
|
v_interp_p1_f32_e64 v5, v2, attr0.z
|
|
// CHECK: [0x05,0x00,0x70,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_interp_p1_f32_e64 v5, v2, attr0.w
|
|
// CHECK: [0x05,0x00,0x70,0xd2,0xc0,0x04,0x02,0x00]
|
|
|
|
v_interp_p1_f32_e64 v5, v2, attr0.x clamp
|
|
// CHECK: [0x05,0x80,0x70,0xd2,0x00,0x04,0x02,0x00]
|
|
|
|
v_interp_p1_f32_e64 v5, v2, attr0.x mul:2
|
|
// CHECK: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x08]
|
|
|
|
v_interp_p1_f32_e64 v5, v2, attr0.x mul:4
|
|
// CHECK: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x10]
|
|
|
|
v_interp_p1_f32_e64 v5, v2, attr0.x div:2
|
|
// CHECK: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x18]
|
|
|
|
v_interp_p2_f32 v5, v1, attr0.x
|
|
// CHECK: [0x01,0x00,0x15,0xd4]
|
|
|
|
v_interp_p2_f32 v255, v1, attr0.x
|
|
// CHECK: [0x01,0x00,0xfd,0xd7]
|
|
|
|
v_interp_p2_f32 v5, v255, attr0.x
|
|
// CHECK: [0xff,0x00,0x15,0xd4]
|
|
|
|
v_interp_p2_f32 v5, v1, attr1.x
|
|
// CHECK: [0x01,0x04,0x15,0xd4]
|
|
|
|
v_interp_p2_f32 v5, v1, attr31.x
|
|
// CHECK: [0x01,0x7c,0x15,0xd4]
|
|
|
|
v_interp_p2_f32 v5, v1, attr32.x
|
|
// CHECK: [0x01,0x80,0x15,0xd4]
|
|
|
|
v_interp_p2_f32 v5, v1, attr0.y
|
|
// CHECK: [0x01,0x01,0x15,0xd4]
|
|
|
|
v_interp_p2_f32 v5, v1, attr0.z
|
|
// CHECK: [0x01,0x02,0x15,0xd4]
|
|
|
|
v_interp_p2_f32 v5, v1, attr0.w
|
|
// CHECK: [0x01,0x03,0x15,0xd4]
|
|
|
|
v_interp_p2_f32_e64 v5, v2, attr0.x
|
|
// CHECK: [0x05,0x00,0x71,0xd2,0x00,0x04,0x02,0x00]
|
|
|
|
v_interp_p2_f32_e64 v255, v2, attr0.x
|
|
// CHECK: [0xff,0x00,0x71,0xd2,0x00,0x04,0x02,0x00]
|
|
|
|
v_interp_p2_f32_e64 v5, v2, attr1.x
|
|
// CHECK: [0x05,0x00,0x71,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_interp_p2_f32_e64 v5, v2, attr31.x
|
|
// CHECK: [0x05,0x00,0x71,0xd2,0x1f,0x04,0x02,0x00]
|
|
|
|
v_interp_p2_f32_e64 v5, v2, attr32.x
|
|
// CHECK: [0x05,0x00,0x71,0xd2,0x20,0x04,0x02,0x00]
|
|
|
|
v_interp_p2_f32_e64 v5, v255, attr0.x
|
|
// CHECK: [0x05,0x00,0x71,0xd2,0x00,0xfe,0x03,0x00]
|
|
|
|
v_interp_p2_f32_e64 v5, -v2, attr0.x
|
|
// CHECK: [0x05,0x00,0x71,0xd2,0x00,0x04,0x02,0x40]
|
|
|
|
v_interp_p2_f32_e64 v5, |v2|, attr0.x
|
|
// CHECK: [0x05,0x02,0x71,0xd2,0x00,0x04,0x02,0x00]
|
|
|
|
v_interp_p2_f32_e64 v5, v2, attr0.y
|
|
// CHECK: [0x05,0x00,0x71,0xd2,0x40,0x04,0x02,0x00]
|
|
|
|
v_interp_p2_f32_e64 v5, v2, attr0.z
|
|
// CHECK: [0x05,0x00,0x71,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_interp_p2_f32_e64 v5, v2, attr0.w
|
|
// CHECK: [0x05,0x00,0x71,0xd2,0xc0,0x04,0x02,0x00]
|
|
|
|
v_interp_p2_f32_e64 v5, v2, attr0.x clamp
|
|
// CHECK: [0x05,0x80,0x71,0xd2,0x00,0x04,0x02,0x00]
|
|
|
|
v_interp_p2_f32_e64 v5, v2, attr0.x mul:2
|
|
// CHECK: [0x05,0x00,0x71,0xd2,0x00,0x04,0x02,0x08]
|
|
|
|
v_interp_p2_f32_e64 v5, v2, attr0.x mul:4
|
|
// CHECK: [0x05,0x00,0x71,0xd2,0x00,0x04,0x02,0x10]
|
|
|
|
v_interp_p2_f32_e64 v5, v2, attr0.x div:2
|
|
// CHECK: [0x05,0x00,0x71,0xd2,0x00,0x04,0x02,0x18]
|
|
|
|
v_interp_mov_f32 v5, p10, attr0.x
|
|
// CHECK: [0x00,0x00,0x16,0xd4]
|
|
|
|
v_interp_mov_f32 v255, p10, attr0.x
|
|
// CHECK: [0x00,0x00,0xfe,0xd7]
|
|
|
|
v_interp_mov_f32 v5, p20, attr0.x
|
|
// CHECK: [0x01,0x00,0x16,0xd4]
|
|
|
|
v_interp_mov_f32 v5, p0, attr0.x
|
|
// CHECK: [0x02,0x00,0x16,0xd4]
|
|
|
|
v_interp_mov_f32 v5, p10, attr1.x
|
|
// CHECK: [0x00,0x04,0x16,0xd4]
|
|
|
|
v_interp_mov_f32 v5, p10, attr31.x
|
|
// CHECK: [0x00,0x7c,0x16,0xd4]
|
|
|
|
v_interp_mov_f32 v5, p10, attr32.x
|
|
// CHECK: [0x00,0x80,0x16,0xd4]
|
|
|
|
v_interp_mov_f32 v5, p10, attr0.y
|
|
// CHECK: [0x00,0x01,0x16,0xd4]
|
|
|
|
v_interp_mov_f32 v5, p10, attr0.z
|
|
// CHECK: [0x00,0x02,0x16,0xd4]
|
|
|
|
v_interp_mov_f32 v5, p10, attr0.w
|
|
// CHECK: [0x00,0x03,0x16,0xd4]
|
|
|
|
v_interp_mov_f32_e64 v5, p10, attr0.x
|
|
// CHECK: [0x05,0x00,0x72,0xd2,0x00,0x00,0x00,0x00]
|
|
|
|
v_interp_mov_f32_e64 v255, p10, attr0.x
|
|
// CHECK: [0xff,0x00,0x72,0xd2,0x00,0x00,0x00,0x00]
|
|
|
|
v_interp_mov_f32_e64 v5, p10, attr1.x
|
|
// CHECK: [0x05,0x00,0x72,0xd2,0x01,0x00,0x00,0x00]
|
|
|
|
v_interp_mov_f32_e64 v5, p10, attr31.x
|
|
// CHECK: [0x05,0x00,0x72,0xd2,0x1f,0x00,0x00,0x00]
|
|
|
|
v_interp_mov_f32_e64 v5, p10, attr32.x
|
|
// CHECK: [0x05,0x00,0x72,0xd2,0x20,0x00,0x00,0x00]
|
|
|
|
v_interp_mov_f32_e64 v5, p20, attr0.x
|
|
// CHECK: [0x05,0x00,0x72,0xd2,0x00,0x02,0x00,0x00]
|
|
|
|
v_interp_mov_f32_e64 v5, p0, attr0.x
|
|
// CHECK: [0x05,0x00,0x72,0xd2,0x00,0x04,0x00,0x00]
|
|
|
|
v_interp_mov_f32_e64 v5, p10, attr0.y
|
|
// CHECK: [0x05,0x00,0x72,0xd2,0x40,0x00,0x00,0x00]
|
|
|
|
v_interp_mov_f32_e64 v5, p10, attr0.z
|
|
// CHECK: [0x05,0x00,0x72,0xd2,0x80,0x00,0x00,0x00]
|
|
|
|
v_interp_mov_f32_e64 v5, p10, attr0.w
|
|
// CHECK: [0x05,0x00,0x72,0xd2,0xc0,0x00,0x00,0x00]
|
|
|
|
v_interp_mov_f32_e64 v5, p10, attr0.x clamp
|
|
// CHECK: [0x05,0x80,0x72,0xd2,0x00,0x00,0x00,0x00]
|
|
|
|
v_interp_mov_f32_e64 v5, p10, attr0.x mul:2
|
|
// CHECK: [0x05,0x00,0x72,0xd2,0x00,0x00,0x00,0x08]
|
|
|
|
v_interp_mov_f32_e64 v5, p10, attr0.x mul:4
|
|
// CHECK: [0x05,0x00,0x72,0xd2,0x00,0x00,0x00,0x10]
|
|
|
|
v_interp_mov_f32_e64 v5, p10, attr0.x div:2
|
|
// CHECK: [0x05,0x00,0x72,0xd2,0x00,0x00,0x00,0x18]
|
|
|
|
v_nop
|
|
// CHECK: [0x00,0x00,0x00,0x7e]
|
|
|
|
v_nop_e64
|
|
// CHECK: [0x00,0x00,0x40,0xd1,0x00,0x00,0x00,0x00]
|
|
|
|
v_mov_b32 v5, v1
|
|
// CHECK: [0x01,0x03,0x0a,0x7e]
|
|
|
|
v_mov_b32 v255, v1
|
|
// CHECK: [0x01,0x03,0xfe,0x7f]
|
|
|
|
v_mov_b32 v5, v255
|
|
// CHECK: [0xff,0x03,0x0a,0x7e]
|
|
|
|
v_mov_b32 v5, s1
|
|
// CHECK: [0x01,0x02,0x0a,0x7e]
|
|
|
|
v_mov_b32 v5, s101
|
|
// CHECK: [0x65,0x02,0x0a,0x7e]
|
|
|
|
v_mov_b32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x02,0x0a,0x7e]
|
|
|
|
v_mov_b32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x02,0x0a,0x7e]
|
|
|
|
v_mov_b32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x02,0x0a,0x7e]
|
|
|
|
v_mov_b32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x02,0x0a,0x7e]
|
|
|
|
v_mov_b32 v5, m0
|
|
// CHECK: [0x7c,0x02,0x0a,0x7e]
|
|
|
|
v_mov_b32 v5, exec_lo
|
|
// CHECK: [0x7e,0x02,0x0a,0x7e]
|
|
|
|
v_mov_b32 v5, exec_hi
|
|
// CHECK: [0x7f,0x02,0x0a,0x7e]
|
|
|
|
v_mov_b32 v5, 0
|
|
// CHECK: [0x80,0x02,0x0a,0x7e]
|
|
|
|
v_mov_b32 v5, -1
|
|
// CHECK: [0xc1,0x02,0x0a,0x7e]
|
|
|
|
v_mov_b32 v5, 0.5
|
|
// CHECK: [0xf0,0x02,0x0a,0x7e]
|
|
|
|
v_mov_b32 v5, -4.0
|
|
// CHECK: [0xf7,0x02,0x0a,0x7e]
|
|
|
|
v_mov_b32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x02,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_mov_b32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x02,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_mov_b32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x41,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_mov_b32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x41,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_mov_b32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x41,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_mov_b32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x41,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_mov_b32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x41,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_mov_b32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x41,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_mov_b32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x41,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_mov_b32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x41,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_mov_b32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x41,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_mov_b32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x41,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_mov_b32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x41,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_mov_b32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x41,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_mov_b32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x41,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_mov_b32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x41,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_mov_b32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x41,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_mov_b32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x41,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_readfirstlane_b32 s5, v1
|
|
// CHECK: [0x01,0x05,0x0a,0x7e]
|
|
|
|
v_readfirstlane_b32 s101, v1
|
|
// CHECK: [0x01,0x05,0xca,0x7e]
|
|
|
|
v_readfirstlane_b32 flat_scratch_lo, v1
|
|
// CHECK: [0x01,0x05,0xcc,0x7e]
|
|
|
|
v_readfirstlane_b32 flat_scratch_hi, v1
|
|
// CHECK: [0x01,0x05,0xce,0x7e]
|
|
|
|
v_readfirstlane_b32 s5, v255
|
|
// CHECK: [0xff,0x05,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f64 v5, v[1:2]
|
|
// CHECK: [0x01,0x07,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f64 v255, v[1:2]
|
|
// CHECK: [0x01,0x07,0xfe,0x7f]
|
|
|
|
v_cvt_i32_f64 v5, v[254:255]
|
|
// CHECK: [0xfe,0x07,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f64 v5, s[2:3]
|
|
// CHECK: [0x02,0x06,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f64 v5, s[4:5]
|
|
// CHECK: [0x04,0x06,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f64 v5, s[100:101]
|
|
// CHECK: [0x64,0x06,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f64 v5, flat_scratch
|
|
// CHECK: [0x66,0x06,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f64 v5, vcc
|
|
// CHECK: [0x6a,0x06,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f64 v5, exec
|
|
// CHECK: [0x7e,0x06,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f64 v5, 0
|
|
// CHECK: [0x80,0x06,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f64 v5, -1
|
|
// CHECK: [0xc1,0x06,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f64 v5, 0.5
|
|
// CHECK: [0xf0,0x06,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f64 v5, -4.0
|
|
// CHECK: [0xf7,0x06,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f64 v5, 0xaf123456
|
|
// CHECK: [0xff,0x06,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cvt_i32_f64 v5, 0x3f717273
|
|
// CHECK: [0xff,0x06,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cvt_i32_f64_e64 v5, v[1:2]
|
|
// CHECK: [0x05,0x00,0x43,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_i32_f64_e64 v255, v[1:2]
|
|
// CHECK: [0xff,0x00,0x43,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_i32_f64_e64 v5, v[254:255]
|
|
// CHECK: [0x05,0x00,0x43,0xd1,0xfe,0x01,0x00,0x00]
|
|
|
|
v_cvt_i32_f64_e64 v5, s[2:3]
|
|
// CHECK: [0x05,0x00,0x43,0xd1,0x02,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f64_e64 v5, s[4:5]
|
|
// CHECK: [0x05,0x00,0x43,0xd1,0x04,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f64_e64 v5, s[100:101]
|
|
// CHECK: [0x05,0x00,0x43,0xd1,0x64,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f64_e64 v5, flat_scratch
|
|
// CHECK: [0x05,0x00,0x43,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f64_e64 v5, vcc
|
|
// CHECK: [0x05,0x00,0x43,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f64_e64 v5, exec
|
|
// CHECK: [0x05,0x00,0x43,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f64_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x43,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f64_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x43,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f64_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x43,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f64_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x43,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f64_e64 v5, -v[1:2]
|
|
// CHECK: [0x05,0x00,0x43,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_cvt_i32_f64_e64 v5, |v[1:2]|
|
|
// CHECK: [0x05,0x01,0x43,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_i32_f64_e64 v5, v[1:2] clamp
|
|
// CHECK: [0x05,0x80,0x43,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f64_i32 v[5:6], v1
|
|
// CHECK: [0x01,0x09,0x0a,0x7e]
|
|
|
|
v_cvt_f64_i32 v[254:255], v1
|
|
// CHECK: [0x01,0x09,0xfc,0x7f]
|
|
|
|
v_cvt_f64_i32 v[5:6], v255
|
|
// CHECK: [0xff,0x09,0x0a,0x7e]
|
|
|
|
v_cvt_f64_i32 v[5:6], s1
|
|
// CHECK: [0x01,0x08,0x0a,0x7e]
|
|
|
|
v_cvt_f64_i32 v[5:6], s101
|
|
// CHECK: [0x65,0x08,0x0a,0x7e]
|
|
|
|
v_cvt_f64_i32 v[5:6], flat_scratch_lo
|
|
// CHECK: [0x66,0x08,0x0a,0x7e]
|
|
|
|
v_cvt_f64_i32 v[5:6], flat_scratch_hi
|
|
// CHECK: [0x67,0x08,0x0a,0x7e]
|
|
|
|
v_cvt_f64_i32 v[5:6], vcc_lo
|
|
// CHECK: [0x6a,0x08,0x0a,0x7e]
|
|
|
|
v_cvt_f64_i32 v[5:6], vcc_hi
|
|
// CHECK: [0x6b,0x08,0x0a,0x7e]
|
|
|
|
v_cvt_f64_i32 v[5:6], m0
|
|
// CHECK: [0x7c,0x08,0x0a,0x7e]
|
|
|
|
v_cvt_f64_i32 v[5:6], exec_lo
|
|
// CHECK: [0x7e,0x08,0x0a,0x7e]
|
|
|
|
v_cvt_f64_i32 v[5:6], exec_hi
|
|
// CHECK: [0x7f,0x08,0x0a,0x7e]
|
|
|
|
v_cvt_f64_i32 v[5:6], 0
|
|
// CHECK: [0x80,0x08,0x0a,0x7e]
|
|
|
|
v_cvt_f64_i32 v[5:6], -1
|
|
// CHECK: [0xc1,0x08,0x0a,0x7e]
|
|
|
|
v_cvt_f64_i32 v[5:6], 0.5
|
|
// CHECK: [0xf0,0x08,0x0a,0x7e]
|
|
|
|
v_cvt_f64_i32 v[5:6], -4.0
|
|
// CHECK: [0xf7,0x08,0x0a,0x7e]
|
|
|
|
v_cvt_f64_i32 v[5:6], 0xaf123456
|
|
// CHECK: [0xff,0x08,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cvt_f64_i32 v[5:6], 0x3f717273
|
|
// CHECK: [0xff,0x08,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], v1
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[254:255], v1
|
|
// CHECK: [0xfe,0x00,0x44,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], v255
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], s1
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], s101
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], vcc_lo
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], vcc_hi
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], m0
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], exec_lo
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], exec_hi
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], 0
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], -1
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], 0.5
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], -4.0
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], v1 clamp
|
|
// CHECK: [0x05,0x80,0x44,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], v1 mul:2
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], v1 mul:4
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_cvt_f64_i32_e64 v[5:6], v1 div:2
|
|
// CHECK: [0x05,0x00,0x44,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_cvt_f32_i32 v5, v1
|
|
// CHECK: [0x01,0x0b,0x0a,0x7e]
|
|
|
|
v_cvt_f32_i32 v255, v1
|
|
// CHECK: [0x01,0x0b,0xfe,0x7f]
|
|
|
|
v_cvt_f32_i32 v5, v255
|
|
// CHECK: [0xff,0x0b,0x0a,0x7e]
|
|
|
|
v_cvt_f32_i32 v5, s1
|
|
// CHECK: [0x01,0x0a,0x0a,0x7e]
|
|
|
|
v_cvt_f32_i32 v5, s101
|
|
// CHECK: [0x65,0x0a,0x0a,0x7e]
|
|
|
|
v_cvt_f32_i32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x0a,0x0a,0x7e]
|
|
|
|
v_cvt_f32_i32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x0a,0x0a,0x7e]
|
|
|
|
v_cvt_f32_i32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x0a,0x0a,0x7e]
|
|
|
|
v_cvt_f32_i32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x0a,0x0a,0x7e]
|
|
|
|
v_cvt_f32_i32 v5, m0
|
|
// CHECK: [0x7c,0x0a,0x0a,0x7e]
|
|
|
|
v_cvt_f32_i32 v5, exec_lo
|
|
// CHECK: [0x7e,0x0a,0x0a,0x7e]
|
|
|
|
v_cvt_f32_i32 v5, exec_hi
|
|
// CHECK: [0x7f,0x0a,0x0a,0x7e]
|
|
|
|
v_cvt_f32_i32 v5, 0
|
|
// CHECK: [0x80,0x0a,0x0a,0x7e]
|
|
|
|
v_cvt_f32_i32 v5, -1
|
|
// CHECK: [0xc1,0x0a,0x0a,0x7e]
|
|
|
|
v_cvt_f32_i32 v5, 0.5
|
|
// CHECK: [0xf0,0x0a,0x0a,0x7e]
|
|
|
|
v_cvt_f32_i32 v5, -4.0
|
|
// CHECK: [0xf7,0x0a,0x0a,0x7e]
|
|
|
|
v_cvt_f32_i32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x0a,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cvt_f32_i32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x0a,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cvt_f32_i32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x45,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x45,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_cvt_f32_i32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_cvt_f32_i32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x45,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_cvt_f32_u32 v5, v1
|
|
// CHECK: [0x01,0x0d,0x0a,0x7e]
|
|
|
|
v_cvt_f32_u32 v255, v1
|
|
// CHECK: [0x01,0x0d,0xfe,0x7f]
|
|
|
|
v_cvt_f32_u32 v5, v255
|
|
// CHECK: [0xff,0x0d,0x0a,0x7e]
|
|
|
|
v_cvt_f32_u32 v5, s1
|
|
// CHECK: [0x01,0x0c,0x0a,0x7e]
|
|
|
|
v_cvt_f32_u32 v5, s101
|
|
// CHECK: [0x65,0x0c,0x0a,0x7e]
|
|
|
|
v_cvt_f32_u32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x0c,0x0a,0x7e]
|
|
|
|
v_cvt_f32_u32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x0c,0x0a,0x7e]
|
|
|
|
v_cvt_f32_u32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x0c,0x0a,0x7e]
|
|
|
|
v_cvt_f32_u32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x0c,0x0a,0x7e]
|
|
|
|
v_cvt_f32_u32 v5, m0
|
|
// CHECK: [0x7c,0x0c,0x0a,0x7e]
|
|
|
|
v_cvt_f32_u32 v5, exec_lo
|
|
// CHECK: [0x7e,0x0c,0x0a,0x7e]
|
|
|
|
v_cvt_f32_u32 v5, exec_hi
|
|
// CHECK: [0x7f,0x0c,0x0a,0x7e]
|
|
|
|
v_cvt_f32_u32 v5, 0
|
|
// CHECK: [0x80,0x0c,0x0a,0x7e]
|
|
|
|
v_cvt_f32_u32 v5, -1
|
|
// CHECK: [0xc1,0x0c,0x0a,0x7e]
|
|
|
|
v_cvt_f32_u32 v5, 0.5
|
|
// CHECK: [0xf0,0x0c,0x0a,0x7e]
|
|
|
|
v_cvt_f32_u32 v5, -4.0
|
|
// CHECK: [0xf7,0x0c,0x0a,0x7e]
|
|
|
|
v_cvt_f32_u32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x0c,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cvt_f32_u32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x0c,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cvt_f32_u32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x46,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x46,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_cvt_f32_u32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_cvt_f32_u32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x46,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_cvt_u32_f32 v5, v1
|
|
// CHECK: [0x01,0x0f,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f32 v255, v1
|
|
// CHECK: [0x01,0x0f,0xfe,0x7f]
|
|
|
|
v_cvt_u32_f32 v5, v255
|
|
// CHECK: [0xff,0x0f,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f32 v5, s1
|
|
// CHECK: [0x01,0x0e,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f32 v5, s101
|
|
// CHECK: [0x65,0x0e,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x0e,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x0e,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x0e,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x0e,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f32 v5, m0
|
|
// CHECK: [0x7c,0x0e,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x0e,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x0e,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f32 v5, 0
|
|
// CHECK: [0x80,0x0e,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f32 v5, -1
|
|
// CHECK: [0xc1,0x0e,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x0e,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x0e,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x0e,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cvt_u32_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x0e,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cvt_u32_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x47,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x47,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x47,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x47,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x47,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x47,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x47,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x47,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x47,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x47,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x47,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x47,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x47,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x47,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x47,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x47,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x47,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_cvt_u32_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x47,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x47,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_i32_f32 v5, v1
|
|
// CHECK: [0x01,0x11,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f32 v255, v1
|
|
// CHECK: [0x01,0x11,0xfe,0x7f]
|
|
|
|
v_cvt_i32_f32 v5, v255
|
|
// CHECK: [0xff,0x11,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f32 v5, s1
|
|
// CHECK: [0x01,0x10,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f32 v5, s101
|
|
// CHECK: [0x65,0x10,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x10,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x10,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x10,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x10,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f32 v5, m0
|
|
// CHECK: [0x7c,0x10,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x10,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x10,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f32 v5, 0
|
|
// CHECK: [0x80,0x10,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f32 v5, -1
|
|
// CHECK: [0xc1,0x10,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x10,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x10,0x0a,0x7e]
|
|
|
|
v_cvt_i32_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x10,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cvt_i32_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x10,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cvt_i32_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x48,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x48,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x48,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x48,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x48,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x48,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x48,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x48,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x48,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x48,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x48,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x48,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x48,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x48,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x48,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x48,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x48,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_cvt_i32_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x48,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_i32_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x48,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_mov_fed_b32 v5, v1
|
|
// CHECK: [0x01,0x13,0x0a,0x7e]
|
|
|
|
v_mov_fed_b32 v255, v1
|
|
// CHECK: [0x01,0x13,0xfe,0x7f]
|
|
|
|
v_mov_fed_b32 v5, v255
|
|
// CHECK: [0xff,0x13,0x0a,0x7e]
|
|
|
|
v_mov_fed_b32 v5, s1
|
|
// CHECK: [0x01,0x12,0x0a,0x7e]
|
|
|
|
v_mov_fed_b32 v5, s101
|
|
// CHECK: [0x65,0x12,0x0a,0x7e]
|
|
|
|
v_mov_fed_b32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x12,0x0a,0x7e]
|
|
|
|
v_mov_fed_b32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x12,0x0a,0x7e]
|
|
|
|
v_mov_fed_b32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x12,0x0a,0x7e]
|
|
|
|
v_mov_fed_b32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x12,0x0a,0x7e]
|
|
|
|
v_mov_fed_b32 v5, m0
|
|
// CHECK: [0x7c,0x12,0x0a,0x7e]
|
|
|
|
v_mov_fed_b32 v5, exec_lo
|
|
// CHECK: [0x7e,0x12,0x0a,0x7e]
|
|
|
|
v_mov_fed_b32 v5, exec_hi
|
|
// CHECK: [0x7f,0x12,0x0a,0x7e]
|
|
|
|
v_mov_fed_b32 v5, 0
|
|
// CHECK: [0x80,0x12,0x0a,0x7e]
|
|
|
|
v_mov_fed_b32 v5, -1
|
|
// CHECK: [0xc1,0x12,0x0a,0x7e]
|
|
|
|
v_mov_fed_b32 v5, 0.5
|
|
// CHECK: [0xf0,0x12,0x0a,0x7e]
|
|
|
|
v_mov_fed_b32 v5, -4.0
|
|
// CHECK: [0xf7,0x12,0x0a,0x7e]
|
|
|
|
v_mov_fed_b32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x12,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_mov_fed_b32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x12,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_mov_fed_b32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x49,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_mov_fed_b32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x49,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_mov_fed_b32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x49,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_mov_fed_b32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x49,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_mov_fed_b32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x49,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_mov_fed_b32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x49,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_mov_fed_b32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x49,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_mov_fed_b32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x49,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_mov_fed_b32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x49,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_mov_fed_b32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x49,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_mov_fed_b32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x49,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_mov_fed_b32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x49,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_mov_fed_b32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x49,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_mov_fed_b32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x49,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_mov_fed_b32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x49,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_mov_fed_b32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x49,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_f32 v5, v1
|
|
// CHECK: [0x01,0x15,0x0a,0x7e]
|
|
|
|
v_cvt_f16_f32 v255, v1
|
|
// CHECK: [0x01,0x15,0xfe,0x7f]
|
|
|
|
v_cvt_f16_f32 v5, v255
|
|
// CHECK: [0xff,0x15,0x0a,0x7e]
|
|
|
|
v_cvt_f16_f32 v5, s1
|
|
// CHECK: [0x01,0x14,0x0a,0x7e]
|
|
|
|
v_cvt_f16_f32 v5, s101
|
|
// CHECK: [0x65,0x14,0x0a,0x7e]
|
|
|
|
v_cvt_f16_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x14,0x0a,0x7e]
|
|
|
|
v_cvt_f16_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x14,0x0a,0x7e]
|
|
|
|
v_cvt_f16_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x14,0x0a,0x7e]
|
|
|
|
v_cvt_f16_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x14,0x0a,0x7e]
|
|
|
|
v_cvt_f16_f32 v5, m0
|
|
// CHECK: [0x7c,0x14,0x0a,0x7e]
|
|
|
|
v_cvt_f16_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x14,0x0a,0x7e]
|
|
|
|
v_cvt_f16_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x14,0x0a,0x7e]
|
|
|
|
v_cvt_f16_f32 v5, 0
|
|
// CHECK: [0x80,0x14,0x0a,0x7e]
|
|
|
|
v_cvt_f16_f32 v5, -1
|
|
// CHECK: [0xc1,0x14,0x0a,0x7e]
|
|
|
|
v_cvt_f16_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x14,0x0a,0x7e]
|
|
|
|
v_cvt_f16_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x14,0x0a,0x7e]
|
|
|
|
v_cvt_f16_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x14,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cvt_f16_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x14,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cvt_f16_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x4a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_cvt_f16_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x4a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x4a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_cvt_f16_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_cvt_f16_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x4a,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_cvt_f32_f16 v5, v1
|
|
// CHECK: [0x01,0x17,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f16 v255, v1
|
|
// CHECK: [0x01,0x17,0xfe,0x7f]
|
|
|
|
v_cvt_f32_f16 v5, v255
|
|
// CHECK: [0xff,0x17,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f16 v5, s1
|
|
// CHECK: [0x01,0x16,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f16 v5, s101
|
|
// CHECK: [0x65,0x16,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x16,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x16,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x16,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x16,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f16 v5, m0
|
|
// CHECK: [0x7c,0x16,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x16,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x16,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f16 v5, 0
|
|
// CHECK: [0x80,0x16,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f16 v5, -1
|
|
// CHECK: [0xc1,0x16,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x16,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x16,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x16,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cvt_f32_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x16,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x4b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_cvt_f32_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x4b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x4b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_cvt_f32_f16_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_cvt_f32_f16_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x4b,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_cvt_rpi_i32_f32 v5, v1
|
|
// CHECK: [0x01,0x19,0x0a,0x7e]
|
|
|
|
v_cvt_rpi_i32_f32 v255, v1
|
|
// CHECK: [0x01,0x19,0xfe,0x7f]
|
|
|
|
v_cvt_rpi_i32_f32 v5, v255
|
|
// CHECK: [0xff,0x19,0x0a,0x7e]
|
|
|
|
v_cvt_rpi_i32_f32 v5, s1
|
|
// CHECK: [0x01,0x18,0x0a,0x7e]
|
|
|
|
v_cvt_rpi_i32_f32 v5, s101
|
|
// CHECK: [0x65,0x18,0x0a,0x7e]
|
|
|
|
v_cvt_rpi_i32_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x18,0x0a,0x7e]
|
|
|
|
v_cvt_rpi_i32_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x18,0x0a,0x7e]
|
|
|
|
v_cvt_rpi_i32_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x18,0x0a,0x7e]
|
|
|
|
v_cvt_rpi_i32_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x18,0x0a,0x7e]
|
|
|
|
v_cvt_rpi_i32_f32 v5, m0
|
|
// CHECK: [0x7c,0x18,0x0a,0x7e]
|
|
|
|
v_cvt_rpi_i32_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x18,0x0a,0x7e]
|
|
|
|
v_cvt_rpi_i32_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x18,0x0a,0x7e]
|
|
|
|
v_cvt_rpi_i32_f32 v5, 0
|
|
// CHECK: [0x80,0x18,0x0a,0x7e]
|
|
|
|
v_cvt_rpi_i32_f32 v5, -1
|
|
// CHECK: [0xc1,0x18,0x0a,0x7e]
|
|
|
|
v_cvt_rpi_i32_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x18,0x0a,0x7e]
|
|
|
|
v_cvt_rpi_i32_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x18,0x0a,0x7e]
|
|
|
|
v_cvt_rpi_i32_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x18,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cvt_rpi_i32_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x18,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x4c,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x4c,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x4c,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x4c,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x4c,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x4c,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x4c,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x4c,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x4c,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x4c,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x4c,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x4c,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x4c,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x4c,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x4c,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x4c,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x4c,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_cvt_rpi_i32_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x4c,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32 v5, v1
|
|
// CHECK: [0x01,0x1b,0x0a,0x7e]
|
|
|
|
v_cvt_flr_i32_f32 v255, v1
|
|
// CHECK: [0x01,0x1b,0xfe,0x7f]
|
|
|
|
v_cvt_flr_i32_f32 v5, v255
|
|
// CHECK: [0xff,0x1b,0x0a,0x7e]
|
|
|
|
v_cvt_flr_i32_f32 v5, s1
|
|
// CHECK: [0x01,0x1a,0x0a,0x7e]
|
|
|
|
v_cvt_flr_i32_f32 v5, s101
|
|
// CHECK: [0x65,0x1a,0x0a,0x7e]
|
|
|
|
v_cvt_flr_i32_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x1a,0x0a,0x7e]
|
|
|
|
v_cvt_flr_i32_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x1a,0x0a,0x7e]
|
|
|
|
v_cvt_flr_i32_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x1a,0x0a,0x7e]
|
|
|
|
v_cvt_flr_i32_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x1a,0x0a,0x7e]
|
|
|
|
v_cvt_flr_i32_f32 v5, m0
|
|
// CHECK: [0x7c,0x1a,0x0a,0x7e]
|
|
|
|
v_cvt_flr_i32_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x1a,0x0a,0x7e]
|
|
|
|
v_cvt_flr_i32_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x1a,0x0a,0x7e]
|
|
|
|
v_cvt_flr_i32_f32 v5, 0
|
|
// CHECK: [0x80,0x1a,0x0a,0x7e]
|
|
|
|
v_cvt_flr_i32_f32 v5, -1
|
|
// CHECK: [0xc1,0x1a,0x0a,0x7e]
|
|
|
|
v_cvt_flr_i32_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x1a,0x0a,0x7e]
|
|
|
|
v_cvt_flr_i32_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x1a,0x0a,0x7e]
|
|
|
|
v_cvt_flr_i32_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x1a,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cvt_flr_i32_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x1a,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x4d,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x4d,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x4d,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x4d,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x4d,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x4d,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x4d,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x4d,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x4d,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x4d,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x4d,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x4d,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x4d,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x4d,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x4d,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x4d,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x4d,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_cvt_flr_i32_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x4d,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4 v5, v1
|
|
// CHECK: [0x01,0x1d,0x0a,0x7e]
|
|
|
|
v_cvt_off_f32_i4 v255, v1
|
|
// CHECK: [0x01,0x1d,0xfe,0x7f]
|
|
|
|
v_cvt_off_f32_i4 v5, v255
|
|
// CHECK: [0xff,0x1d,0x0a,0x7e]
|
|
|
|
v_cvt_off_f32_i4 v5, s1
|
|
// CHECK: [0x01,0x1c,0x0a,0x7e]
|
|
|
|
v_cvt_off_f32_i4 v5, s101
|
|
// CHECK: [0x65,0x1c,0x0a,0x7e]
|
|
|
|
v_cvt_off_f32_i4 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x1c,0x0a,0x7e]
|
|
|
|
v_cvt_off_f32_i4 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x1c,0x0a,0x7e]
|
|
|
|
v_cvt_off_f32_i4 v5, vcc_lo
|
|
// CHECK: [0x6a,0x1c,0x0a,0x7e]
|
|
|
|
v_cvt_off_f32_i4 v5, vcc_hi
|
|
// CHECK: [0x6b,0x1c,0x0a,0x7e]
|
|
|
|
v_cvt_off_f32_i4 v5, m0
|
|
// CHECK: [0x7c,0x1c,0x0a,0x7e]
|
|
|
|
v_cvt_off_f32_i4 v5, exec_lo
|
|
// CHECK: [0x7e,0x1c,0x0a,0x7e]
|
|
|
|
v_cvt_off_f32_i4 v5, exec_hi
|
|
// CHECK: [0x7f,0x1c,0x0a,0x7e]
|
|
|
|
v_cvt_off_f32_i4 v5, 0
|
|
// CHECK: [0x80,0x1c,0x0a,0x7e]
|
|
|
|
v_cvt_off_f32_i4 v5, -1
|
|
// CHECK: [0xc1,0x1c,0x0a,0x7e]
|
|
|
|
v_cvt_off_f32_i4 v5, 0.5
|
|
// CHECK: [0xf0,0x1c,0x0a,0x7e]
|
|
|
|
v_cvt_off_f32_i4 v5, -4.0
|
|
// CHECK: [0xf7,0x1c,0x0a,0x7e]
|
|
|
|
v_cvt_off_f32_i4 v5, 0x4f
|
|
// CHECK: [0xff,0x1c,0x0a,0x7e,0x4f,0x00,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4 v5, 0x41
|
|
// CHECK: [0xff,0x1c,0x0a,0x7e,0x41,0x00,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x4e,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x4e,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_cvt_off_f32_i4_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x4e,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_cvt_f32_f64 v5, v[1:2]
|
|
// CHECK: [0x01,0x1f,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f64 v255, v[1:2]
|
|
// CHECK: [0x01,0x1f,0xfe,0x7f]
|
|
|
|
v_cvt_f32_f64 v5, v[254:255]
|
|
// CHECK: [0xfe,0x1f,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f64 v5, s[2:3]
|
|
// CHECK: [0x02,0x1e,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f64 v5, s[4:5]
|
|
// CHECK: [0x04,0x1e,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f64 v5, s[100:101]
|
|
// CHECK: [0x64,0x1e,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f64 v5, flat_scratch
|
|
// CHECK: [0x66,0x1e,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f64 v5, vcc
|
|
// CHECK: [0x6a,0x1e,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f64 v5, exec
|
|
// CHECK: [0x7e,0x1e,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f64 v5, 0
|
|
// CHECK: [0x80,0x1e,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f64 v5, -1
|
|
// CHECK: [0xc1,0x1e,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f64 v5, 0.5
|
|
// CHECK: [0xf0,0x1e,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f64 v5, -4.0
|
|
// CHECK: [0xf7,0x1e,0x0a,0x7e]
|
|
|
|
v_cvt_f32_f64 v5, 0xaf123456
|
|
// CHECK: [0xff,0x1e,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cvt_f32_f64 v5, 0x3f717273
|
|
// CHECK: [0xff,0x1e,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cvt_f32_f64_e64 v5, v[1:2]
|
|
// CHECK: [0x05,0x00,0x4f,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_f64_e64 v255, v[1:2]
|
|
// CHECK: [0xff,0x00,0x4f,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_f64_e64 v5, v[254:255]
|
|
// CHECK: [0x05,0x00,0x4f,0xd1,0xfe,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_f64_e64 v5, s[2:3]
|
|
// CHECK: [0x05,0x00,0x4f,0xd1,0x02,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f64_e64 v5, s[4:5]
|
|
// CHECK: [0x05,0x00,0x4f,0xd1,0x04,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f64_e64 v5, s[100:101]
|
|
// CHECK: [0x05,0x00,0x4f,0xd1,0x64,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f64_e64 v5, flat_scratch
|
|
// CHECK: [0x05,0x00,0x4f,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f64_e64 v5, vcc
|
|
// CHECK: [0x05,0x00,0x4f,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f64_e64 v5, exec
|
|
// CHECK: [0x05,0x00,0x4f,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f64_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x4f,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f64_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x4f,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f64_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x4f,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f64_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x4f,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_f64_e64 v5, -v[1:2]
|
|
// CHECK: [0x05,0x00,0x4f,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_cvt_f32_f64_e64 v5, |v[1:2]|
|
|
// CHECK: [0x05,0x01,0x4f,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_f64_e64 v5, v[1:2] clamp
|
|
// CHECK: [0x05,0x80,0x4f,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_f64_e64 v5, v[1:2] mul:2
|
|
// CHECK: [0x05,0x00,0x4f,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_cvt_f32_f64_e64 v5, v[1:2] mul:4
|
|
// CHECK: [0x05,0x00,0x4f,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_cvt_f32_f64_e64 v5, v[1:2] div:2
|
|
// CHECK: [0x05,0x00,0x4f,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_cvt_f64_f32 v[5:6], v1
|
|
// CHECK: [0x01,0x21,0x0a,0x7e]
|
|
|
|
v_cvt_f64_f32 v[254:255], v1
|
|
// CHECK: [0x01,0x21,0xfc,0x7f]
|
|
|
|
v_cvt_f64_f32 v[5:6], v255
|
|
// CHECK: [0xff,0x21,0x0a,0x7e]
|
|
|
|
v_cvt_f64_f32 v[5:6], s1
|
|
// CHECK: [0x01,0x20,0x0a,0x7e]
|
|
|
|
v_cvt_f64_f32 v[5:6], s101
|
|
// CHECK: [0x65,0x20,0x0a,0x7e]
|
|
|
|
v_cvt_f64_f32 v[5:6], flat_scratch_lo
|
|
// CHECK: [0x66,0x20,0x0a,0x7e]
|
|
|
|
v_cvt_f64_f32 v[5:6], flat_scratch_hi
|
|
// CHECK: [0x67,0x20,0x0a,0x7e]
|
|
|
|
v_cvt_f64_f32 v[5:6], vcc_lo
|
|
// CHECK: [0x6a,0x20,0x0a,0x7e]
|
|
|
|
v_cvt_f64_f32 v[5:6], vcc_hi
|
|
// CHECK: [0x6b,0x20,0x0a,0x7e]
|
|
|
|
v_cvt_f64_f32 v[5:6], m0
|
|
// CHECK: [0x7c,0x20,0x0a,0x7e]
|
|
|
|
v_cvt_f64_f32 v[5:6], exec_lo
|
|
// CHECK: [0x7e,0x20,0x0a,0x7e]
|
|
|
|
v_cvt_f64_f32 v[5:6], exec_hi
|
|
// CHECK: [0x7f,0x20,0x0a,0x7e]
|
|
|
|
v_cvt_f64_f32 v[5:6], 0
|
|
// CHECK: [0x80,0x20,0x0a,0x7e]
|
|
|
|
v_cvt_f64_f32 v[5:6], -1
|
|
// CHECK: [0xc1,0x20,0x0a,0x7e]
|
|
|
|
v_cvt_f64_f32 v[5:6], 0.5
|
|
// CHECK: [0xf0,0x20,0x0a,0x7e]
|
|
|
|
v_cvt_f64_f32 v[5:6], -4.0
|
|
// CHECK: [0xf7,0x20,0x0a,0x7e]
|
|
|
|
v_cvt_f64_f32 v[5:6], 0xaf123456
|
|
// CHECK: [0xff,0x20,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cvt_f64_f32 v[5:6], 0x3f717273
|
|
// CHECK: [0xff,0x20,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], v1
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[254:255], v1
|
|
// CHECK: [0xfe,0x00,0x50,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], v255
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], s1
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], s101
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], vcc_lo
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], vcc_hi
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], m0
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], exec_lo
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], exec_hi
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], 0
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], -1
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], 0.5
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], -4.0
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], -v1
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], |v1|
|
|
// CHECK: [0x05,0x01,0x50,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], v1 clamp
|
|
// CHECK: [0x05,0x80,0x50,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], v1 mul:2
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], v1 mul:4
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_cvt_f64_f32_e64 v[5:6], v1 div:2
|
|
// CHECK: [0x05,0x00,0x50,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_cvt_f32_ubyte0 v5, v1
|
|
// CHECK: [0x01,0x23,0x0a,0x7e]
|
|
|
|
v_cvt_f32_ubyte0 v255, v1
|
|
// CHECK: [0x01,0x23,0xfe,0x7f]
|
|
|
|
v_cvt_f32_ubyte0 v5, v255
|
|
// CHECK: [0xff,0x23,0x0a,0x7e]
|
|
|
|
v_cvt_f32_ubyte0 v5, s1
|
|
// CHECK: [0x01,0x22,0x0a,0x7e]
|
|
|
|
v_cvt_f32_ubyte0 v5, s101
|
|
// CHECK: [0x65,0x22,0x0a,0x7e]
|
|
|
|
v_cvt_f32_ubyte0 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x22,0x0a,0x7e]
|
|
|
|
v_cvt_f32_ubyte0 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x22,0x0a,0x7e]
|
|
|
|
v_cvt_f32_ubyte0 v5, vcc_lo
|
|
// CHECK: [0x6a,0x22,0x0a,0x7e]
|
|
|
|
v_cvt_f32_ubyte0 v5, vcc_hi
|
|
// CHECK: [0x6b,0x22,0x0a,0x7e]
|
|
|
|
v_cvt_f32_ubyte0 v5, m0
|
|
// CHECK: [0x7c,0x22,0x0a,0x7e]
|
|
|
|
v_cvt_f32_ubyte0 v5, exec_lo
|
|
// CHECK: [0x7e,0x22,0x0a,0x7e]
|
|
|
|
v_cvt_f32_ubyte0 v5, exec_hi
|
|
// CHECK: [0x7f,0x22,0x0a,0x7e]
|
|
|
|
v_cvt_f32_ubyte0 v5, 0
|
|
// CHECK: [0x80,0x22,0x0a,0x7e]
|
|
|
|
v_cvt_f32_ubyte0 v5, -1
|
|
// CHECK: [0xc1,0x22,0x0a,0x7e]
|
|
|
|
v_cvt_f32_ubyte0 v5, 0.5
|
|
// CHECK: [0xf0,0x22,0x0a,0x7e]
|
|
|
|
v_cvt_f32_ubyte0 v5, -4.0
|
|
// CHECK: [0xf7,0x22,0x0a,0x7e]
|
|
|
|
v_cvt_f32_ubyte0 v5, 0xaf123456
|
|
// CHECK: [0xff,0x22,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cvt_f32_ubyte0 v5, 0x3f717273
|
|
// CHECK: [0xff,0x22,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cvt_f32_ubyte0_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x51,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x51,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x51,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x51,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x51,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x51,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x51,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x51,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x51,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x51,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x51,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x51,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x51,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x51,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x51,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x51,0xd1,0xf7,0x00,0x00,0x00]
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v_cvt_f32_ubyte0_e64 v5, v1 clamp
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|
// CHECK: [0x05,0x80,0x51,0xd1,0x01,0x01,0x00,0x00]
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v_cvt_f32_ubyte0_e64 v5, v1 mul:2
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|
// CHECK: [0x05,0x00,0x51,0xd1,0x01,0x01,0x00,0x08]
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v_cvt_f32_ubyte0_e64 v5, v1 mul:4
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|
// CHECK: [0x05,0x00,0x51,0xd1,0x01,0x01,0x00,0x10]
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v_cvt_f32_ubyte0_e64 v5, v1 div:2
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|
// CHECK: [0x05,0x00,0x51,0xd1,0x01,0x01,0x00,0x18]
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v_cvt_f32_ubyte1 v5, v1
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// CHECK: [0x01,0x25,0x0a,0x7e]
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v_cvt_f32_ubyte1 v255, v1
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|
// CHECK: [0x01,0x25,0xfe,0x7f]
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v_cvt_f32_ubyte1 v5, v255
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|
// CHECK: [0xff,0x25,0x0a,0x7e]
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v_cvt_f32_ubyte1 v5, s1
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// CHECK: [0x01,0x24,0x0a,0x7e]
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v_cvt_f32_ubyte1 v5, s101
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// CHECK: [0x65,0x24,0x0a,0x7e]
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v_cvt_f32_ubyte1 v5, flat_scratch_lo
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// CHECK: [0x66,0x24,0x0a,0x7e]
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v_cvt_f32_ubyte1 v5, flat_scratch_hi
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// CHECK: [0x67,0x24,0x0a,0x7e]
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v_cvt_f32_ubyte1 v5, vcc_lo
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|
// CHECK: [0x6a,0x24,0x0a,0x7e]
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v_cvt_f32_ubyte1 v5, vcc_hi
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// CHECK: [0x6b,0x24,0x0a,0x7e]
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v_cvt_f32_ubyte1 v5, m0
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// CHECK: [0x7c,0x24,0x0a,0x7e]
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v_cvt_f32_ubyte1 v5, exec_lo
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// CHECK: [0x7e,0x24,0x0a,0x7e]
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v_cvt_f32_ubyte1 v5, exec_hi
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// CHECK: [0x7f,0x24,0x0a,0x7e]
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v_cvt_f32_ubyte1 v5, 0
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// CHECK: [0x80,0x24,0x0a,0x7e]
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v_cvt_f32_ubyte1 v5, -1
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// CHECK: [0xc1,0x24,0x0a,0x7e]
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v_cvt_f32_ubyte1 v5, 0.5
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// CHECK: [0xf0,0x24,0x0a,0x7e]
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v_cvt_f32_ubyte1 v5, -4.0
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// CHECK: [0xf7,0x24,0x0a,0x7e]
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v_cvt_f32_ubyte1 v5, 0xaf123456
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// CHECK: [0xff,0x24,0x0a,0x7e,0x56,0x34,0x12,0xaf]
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v_cvt_f32_ubyte1 v5, 0x3f717273
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// CHECK: [0xff,0x24,0x0a,0x7e,0x73,0x72,0x71,0x3f]
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v_cvt_f32_ubyte1_e64 v5, v1
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// CHECK: [0x05,0x00,0x52,0xd1,0x01,0x01,0x00,0x00]
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v_cvt_f32_ubyte1_e64 v255, v1
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|
// CHECK: [0xff,0x00,0x52,0xd1,0x01,0x01,0x00,0x00]
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v_cvt_f32_ubyte1_e64 v5, v255
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// CHECK: [0x05,0x00,0x52,0xd1,0xff,0x01,0x00,0x00]
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v_cvt_f32_ubyte1_e64 v5, s1
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// CHECK: [0x05,0x00,0x52,0xd1,0x01,0x00,0x00,0x00]
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v_cvt_f32_ubyte1_e64 v5, s101
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// CHECK: [0x05,0x00,0x52,0xd1,0x65,0x00,0x00,0x00]
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v_cvt_f32_ubyte1_e64 v5, flat_scratch_lo
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|
// CHECK: [0x05,0x00,0x52,0xd1,0x66,0x00,0x00,0x00]
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v_cvt_f32_ubyte1_e64 v5, flat_scratch_hi
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|
// CHECK: [0x05,0x00,0x52,0xd1,0x67,0x00,0x00,0x00]
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v_cvt_f32_ubyte1_e64 v5, vcc_lo
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|
// CHECK: [0x05,0x00,0x52,0xd1,0x6a,0x00,0x00,0x00]
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v_cvt_f32_ubyte1_e64 v5, vcc_hi
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// CHECK: [0x05,0x00,0x52,0xd1,0x6b,0x00,0x00,0x00]
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v_cvt_f32_ubyte1_e64 v5, m0
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|
// CHECK: [0x05,0x00,0x52,0xd1,0x7c,0x00,0x00,0x00]
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v_cvt_f32_ubyte1_e64 v5, exec_lo
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|
// CHECK: [0x05,0x00,0x52,0xd1,0x7e,0x00,0x00,0x00]
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v_cvt_f32_ubyte1_e64 v5, exec_hi
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|
// CHECK: [0x05,0x00,0x52,0xd1,0x7f,0x00,0x00,0x00]
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v_cvt_f32_ubyte1_e64 v5, 0
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|
// CHECK: [0x05,0x00,0x52,0xd1,0x80,0x00,0x00,0x00]
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v_cvt_f32_ubyte1_e64 v5, -1
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|
// CHECK: [0x05,0x00,0x52,0xd1,0xc1,0x00,0x00,0x00]
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v_cvt_f32_ubyte1_e64 v5, 0.5
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|
// CHECK: [0x05,0x00,0x52,0xd1,0xf0,0x00,0x00,0x00]
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v_cvt_f32_ubyte1_e64 v5, -4.0
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|
// CHECK: [0x05,0x00,0x52,0xd1,0xf7,0x00,0x00,0x00]
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v_cvt_f32_ubyte1_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x52,0xd1,0x01,0x01,0x00,0x00]
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|
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v_cvt_f32_ubyte1_e64 v5, v1 mul:2
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|
// CHECK: [0x05,0x00,0x52,0xd1,0x01,0x01,0x00,0x08]
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v_cvt_f32_ubyte1_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x52,0xd1,0x01,0x01,0x00,0x10]
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v_cvt_f32_ubyte1_e64 v5, v1 div:2
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|
// CHECK: [0x05,0x00,0x52,0xd1,0x01,0x01,0x00,0x18]
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v_cvt_f32_ubyte2 v5, v1
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|
// CHECK: [0x01,0x27,0x0a,0x7e]
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v_cvt_f32_ubyte2 v255, v1
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|
// CHECK: [0x01,0x27,0xfe,0x7f]
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v_cvt_f32_ubyte2 v5, v255
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|
// CHECK: [0xff,0x27,0x0a,0x7e]
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v_cvt_f32_ubyte2 v5, s1
|
|
// CHECK: [0x01,0x26,0x0a,0x7e]
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v_cvt_f32_ubyte2 v5, s101
|
|
// CHECK: [0x65,0x26,0x0a,0x7e]
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|
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v_cvt_f32_ubyte2 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x26,0x0a,0x7e]
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v_cvt_f32_ubyte2 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x26,0x0a,0x7e]
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v_cvt_f32_ubyte2 v5, vcc_lo
|
|
// CHECK: [0x6a,0x26,0x0a,0x7e]
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v_cvt_f32_ubyte2 v5, vcc_hi
|
|
// CHECK: [0x6b,0x26,0x0a,0x7e]
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|
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v_cvt_f32_ubyte2 v5, m0
|
|
// CHECK: [0x7c,0x26,0x0a,0x7e]
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v_cvt_f32_ubyte2 v5, exec_lo
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// CHECK: [0x7e,0x26,0x0a,0x7e]
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v_cvt_f32_ubyte2 v5, exec_hi
|
|
// CHECK: [0x7f,0x26,0x0a,0x7e]
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v_cvt_f32_ubyte2 v5, 0
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|
// CHECK: [0x80,0x26,0x0a,0x7e]
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v_cvt_f32_ubyte2 v5, -1
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|
// CHECK: [0xc1,0x26,0x0a,0x7e]
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v_cvt_f32_ubyte2 v5, 0.5
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|
// CHECK: [0xf0,0x26,0x0a,0x7e]
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v_cvt_f32_ubyte2 v5, -4.0
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|
// CHECK: [0xf7,0x26,0x0a,0x7e]
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v_cvt_f32_ubyte2 v5, 0xaf123456
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// CHECK: [0xff,0x26,0x0a,0x7e,0x56,0x34,0x12,0xaf]
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v_cvt_f32_ubyte2 v5, 0x3f717273
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// CHECK: [0xff,0x26,0x0a,0x7e,0x73,0x72,0x71,0x3f]
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v_cvt_f32_ubyte2_e64 v5, v1
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|
// CHECK: [0x05,0x00,0x53,0xd1,0x01,0x01,0x00,0x00]
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v_cvt_f32_ubyte2_e64 v255, v1
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// CHECK: [0xff,0x00,0x53,0xd1,0x01,0x01,0x00,0x00]
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v_cvt_f32_ubyte2_e64 v5, v255
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// CHECK: [0x05,0x00,0x53,0xd1,0xff,0x01,0x00,0x00]
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v_cvt_f32_ubyte2_e64 v5, s1
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// CHECK: [0x05,0x00,0x53,0xd1,0x01,0x00,0x00,0x00]
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v_cvt_f32_ubyte2_e64 v5, s101
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// CHECK: [0x05,0x00,0x53,0xd1,0x65,0x00,0x00,0x00]
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v_cvt_f32_ubyte2_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x53,0xd1,0x66,0x00,0x00,0x00]
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v_cvt_f32_ubyte2_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x53,0xd1,0x67,0x00,0x00,0x00]
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v_cvt_f32_ubyte2_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x53,0xd1,0x6a,0x00,0x00,0x00]
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v_cvt_f32_ubyte2_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x53,0xd1,0x6b,0x00,0x00,0x00]
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v_cvt_f32_ubyte2_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x53,0xd1,0x7c,0x00,0x00,0x00]
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v_cvt_f32_ubyte2_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x53,0xd1,0x7e,0x00,0x00,0x00]
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|
v_cvt_f32_ubyte2_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x53,0xd1,0x7f,0x00,0x00,0x00]
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v_cvt_f32_ubyte2_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x53,0xd1,0x80,0x00,0x00,0x00]
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|
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|
v_cvt_f32_ubyte2_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x53,0xd1,0xc1,0x00,0x00,0x00]
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|
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|
v_cvt_f32_ubyte2_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x53,0xd1,0xf0,0x00,0x00,0x00]
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|
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|
v_cvt_f32_ubyte2_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x53,0xd1,0xf7,0x00,0x00,0x00]
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|
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|
v_cvt_f32_ubyte2_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x53,0xd1,0x01,0x01,0x00,0x00]
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|
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|
v_cvt_f32_ubyte2_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x53,0xd1,0x01,0x01,0x00,0x08]
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|
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|
v_cvt_f32_ubyte2_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x53,0xd1,0x01,0x01,0x00,0x10]
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|
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|
v_cvt_f32_ubyte2_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x53,0xd1,0x01,0x01,0x00,0x18]
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|
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|
v_cvt_f32_ubyte3 v5, v1
|
|
// CHECK: [0x01,0x29,0x0a,0x7e]
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|
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|
v_cvt_f32_ubyte3 v255, v1
|
|
// CHECK: [0x01,0x29,0xfe,0x7f]
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|
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v_cvt_f32_ubyte3 v5, v255
|
|
// CHECK: [0xff,0x29,0x0a,0x7e]
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|
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|
v_cvt_f32_ubyte3 v5, s1
|
|
// CHECK: [0x01,0x28,0x0a,0x7e]
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|
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|
v_cvt_f32_ubyte3 v5, s101
|
|
// CHECK: [0x65,0x28,0x0a,0x7e]
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|
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v_cvt_f32_ubyte3 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x28,0x0a,0x7e]
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|
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|
v_cvt_f32_ubyte3 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x28,0x0a,0x7e]
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|
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|
v_cvt_f32_ubyte3 v5, vcc_lo
|
|
// CHECK: [0x6a,0x28,0x0a,0x7e]
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|
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|
v_cvt_f32_ubyte3 v5, vcc_hi
|
|
// CHECK: [0x6b,0x28,0x0a,0x7e]
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|
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|
v_cvt_f32_ubyte3 v5, m0
|
|
// CHECK: [0x7c,0x28,0x0a,0x7e]
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|
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|
v_cvt_f32_ubyte3 v5, exec_lo
|
|
// CHECK: [0x7e,0x28,0x0a,0x7e]
|
|
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|
v_cvt_f32_ubyte3 v5, exec_hi
|
|
// CHECK: [0x7f,0x28,0x0a,0x7e]
|
|
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|
v_cvt_f32_ubyte3 v5, 0
|
|
// CHECK: [0x80,0x28,0x0a,0x7e]
|
|
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|
v_cvt_f32_ubyte3 v5, -1
|
|
// CHECK: [0xc1,0x28,0x0a,0x7e]
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|
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|
v_cvt_f32_ubyte3 v5, 0.5
|
|
// CHECK: [0xf0,0x28,0x0a,0x7e]
|
|
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|
v_cvt_f32_ubyte3 v5, -4.0
|
|
// CHECK: [0xf7,0x28,0x0a,0x7e]
|
|
|
|
v_cvt_f32_ubyte3 v5, 0xaf123456
|
|
// CHECK: [0xff,0x28,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cvt_f32_ubyte3 v5, 0x3f717273
|
|
// CHECK: [0xff,0x28,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x54,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x54,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_cvt_f32_ubyte3_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x54,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_cvt_u32_f64 v5, v[1:2]
|
|
// CHECK: [0x01,0x2b,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f64 v255, v[1:2]
|
|
// CHECK: [0x01,0x2b,0xfe,0x7f]
|
|
|
|
v_cvt_u32_f64 v5, v[254:255]
|
|
// CHECK: [0xfe,0x2b,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f64 v5, s[2:3]
|
|
// CHECK: [0x02,0x2a,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f64 v5, s[4:5]
|
|
// CHECK: [0x04,0x2a,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f64 v5, s[100:101]
|
|
// CHECK: [0x64,0x2a,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f64 v5, flat_scratch
|
|
// CHECK: [0x66,0x2a,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f64 v5, vcc
|
|
// CHECK: [0x6a,0x2a,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f64 v5, exec
|
|
// CHECK: [0x7e,0x2a,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f64 v5, 0
|
|
// CHECK: [0x80,0x2a,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f64 v5, -1
|
|
// CHECK: [0xc1,0x2a,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f64 v5, 0.5
|
|
// CHECK: [0xf0,0x2a,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f64 v5, -4.0
|
|
// CHECK: [0xf7,0x2a,0x0a,0x7e]
|
|
|
|
v_cvt_u32_f64 v5, 0xaf123456
|
|
// CHECK: [0xff,0x2a,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cvt_u32_f64 v5, 0x3f717273
|
|
// CHECK: [0xff,0x2a,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cvt_u32_f64_e64 v5, v[1:2]
|
|
// CHECK: [0x05,0x00,0x55,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_u32_f64_e64 v255, v[1:2]
|
|
// CHECK: [0xff,0x00,0x55,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_u32_f64_e64 v5, v[254:255]
|
|
// CHECK: [0x05,0x00,0x55,0xd1,0xfe,0x01,0x00,0x00]
|
|
|
|
v_cvt_u32_f64_e64 v5, s[2:3]
|
|
// CHECK: [0x05,0x00,0x55,0xd1,0x02,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f64_e64 v5, s[4:5]
|
|
// CHECK: [0x05,0x00,0x55,0xd1,0x04,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f64_e64 v5, s[100:101]
|
|
// CHECK: [0x05,0x00,0x55,0xd1,0x64,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f64_e64 v5, flat_scratch
|
|
// CHECK: [0x05,0x00,0x55,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f64_e64 v5, vcc
|
|
// CHECK: [0x05,0x00,0x55,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f64_e64 v5, exec
|
|
// CHECK: [0x05,0x00,0x55,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f64_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x55,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f64_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x55,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f64_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x55,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f64_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x55,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_u32_f64_e64 v5, -v[1:2]
|
|
// CHECK: [0x05,0x00,0x55,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_cvt_u32_f64_e64 v5, |v[1:2]|
|
|
// CHECK: [0x05,0x01,0x55,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_u32_f64_e64 v5, v[1:2] clamp
|
|
// CHECK: [0x05,0x80,0x55,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f64_u32 v[5:6], v1
|
|
// CHECK: [0x01,0x2d,0x0a,0x7e]
|
|
|
|
v_cvt_f64_u32 v[254:255], v1
|
|
// CHECK: [0x01,0x2d,0xfc,0x7f]
|
|
|
|
v_cvt_f64_u32 v[5:6], v255
|
|
// CHECK: [0xff,0x2d,0x0a,0x7e]
|
|
|
|
v_cvt_f64_u32 v[5:6], s1
|
|
// CHECK: [0x01,0x2c,0x0a,0x7e]
|
|
|
|
v_cvt_f64_u32 v[5:6], s101
|
|
// CHECK: [0x65,0x2c,0x0a,0x7e]
|
|
|
|
v_cvt_f64_u32 v[5:6], flat_scratch_lo
|
|
// CHECK: [0x66,0x2c,0x0a,0x7e]
|
|
|
|
v_cvt_f64_u32 v[5:6], flat_scratch_hi
|
|
// CHECK: [0x67,0x2c,0x0a,0x7e]
|
|
|
|
v_cvt_f64_u32 v[5:6], vcc_lo
|
|
// CHECK: [0x6a,0x2c,0x0a,0x7e]
|
|
|
|
v_cvt_f64_u32 v[5:6], vcc_hi
|
|
// CHECK: [0x6b,0x2c,0x0a,0x7e]
|
|
|
|
v_cvt_f64_u32 v[5:6], m0
|
|
// CHECK: [0x7c,0x2c,0x0a,0x7e]
|
|
|
|
v_cvt_f64_u32 v[5:6], exec_lo
|
|
// CHECK: [0x7e,0x2c,0x0a,0x7e]
|
|
|
|
v_cvt_f64_u32 v[5:6], exec_hi
|
|
// CHECK: [0x7f,0x2c,0x0a,0x7e]
|
|
|
|
v_cvt_f64_u32 v[5:6], 0
|
|
// CHECK: [0x80,0x2c,0x0a,0x7e]
|
|
|
|
v_cvt_f64_u32 v[5:6], -1
|
|
// CHECK: [0xc1,0x2c,0x0a,0x7e]
|
|
|
|
v_cvt_f64_u32 v[5:6], 0.5
|
|
// CHECK: [0xf0,0x2c,0x0a,0x7e]
|
|
|
|
v_cvt_f64_u32 v[5:6], -4.0
|
|
// CHECK: [0xf7,0x2c,0x0a,0x7e]
|
|
|
|
v_cvt_f64_u32 v[5:6], 0xaf123456
|
|
// CHECK: [0xff,0x2c,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cvt_f64_u32 v[5:6], 0x3f717273
|
|
// CHECK: [0xff,0x2c,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], v1
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[254:255], v1
|
|
// CHECK: [0xfe,0x00,0x56,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], v255
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], s1
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], s101
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], vcc_lo
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], vcc_hi
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], m0
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], exec_lo
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], exec_hi
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], 0
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], -1
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], 0.5
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], -4.0
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], v1 clamp
|
|
// CHECK: [0x05,0x80,0x56,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], v1 mul:2
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], v1 mul:4
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_cvt_f64_u32_e64 v[5:6], v1 div:2
|
|
// CHECK: [0x05,0x00,0x56,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_trunc_f64 v[5:6], v[1:2]
|
|
// CHECK: [0x01,0x2f,0x0a,0x7e]
|
|
|
|
v_trunc_f64 v[254:255], v[1:2]
|
|
// CHECK: [0x01,0x2f,0xfc,0x7f]
|
|
|
|
v_trunc_f64 v[5:6], v[254:255]
|
|
// CHECK: [0xfe,0x2f,0x0a,0x7e]
|
|
|
|
v_trunc_f64 v[5:6], s[2:3]
|
|
// CHECK: [0x02,0x2e,0x0a,0x7e]
|
|
|
|
v_trunc_f64 v[5:6], s[4:5]
|
|
// CHECK: [0x04,0x2e,0x0a,0x7e]
|
|
|
|
v_trunc_f64 v[5:6], s[100:101]
|
|
// CHECK: [0x64,0x2e,0x0a,0x7e]
|
|
|
|
v_trunc_f64 v[5:6], flat_scratch
|
|
// CHECK: [0x66,0x2e,0x0a,0x7e]
|
|
|
|
v_trunc_f64 v[5:6], vcc
|
|
// CHECK: [0x6a,0x2e,0x0a,0x7e]
|
|
|
|
v_trunc_f64 v[5:6], exec
|
|
// CHECK: [0x7e,0x2e,0x0a,0x7e]
|
|
|
|
v_trunc_f64 v[5:6], 0
|
|
// CHECK: [0x80,0x2e,0x0a,0x7e]
|
|
|
|
v_trunc_f64 v[5:6], -1
|
|
// CHECK: [0xc1,0x2e,0x0a,0x7e]
|
|
|
|
v_trunc_f64 v[5:6], 0.5
|
|
// CHECK: [0xf0,0x2e,0x0a,0x7e]
|
|
|
|
v_trunc_f64 v[5:6], -4.0
|
|
// CHECK: [0xf7,0x2e,0x0a,0x7e]
|
|
|
|
v_trunc_f64 v[5:6], 0xaf123456
|
|
// CHECK: [0xff,0x2e,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_trunc_f64 v[5:6], 0x3f717273
|
|
// CHECK: [0xff,0x2e,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_trunc_f64_e64 v[5:6], v[1:2]
|
|
// CHECK: [0x05,0x00,0x57,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_trunc_f64_e64 v[254:255], v[1:2]
|
|
// CHECK: [0xfe,0x00,0x57,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_trunc_f64_e64 v[5:6], v[254:255]
|
|
// CHECK: [0x05,0x00,0x57,0xd1,0xfe,0x01,0x00,0x00]
|
|
|
|
v_trunc_f64_e64 v[5:6], s[2:3]
|
|
// CHECK: [0x05,0x00,0x57,0xd1,0x02,0x00,0x00,0x00]
|
|
|
|
v_trunc_f64_e64 v[5:6], s[4:5]
|
|
// CHECK: [0x05,0x00,0x57,0xd1,0x04,0x00,0x00,0x00]
|
|
|
|
v_trunc_f64_e64 v[5:6], s[100:101]
|
|
// CHECK: [0x05,0x00,0x57,0xd1,0x64,0x00,0x00,0x00]
|
|
|
|
v_trunc_f64_e64 v[5:6], flat_scratch
|
|
// CHECK: [0x05,0x00,0x57,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_trunc_f64_e64 v[5:6], vcc
|
|
// CHECK: [0x05,0x00,0x57,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_trunc_f64_e64 v[5:6], exec
|
|
// CHECK: [0x05,0x00,0x57,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_trunc_f64_e64 v[5:6], 0
|
|
// CHECK: [0x05,0x00,0x57,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_trunc_f64_e64 v[5:6], -1
|
|
// CHECK: [0x05,0x00,0x57,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_trunc_f64_e64 v[5:6], 0.5
|
|
// CHECK: [0x05,0x00,0x57,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_trunc_f64_e64 v[5:6], -4.0
|
|
// CHECK: [0x05,0x00,0x57,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_trunc_f64_e64 v[5:6], -v[1:2]
|
|
// CHECK: [0x05,0x00,0x57,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_trunc_f64_e64 v[5:6], |v[1:2]|
|
|
// CHECK: [0x05,0x01,0x57,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_trunc_f64_e64 v[5:6], v[1:2] clamp
|
|
// CHECK: [0x05,0x80,0x57,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_trunc_f64_e64 v[5:6], v[1:2] mul:2
|
|
// CHECK: [0x05,0x00,0x57,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_trunc_f64_e64 v[5:6], v[1:2] mul:4
|
|
// CHECK: [0x05,0x00,0x57,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_trunc_f64_e64 v[5:6], v[1:2] div:2
|
|
// CHECK: [0x05,0x00,0x57,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_ceil_f64 v[5:6], v[1:2]
|
|
// CHECK: [0x01,0x31,0x0a,0x7e]
|
|
|
|
v_ceil_f64 v[254:255], v[1:2]
|
|
// CHECK: [0x01,0x31,0xfc,0x7f]
|
|
|
|
v_ceil_f64 v[5:6], v[254:255]
|
|
// CHECK: [0xfe,0x31,0x0a,0x7e]
|
|
|
|
v_ceil_f64 v[5:6], s[2:3]
|
|
// CHECK: [0x02,0x30,0x0a,0x7e]
|
|
|
|
v_ceil_f64 v[5:6], s[4:5]
|
|
// CHECK: [0x04,0x30,0x0a,0x7e]
|
|
|
|
v_ceil_f64 v[5:6], s[100:101]
|
|
// CHECK: [0x64,0x30,0x0a,0x7e]
|
|
|
|
v_ceil_f64 v[5:6], flat_scratch
|
|
// CHECK: [0x66,0x30,0x0a,0x7e]
|
|
|
|
v_ceil_f64 v[5:6], vcc
|
|
// CHECK: [0x6a,0x30,0x0a,0x7e]
|
|
|
|
v_ceil_f64 v[5:6], exec
|
|
// CHECK: [0x7e,0x30,0x0a,0x7e]
|
|
|
|
v_ceil_f64 v[5:6], 0
|
|
// CHECK: [0x80,0x30,0x0a,0x7e]
|
|
|
|
v_ceil_f64 v[5:6], -1
|
|
// CHECK: [0xc1,0x30,0x0a,0x7e]
|
|
|
|
v_ceil_f64 v[5:6], 0.5
|
|
// CHECK: [0xf0,0x30,0x0a,0x7e]
|
|
|
|
v_ceil_f64 v[5:6], -4.0
|
|
// CHECK: [0xf7,0x30,0x0a,0x7e]
|
|
|
|
v_ceil_f64 v[5:6], 0xaf123456
|
|
// CHECK: [0xff,0x30,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_ceil_f64 v[5:6], 0x3f717273
|
|
// CHECK: [0xff,0x30,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_ceil_f64_e64 v[5:6], v[1:2]
|
|
// CHECK: [0x05,0x00,0x58,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ceil_f64_e64 v[254:255], v[1:2]
|
|
// CHECK: [0xfe,0x00,0x58,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ceil_f64_e64 v[5:6], v[254:255]
|
|
// CHECK: [0x05,0x00,0x58,0xd1,0xfe,0x01,0x00,0x00]
|
|
|
|
v_ceil_f64_e64 v[5:6], s[2:3]
|
|
// CHECK: [0x05,0x00,0x58,0xd1,0x02,0x00,0x00,0x00]
|
|
|
|
v_ceil_f64_e64 v[5:6], s[4:5]
|
|
// CHECK: [0x05,0x00,0x58,0xd1,0x04,0x00,0x00,0x00]
|
|
|
|
v_ceil_f64_e64 v[5:6], s[100:101]
|
|
// CHECK: [0x05,0x00,0x58,0xd1,0x64,0x00,0x00,0x00]
|
|
|
|
v_ceil_f64_e64 v[5:6], flat_scratch
|
|
// CHECK: [0x05,0x00,0x58,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_ceil_f64_e64 v[5:6], vcc
|
|
// CHECK: [0x05,0x00,0x58,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_ceil_f64_e64 v[5:6], exec
|
|
// CHECK: [0x05,0x00,0x58,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_ceil_f64_e64 v[5:6], 0
|
|
// CHECK: [0x05,0x00,0x58,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_ceil_f64_e64 v[5:6], -1
|
|
// CHECK: [0x05,0x00,0x58,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_ceil_f64_e64 v[5:6], 0.5
|
|
// CHECK: [0x05,0x00,0x58,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_ceil_f64_e64 v[5:6], -4.0
|
|
// CHECK: [0x05,0x00,0x58,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_ceil_f64_e64 v[5:6], -v[1:2]
|
|
// CHECK: [0x05,0x00,0x58,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_ceil_f64_e64 v[5:6], |v[1:2]|
|
|
// CHECK: [0x05,0x01,0x58,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ceil_f64_e64 v[5:6], v[1:2] clamp
|
|
// CHECK: [0x05,0x80,0x58,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ceil_f64_e64 v[5:6], v[1:2] mul:2
|
|
// CHECK: [0x05,0x00,0x58,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_ceil_f64_e64 v[5:6], v[1:2] mul:4
|
|
// CHECK: [0x05,0x00,0x58,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_ceil_f64_e64 v[5:6], v[1:2] div:2
|
|
// CHECK: [0x05,0x00,0x58,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_rndne_f64 v[5:6], v[1:2]
|
|
// CHECK: [0x01,0x33,0x0a,0x7e]
|
|
|
|
v_rndne_f64 v[254:255], v[1:2]
|
|
// CHECK: [0x01,0x33,0xfc,0x7f]
|
|
|
|
v_rndne_f64 v[5:6], v[254:255]
|
|
// CHECK: [0xfe,0x33,0x0a,0x7e]
|
|
|
|
v_rndne_f64 v[5:6], s[2:3]
|
|
// CHECK: [0x02,0x32,0x0a,0x7e]
|
|
|
|
v_rndne_f64 v[5:6], s[4:5]
|
|
// CHECK: [0x04,0x32,0x0a,0x7e]
|
|
|
|
v_rndne_f64 v[5:6], s[100:101]
|
|
// CHECK: [0x64,0x32,0x0a,0x7e]
|
|
|
|
v_rndne_f64 v[5:6], flat_scratch
|
|
// CHECK: [0x66,0x32,0x0a,0x7e]
|
|
|
|
v_rndne_f64 v[5:6], vcc
|
|
// CHECK: [0x6a,0x32,0x0a,0x7e]
|
|
|
|
v_rndne_f64 v[5:6], exec
|
|
// CHECK: [0x7e,0x32,0x0a,0x7e]
|
|
|
|
v_rndne_f64 v[5:6], 0
|
|
// CHECK: [0x80,0x32,0x0a,0x7e]
|
|
|
|
v_rndne_f64 v[5:6], -1
|
|
// CHECK: [0xc1,0x32,0x0a,0x7e]
|
|
|
|
v_rndne_f64 v[5:6], 0.5
|
|
// CHECK: [0xf0,0x32,0x0a,0x7e]
|
|
|
|
v_rndne_f64 v[5:6], -4.0
|
|
// CHECK: [0xf7,0x32,0x0a,0x7e]
|
|
|
|
v_rndne_f64 v[5:6], 0xaf123456
|
|
// CHECK: [0xff,0x32,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_rndne_f64 v[5:6], 0x3f717273
|
|
// CHECK: [0xff,0x32,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_rndne_f64_e64 v[5:6], v[1:2]
|
|
// CHECK: [0x05,0x00,0x59,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rndne_f64_e64 v[254:255], v[1:2]
|
|
// CHECK: [0xfe,0x00,0x59,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rndne_f64_e64 v[5:6], v[254:255]
|
|
// CHECK: [0x05,0x00,0x59,0xd1,0xfe,0x01,0x00,0x00]
|
|
|
|
v_rndne_f64_e64 v[5:6], s[2:3]
|
|
// CHECK: [0x05,0x00,0x59,0xd1,0x02,0x00,0x00,0x00]
|
|
|
|
v_rndne_f64_e64 v[5:6], s[4:5]
|
|
// CHECK: [0x05,0x00,0x59,0xd1,0x04,0x00,0x00,0x00]
|
|
|
|
v_rndne_f64_e64 v[5:6], s[100:101]
|
|
// CHECK: [0x05,0x00,0x59,0xd1,0x64,0x00,0x00,0x00]
|
|
|
|
v_rndne_f64_e64 v[5:6], flat_scratch
|
|
// CHECK: [0x05,0x00,0x59,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_rndne_f64_e64 v[5:6], vcc
|
|
// CHECK: [0x05,0x00,0x59,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_rndne_f64_e64 v[5:6], exec
|
|
// CHECK: [0x05,0x00,0x59,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_rndne_f64_e64 v[5:6], 0
|
|
// CHECK: [0x05,0x00,0x59,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_rndne_f64_e64 v[5:6], -1
|
|
// CHECK: [0x05,0x00,0x59,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_rndne_f64_e64 v[5:6], 0.5
|
|
// CHECK: [0x05,0x00,0x59,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_rndne_f64_e64 v[5:6], -4.0
|
|
// CHECK: [0x05,0x00,0x59,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_rndne_f64_e64 v[5:6], -v[1:2]
|
|
// CHECK: [0x05,0x00,0x59,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_rndne_f64_e64 v[5:6], v[1:2] clamp
|
|
// CHECK: [0x05,0x80,0x59,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rndne_f64_e64 v[5:6], v[1:2] mul:2
|
|
// CHECK: [0x05,0x00,0x59,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_rndne_f64_e64 v[5:6], v[1:2] mul:4
|
|
// CHECK: [0x05,0x00,0x59,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_rndne_f64_e64 v[5:6], v[1:2] div:2
|
|
// CHECK: [0x05,0x00,0x59,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_floor_f64 v[5:6], v[1:2]
|
|
// CHECK: [0x01,0x35,0x0a,0x7e]
|
|
|
|
v_floor_f64 v[254:255], v[1:2]
|
|
// CHECK: [0x01,0x35,0xfc,0x7f]
|
|
|
|
v_floor_f64 v[5:6], v[254:255]
|
|
// CHECK: [0xfe,0x35,0x0a,0x7e]
|
|
|
|
v_floor_f64 v[5:6], s[2:3]
|
|
// CHECK: [0x02,0x34,0x0a,0x7e]
|
|
|
|
v_floor_f64 v[5:6], s[4:5]
|
|
// CHECK: [0x04,0x34,0x0a,0x7e]
|
|
|
|
v_floor_f64 v[5:6], s[100:101]
|
|
// CHECK: [0x64,0x34,0x0a,0x7e]
|
|
|
|
v_floor_f64 v[5:6], flat_scratch
|
|
// CHECK: [0x66,0x34,0x0a,0x7e]
|
|
|
|
v_floor_f64 v[5:6], vcc
|
|
// CHECK: [0x6a,0x34,0x0a,0x7e]
|
|
|
|
v_floor_f64 v[5:6], exec
|
|
// CHECK: [0x7e,0x34,0x0a,0x7e]
|
|
|
|
v_floor_f64 v[5:6], 0
|
|
// CHECK: [0x80,0x34,0x0a,0x7e]
|
|
|
|
v_floor_f64 v[5:6], -1
|
|
// CHECK: [0xc1,0x34,0x0a,0x7e]
|
|
|
|
v_floor_f64 v[5:6], 0.5
|
|
// CHECK: [0xf0,0x34,0x0a,0x7e]
|
|
|
|
v_floor_f64 v[5:6], -4.0
|
|
// CHECK: [0xf7,0x34,0x0a,0x7e]
|
|
|
|
v_floor_f64 v[5:6], 0xaf123456
|
|
// CHECK: [0xff,0x34,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_floor_f64 v[5:6], 0x3f717273
|
|
// CHECK: [0xff,0x34,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_floor_f64_e64 v[5:6], v[1:2]
|
|
// CHECK: [0x05,0x00,0x5a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_floor_f64_e64 v[254:255], v[1:2]
|
|
// CHECK: [0xfe,0x00,0x5a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_floor_f64_e64 v[5:6], v[254:255]
|
|
// CHECK: [0x05,0x00,0x5a,0xd1,0xfe,0x01,0x00,0x00]
|
|
|
|
v_floor_f64_e64 v[5:6], s[2:3]
|
|
// CHECK: [0x05,0x00,0x5a,0xd1,0x02,0x00,0x00,0x00]
|
|
|
|
v_floor_f64_e64 v[5:6], s[4:5]
|
|
// CHECK: [0x05,0x00,0x5a,0xd1,0x04,0x00,0x00,0x00]
|
|
|
|
v_floor_f64_e64 v[5:6], s[100:101]
|
|
// CHECK: [0x05,0x00,0x5a,0xd1,0x64,0x00,0x00,0x00]
|
|
|
|
v_floor_f64_e64 v[5:6], flat_scratch
|
|
// CHECK: [0x05,0x00,0x5a,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_floor_f64_e64 v[5:6], vcc
|
|
// CHECK: [0x05,0x00,0x5a,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_floor_f64_e64 v[5:6], exec
|
|
// CHECK: [0x05,0x00,0x5a,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_floor_f64_e64 v[5:6], 0
|
|
// CHECK: [0x05,0x00,0x5a,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_floor_f64_e64 v[5:6], -1
|
|
// CHECK: [0x05,0x00,0x5a,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_floor_f64_e64 v[5:6], 0.5
|
|
// CHECK: [0x05,0x00,0x5a,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_floor_f64_e64 v[5:6], -4.0
|
|
// CHECK: [0x05,0x00,0x5a,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_floor_f64_e64 v[5:6], -v[1:2]
|
|
// CHECK: [0x05,0x00,0x5a,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_floor_f64_e64 v[5:6], v[1:2] clamp
|
|
// CHECK: [0x05,0x80,0x5a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_floor_f64_e64 v[5:6], v[1:2] mul:2
|
|
// CHECK: [0x05,0x00,0x5a,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_floor_f64_e64 v[5:6], v[1:2] mul:4
|
|
// CHECK: [0x05,0x00,0x5a,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_floor_f64_e64 v[5:6], v[1:2] div:2
|
|
// CHECK: [0x05,0x00,0x5a,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_fract_f32 v5, v1
|
|
// CHECK: [0x01,0x37,0x0a,0x7e]
|
|
|
|
v_fract_f32 v255, v1
|
|
// CHECK: [0x01,0x37,0xfe,0x7f]
|
|
|
|
v_fract_f32 v5, v255
|
|
// CHECK: [0xff,0x37,0x0a,0x7e]
|
|
|
|
v_fract_f32 v5, s1
|
|
// CHECK: [0x01,0x36,0x0a,0x7e]
|
|
|
|
v_fract_f32 v5, s101
|
|
// CHECK: [0x65,0x36,0x0a,0x7e]
|
|
|
|
v_fract_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x36,0x0a,0x7e]
|
|
|
|
v_fract_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x36,0x0a,0x7e]
|
|
|
|
v_fract_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x36,0x0a,0x7e]
|
|
|
|
v_fract_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x36,0x0a,0x7e]
|
|
|
|
v_fract_f32 v5, m0
|
|
// CHECK: [0x7c,0x36,0x0a,0x7e]
|
|
|
|
v_fract_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x36,0x0a,0x7e]
|
|
|
|
v_fract_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x36,0x0a,0x7e]
|
|
|
|
v_fract_f32 v5, 0
|
|
// CHECK: [0x80,0x36,0x0a,0x7e]
|
|
|
|
v_fract_f32 v5, -1
|
|
// CHECK: [0xc1,0x36,0x0a,0x7e]
|
|
|
|
v_fract_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x36,0x0a,0x7e]
|
|
|
|
v_fract_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x36,0x0a,0x7e]
|
|
|
|
v_fract_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x36,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_fract_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x36,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_fract_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x5b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_fract_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x5b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_fract_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_fract_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_fract_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x5b,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_trunc_f32 v5, v1
|
|
// CHECK: [0x01,0x39,0x0a,0x7e]
|
|
|
|
v_trunc_f32 v255, v1
|
|
// CHECK: [0x01,0x39,0xfe,0x7f]
|
|
|
|
v_trunc_f32 v5, v255
|
|
// CHECK: [0xff,0x39,0x0a,0x7e]
|
|
|
|
v_trunc_f32 v5, s1
|
|
// CHECK: [0x01,0x38,0x0a,0x7e]
|
|
|
|
v_trunc_f32 v5, s101
|
|
// CHECK: [0x65,0x38,0x0a,0x7e]
|
|
|
|
v_trunc_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x38,0x0a,0x7e]
|
|
|
|
v_trunc_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x38,0x0a,0x7e]
|
|
|
|
v_trunc_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x38,0x0a,0x7e]
|
|
|
|
v_trunc_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x38,0x0a,0x7e]
|
|
|
|
v_trunc_f32 v5, m0
|
|
// CHECK: [0x7c,0x38,0x0a,0x7e]
|
|
|
|
v_trunc_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x38,0x0a,0x7e]
|
|
|
|
v_trunc_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x38,0x0a,0x7e]
|
|
|
|
v_trunc_f32 v5, 0
|
|
// CHECK: [0x80,0x38,0x0a,0x7e]
|
|
|
|
v_trunc_f32 v5, -1
|
|
// CHECK: [0xc1,0x38,0x0a,0x7e]
|
|
|
|
v_trunc_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x38,0x0a,0x7e]
|
|
|
|
v_trunc_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x38,0x0a,0x7e]
|
|
|
|
v_trunc_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x38,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_trunc_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x38,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_trunc_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x5c,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_trunc_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x5c,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_trunc_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_trunc_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_trunc_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x5c,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_ceil_f32 v5, v1
|
|
// CHECK: [0x01,0x3b,0x0a,0x7e]
|
|
|
|
v_ceil_f32 v255, v1
|
|
// CHECK: [0x01,0x3b,0xfe,0x7f]
|
|
|
|
v_ceil_f32 v5, v255
|
|
// CHECK: [0xff,0x3b,0x0a,0x7e]
|
|
|
|
v_ceil_f32 v5, s1
|
|
// CHECK: [0x01,0x3a,0x0a,0x7e]
|
|
|
|
v_ceil_f32 v5, s101
|
|
// CHECK: [0x65,0x3a,0x0a,0x7e]
|
|
|
|
v_ceil_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x3a,0x0a,0x7e]
|
|
|
|
v_ceil_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x3a,0x0a,0x7e]
|
|
|
|
v_ceil_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x3a,0x0a,0x7e]
|
|
|
|
v_ceil_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x3a,0x0a,0x7e]
|
|
|
|
v_ceil_f32 v5, m0
|
|
// CHECK: [0x7c,0x3a,0x0a,0x7e]
|
|
|
|
v_ceil_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x3a,0x0a,0x7e]
|
|
|
|
v_ceil_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x3a,0x0a,0x7e]
|
|
|
|
v_ceil_f32 v5, 0
|
|
// CHECK: [0x80,0x3a,0x0a,0x7e]
|
|
|
|
v_ceil_f32 v5, -1
|
|
// CHECK: [0xc1,0x3a,0x0a,0x7e]
|
|
|
|
v_ceil_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x3a,0x0a,0x7e]
|
|
|
|
v_ceil_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x3a,0x0a,0x7e]
|
|
|
|
v_ceil_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x3a,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_ceil_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x3a,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_ceil_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x5d,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_ceil_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x5d,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ceil_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_ceil_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_ceil_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x5d,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_rndne_f32 v5, v1
|
|
// CHECK: [0x01,0x3d,0x0a,0x7e]
|
|
|
|
v_rndne_f32 v255, v1
|
|
// CHECK: [0x01,0x3d,0xfe,0x7f]
|
|
|
|
v_rndne_f32 v5, v255
|
|
// CHECK: [0xff,0x3d,0x0a,0x7e]
|
|
|
|
v_rndne_f32 v5, s1
|
|
// CHECK: [0x01,0x3c,0x0a,0x7e]
|
|
|
|
v_rndne_f32 v5, s101
|
|
// CHECK: [0x65,0x3c,0x0a,0x7e]
|
|
|
|
v_rndne_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x3c,0x0a,0x7e]
|
|
|
|
v_rndne_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x3c,0x0a,0x7e]
|
|
|
|
v_rndne_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x3c,0x0a,0x7e]
|
|
|
|
v_rndne_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x3c,0x0a,0x7e]
|
|
|
|
v_rndne_f32 v5, m0
|
|
// CHECK: [0x7c,0x3c,0x0a,0x7e]
|
|
|
|
v_rndne_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x3c,0x0a,0x7e]
|
|
|
|
v_rndne_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x3c,0x0a,0x7e]
|
|
|
|
v_rndne_f32 v5, 0
|
|
// CHECK: [0x80,0x3c,0x0a,0x7e]
|
|
|
|
v_rndne_f32 v5, -1
|
|
// CHECK: [0xc1,0x3c,0x0a,0x7e]
|
|
|
|
v_rndne_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x3c,0x0a,0x7e]
|
|
|
|
v_rndne_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x3c,0x0a,0x7e]
|
|
|
|
v_rndne_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x3c,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_rndne_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x3c,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_rndne_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x5e,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_rndne_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x5e,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rndne_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_rndne_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_rndne_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x5e,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_floor_f32 v5, v1
|
|
// CHECK: [0x01,0x3f,0x0a,0x7e]
|
|
|
|
v_floor_f32 v255, v1
|
|
// CHECK: [0x01,0x3f,0xfe,0x7f]
|
|
|
|
v_floor_f32 v5, v255
|
|
// CHECK: [0xff,0x3f,0x0a,0x7e]
|
|
|
|
v_floor_f32 v5, s1
|
|
// CHECK: [0x01,0x3e,0x0a,0x7e]
|
|
|
|
v_floor_f32 v5, s101
|
|
// CHECK: [0x65,0x3e,0x0a,0x7e]
|
|
|
|
v_floor_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x3e,0x0a,0x7e]
|
|
|
|
v_floor_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x3e,0x0a,0x7e]
|
|
|
|
v_floor_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x3e,0x0a,0x7e]
|
|
|
|
v_floor_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x3e,0x0a,0x7e]
|
|
|
|
v_floor_f32 v5, m0
|
|
// CHECK: [0x7c,0x3e,0x0a,0x7e]
|
|
|
|
v_floor_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x3e,0x0a,0x7e]
|
|
|
|
v_floor_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x3e,0x0a,0x7e]
|
|
|
|
v_floor_f32 v5, 0
|
|
// CHECK: [0x80,0x3e,0x0a,0x7e]
|
|
|
|
v_floor_f32 v5, -1
|
|
// CHECK: [0xc1,0x3e,0x0a,0x7e]
|
|
|
|
v_floor_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x3e,0x0a,0x7e]
|
|
|
|
v_floor_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x3e,0x0a,0x7e]
|
|
|
|
v_floor_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x3e,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_floor_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x3e,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_floor_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x5f,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_floor_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x5f,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x5f,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_floor_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_floor_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_floor_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x5f,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_exp_f32 v5, v1
|
|
// CHECK: [0x01,0x41,0x0a,0x7e]
|
|
|
|
v_exp_f32 v255, v1
|
|
// CHECK: [0x01,0x41,0xfe,0x7f]
|
|
|
|
v_exp_f32 v5, v255
|
|
// CHECK: [0xff,0x41,0x0a,0x7e]
|
|
|
|
v_exp_f32 v5, s1
|
|
// CHECK: [0x01,0x40,0x0a,0x7e]
|
|
|
|
v_exp_f32 v5, s101
|
|
// CHECK: [0x65,0x40,0x0a,0x7e]
|
|
|
|
v_exp_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x40,0x0a,0x7e]
|
|
|
|
v_exp_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x40,0x0a,0x7e]
|
|
|
|
v_exp_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x40,0x0a,0x7e]
|
|
|
|
v_exp_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x40,0x0a,0x7e]
|
|
|
|
v_exp_f32 v5, m0
|
|
// CHECK: [0x7c,0x40,0x0a,0x7e]
|
|
|
|
v_exp_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x40,0x0a,0x7e]
|
|
|
|
v_exp_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x40,0x0a,0x7e]
|
|
|
|
v_exp_f32 v5, 0
|
|
// CHECK: [0x80,0x40,0x0a,0x7e]
|
|
|
|
v_exp_f32 v5, -1
|
|
// CHECK: [0xc1,0x40,0x0a,0x7e]
|
|
|
|
v_exp_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x40,0x0a,0x7e]
|
|
|
|
v_exp_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x40,0x0a,0x7e]
|
|
|
|
v_exp_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x40,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_exp_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x40,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_exp_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x60,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_exp_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x60,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x60,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_exp_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_exp_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_exp_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x60,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_log_f32 v5, v1
|
|
// CHECK: [0x01,0x43,0x0a,0x7e]
|
|
|
|
v_log_f32 v255, v1
|
|
// CHECK: [0x01,0x43,0xfe,0x7f]
|
|
|
|
v_log_f32 v5, v255
|
|
// CHECK: [0xff,0x43,0x0a,0x7e]
|
|
|
|
v_log_f32 v5, s1
|
|
// CHECK: [0x01,0x42,0x0a,0x7e]
|
|
|
|
v_log_f32 v5, s101
|
|
// CHECK: [0x65,0x42,0x0a,0x7e]
|
|
|
|
v_log_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x42,0x0a,0x7e]
|
|
|
|
v_log_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x42,0x0a,0x7e]
|
|
|
|
v_log_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x42,0x0a,0x7e]
|
|
|
|
v_log_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x42,0x0a,0x7e]
|
|
|
|
v_log_f32 v5, m0
|
|
// CHECK: [0x7c,0x42,0x0a,0x7e]
|
|
|
|
v_log_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x42,0x0a,0x7e]
|
|
|
|
v_log_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x42,0x0a,0x7e]
|
|
|
|
v_log_f32 v5, 0
|
|
// CHECK: [0x80,0x42,0x0a,0x7e]
|
|
|
|
v_log_f32 v5, -1
|
|
// CHECK: [0xc1,0x42,0x0a,0x7e]
|
|
|
|
v_log_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x42,0x0a,0x7e]
|
|
|
|
v_log_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x42,0x0a,0x7e]
|
|
|
|
v_log_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x42,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_log_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x42,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_log_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_log_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x61,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_log_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x61,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x61,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_log_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_log_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_log_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x61,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_rcp_f32 v5, v1
|
|
// CHECK: [0x01,0x45,0x0a,0x7e]
|
|
|
|
v_rcp_f32 v255, v1
|
|
// CHECK: [0x01,0x45,0xfe,0x7f]
|
|
|
|
v_rcp_f32 v5, v255
|
|
// CHECK: [0xff,0x45,0x0a,0x7e]
|
|
|
|
v_rcp_f32 v5, s1
|
|
// CHECK: [0x01,0x44,0x0a,0x7e]
|
|
|
|
v_rcp_f32 v5, s101
|
|
// CHECK: [0x65,0x44,0x0a,0x7e]
|
|
|
|
v_rcp_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x44,0x0a,0x7e]
|
|
|
|
v_rcp_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x44,0x0a,0x7e]
|
|
|
|
v_rcp_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x44,0x0a,0x7e]
|
|
|
|
v_rcp_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x44,0x0a,0x7e]
|
|
|
|
v_rcp_f32 v5, m0
|
|
// CHECK: [0x7c,0x44,0x0a,0x7e]
|
|
|
|
v_rcp_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x44,0x0a,0x7e]
|
|
|
|
v_rcp_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x44,0x0a,0x7e]
|
|
|
|
v_rcp_f32 v5, 0
|
|
// CHECK: [0x80,0x44,0x0a,0x7e]
|
|
|
|
v_rcp_f32 v5, -1
|
|
// CHECK: [0xc1,0x44,0x0a,0x7e]
|
|
|
|
v_rcp_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x44,0x0a,0x7e]
|
|
|
|
v_rcp_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x44,0x0a,0x7e]
|
|
|
|
v_rcp_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x44,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_rcp_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x44,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_rcp_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x62,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_rcp_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x62,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x62,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rcp_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_rcp_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_rcp_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x62,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_rcp_iflag_f32 v5, v1
|
|
// CHECK: [0x01,0x47,0x0a,0x7e]
|
|
|
|
v_rcp_iflag_f32 v255, v1
|
|
// CHECK: [0x01,0x47,0xfe,0x7f]
|
|
|
|
v_rcp_iflag_f32 v5, v255
|
|
// CHECK: [0xff,0x47,0x0a,0x7e]
|
|
|
|
v_rcp_iflag_f32 v5, s1
|
|
// CHECK: [0x01,0x46,0x0a,0x7e]
|
|
|
|
v_rcp_iflag_f32 v5, s101
|
|
// CHECK: [0x65,0x46,0x0a,0x7e]
|
|
|
|
v_rcp_iflag_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x46,0x0a,0x7e]
|
|
|
|
v_rcp_iflag_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x46,0x0a,0x7e]
|
|
|
|
v_rcp_iflag_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x46,0x0a,0x7e]
|
|
|
|
v_rcp_iflag_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x46,0x0a,0x7e]
|
|
|
|
v_rcp_iflag_f32 v5, m0
|
|
// CHECK: [0x7c,0x46,0x0a,0x7e]
|
|
|
|
v_rcp_iflag_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x46,0x0a,0x7e]
|
|
|
|
v_rcp_iflag_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x46,0x0a,0x7e]
|
|
|
|
v_rcp_iflag_f32 v5, 0
|
|
// CHECK: [0x80,0x46,0x0a,0x7e]
|
|
|
|
v_rcp_iflag_f32 v5, -1
|
|
// CHECK: [0xc1,0x46,0x0a,0x7e]
|
|
|
|
v_rcp_iflag_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x46,0x0a,0x7e]
|
|
|
|
v_rcp_iflag_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x46,0x0a,0x7e]
|
|
|
|
v_rcp_iflag_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x46,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_rcp_iflag_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x46,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_rcp_iflag_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x63,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_rcp_iflag_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x63,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x63,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_rcp_iflag_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_rcp_iflag_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x63,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_rsq_f32 v5, v1
|
|
// CHECK: [0x01,0x49,0x0a,0x7e]
|
|
|
|
v_rsq_f32 v255, v1
|
|
// CHECK: [0x01,0x49,0xfe,0x7f]
|
|
|
|
v_rsq_f32 v5, v255
|
|
// CHECK: [0xff,0x49,0x0a,0x7e]
|
|
|
|
v_rsq_f32 v5, s1
|
|
// CHECK: [0x01,0x48,0x0a,0x7e]
|
|
|
|
v_rsq_f32 v5, s101
|
|
// CHECK: [0x65,0x48,0x0a,0x7e]
|
|
|
|
v_rsq_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x48,0x0a,0x7e]
|
|
|
|
v_rsq_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x48,0x0a,0x7e]
|
|
|
|
v_rsq_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x48,0x0a,0x7e]
|
|
|
|
v_rsq_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x48,0x0a,0x7e]
|
|
|
|
v_rsq_f32 v5, m0
|
|
// CHECK: [0x7c,0x48,0x0a,0x7e]
|
|
|
|
v_rsq_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x48,0x0a,0x7e]
|
|
|
|
v_rsq_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x48,0x0a,0x7e]
|
|
|
|
v_rsq_f32 v5, 0
|
|
// CHECK: [0x80,0x48,0x0a,0x7e]
|
|
|
|
v_rsq_f32 v5, -1
|
|
// CHECK: [0xc1,0x48,0x0a,0x7e]
|
|
|
|
v_rsq_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x48,0x0a,0x7e]
|
|
|
|
v_rsq_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x48,0x0a,0x7e]
|
|
|
|
v_rsq_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x48,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_rsq_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x48,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_rsq_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x64,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_rsq_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x64,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x64,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rsq_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_rsq_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_rsq_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x64,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_rcp_f64 v[5:6], v[1:2]
|
|
// CHECK: [0x01,0x4b,0x0a,0x7e]
|
|
|
|
v_rcp_f64 v[254:255], v[1:2]
|
|
// CHECK: [0x01,0x4b,0xfc,0x7f]
|
|
|
|
v_rcp_f64 v[5:6], v[254:255]
|
|
// CHECK: [0xfe,0x4b,0x0a,0x7e]
|
|
|
|
v_rcp_f64 v[5:6], s[2:3]
|
|
// CHECK: [0x02,0x4a,0x0a,0x7e]
|
|
|
|
v_rcp_f64 v[5:6], s[4:5]
|
|
// CHECK: [0x04,0x4a,0x0a,0x7e]
|
|
|
|
v_rcp_f64 v[5:6], s[100:101]
|
|
// CHECK: [0x64,0x4a,0x0a,0x7e]
|
|
|
|
v_rcp_f64 v[5:6], flat_scratch
|
|
// CHECK: [0x66,0x4a,0x0a,0x7e]
|
|
|
|
v_rcp_f64 v[5:6], vcc
|
|
// CHECK: [0x6a,0x4a,0x0a,0x7e]
|
|
|
|
v_rcp_f64 v[5:6], exec
|
|
// CHECK: [0x7e,0x4a,0x0a,0x7e]
|
|
|
|
v_rcp_f64 v[5:6], 0
|
|
// CHECK: [0x80,0x4a,0x0a,0x7e]
|
|
|
|
v_rcp_f64 v[5:6], -1
|
|
// CHECK: [0xc1,0x4a,0x0a,0x7e]
|
|
|
|
v_rcp_f64 v[5:6], 0.5
|
|
// CHECK: [0xf0,0x4a,0x0a,0x7e]
|
|
|
|
v_rcp_f64 v[5:6], -4.0
|
|
// CHECK: [0xf7,0x4a,0x0a,0x7e]
|
|
|
|
v_rcp_f64 v[5:6], 0xaf123456
|
|
// CHECK: [0xff,0x4a,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_rcp_f64 v[5:6], 0x3f717273
|
|
// CHECK: [0xff,0x4a,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_rcp_f64_e64 v[5:6], v[1:2]
|
|
// CHECK: [0x05,0x00,0x65,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rcp_f64_e64 v[254:255], v[1:2]
|
|
// CHECK: [0xfe,0x00,0x65,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rcp_f64_e64 v[5:6], v[254:255]
|
|
// CHECK: [0x05,0x00,0x65,0xd1,0xfe,0x01,0x00,0x00]
|
|
|
|
v_rcp_f64_e64 v[5:6], s[2:3]
|
|
// CHECK: [0x05,0x00,0x65,0xd1,0x02,0x00,0x00,0x00]
|
|
|
|
v_rcp_f64_e64 v[5:6], s[4:5]
|
|
// CHECK: [0x05,0x00,0x65,0xd1,0x04,0x00,0x00,0x00]
|
|
|
|
v_rcp_f64_e64 v[5:6], s[100:101]
|
|
// CHECK: [0x05,0x00,0x65,0xd1,0x64,0x00,0x00,0x00]
|
|
|
|
v_rcp_f64_e64 v[5:6], flat_scratch
|
|
// CHECK: [0x05,0x00,0x65,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_rcp_f64_e64 v[5:6], vcc
|
|
// CHECK: [0x05,0x00,0x65,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_rcp_f64_e64 v[5:6], exec
|
|
// CHECK: [0x05,0x00,0x65,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_rcp_f64_e64 v[5:6], 0
|
|
// CHECK: [0x05,0x00,0x65,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_rcp_f64_e64 v[5:6], -1
|
|
// CHECK: [0x05,0x00,0x65,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_rcp_f64_e64 v[5:6], 0.5
|
|
// CHECK: [0x05,0x00,0x65,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_rcp_f64_e64 v[5:6], -4.0
|
|
// CHECK: [0x05,0x00,0x65,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_rcp_f64_e64 v[5:6], -v[1:2]
|
|
// CHECK: [0x05,0x00,0x65,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_rcp_f64_e64 v[5:6], |v[1:2]|
|
|
// CHECK: [0x05,0x01,0x65,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rcp_f64_e64 v[5:6], v[1:2] clamp
|
|
// CHECK: [0x05,0x80,0x65,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rcp_f64_e64 v[5:6], v[1:2] mul:2
|
|
// CHECK: [0x05,0x00,0x65,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_rcp_f64_e64 v[5:6], v[1:2] mul:4
|
|
// CHECK: [0x05,0x00,0x65,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_rcp_f64_e64 v[5:6], v[1:2] div:2
|
|
// CHECK: [0x05,0x00,0x65,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_rsq_f64 v[5:6], v[1:2]
|
|
// CHECK: [0x01,0x4d,0x0a,0x7e]
|
|
|
|
v_rsq_f64 v[254:255], v[1:2]
|
|
// CHECK: [0x01,0x4d,0xfc,0x7f]
|
|
|
|
v_rsq_f64 v[5:6], v[254:255]
|
|
// CHECK: [0xfe,0x4d,0x0a,0x7e]
|
|
|
|
v_rsq_f64 v[5:6], s[2:3]
|
|
// CHECK: [0x02,0x4c,0x0a,0x7e]
|
|
|
|
v_rsq_f64 v[5:6], s[4:5]
|
|
// CHECK: [0x04,0x4c,0x0a,0x7e]
|
|
|
|
v_rsq_f64 v[5:6], s[100:101]
|
|
// CHECK: [0x64,0x4c,0x0a,0x7e]
|
|
|
|
v_rsq_f64 v[5:6], flat_scratch
|
|
// CHECK: [0x66,0x4c,0x0a,0x7e]
|
|
|
|
v_rsq_f64 v[5:6], vcc
|
|
// CHECK: [0x6a,0x4c,0x0a,0x7e]
|
|
|
|
v_rsq_f64 v[5:6], exec
|
|
// CHECK: [0x7e,0x4c,0x0a,0x7e]
|
|
|
|
v_rsq_f64 v[5:6], 0
|
|
// CHECK: [0x80,0x4c,0x0a,0x7e]
|
|
|
|
v_rsq_f64 v[5:6], -1
|
|
// CHECK: [0xc1,0x4c,0x0a,0x7e]
|
|
|
|
v_rsq_f64 v[5:6], 0.5
|
|
// CHECK: [0xf0,0x4c,0x0a,0x7e]
|
|
|
|
v_rsq_f64 v[5:6], -4.0
|
|
// CHECK: [0xf7,0x4c,0x0a,0x7e]
|
|
|
|
v_rsq_f64 v[5:6], 0xaf123456
|
|
// CHECK: [0xff,0x4c,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_rsq_f64 v[5:6], 0x3f717273
|
|
// CHECK: [0xff,0x4c,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_rsq_f64_e64 v[5:6], v[1:2]
|
|
// CHECK: [0x05,0x00,0x66,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rsq_f64_e64 v[254:255], v[1:2]
|
|
// CHECK: [0xfe,0x00,0x66,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rsq_f64_e64 v[5:6], v[254:255]
|
|
// CHECK: [0x05,0x00,0x66,0xd1,0xfe,0x01,0x00,0x00]
|
|
|
|
v_rsq_f64_e64 v[5:6], s[2:3]
|
|
// CHECK: [0x05,0x00,0x66,0xd1,0x02,0x00,0x00,0x00]
|
|
|
|
v_rsq_f64_e64 v[5:6], s[4:5]
|
|
// CHECK: [0x05,0x00,0x66,0xd1,0x04,0x00,0x00,0x00]
|
|
|
|
v_rsq_f64_e64 v[5:6], s[100:101]
|
|
// CHECK: [0x05,0x00,0x66,0xd1,0x64,0x00,0x00,0x00]
|
|
|
|
v_rsq_f64_e64 v[5:6], flat_scratch
|
|
// CHECK: [0x05,0x00,0x66,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_rsq_f64_e64 v[5:6], vcc
|
|
// CHECK: [0x05,0x00,0x66,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_rsq_f64_e64 v[5:6], exec
|
|
// CHECK: [0x05,0x00,0x66,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_rsq_f64_e64 v[5:6], 0
|
|
// CHECK: [0x05,0x00,0x66,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_rsq_f64_e64 v[5:6], -1
|
|
// CHECK: [0x05,0x00,0x66,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_rsq_f64_e64 v[5:6], 0.5
|
|
// CHECK: [0x05,0x00,0x66,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_rsq_f64_e64 v[5:6], -4.0
|
|
// CHECK: [0x05,0x00,0x66,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_rsq_f64_e64 v[5:6], -v[1:2]
|
|
// CHECK: [0x05,0x00,0x66,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_rsq_f64_e64 v[5:6], |v[1:2]|
|
|
// CHECK: [0x05,0x01,0x66,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rsq_f64_e64 v[5:6], v[1:2] clamp
|
|
// CHECK: [0x05,0x80,0x66,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rsq_f64_e64 v[5:6], v[1:2] mul:2
|
|
// CHECK: [0x05,0x00,0x66,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_rsq_f64_e64 v[5:6], v[1:2] mul:4
|
|
// CHECK: [0x05,0x00,0x66,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_rsq_f64_e64 v[5:6], v[1:2] div:2
|
|
// CHECK: [0x05,0x00,0x66,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_sqrt_f32 v5, v1
|
|
// CHECK: [0x01,0x4f,0x0a,0x7e]
|
|
|
|
v_sqrt_f32 v255, v1
|
|
// CHECK: [0x01,0x4f,0xfe,0x7f]
|
|
|
|
v_sqrt_f32 v5, v255
|
|
// CHECK: [0xff,0x4f,0x0a,0x7e]
|
|
|
|
v_sqrt_f32 v5, s1
|
|
// CHECK: [0x01,0x4e,0x0a,0x7e]
|
|
|
|
v_sqrt_f32 v5, s101
|
|
// CHECK: [0x65,0x4e,0x0a,0x7e]
|
|
|
|
v_sqrt_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x4e,0x0a,0x7e]
|
|
|
|
v_sqrt_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x4e,0x0a,0x7e]
|
|
|
|
v_sqrt_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x4e,0x0a,0x7e]
|
|
|
|
v_sqrt_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x4e,0x0a,0x7e]
|
|
|
|
v_sqrt_f32 v5, m0
|
|
// CHECK: [0x7c,0x4e,0x0a,0x7e]
|
|
|
|
v_sqrt_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x4e,0x0a,0x7e]
|
|
|
|
v_sqrt_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x4e,0x0a,0x7e]
|
|
|
|
v_sqrt_f32 v5, 0
|
|
// CHECK: [0x80,0x4e,0x0a,0x7e]
|
|
|
|
v_sqrt_f32 v5, -1
|
|
// CHECK: [0xc1,0x4e,0x0a,0x7e]
|
|
|
|
v_sqrt_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x4e,0x0a,0x7e]
|
|
|
|
v_sqrt_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x4e,0x0a,0x7e]
|
|
|
|
v_sqrt_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x4e,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_sqrt_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x4e,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_sqrt_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x67,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_sqrt_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x67,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x67,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sqrt_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_sqrt_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_sqrt_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x67,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_sqrt_f64 v[5:6], v[1:2]
|
|
// CHECK: [0x01,0x51,0x0a,0x7e]
|
|
|
|
v_sqrt_f64 v[254:255], v[1:2]
|
|
// CHECK: [0x01,0x51,0xfc,0x7f]
|
|
|
|
v_sqrt_f64 v[5:6], v[254:255]
|
|
// CHECK: [0xfe,0x51,0x0a,0x7e]
|
|
|
|
v_sqrt_f64 v[5:6], s[2:3]
|
|
// CHECK: [0x02,0x50,0x0a,0x7e]
|
|
|
|
v_sqrt_f64 v[5:6], s[4:5]
|
|
// CHECK: [0x04,0x50,0x0a,0x7e]
|
|
|
|
v_sqrt_f64 v[5:6], s[100:101]
|
|
// CHECK: [0x64,0x50,0x0a,0x7e]
|
|
|
|
v_sqrt_f64 v[5:6], flat_scratch
|
|
// CHECK: [0x66,0x50,0x0a,0x7e]
|
|
|
|
v_sqrt_f64 v[5:6], vcc
|
|
// CHECK: [0x6a,0x50,0x0a,0x7e]
|
|
|
|
v_sqrt_f64 v[5:6], exec
|
|
// CHECK: [0x7e,0x50,0x0a,0x7e]
|
|
|
|
v_sqrt_f64 v[5:6], 0
|
|
// CHECK: [0x80,0x50,0x0a,0x7e]
|
|
|
|
v_sqrt_f64 v[5:6], -1
|
|
// CHECK: [0xc1,0x50,0x0a,0x7e]
|
|
|
|
v_sqrt_f64 v[5:6], 0.5
|
|
// CHECK: [0xf0,0x50,0x0a,0x7e]
|
|
|
|
v_sqrt_f64 v[5:6], -4.0
|
|
// CHECK: [0xf7,0x50,0x0a,0x7e]
|
|
|
|
v_sqrt_f64 v[5:6], 0xaf123456
|
|
// CHECK: [0xff,0x50,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_sqrt_f64 v[5:6], 0x3f717273
|
|
// CHECK: [0xff,0x50,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_sqrt_f64_e64 v[5:6], v[1:2]
|
|
// CHECK: [0x05,0x00,0x68,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sqrt_f64_e64 v[254:255], v[1:2]
|
|
// CHECK: [0xfe,0x00,0x68,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sqrt_f64_e64 v[5:6], v[254:255]
|
|
// CHECK: [0x05,0x00,0x68,0xd1,0xfe,0x01,0x00,0x00]
|
|
|
|
v_sqrt_f64_e64 v[5:6], s[2:3]
|
|
// CHECK: [0x05,0x00,0x68,0xd1,0x02,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f64_e64 v[5:6], s[4:5]
|
|
// CHECK: [0x05,0x00,0x68,0xd1,0x04,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f64_e64 v[5:6], s[100:101]
|
|
// CHECK: [0x05,0x00,0x68,0xd1,0x64,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f64_e64 v[5:6], flat_scratch
|
|
// CHECK: [0x05,0x00,0x68,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f64_e64 v[5:6], vcc
|
|
// CHECK: [0x05,0x00,0x68,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f64_e64 v[5:6], exec
|
|
// CHECK: [0x05,0x00,0x68,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f64_e64 v[5:6], 0
|
|
// CHECK: [0x05,0x00,0x68,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f64_e64 v[5:6], -1
|
|
// CHECK: [0x05,0x00,0x68,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f64_e64 v[5:6], 0.5
|
|
// CHECK: [0x05,0x00,0x68,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f64_e64 v[5:6], -4.0
|
|
// CHECK: [0x05,0x00,0x68,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f64_e64 v[5:6], -v[1:2]
|
|
// CHECK: [0x05,0x00,0x68,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_sqrt_f64_e64 v[5:6], |v[1:2]|
|
|
// CHECK: [0x05,0x01,0x68,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sqrt_f64_e64 v[5:6], v[1:2] clamp
|
|
// CHECK: [0x05,0x80,0x68,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sqrt_f64_e64 v[5:6], v[1:2] mul:2
|
|
// CHECK: [0x05,0x00,0x68,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_sqrt_f64_e64 v[5:6], v[1:2] mul:4
|
|
// CHECK: [0x05,0x00,0x68,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_sqrt_f64_e64 v[5:6], v[1:2] div:2
|
|
// CHECK: [0x05,0x00,0x68,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_sin_f32 v5, v1
|
|
// CHECK: [0x01,0x53,0x0a,0x7e]
|
|
|
|
v_sin_f32 v255, v1
|
|
// CHECK: [0x01,0x53,0xfe,0x7f]
|
|
|
|
v_sin_f32 v5, v255
|
|
// CHECK: [0xff,0x53,0x0a,0x7e]
|
|
|
|
v_sin_f32 v5, s1
|
|
// CHECK: [0x01,0x52,0x0a,0x7e]
|
|
|
|
v_sin_f32 v5, s101
|
|
// CHECK: [0x65,0x52,0x0a,0x7e]
|
|
|
|
v_sin_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x52,0x0a,0x7e]
|
|
|
|
v_sin_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x52,0x0a,0x7e]
|
|
|
|
v_sin_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x52,0x0a,0x7e]
|
|
|
|
v_sin_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x52,0x0a,0x7e]
|
|
|
|
v_sin_f32 v5, m0
|
|
// CHECK: [0x7c,0x52,0x0a,0x7e]
|
|
|
|
v_sin_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x52,0x0a,0x7e]
|
|
|
|
v_sin_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x52,0x0a,0x7e]
|
|
|
|
v_sin_f32 v5, 0
|
|
// CHECK: [0x80,0x52,0x0a,0x7e]
|
|
|
|
v_sin_f32 v5, -1
|
|
// CHECK: [0xc1,0x52,0x0a,0x7e]
|
|
|
|
v_sin_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x52,0x0a,0x7e]
|
|
|
|
v_sin_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x52,0x0a,0x7e]
|
|
|
|
v_sin_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x52,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_sin_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x52,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_sin_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x69,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_sin_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x69,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x69,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sin_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_sin_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_sin_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x69,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_cos_f32 v5, v1
|
|
// CHECK: [0x01,0x55,0x0a,0x7e]
|
|
|
|
v_cos_f32 v255, v1
|
|
// CHECK: [0x01,0x55,0xfe,0x7f]
|
|
|
|
v_cos_f32 v5, v255
|
|
// CHECK: [0xff,0x55,0x0a,0x7e]
|
|
|
|
v_cos_f32 v5, s1
|
|
// CHECK: [0x01,0x54,0x0a,0x7e]
|
|
|
|
v_cos_f32 v5, s101
|
|
// CHECK: [0x65,0x54,0x0a,0x7e]
|
|
|
|
v_cos_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x54,0x0a,0x7e]
|
|
|
|
v_cos_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x54,0x0a,0x7e]
|
|
|
|
v_cos_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x54,0x0a,0x7e]
|
|
|
|
v_cos_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x54,0x0a,0x7e]
|
|
|
|
v_cos_f32 v5, m0
|
|
// CHECK: [0x7c,0x54,0x0a,0x7e]
|
|
|
|
v_cos_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x54,0x0a,0x7e]
|
|
|
|
v_cos_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x54,0x0a,0x7e]
|
|
|
|
v_cos_f32 v5, 0
|
|
// CHECK: [0x80,0x54,0x0a,0x7e]
|
|
|
|
v_cos_f32 v5, -1
|
|
// CHECK: [0xc1,0x54,0x0a,0x7e]
|
|
|
|
v_cos_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x54,0x0a,0x7e]
|
|
|
|
v_cos_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x54,0x0a,0x7e]
|
|
|
|
v_cos_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x54,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cos_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x54,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cos_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x6a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_cos_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x6a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x6a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cos_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_cos_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_cos_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x6a,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_not_b32 v5, v1
|
|
// CHECK: [0x01,0x57,0x0a,0x7e]
|
|
|
|
v_not_b32 v255, v1
|
|
// CHECK: [0x01,0x57,0xfe,0x7f]
|
|
|
|
v_not_b32 v5, v255
|
|
// CHECK: [0xff,0x57,0x0a,0x7e]
|
|
|
|
v_not_b32 v5, s1
|
|
// CHECK: [0x01,0x56,0x0a,0x7e]
|
|
|
|
v_not_b32 v5, s101
|
|
// CHECK: [0x65,0x56,0x0a,0x7e]
|
|
|
|
v_not_b32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x56,0x0a,0x7e]
|
|
|
|
v_not_b32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x56,0x0a,0x7e]
|
|
|
|
v_not_b32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x56,0x0a,0x7e]
|
|
|
|
v_not_b32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x56,0x0a,0x7e]
|
|
|
|
v_not_b32 v5, m0
|
|
// CHECK: [0x7c,0x56,0x0a,0x7e]
|
|
|
|
v_not_b32 v5, exec_lo
|
|
// CHECK: [0x7e,0x56,0x0a,0x7e]
|
|
|
|
v_not_b32 v5, exec_hi
|
|
// CHECK: [0x7f,0x56,0x0a,0x7e]
|
|
|
|
v_not_b32 v5, 0
|
|
// CHECK: [0x80,0x56,0x0a,0x7e]
|
|
|
|
v_not_b32 v5, -1
|
|
// CHECK: [0xc1,0x56,0x0a,0x7e]
|
|
|
|
v_not_b32 v5, 0.5
|
|
// CHECK: [0xf0,0x56,0x0a,0x7e]
|
|
|
|
v_not_b32 v5, -4.0
|
|
// CHECK: [0xf7,0x56,0x0a,0x7e]
|
|
|
|
v_not_b32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x56,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_not_b32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x56,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_not_b32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x6b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_not_b32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x6b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_not_b32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x6b,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_not_b32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x6b,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_not_b32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x6b,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_not_b32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x6b,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_not_b32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x6b,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_not_b32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x6b,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_not_b32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x6b,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_not_b32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x6b,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_not_b32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x6b,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_not_b32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x6b,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_not_b32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x6b,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_not_b32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x6b,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_not_b32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x6b,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_not_b32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x6b,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_bfrev_b32 v5, v1
|
|
// CHECK: [0x01,0x59,0x0a,0x7e]
|
|
|
|
v_bfrev_b32 v255, v1
|
|
// CHECK: [0x01,0x59,0xfe,0x7f]
|
|
|
|
v_bfrev_b32 v5, v255
|
|
// CHECK: [0xff,0x59,0x0a,0x7e]
|
|
|
|
v_bfrev_b32 v5, s1
|
|
// CHECK: [0x01,0x58,0x0a,0x7e]
|
|
|
|
v_bfrev_b32 v5, s101
|
|
// CHECK: [0x65,0x58,0x0a,0x7e]
|
|
|
|
v_bfrev_b32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x58,0x0a,0x7e]
|
|
|
|
v_bfrev_b32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x58,0x0a,0x7e]
|
|
|
|
v_bfrev_b32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x58,0x0a,0x7e]
|
|
|
|
v_bfrev_b32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x58,0x0a,0x7e]
|
|
|
|
v_bfrev_b32 v5, m0
|
|
// CHECK: [0x7c,0x58,0x0a,0x7e]
|
|
|
|
v_bfrev_b32 v5, exec_lo
|
|
// CHECK: [0x7e,0x58,0x0a,0x7e]
|
|
|
|
v_bfrev_b32 v5, exec_hi
|
|
// CHECK: [0x7f,0x58,0x0a,0x7e]
|
|
|
|
v_bfrev_b32 v5, 0
|
|
// CHECK: [0x80,0x58,0x0a,0x7e]
|
|
|
|
v_bfrev_b32 v5, -1
|
|
// CHECK: [0xc1,0x58,0x0a,0x7e]
|
|
|
|
v_bfrev_b32 v5, 0.5
|
|
// CHECK: [0xf0,0x58,0x0a,0x7e]
|
|
|
|
v_bfrev_b32 v5, -4.0
|
|
// CHECK: [0xf7,0x58,0x0a,0x7e]
|
|
|
|
v_bfrev_b32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x58,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_bfrev_b32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x58,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_bfrev_b32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x6c,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_bfrev_b32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x6c,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_bfrev_b32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x6c,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_bfrev_b32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x6c,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_bfrev_b32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x6c,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_bfrev_b32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x6c,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_bfrev_b32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x6c,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_bfrev_b32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x6c,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_bfrev_b32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x6c,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_bfrev_b32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x6c,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_bfrev_b32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x6c,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_bfrev_b32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x6c,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_bfrev_b32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x6c,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_bfrev_b32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x6c,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_bfrev_b32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x6c,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_bfrev_b32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x6c,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_ffbh_u32 v5, v1
|
|
// CHECK: [0x01,0x5b,0x0a,0x7e]
|
|
|
|
v_ffbh_u32 v255, v1
|
|
// CHECK: [0x01,0x5b,0xfe,0x7f]
|
|
|
|
v_ffbh_u32 v5, v255
|
|
// CHECK: [0xff,0x5b,0x0a,0x7e]
|
|
|
|
v_ffbh_u32 v5, s1
|
|
// CHECK: [0x01,0x5a,0x0a,0x7e]
|
|
|
|
v_ffbh_u32 v5, s101
|
|
// CHECK: [0x65,0x5a,0x0a,0x7e]
|
|
|
|
v_ffbh_u32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x5a,0x0a,0x7e]
|
|
|
|
v_ffbh_u32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x5a,0x0a,0x7e]
|
|
|
|
v_ffbh_u32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x5a,0x0a,0x7e]
|
|
|
|
v_ffbh_u32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x5a,0x0a,0x7e]
|
|
|
|
v_ffbh_u32 v5, m0
|
|
// CHECK: [0x7c,0x5a,0x0a,0x7e]
|
|
|
|
v_ffbh_u32 v5, exec_lo
|
|
// CHECK: [0x7e,0x5a,0x0a,0x7e]
|
|
|
|
v_ffbh_u32 v5, exec_hi
|
|
// CHECK: [0x7f,0x5a,0x0a,0x7e]
|
|
|
|
v_ffbh_u32 v5, 0
|
|
// CHECK: [0x80,0x5a,0x0a,0x7e]
|
|
|
|
v_ffbh_u32 v5, -1
|
|
// CHECK: [0xc1,0x5a,0x0a,0x7e]
|
|
|
|
v_ffbh_u32 v5, 0.5
|
|
// CHECK: [0xf0,0x5a,0x0a,0x7e]
|
|
|
|
v_ffbh_u32 v5, -4.0
|
|
// CHECK: [0xf7,0x5a,0x0a,0x7e]
|
|
|
|
v_ffbh_u32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x5a,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_ffbh_u32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x5a,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_ffbh_u32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x6d,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ffbh_u32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x6d,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ffbh_u32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x6d,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_ffbh_u32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x6d,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_ffbh_u32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x6d,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_ffbh_u32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x6d,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_ffbh_u32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x6d,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_ffbh_u32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x6d,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_ffbh_u32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x6d,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_ffbh_u32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x6d,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_ffbh_u32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x6d,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_ffbh_u32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x6d,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_ffbh_u32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x6d,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_ffbh_u32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x6d,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_ffbh_u32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x6d,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_ffbh_u32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x6d,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_ffbl_b32 v5, v1
|
|
// CHECK: [0x01,0x5d,0x0a,0x7e]
|
|
|
|
v_ffbl_b32 v255, v1
|
|
// CHECK: [0x01,0x5d,0xfe,0x7f]
|
|
|
|
v_ffbl_b32 v5, v255
|
|
// CHECK: [0xff,0x5d,0x0a,0x7e]
|
|
|
|
v_ffbl_b32 v5, s1
|
|
// CHECK: [0x01,0x5c,0x0a,0x7e]
|
|
|
|
v_ffbl_b32 v5, s101
|
|
// CHECK: [0x65,0x5c,0x0a,0x7e]
|
|
|
|
v_ffbl_b32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x5c,0x0a,0x7e]
|
|
|
|
v_ffbl_b32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x5c,0x0a,0x7e]
|
|
|
|
v_ffbl_b32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x5c,0x0a,0x7e]
|
|
|
|
v_ffbl_b32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x5c,0x0a,0x7e]
|
|
|
|
v_ffbl_b32 v5, m0
|
|
// CHECK: [0x7c,0x5c,0x0a,0x7e]
|
|
|
|
v_ffbl_b32 v5, exec_lo
|
|
// CHECK: [0x7e,0x5c,0x0a,0x7e]
|
|
|
|
v_ffbl_b32 v5, exec_hi
|
|
// CHECK: [0x7f,0x5c,0x0a,0x7e]
|
|
|
|
v_ffbl_b32 v5, 0
|
|
// CHECK: [0x80,0x5c,0x0a,0x7e]
|
|
|
|
v_ffbl_b32 v5, -1
|
|
// CHECK: [0xc1,0x5c,0x0a,0x7e]
|
|
|
|
v_ffbl_b32 v5, 0.5
|
|
// CHECK: [0xf0,0x5c,0x0a,0x7e]
|
|
|
|
v_ffbl_b32 v5, -4.0
|
|
// CHECK: [0xf7,0x5c,0x0a,0x7e]
|
|
|
|
v_ffbl_b32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x5c,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_ffbl_b32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x5c,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_ffbl_b32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x6e,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ffbl_b32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x6e,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ffbl_b32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x6e,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_ffbl_b32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x6e,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_ffbl_b32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x6e,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_ffbl_b32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x6e,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_ffbl_b32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x6e,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_ffbl_b32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x6e,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_ffbl_b32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x6e,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_ffbl_b32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x6e,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_ffbl_b32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x6e,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_ffbl_b32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x6e,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_ffbl_b32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x6e,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_ffbl_b32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x6e,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_ffbl_b32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x6e,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_ffbl_b32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x6e,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_ffbh_i32 v5, v1
|
|
// CHECK: [0x01,0x5f,0x0a,0x7e]
|
|
|
|
v_ffbh_i32 v255, v1
|
|
// CHECK: [0x01,0x5f,0xfe,0x7f]
|
|
|
|
v_ffbh_i32 v5, v255
|
|
// CHECK: [0xff,0x5f,0x0a,0x7e]
|
|
|
|
v_ffbh_i32 v5, s1
|
|
// CHECK: [0x01,0x5e,0x0a,0x7e]
|
|
|
|
v_ffbh_i32 v5, s101
|
|
// CHECK: [0x65,0x5e,0x0a,0x7e]
|
|
|
|
v_ffbh_i32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x5e,0x0a,0x7e]
|
|
|
|
v_ffbh_i32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x5e,0x0a,0x7e]
|
|
|
|
v_ffbh_i32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x5e,0x0a,0x7e]
|
|
|
|
v_ffbh_i32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x5e,0x0a,0x7e]
|
|
|
|
v_ffbh_i32 v5, m0
|
|
// CHECK: [0x7c,0x5e,0x0a,0x7e]
|
|
|
|
v_ffbh_i32 v5, exec_lo
|
|
// CHECK: [0x7e,0x5e,0x0a,0x7e]
|
|
|
|
v_ffbh_i32 v5, exec_hi
|
|
// CHECK: [0x7f,0x5e,0x0a,0x7e]
|
|
|
|
v_ffbh_i32 v5, 0
|
|
// CHECK: [0x80,0x5e,0x0a,0x7e]
|
|
|
|
v_ffbh_i32 v5, -1
|
|
// CHECK: [0xc1,0x5e,0x0a,0x7e]
|
|
|
|
v_ffbh_i32 v5, 0.5
|
|
// CHECK: [0xf0,0x5e,0x0a,0x7e]
|
|
|
|
v_ffbh_i32 v5, -4.0
|
|
// CHECK: [0xf7,0x5e,0x0a,0x7e]
|
|
|
|
v_ffbh_i32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x5e,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_ffbh_i32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x5e,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_ffbh_i32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x6f,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ffbh_i32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x6f,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ffbh_i32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x6f,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_ffbh_i32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x6f,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_ffbh_i32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x6f,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_ffbh_i32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x6f,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_ffbh_i32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x6f,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_ffbh_i32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x6f,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_ffbh_i32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x6f,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_ffbh_i32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x6f,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_ffbh_i32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x6f,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_ffbh_i32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x6f,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_ffbh_i32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x6f,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_ffbh_i32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x6f,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_ffbh_i32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x6f,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_ffbh_i32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x6f,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f64 v5, v[1:2]
|
|
// CHECK: [0x01,0x61,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f64 v255, v[1:2]
|
|
// CHECK: [0x01,0x61,0xfe,0x7f]
|
|
|
|
v_frexp_exp_i32_f64 v5, v[254:255]
|
|
// CHECK: [0xfe,0x61,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f64 v5, s[2:3]
|
|
// CHECK: [0x02,0x60,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f64 v5, s[4:5]
|
|
// CHECK: [0x04,0x60,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f64 v5, s[100:101]
|
|
// CHECK: [0x64,0x60,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f64 v5, flat_scratch
|
|
// CHECK: [0x66,0x60,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f64 v5, vcc
|
|
// CHECK: [0x6a,0x60,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f64 v5, exec
|
|
// CHECK: [0x7e,0x60,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f64 v5, 0
|
|
// CHECK: [0x80,0x60,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f64 v5, -1
|
|
// CHECK: [0xc1,0x60,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f64 v5, 0.5
|
|
// CHECK: [0xf0,0x60,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f64 v5, -4.0
|
|
// CHECK: [0xf7,0x60,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f64 v5, 0xaf123456
|
|
// CHECK: [0xff,0x60,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_frexp_exp_i32_f64 v5, 0x3f717273
|
|
// CHECK: [0xff,0x60,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_frexp_exp_i32_f64_e64 v5, v[1:2]
|
|
// CHECK: [0x05,0x00,0x70,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f64_e64 v255, v[1:2]
|
|
// CHECK: [0xff,0x00,0x70,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f64_e64 v5, v[254:255]
|
|
// CHECK: [0x05,0x00,0x70,0xd1,0xfe,0x01,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f64_e64 v5, s[2:3]
|
|
// CHECK: [0x05,0x00,0x70,0xd1,0x02,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f64_e64 v5, s[4:5]
|
|
// CHECK: [0x05,0x00,0x70,0xd1,0x04,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f64_e64 v5, s[100:101]
|
|
// CHECK: [0x05,0x00,0x70,0xd1,0x64,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f64_e64 v5, flat_scratch
|
|
// CHECK: [0x05,0x00,0x70,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f64_e64 v5, vcc
|
|
// CHECK: [0x05,0x00,0x70,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f64_e64 v5, exec
|
|
// CHECK: [0x05,0x00,0x70,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f64_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x70,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f64_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x70,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f64_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x70,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f64_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x70,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f64_e64 v5, -v[1:2]
|
|
// CHECK: [0x05,0x00,0x70,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_frexp_exp_i32_f64_e64 v5, |v[1:2]|
|
|
// CHECK: [0x05,0x01,0x70,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f64 v[5:6], v[1:2]
|
|
// CHECK: [0x01,0x63,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f64 v[254:255], v[1:2]
|
|
// CHECK: [0x01,0x63,0xfc,0x7f]
|
|
|
|
v_frexp_mant_f64 v[5:6], v[254:255]
|
|
// CHECK: [0xfe,0x63,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f64 v[5:6], s[2:3]
|
|
// CHECK: [0x02,0x62,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f64 v[5:6], s[4:5]
|
|
// CHECK: [0x04,0x62,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f64 v[5:6], s[100:101]
|
|
// CHECK: [0x64,0x62,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f64 v[5:6], flat_scratch
|
|
// CHECK: [0x66,0x62,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f64 v[5:6], vcc
|
|
// CHECK: [0x6a,0x62,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f64 v[5:6], exec
|
|
// CHECK: [0x7e,0x62,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f64 v[5:6], 0
|
|
// CHECK: [0x80,0x62,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f64 v[5:6], -1
|
|
// CHECK: [0xc1,0x62,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f64 v[5:6], 0.5
|
|
// CHECK: [0xf0,0x62,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f64 v[5:6], -4.0
|
|
// CHECK: [0xf7,0x62,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f64 v[5:6], 0xaf123456
|
|
// CHECK: [0xff,0x62,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_frexp_mant_f64 v[5:6], 0x3f717273
|
|
// CHECK: [0xff,0x62,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], v[1:2]
|
|
// CHECK: [0x05,0x00,0x71,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f64_e64 v[254:255], v[1:2]
|
|
// CHECK: [0xfe,0x00,0x71,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], v[254:255]
|
|
// CHECK: [0x05,0x00,0x71,0xd1,0xfe,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], s[2:3]
|
|
// CHECK: [0x05,0x00,0x71,0xd1,0x02,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], s[4:5]
|
|
// CHECK: [0x05,0x00,0x71,0xd1,0x04,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], s[100:101]
|
|
// CHECK: [0x05,0x00,0x71,0xd1,0x64,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], flat_scratch
|
|
// CHECK: [0x05,0x00,0x71,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], vcc
|
|
// CHECK: [0x05,0x00,0x71,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], exec
|
|
// CHECK: [0x05,0x00,0x71,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], 0
|
|
// CHECK: [0x05,0x00,0x71,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], -1
|
|
// CHECK: [0x05,0x00,0x71,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], 0.5
|
|
// CHECK: [0x05,0x00,0x71,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], -4.0
|
|
// CHECK: [0x05,0x00,0x71,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], -v[1:2]
|
|
// CHECK: [0x05,0x00,0x71,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], |v[1:2]|
|
|
// CHECK: [0x05,0x01,0x71,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], v[1:2] clamp
|
|
// CHECK: [0x05,0x80,0x71,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], v[1:2] mul:2
|
|
// CHECK: [0x05,0x00,0x71,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], v[1:2] mul:4
|
|
// CHECK: [0x05,0x00,0x71,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_frexp_mant_f64_e64 v[5:6], v[1:2] div:2
|
|
// CHECK: [0x05,0x00,0x71,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_fract_f64 v[5:6], v[1:2]
|
|
// CHECK: [0x01,0x65,0x0a,0x7e]
|
|
|
|
v_fract_f64 v[254:255], v[1:2]
|
|
// CHECK: [0x01,0x65,0xfc,0x7f]
|
|
|
|
v_fract_f64 v[5:6], v[254:255]
|
|
// CHECK: [0xfe,0x65,0x0a,0x7e]
|
|
|
|
v_fract_f64 v[5:6], s[2:3]
|
|
// CHECK: [0x02,0x64,0x0a,0x7e]
|
|
|
|
v_fract_f64 v[5:6], s[4:5]
|
|
// CHECK: [0x04,0x64,0x0a,0x7e]
|
|
|
|
v_fract_f64 v[5:6], s[100:101]
|
|
// CHECK: [0x64,0x64,0x0a,0x7e]
|
|
|
|
v_fract_f64 v[5:6], flat_scratch
|
|
// CHECK: [0x66,0x64,0x0a,0x7e]
|
|
|
|
v_fract_f64 v[5:6], vcc
|
|
// CHECK: [0x6a,0x64,0x0a,0x7e]
|
|
|
|
v_fract_f64 v[5:6], exec
|
|
// CHECK: [0x7e,0x64,0x0a,0x7e]
|
|
|
|
v_fract_f64 v[5:6], 0
|
|
// CHECK: [0x80,0x64,0x0a,0x7e]
|
|
|
|
v_fract_f64 v[5:6], -1
|
|
// CHECK: [0xc1,0x64,0x0a,0x7e]
|
|
|
|
v_fract_f64 v[5:6], 0.5
|
|
// CHECK: [0xf0,0x64,0x0a,0x7e]
|
|
|
|
v_fract_f64 v[5:6], -4.0
|
|
// CHECK: [0xf7,0x64,0x0a,0x7e]
|
|
|
|
v_fract_f64 v[5:6], 0xaf123456
|
|
// CHECK: [0xff,0x64,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_fract_f64 v[5:6], 0x3f717273
|
|
// CHECK: [0xff,0x64,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_fract_f64_e64 v[5:6], v[1:2]
|
|
// CHECK: [0x05,0x00,0x72,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_fract_f64_e64 v[254:255], v[1:2]
|
|
// CHECK: [0xfe,0x00,0x72,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_fract_f64_e64 v[5:6], v[254:255]
|
|
// CHECK: [0x05,0x00,0x72,0xd1,0xfe,0x01,0x00,0x00]
|
|
|
|
v_fract_f64_e64 v[5:6], s[2:3]
|
|
// CHECK: [0x05,0x00,0x72,0xd1,0x02,0x00,0x00,0x00]
|
|
|
|
v_fract_f64_e64 v[5:6], s[4:5]
|
|
// CHECK: [0x05,0x00,0x72,0xd1,0x04,0x00,0x00,0x00]
|
|
|
|
v_fract_f64_e64 v[5:6], s[100:101]
|
|
// CHECK: [0x05,0x00,0x72,0xd1,0x64,0x00,0x00,0x00]
|
|
|
|
v_fract_f64_e64 v[5:6], flat_scratch
|
|
// CHECK: [0x05,0x00,0x72,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_fract_f64_e64 v[5:6], vcc
|
|
// CHECK: [0x05,0x00,0x72,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_fract_f64_e64 v[5:6], exec
|
|
// CHECK: [0x05,0x00,0x72,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_fract_f64_e64 v[5:6], 0
|
|
// CHECK: [0x05,0x00,0x72,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_fract_f64_e64 v[5:6], -1
|
|
// CHECK: [0x05,0x00,0x72,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_fract_f64_e64 v[5:6], 0.5
|
|
// CHECK: [0x05,0x00,0x72,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_fract_f64_e64 v[5:6], -4.0
|
|
// CHECK: [0x05,0x00,0x72,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_fract_f64_e64 v[5:6], -v[1:2]
|
|
// CHECK: [0x05,0x00,0x72,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_fract_f64_e64 v[5:6], |v[1:2]|
|
|
// CHECK: [0x05,0x01,0x72,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_fract_f64_e64 v[5:6], v[1:2] clamp
|
|
// CHECK: [0x05,0x80,0x72,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_fract_f64_e64 v[5:6], v[1:2] mul:2
|
|
// CHECK: [0x05,0x00,0x72,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_fract_f64_e64 v[5:6], v[1:2] mul:4
|
|
// CHECK: [0x05,0x00,0x72,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_fract_f64_e64 v[5:6], v[1:2] div:2
|
|
// CHECK: [0x05,0x00,0x72,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_frexp_exp_i32_f32 v5, v1
|
|
// CHECK: [0x01,0x67,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f32 v255, v1
|
|
// CHECK: [0x01,0x67,0xfe,0x7f]
|
|
|
|
v_frexp_exp_i32_f32 v5, v255
|
|
// CHECK: [0xff,0x67,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f32 v5, s1
|
|
// CHECK: [0x01,0x66,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f32 v5, s101
|
|
// CHECK: [0x65,0x66,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x66,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x66,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x66,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x66,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f32 v5, m0
|
|
// CHECK: [0x7c,0x66,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x66,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x66,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f32 v5, 0
|
|
// CHECK: [0x80,0x66,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f32 v5, -1
|
|
// CHECK: [0xc1,0x66,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x66,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x66,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i32_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x66,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_frexp_exp_i32_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x66,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x73,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x73,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x73,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x73,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x73,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x73,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x73,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x73,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x73,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x73,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x73,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x73,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x73,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x73,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x73,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x73,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x73,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_frexp_exp_i32_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x73,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f32 v5, v1
|
|
// CHECK: [0x01,0x69,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f32 v255, v1
|
|
// CHECK: [0x01,0x69,0xfe,0x7f]
|
|
|
|
v_frexp_mant_f32 v5, v255
|
|
// CHECK: [0xff,0x69,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f32 v5, s1
|
|
// CHECK: [0x01,0x68,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f32 v5, s101
|
|
// CHECK: [0x65,0x68,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x68,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x68,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x68,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x68,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f32 v5, m0
|
|
// CHECK: [0x7c,0x68,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x68,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x68,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f32 v5, 0
|
|
// CHECK: [0x80,0x68,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f32 v5, -1
|
|
// CHECK: [0xc1,0x68,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x68,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x68,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x68,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_frexp_mant_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x68,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_frexp_mant_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x74,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_frexp_mant_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x74,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x74,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_frexp_mant_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_frexp_mant_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x74,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_clrexcp
|
|
// CHECK: [0x00,0x6a,0x00,0x7e]
|
|
|
|
v_clrexcp_e64
|
|
// CHECK: [0x00,0x00,0x75,0xd1,0x00,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_u16 v5, v1
|
|
// CHECK: [0x01,0x73,0x0a,0x7e]
|
|
|
|
v_cvt_f16_u16 v255, v1
|
|
// CHECK: [0x01,0x73,0xfe,0x7f]
|
|
|
|
v_cvt_f16_u16 v5, v255
|
|
// CHECK: [0xff,0x73,0x0a,0x7e]
|
|
|
|
v_cvt_f16_u16 v5, s1
|
|
// CHECK: [0x01,0x72,0x0a,0x7e]
|
|
|
|
v_cvt_f16_u16 v5, s101
|
|
// CHECK: [0x65,0x72,0x0a,0x7e]
|
|
|
|
v_cvt_f16_u16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x72,0x0a,0x7e]
|
|
|
|
v_cvt_f16_u16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x72,0x0a,0x7e]
|
|
|
|
v_cvt_f16_u16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x72,0x0a,0x7e]
|
|
|
|
v_cvt_f16_u16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x72,0x0a,0x7e]
|
|
|
|
v_cvt_f16_u16 v5, m0
|
|
// CHECK: [0x7c,0x72,0x0a,0x7e]
|
|
|
|
v_cvt_f16_u16 v5, exec_lo
|
|
// CHECK: [0x7e,0x72,0x0a,0x7e]
|
|
|
|
v_cvt_f16_u16 v5, exec_hi
|
|
// CHECK: [0x7f,0x72,0x0a,0x7e]
|
|
|
|
v_cvt_f16_u16 v5, 0
|
|
// CHECK: [0x80,0x72,0x0a,0x7e]
|
|
|
|
v_cvt_f16_u16 v5, -1
|
|
// CHECK: [0xc1,0x72,0x0a,0x7e]
|
|
|
|
v_cvt_f16_u16 v5, 0.5
|
|
// CHECK: [0xf0,0x72,0x0a,0x7e]
|
|
|
|
v_cvt_f16_u16 v5, -4.0
|
|
// CHECK: [0xf7,0x72,0x0a,0x7e]
|
|
|
|
v_cvt_f16_u16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x72,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cvt_f16_u16 v5, 0x3456
|
|
// CHECK: [0xff,0x72,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x79,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x79,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x79,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x79,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x79,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x79,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x79,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x79,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x79,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x79,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x79,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x79,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x79,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x79,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x79,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x79,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x79,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f16_i16 v5, v1
|
|
// CHECK: [0x01,0x75,0x0a,0x7e]
|
|
|
|
v_cvt_f16_i16 v255, v1
|
|
// CHECK: [0x01,0x75,0xfe,0x7f]
|
|
|
|
v_cvt_f16_i16 v5, v255
|
|
// CHECK: [0xff,0x75,0x0a,0x7e]
|
|
|
|
v_cvt_f16_i16 v5, s1
|
|
// CHECK: [0x01,0x74,0x0a,0x7e]
|
|
|
|
v_cvt_f16_i16 v5, s101
|
|
// CHECK: [0x65,0x74,0x0a,0x7e]
|
|
|
|
v_cvt_f16_i16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x74,0x0a,0x7e]
|
|
|
|
v_cvt_f16_i16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x74,0x0a,0x7e]
|
|
|
|
v_cvt_f16_i16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x74,0x0a,0x7e]
|
|
|
|
v_cvt_f16_i16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x74,0x0a,0x7e]
|
|
|
|
v_cvt_f16_i16 v5, m0
|
|
// CHECK: [0x7c,0x74,0x0a,0x7e]
|
|
|
|
v_cvt_f16_i16 v5, exec_lo
|
|
// CHECK: [0x7e,0x74,0x0a,0x7e]
|
|
|
|
v_cvt_f16_i16 v5, exec_hi
|
|
// CHECK: [0x7f,0x74,0x0a,0x7e]
|
|
|
|
v_cvt_f16_i16 v5, 0
|
|
// CHECK: [0x80,0x74,0x0a,0x7e]
|
|
|
|
v_cvt_f16_i16 v5, -1
|
|
// CHECK: [0xc1,0x74,0x0a,0x7e]
|
|
|
|
v_cvt_f16_i16 v5, 0.5
|
|
// CHECK: [0xf0,0x74,0x0a,0x7e]
|
|
|
|
v_cvt_f16_i16 v5, -4.0
|
|
// CHECK: [0xf7,0x74,0x0a,0x7e]
|
|
|
|
v_cvt_f16_i16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x74,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cvt_f16_i16 v5, 0x3456
|
|
// CHECK: [0xff,0x74,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x7a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x7a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x7a,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x7a,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x7a,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x7a,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x7a,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x7a,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x7a,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x7a,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x7a,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x7a,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x7a,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x7a,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x7a,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x7a,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x7a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_u16_f16 v5, v1
|
|
// CHECK: [0x01,0x77,0x0a,0x7e]
|
|
|
|
v_cvt_u16_f16 v255, v1
|
|
// CHECK: [0x01,0x77,0xfe,0x7f]
|
|
|
|
v_cvt_u16_f16 v5, v255
|
|
// CHECK: [0xff,0x77,0x0a,0x7e]
|
|
|
|
v_cvt_u16_f16 v5, s1
|
|
// CHECK: [0x01,0x76,0x0a,0x7e]
|
|
|
|
v_cvt_u16_f16 v5, s101
|
|
// CHECK: [0x65,0x76,0x0a,0x7e]
|
|
|
|
v_cvt_u16_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x76,0x0a,0x7e]
|
|
|
|
v_cvt_u16_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x76,0x0a,0x7e]
|
|
|
|
v_cvt_u16_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x76,0x0a,0x7e]
|
|
|
|
v_cvt_u16_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x76,0x0a,0x7e]
|
|
|
|
v_cvt_u16_f16 v5, m0
|
|
// CHECK: [0x7c,0x76,0x0a,0x7e]
|
|
|
|
v_cvt_u16_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x76,0x0a,0x7e]
|
|
|
|
v_cvt_u16_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x76,0x0a,0x7e]
|
|
|
|
v_cvt_u16_f16 v5, 0
|
|
// CHECK: [0x80,0x76,0x0a,0x7e]
|
|
|
|
v_cvt_u16_f16 v5, -1
|
|
// CHECK: [0xc1,0x76,0x0a,0x7e]
|
|
|
|
v_cvt_u16_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x76,0x0a,0x7e]
|
|
|
|
v_cvt_u16_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x76,0x0a,0x7e]
|
|
|
|
v_cvt_u16_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x76,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cvt_u16_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x76,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x7b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x7b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x7b,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x7b,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x7b,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x7b,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x7b,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x7b,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x7b,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x7b,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x7b,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x7b,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x7b,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x7b,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x7b,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x7b,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x7b,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_cvt_u16_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x7b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x7b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_i16_f16 v5, v1
|
|
// CHECK: [0x01,0x79,0x0a,0x7e]
|
|
|
|
v_cvt_i16_f16 v255, v1
|
|
// CHECK: [0x01,0x79,0xfe,0x7f]
|
|
|
|
v_cvt_i16_f16 v5, v255
|
|
// CHECK: [0xff,0x79,0x0a,0x7e]
|
|
|
|
v_cvt_i16_f16 v5, s1
|
|
// CHECK: [0x01,0x78,0x0a,0x7e]
|
|
|
|
v_cvt_i16_f16 v5, s101
|
|
// CHECK: [0x65,0x78,0x0a,0x7e]
|
|
|
|
v_cvt_i16_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x78,0x0a,0x7e]
|
|
|
|
v_cvt_i16_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x78,0x0a,0x7e]
|
|
|
|
v_cvt_i16_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x78,0x0a,0x7e]
|
|
|
|
v_cvt_i16_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x78,0x0a,0x7e]
|
|
|
|
v_cvt_i16_f16 v5, m0
|
|
// CHECK: [0x7c,0x78,0x0a,0x7e]
|
|
|
|
v_cvt_i16_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x78,0x0a,0x7e]
|
|
|
|
v_cvt_i16_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x78,0x0a,0x7e]
|
|
|
|
v_cvt_i16_f16 v5, 0
|
|
// CHECK: [0x80,0x78,0x0a,0x7e]
|
|
|
|
v_cvt_i16_f16 v5, -1
|
|
// CHECK: [0xc1,0x78,0x0a,0x7e]
|
|
|
|
v_cvt_i16_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x78,0x0a,0x7e]
|
|
|
|
v_cvt_i16_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x78,0x0a,0x7e]
|
|
|
|
v_cvt_i16_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x78,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cvt_i16_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x78,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x7c,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x7c,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x7c,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x7c,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x7c,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x7c,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x7c,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x7c,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x7c,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x7c,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x7c,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x7c,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x7c,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x7c,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x7c,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x7c,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x7c,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_cvt_i16_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x7c,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x7c,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rcp_f16 v5, v1
|
|
// CHECK: [0x01,0x7b,0x0a,0x7e]
|
|
|
|
v_rcp_f16 v255, v1
|
|
// CHECK: [0x01,0x7b,0xfe,0x7f]
|
|
|
|
v_rcp_f16 v5, v255
|
|
// CHECK: [0xff,0x7b,0x0a,0x7e]
|
|
|
|
v_rcp_f16 v5, s1
|
|
// CHECK: [0x01,0x7a,0x0a,0x7e]
|
|
|
|
v_rcp_f16 v5, s101
|
|
// CHECK: [0x65,0x7a,0x0a,0x7e]
|
|
|
|
v_rcp_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x7a,0x0a,0x7e]
|
|
|
|
v_rcp_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x7a,0x0a,0x7e]
|
|
|
|
v_rcp_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x7a,0x0a,0x7e]
|
|
|
|
v_rcp_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x7a,0x0a,0x7e]
|
|
|
|
v_rcp_f16 v5, m0
|
|
// CHECK: [0x7c,0x7a,0x0a,0x7e]
|
|
|
|
v_rcp_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x7a,0x0a,0x7e]
|
|
|
|
v_rcp_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x7a,0x0a,0x7e]
|
|
|
|
v_rcp_f16 v5, 0
|
|
// CHECK: [0x80,0x7a,0x0a,0x7e]
|
|
|
|
v_rcp_f16 v5, -1
|
|
// CHECK: [0xc1,0x7a,0x0a,0x7e]
|
|
|
|
v_rcp_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x7a,0x0a,0x7e]
|
|
|
|
v_rcp_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x7a,0x0a,0x7e]
|
|
|
|
v_rcp_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x7a,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_rcp_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x7a,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x7d,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x7d,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x7d,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x7d,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x7d,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x7d,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x7d,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x7d,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x7d,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x7d,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x7d,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x7d,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x7d,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x7d,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x7d,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x7d,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x7d,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_rcp_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x7d,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rcp_f16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x7d,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sqrt_f16 v5, v1
|
|
// CHECK: [0x01,0x7d,0x0a,0x7e]
|
|
|
|
v_sqrt_f16 v255, v1
|
|
// CHECK: [0x01,0x7d,0xfe,0x7f]
|
|
|
|
v_sqrt_f16 v5, v255
|
|
// CHECK: [0xff,0x7d,0x0a,0x7e]
|
|
|
|
v_sqrt_f16 v5, s1
|
|
// CHECK: [0x01,0x7c,0x0a,0x7e]
|
|
|
|
v_sqrt_f16 v5, s101
|
|
// CHECK: [0x65,0x7c,0x0a,0x7e]
|
|
|
|
v_sqrt_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x7c,0x0a,0x7e]
|
|
|
|
v_sqrt_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x7c,0x0a,0x7e]
|
|
|
|
v_sqrt_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x7c,0x0a,0x7e]
|
|
|
|
v_sqrt_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x7c,0x0a,0x7e]
|
|
|
|
v_sqrt_f16 v5, m0
|
|
// CHECK: [0x7c,0x7c,0x0a,0x7e]
|
|
|
|
v_sqrt_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x7c,0x0a,0x7e]
|
|
|
|
v_sqrt_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x7c,0x0a,0x7e]
|
|
|
|
v_sqrt_f16 v5, 0
|
|
// CHECK: [0x80,0x7c,0x0a,0x7e]
|
|
|
|
v_sqrt_f16 v5, -1
|
|
// CHECK: [0xc1,0x7c,0x0a,0x7e]
|
|
|
|
v_sqrt_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x7c,0x0a,0x7e]
|
|
|
|
v_sqrt_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x7c,0x0a,0x7e]
|
|
|
|
v_sqrt_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x7c,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_sqrt_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x7c,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x7e,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x7e,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x7e,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x7e,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x7e,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x7e,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x7e,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x7e,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x7e,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x7e,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x7e,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x7e,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x7e,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x7e,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x7e,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x7e,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x7e,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_sqrt_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x7e,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sqrt_f16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x7e,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rsq_f16 v5, v1
|
|
// CHECK: [0x01,0x7f,0x0a,0x7e]
|
|
|
|
v_rsq_f16 v255, v1
|
|
// CHECK: [0x01,0x7f,0xfe,0x7f]
|
|
|
|
v_rsq_f16 v5, v255
|
|
// CHECK: [0xff,0x7f,0x0a,0x7e]
|
|
|
|
v_rsq_f16 v5, s1
|
|
// CHECK: [0x01,0x7e,0x0a,0x7e]
|
|
|
|
v_rsq_f16 v5, s101
|
|
// CHECK: [0x65,0x7e,0x0a,0x7e]
|
|
|
|
v_rsq_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x7e,0x0a,0x7e]
|
|
|
|
v_rsq_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x7e,0x0a,0x7e]
|
|
|
|
v_rsq_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x7e,0x0a,0x7e]
|
|
|
|
v_rsq_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x7e,0x0a,0x7e]
|
|
|
|
v_rsq_f16 v5, m0
|
|
// CHECK: [0x7c,0x7e,0x0a,0x7e]
|
|
|
|
v_rsq_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x7e,0x0a,0x7e]
|
|
|
|
v_rsq_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x7e,0x0a,0x7e]
|
|
|
|
v_rsq_f16 v5, 0
|
|
// CHECK: [0x80,0x7e,0x0a,0x7e]
|
|
|
|
v_rsq_f16 v5, -1
|
|
// CHECK: [0xc1,0x7e,0x0a,0x7e]
|
|
|
|
v_rsq_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x7e,0x0a,0x7e]
|
|
|
|
v_rsq_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x7e,0x0a,0x7e]
|
|
|
|
v_rsq_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x7e,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_rsq_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x7e,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x7f,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x7f,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x7f,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x7f,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x7f,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x7f,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x7f,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x7f,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x7f,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x7f,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x7f,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x7f,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x7f,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x7f,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x7f,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x7f,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x7f,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_rsq_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x7f,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rsq_f16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x7f,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_log_f16 v5, v1
|
|
// CHECK: [0x01,0x81,0x0a,0x7e]
|
|
|
|
v_log_f16 v255, v1
|
|
// CHECK: [0x01,0x81,0xfe,0x7f]
|
|
|
|
v_log_f16 v5, v255
|
|
// CHECK: [0xff,0x81,0x0a,0x7e]
|
|
|
|
v_log_f16 v5, s1
|
|
// CHECK: [0x01,0x80,0x0a,0x7e]
|
|
|
|
v_log_f16 v5, s101
|
|
// CHECK: [0x65,0x80,0x0a,0x7e]
|
|
|
|
v_log_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x80,0x0a,0x7e]
|
|
|
|
v_log_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x80,0x0a,0x7e]
|
|
|
|
v_log_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x80,0x0a,0x7e]
|
|
|
|
v_log_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x80,0x0a,0x7e]
|
|
|
|
v_log_f16 v5, m0
|
|
// CHECK: [0x7c,0x80,0x0a,0x7e]
|
|
|
|
v_log_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x80,0x0a,0x7e]
|
|
|
|
v_log_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x80,0x0a,0x7e]
|
|
|
|
v_log_f16 v5, 0
|
|
// CHECK: [0x80,0x80,0x0a,0x7e]
|
|
|
|
v_log_f16 v5, -1
|
|
// CHECK: [0xc1,0x80,0x0a,0x7e]
|
|
|
|
v_log_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x80,0x0a,0x7e]
|
|
|
|
v_log_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x80,0x0a,0x7e]
|
|
|
|
v_log_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x80,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_log_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x80,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x80,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_log_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x80,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x80,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x80,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x80,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x80,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x80,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x80,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x80,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x80,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x80,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x80,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x80,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x80,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x80,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x80,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x80,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_log_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x80,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_log_f16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x80,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_exp_f16 v5, v1
|
|
// CHECK: [0x01,0x83,0x0a,0x7e]
|
|
|
|
v_exp_f16 v255, v1
|
|
// CHECK: [0x01,0x83,0xfe,0x7f]
|
|
|
|
v_exp_f16 v5, v255
|
|
// CHECK: [0xff,0x83,0x0a,0x7e]
|
|
|
|
v_exp_f16 v5, s1
|
|
// CHECK: [0x01,0x82,0x0a,0x7e]
|
|
|
|
v_exp_f16 v5, s101
|
|
// CHECK: [0x65,0x82,0x0a,0x7e]
|
|
|
|
v_exp_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x82,0x0a,0x7e]
|
|
|
|
v_exp_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x82,0x0a,0x7e]
|
|
|
|
v_exp_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x82,0x0a,0x7e]
|
|
|
|
v_exp_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x82,0x0a,0x7e]
|
|
|
|
v_exp_f16 v5, m0
|
|
// CHECK: [0x7c,0x82,0x0a,0x7e]
|
|
|
|
v_exp_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x82,0x0a,0x7e]
|
|
|
|
v_exp_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x82,0x0a,0x7e]
|
|
|
|
v_exp_f16 v5, 0
|
|
// CHECK: [0x80,0x82,0x0a,0x7e]
|
|
|
|
v_exp_f16 v5, -1
|
|
// CHECK: [0xc1,0x82,0x0a,0x7e]
|
|
|
|
v_exp_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x82,0x0a,0x7e]
|
|
|
|
v_exp_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x82,0x0a,0x7e]
|
|
|
|
v_exp_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x82,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_exp_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x82,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x81,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x81,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x81,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x81,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x81,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x81,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x81,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x81,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x81,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x81,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x81,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x81,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x81,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x81,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x81,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x81,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x81,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_exp_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x81,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_exp_f16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x81,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f16 v5, v1
|
|
// CHECK: [0x01,0x85,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f16 v255, v1
|
|
// CHECK: [0x01,0x85,0xfe,0x7f]
|
|
|
|
v_frexp_mant_f16 v5, v255
|
|
// CHECK: [0xff,0x85,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f16 v5, s1
|
|
// CHECK: [0x01,0x84,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f16 v5, s101
|
|
// CHECK: [0x65,0x84,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x84,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x84,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x84,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x84,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f16 v5, m0
|
|
// CHECK: [0x7c,0x84,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x84,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x84,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f16 v5, 0
|
|
// CHECK: [0x80,0x84,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f16 v5, -1
|
|
// CHECK: [0xc1,0x84,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x84,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x84,0x0a,0x7e]
|
|
|
|
v_frexp_mant_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x84,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_frexp_mant_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x84,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x82,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x82,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x82,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x82,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x82,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x82,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x82,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x82,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x82,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x82,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x82,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x82,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x82,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x82,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x82,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x82,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x82,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_frexp_mant_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x82,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x82,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16 v5, v1
|
|
// CHECK: [0x01,0x87,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i16_f16 v255, v1
|
|
// CHECK: [0x01,0x87,0xfe,0x7f]
|
|
|
|
v_frexp_exp_i16_f16 v5, v255
|
|
// CHECK: [0xff,0x87,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i16_f16 v5, s1
|
|
// CHECK: [0x01,0x86,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i16_f16 v5, s101
|
|
// CHECK: [0x65,0x86,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i16_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x86,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i16_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x86,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i16_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x86,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i16_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x86,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i16_f16 v5, m0
|
|
// CHECK: [0x7c,0x86,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i16_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x86,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i16_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x86,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i16_f16 v5, 0
|
|
// CHECK: [0x80,0x86,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i16_f16 v5, -1
|
|
// CHECK: [0xc1,0x86,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i16_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x86,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i16_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x86,0x0a,0x7e]
|
|
|
|
v_frexp_exp_i16_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x86,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x86,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x83,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x83,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x83,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x83,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x83,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x83,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x83,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x83,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x83,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x83,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x83,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x83,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x83,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x83,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x83,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x83,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x83,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_frexp_exp_i16_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x83,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_floor_f16 v5, v1
|
|
// CHECK: [0x01,0x89,0x0a,0x7e]
|
|
|
|
v_floor_f16 v255, v1
|
|
// CHECK: [0x01,0x89,0xfe,0x7f]
|
|
|
|
v_floor_f16 v5, v255
|
|
// CHECK: [0xff,0x89,0x0a,0x7e]
|
|
|
|
v_floor_f16 v5, s1
|
|
// CHECK: [0x01,0x88,0x0a,0x7e]
|
|
|
|
v_floor_f16 v5, s101
|
|
// CHECK: [0x65,0x88,0x0a,0x7e]
|
|
|
|
v_floor_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x88,0x0a,0x7e]
|
|
|
|
v_floor_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x88,0x0a,0x7e]
|
|
|
|
v_floor_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x88,0x0a,0x7e]
|
|
|
|
v_floor_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x88,0x0a,0x7e]
|
|
|
|
v_floor_f16 v5, m0
|
|
// CHECK: [0x7c,0x88,0x0a,0x7e]
|
|
|
|
v_floor_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x88,0x0a,0x7e]
|
|
|
|
v_floor_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x88,0x0a,0x7e]
|
|
|
|
v_floor_f16 v5, 0
|
|
// CHECK: [0x80,0x88,0x0a,0x7e]
|
|
|
|
v_floor_f16 v5, -1
|
|
// CHECK: [0xc1,0x88,0x0a,0x7e]
|
|
|
|
v_floor_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x88,0x0a,0x7e]
|
|
|
|
v_floor_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x88,0x0a,0x7e]
|
|
|
|
v_floor_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x88,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_floor_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x88,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x84,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x84,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x84,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x84,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x84,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x84,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x84,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x84,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x84,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x84,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x84,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x84,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x84,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x84,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x84,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x84,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x84,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_floor_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x84,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_floor_f16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x84,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ceil_f16 v5, v1
|
|
// CHECK: [0x01,0x8b,0x0a,0x7e]
|
|
|
|
v_ceil_f16 v255, v1
|
|
// CHECK: [0x01,0x8b,0xfe,0x7f]
|
|
|
|
v_ceil_f16 v5, v255
|
|
// CHECK: [0xff,0x8b,0x0a,0x7e]
|
|
|
|
v_ceil_f16 v5, s1
|
|
// CHECK: [0x01,0x8a,0x0a,0x7e]
|
|
|
|
v_ceil_f16 v5, s101
|
|
// CHECK: [0x65,0x8a,0x0a,0x7e]
|
|
|
|
v_ceil_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x8a,0x0a,0x7e]
|
|
|
|
v_ceil_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x8a,0x0a,0x7e]
|
|
|
|
v_ceil_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x8a,0x0a,0x7e]
|
|
|
|
v_ceil_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x8a,0x0a,0x7e]
|
|
|
|
v_ceil_f16 v5, m0
|
|
// CHECK: [0x7c,0x8a,0x0a,0x7e]
|
|
|
|
v_ceil_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x8a,0x0a,0x7e]
|
|
|
|
v_ceil_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x8a,0x0a,0x7e]
|
|
|
|
v_ceil_f16 v5, 0
|
|
// CHECK: [0x80,0x8a,0x0a,0x7e]
|
|
|
|
v_ceil_f16 v5, -1
|
|
// CHECK: [0xc1,0x8a,0x0a,0x7e]
|
|
|
|
v_ceil_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x8a,0x0a,0x7e]
|
|
|
|
v_ceil_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x8a,0x0a,0x7e]
|
|
|
|
v_ceil_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x8a,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_ceil_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x8a,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x85,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x85,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x85,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x85,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x85,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x85,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x85,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x85,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x85,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x85,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x85,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x85,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x85,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x85,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x85,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x85,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x85,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_ceil_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x85,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_ceil_f16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x85,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_trunc_f16 v5, v1
|
|
// CHECK: [0x01,0x8d,0x0a,0x7e]
|
|
|
|
v_trunc_f16 v255, v1
|
|
// CHECK: [0x01,0x8d,0xfe,0x7f]
|
|
|
|
v_trunc_f16 v5, v255
|
|
// CHECK: [0xff,0x8d,0x0a,0x7e]
|
|
|
|
v_trunc_f16 v5, s1
|
|
// CHECK: [0x01,0x8c,0x0a,0x7e]
|
|
|
|
v_trunc_f16 v5, s101
|
|
// CHECK: [0x65,0x8c,0x0a,0x7e]
|
|
|
|
v_trunc_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x8c,0x0a,0x7e]
|
|
|
|
v_trunc_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x8c,0x0a,0x7e]
|
|
|
|
v_trunc_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x8c,0x0a,0x7e]
|
|
|
|
v_trunc_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x8c,0x0a,0x7e]
|
|
|
|
v_trunc_f16 v5, m0
|
|
// CHECK: [0x7c,0x8c,0x0a,0x7e]
|
|
|
|
v_trunc_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x8c,0x0a,0x7e]
|
|
|
|
v_trunc_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x8c,0x0a,0x7e]
|
|
|
|
v_trunc_f16 v5, 0
|
|
// CHECK: [0x80,0x8c,0x0a,0x7e]
|
|
|
|
v_trunc_f16 v5, -1
|
|
// CHECK: [0xc1,0x8c,0x0a,0x7e]
|
|
|
|
v_trunc_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x8c,0x0a,0x7e]
|
|
|
|
v_trunc_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x8c,0x0a,0x7e]
|
|
|
|
v_trunc_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x8c,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_trunc_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x8c,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x86,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x86,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x86,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x86,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x86,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x86,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x86,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x86,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x86,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x86,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x86,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x86,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x86,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x86,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x86,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x86,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x86,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_trunc_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x86,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_trunc_f16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x86,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rndne_f16 v5, v1
|
|
// CHECK: [0x01,0x8f,0x0a,0x7e]
|
|
|
|
v_rndne_f16 v255, v1
|
|
// CHECK: [0x01,0x8f,0xfe,0x7f]
|
|
|
|
v_rndne_f16 v5, v255
|
|
// CHECK: [0xff,0x8f,0x0a,0x7e]
|
|
|
|
v_rndne_f16 v5, s1
|
|
// CHECK: [0x01,0x8e,0x0a,0x7e]
|
|
|
|
v_rndne_f16 v5, s101
|
|
// CHECK: [0x65,0x8e,0x0a,0x7e]
|
|
|
|
v_rndne_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x8e,0x0a,0x7e]
|
|
|
|
v_rndne_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x8e,0x0a,0x7e]
|
|
|
|
v_rndne_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x8e,0x0a,0x7e]
|
|
|
|
v_rndne_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x8e,0x0a,0x7e]
|
|
|
|
v_rndne_f16 v5, m0
|
|
// CHECK: [0x7c,0x8e,0x0a,0x7e]
|
|
|
|
v_rndne_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x8e,0x0a,0x7e]
|
|
|
|
v_rndne_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x8e,0x0a,0x7e]
|
|
|
|
v_rndne_f16 v5, 0
|
|
// CHECK: [0x80,0x8e,0x0a,0x7e]
|
|
|
|
v_rndne_f16 v5, -1
|
|
// CHECK: [0xc1,0x8e,0x0a,0x7e]
|
|
|
|
v_rndne_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x8e,0x0a,0x7e]
|
|
|
|
v_rndne_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x8e,0x0a,0x7e]
|
|
|
|
v_rndne_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x8e,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_rndne_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x8e,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x87,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x87,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x87,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x87,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x87,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x87,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x87,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x87,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x87,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x87,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x87,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x87,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x87,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x87,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x87,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x87,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x87,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_rndne_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x87,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_rndne_f16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x87,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_fract_f16 v5, v1
|
|
// CHECK: [0x01,0x91,0x0a,0x7e]
|
|
|
|
v_fract_f16 v255, v1
|
|
// CHECK: [0x01,0x91,0xfe,0x7f]
|
|
|
|
v_fract_f16 v5, v255
|
|
// CHECK: [0xff,0x91,0x0a,0x7e]
|
|
|
|
v_fract_f16 v5, s1
|
|
// CHECK: [0x01,0x90,0x0a,0x7e]
|
|
|
|
v_fract_f16 v5, s101
|
|
// CHECK: [0x65,0x90,0x0a,0x7e]
|
|
|
|
v_fract_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x90,0x0a,0x7e]
|
|
|
|
v_fract_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x90,0x0a,0x7e]
|
|
|
|
v_fract_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x90,0x0a,0x7e]
|
|
|
|
v_fract_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x90,0x0a,0x7e]
|
|
|
|
v_fract_f16 v5, m0
|
|
// CHECK: [0x7c,0x90,0x0a,0x7e]
|
|
|
|
v_fract_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x90,0x0a,0x7e]
|
|
|
|
v_fract_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x90,0x0a,0x7e]
|
|
|
|
v_fract_f16 v5, 0
|
|
// CHECK: [0x80,0x90,0x0a,0x7e]
|
|
|
|
v_fract_f16 v5, -1
|
|
// CHECK: [0xc1,0x90,0x0a,0x7e]
|
|
|
|
v_fract_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x90,0x0a,0x7e]
|
|
|
|
v_fract_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x90,0x0a,0x7e]
|
|
|
|
v_fract_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x90,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_fract_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x90,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x88,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x88,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x88,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x88,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x88,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x88,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x88,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x88,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x88,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x88,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x88,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x88,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x88,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x88,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x88,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x88,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x88,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_fract_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x88,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_fract_f16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x88,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sin_f16 v5, v1
|
|
// CHECK: [0x01,0x93,0x0a,0x7e]
|
|
|
|
v_sin_f16 v255, v1
|
|
// CHECK: [0x01,0x93,0xfe,0x7f]
|
|
|
|
v_sin_f16 v5, v255
|
|
// CHECK: [0xff,0x93,0x0a,0x7e]
|
|
|
|
v_sin_f16 v5, s1
|
|
// CHECK: [0x01,0x92,0x0a,0x7e]
|
|
|
|
v_sin_f16 v5, s101
|
|
// CHECK: [0x65,0x92,0x0a,0x7e]
|
|
|
|
v_sin_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x92,0x0a,0x7e]
|
|
|
|
v_sin_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x92,0x0a,0x7e]
|
|
|
|
v_sin_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x92,0x0a,0x7e]
|
|
|
|
v_sin_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x92,0x0a,0x7e]
|
|
|
|
v_sin_f16 v5, m0
|
|
// CHECK: [0x7c,0x92,0x0a,0x7e]
|
|
|
|
v_sin_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x92,0x0a,0x7e]
|
|
|
|
v_sin_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x92,0x0a,0x7e]
|
|
|
|
v_sin_f16 v5, 0
|
|
// CHECK: [0x80,0x92,0x0a,0x7e]
|
|
|
|
v_sin_f16 v5, -1
|
|
// CHECK: [0xc1,0x92,0x0a,0x7e]
|
|
|
|
v_sin_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x92,0x0a,0x7e]
|
|
|
|
v_sin_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x92,0x0a,0x7e]
|
|
|
|
v_sin_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x92,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_sin_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x92,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x89,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x89,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x89,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x89,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x89,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x89,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x89,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x89,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x89,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x89,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x89,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x89,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x89,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x89,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x89,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x89,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x89,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_sin_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x89,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_sin_f16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x89,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cos_f16 v5, v1
|
|
// CHECK: [0x01,0x95,0x0a,0x7e]
|
|
|
|
v_cos_f16 v255, v1
|
|
// CHECK: [0x01,0x95,0xfe,0x7f]
|
|
|
|
v_cos_f16 v5, v255
|
|
// CHECK: [0xff,0x95,0x0a,0x7e]
|
|
|
|
v_cos_f16 v5, s1
|
|
// CHECK: [0x01,0x94,0x0a,0x7e]
|
|
|
|
v_cos_f16 v5, s101
|
|
// CHECK: [0x65,0x94,0x0a,0x7e]
|
|
|
|
v_cos_f16 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x94,0x0a,0x7e]
|
|
|
|
v_cos_f16 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x94,0x0a,0x7e]
|
|
|
|
v_cos_f16 v5, vcc_lo
|
|
// CHECK: [0x6a,0x94,0x0a,0x7e]
|
|
|
|
v_cos_f16 v5, vcc_hi
|
|
// CHECK: [0x6b,0x94,0x0a,0x7e]
|
|
|
|
v_cos_f16 v5, m0
|
|
// CHECK: [0x7c,0x94,0x0a,0x7e]
|
|
|
|
v_cos_f16 v5, exec_lo
|
|
// CHECK: [0x7e,0x94,0x0a,0x7e]
|
|
|
|
v_cos_f16 v5, exec_hi
|
|
// CHECK: [0x7f,0x94,0x0a,0x7e]
|
|
|
|
v_cos_f16 v5, 0
|
|
// CHECK: [0x80,0x94,0x0a,0x7e]
|
|
|
|
v_cos_f16 v5, -1
|
|
// CHECK: [0xc1,0x94,0x0a,0x7e]
|
|
|
|
v_cos_f16 v5, 0.5
|
|
// CHECK: [0xf0,0x94,0x0a,0x7e]
|
|
|
|
v_cos_f16 v5, -4.0
|
|
// CHECK: [0xf7,0x94,0x0a,0x7e]
|
|
|
|
v_cos_f16 v5, 0xfe0b
|
|
// CHECK: [0xff,0x94,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cos_f16 v5, 0x3456
|
|
// CHECK: [0xff,0x94,0x0a,0x7e,0x56,0x34,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x8a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x8a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x8a,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x8a,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x8a,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x8a,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x8a,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x8a,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x8a,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x8a,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x8a,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x8a,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x8a,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x8a,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x8a,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x8a,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x8a,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_cos_f16_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x8a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_cos_f16_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x8a,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_exp_legacy_f32 v5, v1
|
|
// CHECK: [0x01,0x97,0x0a,0x7e]
|
|
|
|
v_exp_legacy_f32 v255, v1
|
|
// CHECK: [0x01,0x97,0xfe,0x7f]
|
|
|
|
v_exp_legacy_f32 v5, v255
|
|
// CHECK: [0xff,0x97,0x0a,0x7e]
|
|
|
|
v_exp_legacy_f32 v5, s1
|
|
// CHECK: [0x01,0x96,0x0a,0x7e]
|
|
|
|
v_exp_legacy_f32 v5, s101
|
|
// CHECK: [0x65,0x96,0x0a,0x7e]
|
|
|
|
v_exp_legacy_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x96,0x0a,0x7e]
|
|
|
|
v_exp_legacy_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x96,0x0a,0x7e]
|
|
|
|
v_exp_legacy_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x96,0x0a,0x7e]
|
|
|
|
v_exp_legacy_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x96,0x0a,0x7e]
|
|
|
|
v_exp_legacy_f32 v5, m0
|
|
// CHECK: [0x7c,0x96,0x0a,0x7e]
|
|
|
|
v_exp_legacy_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x96,0x0a,0x7e]
|
|
|
|
v_exp_legacy_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x96,0x0a,0x7e]
|
|
|
|
v_exp_legacy_f32 v5, 0
|
|
// CHECK: [0x80,0x96,0x0a,0x7e]
|
|
|
|
v_exp_legacy_f32 v5, -1
|
|
// CHECK: [0xc1,0x96,0x0a,0x7e]
|
|
|
|
v_exp_legacy_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x96,0x0a,0x7e]
|
|
|
|
v_exp_legacy_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x96,0x0a,0x7e]
|
|
|
|
v_exp_legacy_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x96,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_exp_legacy_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x96,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_exp_legacy_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x8b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_exp_legacy_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x8b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x8b,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_exp_legacy_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_exp_legacy_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x8b,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_log_legacy_f32 v5, v1
|
|
// CHECK: [0x01,0x99,0x0a,0x7e]
|
|
|
|
v_log_legacy_f32 v255, v1
|
|
// CHECK: [0x01,0x99,0xfe,0x7f]
|
|
|
|
v_log_legacy_f32 v5, v255
|
|
// CHECK: [0xff,0x99,0x0a,0x7e]
|
|
|
|
v_log_legacy_f32 v5, s1
|
|
// CHECK: [0x01,0x98,0x0a,0x7e]
|
|
|
|
v_log_legacy_f32 v5, s101
|
|
// CHECK: [0x65,0x98,0x0a,0x7e]
|
|
|
|
v_log_legacy_f32 v5, flat_scratch_lo
|
|
// CHECK: [0x66,0x98,0x0a,0x7e]
|
|
|
|
v_log_legacy_f32 v5, flat_scratch_hi
|
|
// CHECK: [0x67,0x98,0x0a,0x7e]
|
|
|
|
v_log_legacy_f32 v5, vcc_lo
|
|
// CHECK: [0x6a,0x98,0x0a,0x7e]
|
|
|
|
v_log_legacy_f32 v5, vcc_hi
|
|
// CHECK: [0x6b,0x98,0x0a,0x7e]
|
|
|
|
v_log_legacy_f32 v5, m0
|
|
// CHECK: [0x7c,0x98,0x0a,0x7e]
|
|
|
|
v_log_legacy_f32 v5, exec_lo
|
|
// CHECK: [0x7e,0x98,0x0a,0x7e]
|
|
|
|
v_log_legacy_f32 v5, exec_hi
|
|
// CHECK: [0x7f,0x98,0x0a,0x7e]
|
|
|
|
v_log_legacy_f32 v5, 0
|
|
// CHECK: [0x80,0x98,0x0a,0x7e]
|
|
|
|
v_log_legacy_f32 v5, -1
|
|
// CHECK: [0xc1,0x98,0x0a,0x7e]
|
|
|
|
v_log_legacy_f32 v5, 0.5
|
|
// CHECK: [0xf0,0x98,0x0a,0x7e]
|
|
|
|
v_log_legacy_f32 v5, -4.0
|
|
// CHECK: [0xf7,0x98,0x0a,0x7e]
|
|
|
|
v_log_legacy_f32 v5, 0xaf123456
|
|
// CHECK: [0xff,0x98,0x0a,0x7e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_log_legacy_f32 v5, 0x3f717273
|
|
// CHECK: [0xff,0x98,0x0a,0x7e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_log_legacy_f32_e64 v5, v1
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v255, v1
|
|
// CHECK: [0xff,0x00,0x8c,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, v255
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0xff,0x01,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, s1
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0x01,0x00,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, s101
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0x65,0x00,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0x66,0x00,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0x67,0x00,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, vcc_lo
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0x6a,0x00,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, vcc_hi
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0x6b,0x00,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, m0
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0x7c,0x00,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, exec_lo
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0x7e,0x00,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, exec_hi
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0x7f,0x00,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, 0
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0x80,0x00,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, -1
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0xc1,0x00,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, 0.5
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0xf0,0x00,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, -4.0
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0xf7,0x00,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, -v1
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0x01,0x01,0x00,0x20]
|
|
|
|
v_log_legacy_f32_e64 v5, |v1|
|
|
// CHECK: [0x05,0x01,0x8c,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, v1 clamp
|
|
// CHECK: [0x05,0x80,0x8c,0xd1,0x01,0x01,0x00,0x00]
|
|
|
|
v_log_legacy_f32_e64 v5, v1 mul:2
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0x01,0x01,0x00,0x08]
|
|
|
|
v_log_legacy_f32_e64 v5, v1 mul:4
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0x01,0x01,0x00,0x10]
|
|
|
|
v_log_legacy_f32_e64 v5, v1 div:2
|
|
// CHECK: [0x05,0x00,0x8c,0xd1,0x01,0x01,0x00,0x18]
|
|
|
|
v_swap_b32 v5, v1
|
|
// CHECK: [0x01,0xa3,0x0a,0x7e]
|
|
|
|
v_swap_b32 v255, v1
|
|
// CHECK: [0x01,0xa3,0xfe,0x7f]
|
|
|
|
v_swap_b32 v5, v255
|
|
// CHECK: [0xff,0xa3,0x0a,0x7e]
|
|
|
|
v_cndmask_b32 v5, v1, v2, vcc
|
|
// CHECK: [0x01,0x05,0x0a,0x00]
|
|
|
|
v_cndmask_b32 v255, v1, v2, vcc
|
|
// CHECK: [0x01,0x05,0xfe,0x01]
|
|
|
|
v_cndmask_b32 v5, v255, v2, vcc
|
|
// CHECK: [0xff,0x05,0x0a,0x00]
|
|
|
|
v_cndmask_b32 v5, 0, v2, vcc
|
|
// CHECK: [0x80,0x04,0x0a,0x00]
|
|
|
|
v_cndmask_b32 v5, -1, v2, vcc
|
|
// CHECK: [0xc1,0x04,0x0a,0x00]
|
|
|
|
v_cndmask_b32 v5, 0.5, v2, vcc
|
|
// CHECK: [0xf0,0x04,0x0a,0x00]
|
|
|
|
v_cndmask_b32 v5, -4.0, v2, vcc
|
|
// CHECK: [0xf7,0x04,0x0a,0x00]
|
|
|
|
v_cndmask_b32 v5, v1, v255, vcc
|
|
// CHECK: [0x01,0xff,0x0b,0x00]
|
|
|
|
v_cndmask_b32_e64 v5, v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x00,0x00,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_cndmask_b32_e64 v255, v1, v2, s[6:7]
|
|
// CHECK: [0xff,0x00,0x00,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_cndmask_b32_e64 v5, v255, v2, s[6:7]
|
|
// CHECK: [0x05,0x00,0x00,0xd1,0xff,0x05,0x1a,0x00]
|
|
|
|
v_cndmask_b32_e64 v5, 0, v2, s[6:7]
|
|
// CHECK: [0x05,0x00,0x00,0xd1,0x80,0x04,0x1a,0x00]
|
|
|
|
v_cndmask_b32_e64 v5, -1, v2, s[6:7]
|
|
// CHECK: [0x05,0x00,0x00,0xd1,0xc1,0x04,0x1a,0x00]
|
|
|
|
v_cndmask_b32_e64 v5, 0.5, v2, s[6:7]
|
|
// CHECK: [0x05,0x00,0x00,0xd1,0xf0,0x04,0x1a,0x00]
|
|
|
|
v_cndmask_b32_e64 v5, -4.0, v2, s[6:7]
|
|
// CHECK: [0x05,0x00,0x00,0xd1,0xf7,0x04,0x1a,0x00]
|
|
|
|
v_cndmask_b32_e64 v5, v1, v255, s[6:7]
|
|
// CHECK: [0x05,0x00,0x00,0xd1,0x01,0xff,0x1b,0x00]
|
|
|
|
v_cndmask_b32_e64 v5, v1, 0, s[6:7]
|
|
// CHECK: [0x05,0x00,0x00,0xd1,0x01,0x01,0x19,0x00]
|
|
|
|
v_cndmask_b32_e64 v5, v1, -1, s[6:7]
|
|
// CHECK: [0x05,0x00,0x00,0xd1,0x01,0x83,0x19,0x00]
|
|
|
|
v_cndmask_b32_e64 v5, v1, 0.5, s[6:7]
|
|
// CHECK: [0x05,0x00,0x00,0xd1,0x01,0xe1,0x19,0x00]
|
|
|
|
v_cndmask_b32_e64 v5, v1, -4.0, s[6:7]
|
|
// CHECK: [0x05,0x00,0x00,0xd1,0x01,0xef,0x19,0x00]
|
|
|
|
v_cndmask_b32_e64 v5, v1, v2, s[8:9]
|
|
// CHECK: [0x05,0x00,0x00,0xd1,0x01,0x05,0x22,0x00]
|
|
|
|
v_cndmask_b32_e64 v5, v1, v2, s[100:101]
|
|
// CHECK: [0x05,0x00,0x00,0xd1,0x01,0x05,0x92,0x01]
|
|
|
|
v_cndmask_b32_e64 v5, v1, v2, flat_scratch
|
|
// CHECK: [0x05,0x00,0x00,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_cndmask_b32_e64 v5, v1, v2, vcc
|
|
// CHECK: [0x05,0x00,0x00,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_add_f32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x02]
|
|
|
|
v_add_f32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x03]
|
|
|
|
v_add_f32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x02]
|
|
|
|
v_add_f32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x02]
|
|
|
|
v_add_f32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x02]
|
|
|
|
v_add_f32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x02]
|
|
|
|
v_add_f32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x02]
|
|
|
|
v_add_f32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x02]
|
|
|
|
v_add_f32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x02]
|
|
|
|
v_add_f32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x02]
|
|
|
|
v_add_f32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x02]
|
|
|
|
v_add_f32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x02]
|
|
|
|
v_add_f32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x02]
|
|
|
|
v_add_f32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x02]
|
|
|
|
v_add_f32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x02]
|
|
|
|
v_add_f32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x02]
|
|
|
|
v_add_f32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x02,0x56,0x34,0x12,0xaf]
|
|
|
|
v_add_f32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x02,0x73,0x72,0x71,0x3f]
|
|
|
|
v_add_f32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x02]
|
|
|
|
v_add_f32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x01,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_add_f32_e64 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0x05,0x02,0x20]
|
|
|
|
v_add_f32_e64 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0x05,0x02,0x40]
|
|
|
|
v_add_f32_e64 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0x05,0x02,0x60]
|
|
|
|
v_add_f32_e64 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x01,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x01,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x01,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x01,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f32_e64 v5, v1, v2 mul:2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0x05,0x02,0x08]
|
|
|
|
v_add_f32_e64 v5, v1, v2 mul:4
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0x05,0x02,0x10]
|
|
|
|
v_add_f32_e64 v5, v1, v2 div:2
|
|
// CHECK: [0x05,0x00,0x01,0xd1,0x01,0x05,0x02,0x18]
|
|
|
|
v_sub_f32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x04]
|
|
|
|
v_sub_f32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x05]
|
|
|
|
v_sub_f32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x04]
|
|
|
|
v_sub_f32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x04]
|
|
|
|
v_sub_f32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x04]
|
|
|
|
v_sub_f32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x04]
|
|
|
|
v_sub_f32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x04]
|
|
|
|
v_sub_f32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x04]
|
|
|
|
v_sub_f32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x04]
|
|
|
|
v_sub_f32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x04]
|
|
|
|
v_sub_f32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x04]
|
|
|
|
v_sub_f32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x04]
|
|
|
|
v_sub_f32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x04]
|
|
|
|
v_sub_f32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x04]
|
|
|
|
v_sub_f32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x04]
|
|
|
|
v_sub_f32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x04]
|
|
|
|
v_sub_f32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x04,0x56,0x34,0x12,0xaf]
|
|
|
|
v_sub_f32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x04,0x73,0x72,0x71,0x3f]
|
|
|
|
v_sub_f32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x04]
|
|
|
|
v_sub_f32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x02,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_sub_f32_e64 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0x05,0x02,0x20]
|
|
|
|
v_sub_f32_e64 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0x05,0x02,0x40]
|
|
|
|
v_sub_f32_e64 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0x05,0x02,0x60]
|
|
|
|
v_sub_f32_e64 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x02,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x02,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x02,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x02,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_f32_e64 v5, v1, v2 mul:2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0x05,0x02,0x08]
|
|
|
|
v_sub_f32_e64 v5, v1, v2 mul:4
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0x05,0x02,0x10]
|
|
|
|
v_sub_f32_e64 v5, v1, v2 div:2
|
|
// CHECK: [0x05,0x00,0x02,0xd1,0x01,0x05,0x02,0x18]
|
|
|
|
v_subrev_f32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x06]
|
|
|
|
v_subrev_f32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x07]
|
|
|
|
v_subrev_f32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x06]
|
|
|
|
v_subrev_f32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x06]
|
|
|
|
v_subrev_f32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x06]
|
|
|
|
v_subrev_f32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x06]
|
|
|
|
v_subrev_f32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x06]
|
|
|
|
v_subrev_f32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x06]
|
|
|
|
v_subrev_f32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x06]
|
|
|
|
v_subrev_f32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x06]
|
|
|
|
v_subrev_f32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x06]
|
|
|
|
v_subrev_f32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x06]
|
|
|
|
v_subrev_f32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x06]
|
|
|
|
v_subrev_f32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x06]
|
|
|
|
v_subrev_f32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x06]
|
|
|
|
v_subrev_f32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x06]
|
|
|
|
v_subrev_f32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x06,0x56,0x34,0x12,0xaf]
|
|
|
|
v_subrev_f32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x06,0x73,0x72,0x71,0x3f]
|
|
|
|
v_subrev_f32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x06]
|
|
|
|
v_subrev_f32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x03,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_subrev_f32_e64 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0x05,0x02,0x20]
|
|
|
|
v_subrev_f32_e64 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0x05,0x02,0x40]
|
|
|
|
v_subrev_f32_e64 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0x05,0x02,0x60]
|
|
|
|
v_subrev_f32_e64 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x03,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x03,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x03,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x03,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_f32_e64 v5, v1, v2 mul:2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0x05,0x02,0x08]
|
|
|
|
v_subrev_f32_e64 v5, v1, v2 mul:4
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0x05,0x02,0x10]
|
|
|
|
v_subrev_f32_e64 v5, v1, v2 div:2
|
|
// CHECK: [0x05,0x00,0x03,0xd1,0x01,0x05,0x02,0x18]
|
|
|
|
v_mul_legacy_f32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x08]
|
|
|
|
v_mul_legacy_f32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x09]
|
|
|
|
v_mul_legacy_f32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x08]
|
|
|
|
v_mul_legacy_f32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x08]
|
|
|
|
v_mul_legacy_f32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x08]
|
|
|
|
v_mul_legacy_f32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x08]
|
|
|
|
v_mul_legacy_f32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x08]
|
|
|
|
v_mul_legacy_f32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x08]
|
|
|
|
v_mul_legacy_f32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x08]
|
|
|
|
v_mul_legacy_f32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x08]
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|
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v_mul_legacy_f32 v5, exec_lo, v2
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|
// CHECK: [0x7e,0x04,0x0a,0x08]
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|
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v_mul_legacy_f32 v5, exec_hi, v2
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|
// CHECK: [0x7f,0x04,0x0a,0x08]
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|
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v_mul_legacy_f32 v5, 0, v2
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|
// CHECK: [0x80,0x04,0x0a,0x08]
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|
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v_mul_legacy_f32 v5, -1, v2
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|
// CHECK: [0xc1,0x04,0x0a,0x08]
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|
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v_mul_legacy_f32 v5, 0.5, v2
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|
// CHECK: [0xf0,0x04,0x0a,0x08]
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|
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v_mul_legacy_f32 v5, -4.0, v2
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|
// CHECK: [0xf7,0x04,0x0a,0x08]
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|
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v_mul_legacy_f32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x08,0x56,0x34,0x12,0xaf]
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|
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v_mul_legacy_f32 v5, 0x3f717273, v2
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|
// CHECK: [0xff,0x04,0x0a,0x08,0x73,0x72,0x71,0x3f]
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|
|
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v_mul_legacy_f32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x08]
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|
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v_mul_legacy_f32_e64 v5, v1, v2
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|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0x05,0x02,0x00]
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|
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v_mul_legacy_f32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x04,0xd1,0x01,0x05,0x02,0x00]
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|
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v_mul_legacy_f32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0xff,0x05,0x02,0x00]
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|
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v_mul_legacy_f32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0x04,0x02,0x00]
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|
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v_mul_legacy_f32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x65,0x04,0x02,0x00]
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|
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v_mul_legacy_f32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x66,0x04,0x02,0x00]
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|
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v_mul_legacy_f32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x67,0x04,0x02,0x00]
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|
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v_mul_legacy_f32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x6a,0x04,0x02,0x00]
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|
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v_mul_legacy_f32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x6b,0x04,0x02,0x00]
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|
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v_mul_legacy_f32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x7c,0x04,0x02,0x00]
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|
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v_mul_legacy_f32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x7e,0x04,0x02,0x00]
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|
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v_mul_legacy_f32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x7f,0x04,0x02,0x00]
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|
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v_mul_legacy_f32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x80,0x04,0x02,0x00]
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|
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v_mul_legacy_f32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0xc1,0x04,0x02,0x00]
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|
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v_mul_legacy_f32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0xf0,0x04,0x02,0x00]
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|
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v_mul_legacy_f32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0xf7,0x04,0x02,0x00]
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|
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v_mul_legacy_f32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0xff,0x03,0x00]
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|
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|
v_mul_legacy_f32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0x05,0x00,0x00]
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|
|
|
v_mul_legacy_f32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0xcb,0x00,0x00]
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|
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|
v_mul_legacy_f32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0xcd,0x00,0x00]
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|
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|
v_mul_legacy_f32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_mul_legacy_f32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_mul_legacy_f32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_mul_legacy_f32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_mul_legacy_f32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0xfd,0x00,0x00]
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|
|
|
v_mul_legacy_f32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0xff,0x00,0x00]
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|
|
|
v_mul_legacy_f32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_e64 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0x05,0x02,0x20]
|
|
|
|
v_mul_legacy_f32_e64 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0x05,0x02,0x40]
|
|
|
|
v_mul_legacy_f32_e64 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0x05,0x02,0x60]
|
|
|
|
v_mul_legacy_f32_e64 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x04,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_legacy_f32_e64 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x04,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_legacy_f32_e64 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x04,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_legacy_f32_e64 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x04,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_legacy_f32_e64 v5, v1, v2 mul:2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0x05,0x02,0x08]
|
|
|
|
v_mul_legacy_f32_e64 v5, v1, v2 mul:4
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0x05,0x02,0x10]
|
|
|
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v_mul_legacy_f32_e64 v5, v1, v2 div:2
|
|
// CHECK: [0x05,0x00,0x04,0xd1,0x01,0x05,0x02,0x18]
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|
|
|
v_mul_f32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x0a]
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|
|
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v_mul_f32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x0b]
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|
|
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v_mul_f32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x0a]
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|
|
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v_mul_f32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x0a]
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|
|
|
v_mul_f32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x0a]
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|
|
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v_mul_f32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x0a]
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|
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v_mul_f32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x0a]
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|
|
|
v_mul_f32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x0a]
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|
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v_mul_f32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x0a]
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|
|
|
v_mul_f32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x0a]
|
|
|
|
v_mul_f32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x0a]
|
|
|
|
v_mul_f32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x0a]
|
|
|
|
v_mul_f32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x0a]
|
|
|
|
v_mul_f32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x0a]
|
|
|
|
v_mul_f32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x0a]
|
|
|
|
v_mul_f32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x0a]
|
|
|
|
v_mul_f32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x0a,0x56,0x34,0x12,0xaf]
|
|
|
|
v_mul_f32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x0a,0x73,0x72,0x71,0x3f]
|
|
|
|
v_mul_f32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x0a]
|
|
|
|
v_mul_f32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x05,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_mul_f32_e64 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0x05,0x02,0x20]
|
|
|
|
v_mul_f32_e64 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0x05,0x02,0x40]
|
|
|
|
v_mul_f32_e64 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0x05,0x02,0x60]
|
|
|
|
v_mul_f32_e64 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x05,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x05,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x05,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x05,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f32_e64 v5, v1, v2 mul:2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0x05,0x02,0x08]
|
|
|
|
v_mul_f32_e64 v5, v1, v2 mul:4
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0x05,0x02,0x10]
|
|
|
|
v_mul_f32_e64 v5, v1, v2 div:2
|
|
// CHECK: [0x05,0x00,0x05,0xd1,0x01,0x05,0x02,0x18]
|
|
|
|
v_mul_i32_i24 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x0c]
|
|
|
|
v_mul_i32_i24 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x0d]
|
|
|
|
v_mul_i32_i24 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x0c]
|
|
|
|
v_mul_i32_i24 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x0c]
|
|
|
|
v_mul_i32_i24 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x0c]
|
|
|
|
v_mul_i32_i24 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x0c]
|
|
|
|
v_mul_i32_i24 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x0c]
|
|
|
|
v_mul_i32_i24 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x0c]
|
|
|
|
v_mul_i32_i24 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x0c]
|
|
|
|
v_mul_i32_i24 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x0c]
|
|
|
|
v_mul_i32_i24 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x0c]
|
|
|
|
v_mul_i32_i24 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x0c]
|
|
|
|
v_mul_i32_i24 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x0c]
|
|
|
|
v_mul_i32_i24 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x0c]
|
|
|
|
v_mul_i32_i24 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x0c]
|
|
|
|
v_mul_i32_i24 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x0c]
|
|
|
|
v_mul_i32_i24 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x0c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_mul_i32_i24 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x0c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_mul_i32_i24 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x0c]
|
|
|
|
v_mul_i32_i24_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_i32_i24_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x06,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_mul_i32_i24_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x06,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_mul_hi_i32_i24 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x0e]
|
|
|
|
v_mul_hi_i32_i24 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x0f]
|
|
|
|
v_mul_hi_i32_i24 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x0e]
|
|
|
|
v_mul_hi_i32_i24 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x0e]
|
|
|
|
v_mul_hi_i32_i24 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x0e]
|
|
|
|
v_mul_hi_i32_i24 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x0e]
|
|
|
|
v_mul_hi_i32_i24 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x0e]
|
|
|
|
v_mul_hi_i32_i24 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x0e]
|
|
|
|
v_mul_hi_i32_i24 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x0e]
|
|
|
|
v_mul_hi_i32_i24 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x0e]
|
|
|
|
v_mul_hi_i32_i24 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x0e]
|
|
|
|
v_mul_hi_i32_i24 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x0e]
|
|
|
|
v_mul_hi_i32_i24 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x0e]
|
|
|
|
v_mul_hi_i32_i24 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x0e]
|
|
|
|
v_mul_hi_i32_i24 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x0e]
|
|
|
|
v_mul_hi_i32_i24 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x0e]
|
|
|
|
v_mul_hi_i32_i24 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x0e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_mul_hi_i32_i24 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x0e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_mul_hi_i32_i24 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x0e]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x07,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_mul_hi_i32_i24_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x07,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_mul_u32_u24 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x10]
|
|
|
|
v_mul_u32_u24 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x11]
|
|
|
|
v_mul_u32_u24 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x10]
|
|
|
|
v_mul_u32_u24 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x10]
|
|
|
|
v_mul_u32_u24 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x10]
|
|
|
|
v_mul_u32_u24 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x10]
|
|
|
|
v_mul_u32_u24 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x10]
|
|
|
|
v_mul_u32_u24 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x10]
|
|
|
|
v_mul_u32_u24 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x10]
|
|
|
|
v_mul_u32_u24 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x10]
|
|
|
|
v_mul_u32_u24 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x10]
|
|
|
|
v_mul_u32_u24 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x10]
|
|
|
|
v_mul_u32_u24 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x10]
|
|
|
|
v_mul_u32_u24 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x10]
|
|
|
|
v_mul_u32_u24 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x10]
|
|
|
|
v_mul_u32_u24 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x10]
|
|
|
|
v_mul_u32_u24 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x10,0x56,0x34,0x12,0xaf]
|
|
|
|
v_mul_u32_u24 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x10,0x73,0x72,0x71,0x3f]
|
|
|
|
v_mul_u32_u24 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x10]
|
|
|
|
v_mul_u32_u24_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_u32_u24_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x08,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_mul_u32_u24_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x08,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x12]
|
|
|
|
v_mul_hi_u32_u24 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x13]
|
|
|
|
v_mul_hi_u32_u24 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x12]
|
|
|
|
v_mul_hi_u32_u24 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x12]
|
|
|
|
v_mul_hi_u32_u24 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x12]
|
|
|
|
v_mul_hi_u32_u24 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x12]
|
|
|
|
v_mul_hi_u32_u24 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x12]
|
|
|
|
v_mul_hi_u32_u24 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x12]
|
|
|
|
v_mul_hi_u32_u24 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x12]
|
|
|
|
v_mul_hi_u32_u24 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x12]
|
|
|
|
v_mul_hi_u32_u24 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x12]
|
|
|
|
v_mul_hi_u32_u24 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x12]
|
|
|
|
v_mul_hi_u32_u24 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x12]
|
|
|
|
v_mul_hi_u32_u24 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x12]
|
|
|
|
v_mul_hi_u32_u24 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x12]
|
|
|
|
v_mul_hi_u32_u24 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x12]
|
|
|
|
v_mul_hi_u32_u24 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x12,0x56,0x34,0x12,0xaf]
|
|
|
|
v_mul_hi_u32_u24 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x12,0x73,0x72,0x71,0x3f]
|
|
|
|
v_mul_hi_u32_u24 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x12]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x09,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x09,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_min_f32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x14]
|
|
|
|
v_min_f32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x15]
|
|
|
|
v_min_f32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x14]
|
|
|
|
v_min_f32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x14]
|
|
|
|
v_min_f32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x14]
|
|
|
|
v_min_f32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x14]
|
|
|
|
v_min_f32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x14]
|
|
|
|
v_min_f32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x14]
|
|
|
|
v_min_f32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x14]
|
|
|
|
v_min_f32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x14]
|
|
|
|
v_min_f32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x14]
|
|
|
|
v_min_f32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x14]
|
|
|
|
v_min_f32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x14]
|
|
|
|
v_min_f32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x14]
|
|
|
|
v_min_f32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x14]
|
|
|
|
v_min_f32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x14]
|
|
|
|
v_min_f32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x14,0x56,0x34,0x12,0xaf]
|
|
|
|
v_min_f32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x14,0x73,0x72,0x71,0x3f]
|
|
|
|
v_min_f32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x14]
|
|
|
|
v_min_f32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x0a,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_min_f32_e64 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0x05,0x02,0x20]
|
|
|
|
v_min_f32_e64 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0x05,0x02,0x40]
|
|
|
|
v_min_f32_e64 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0x05,0x02,0x60]
|
|
|
|
v_min_f32_e64 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x0a,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x0a,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x0a,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x0a,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f32_e64 v5, v1, v2 mul:2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0x05,0x02,0x08]
|
|
|
|
v_min_f32_e64 v5, v1, v2 mul:4
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0x05,0x02,0x10]
|
|
|
|
v_min_f32_e64 v5, v1, v2 div:2
|
|
// CHECK: [0x05,0x00,0x0a,0xd1,0x01,0x05,0x02,0x18]
|
|
|
|
v_max_f32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x16]
|
|
|
|
v_max_f32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x17]
|
|
|
|
v_max_f32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x16]
|
|
|
|
v_max_f32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x16]
|
|
|
|
v_max_f32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x16]
|
|
|
|
v_max_f32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x16]
|
|
|
|
v_max_f32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x16]
|
|
|
|
v_max_f32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x16]
|
|
|
|
v_max_f32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x16]
|
|
|
|
v_max_f32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x16]
|
|
|
|
v_max_f32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x16]
|
|
|
|
v_max_f32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x16]
|
|
|
|
v_max_f32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x16]
|
|
|
|
v_max_f32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x16]
|
|
|
|
v_max_f32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x16]
|
|
|
|
v_max_f32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x16]
|
|
|
|
v_max_f32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x16,0x56,0x34,0x12,0xaf]
|
|
|
|
v_max_f32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x16,0x73,0x72,0x71,0x3f]
|
|
|
|
v_max_f32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x16]
|
|
|
|
v_max_f32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x0b,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_max_f32_e64 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0x05,0x02,0x20]
|
|
|
|
v_max_f32_e64 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0x05,0x02,0x40]
|
|
|
|
v_max_f32_e64 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0x05,0x02,0x60]
|
|
|
|
v_max_f32_e64 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x0b,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x0b,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x0b,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x0b,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f32_e64 v5, v1, v2 mul:2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0x05,0x02,0x08]
|
|
|
|
v_max_f32_e64 v5, v1, v2 mul:4
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0x05,0x02,0x10]
|
|
|
|
v_max_f32_e64 v5, v1, v2 div:2
|
|
// CHECK: [0x05,0x00,0x0b,0xd1,0x01,0x05,0x02,0x18]
|
|
|
|
v_min_i32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x18]
|
|
|
|
v_min_i32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x19]
|
|
|
|
v_min_i32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x18]
|
|
|
|
v_min_i32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x18]
|
|
|
|
v_min_i32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x18]
|
|
|
|
v_min_i32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x18]
|
|
|
|
v_min_i32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x18]
|
|
|
|
v_min_i32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x18]
|
|
|
|
v_min_i32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x18]
|
|
|
|
v_min_i32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x18]
|
|
|
|
v_min_i32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x18]
|
|
|
|
v_min_i32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x18]
|
|
|
|
v_min_i32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x18]
|
|
|
|
v_min_i32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x18]
|
|
|
|
v_min_i32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x18]
|
|
|
|
v_min_i32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x18]
|
|
|
|
v_min_i32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x18,0x56,0x34,0x12,0xaf]
|
|
|
|
v_min_i32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x18,0x73,0x72,0x71,0x3f]
|
|
|
|
v_min_i32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x18]
|
|
|
|
v_min_i32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_i32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x0c,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_i32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_min_i32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_min_i32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_min_i32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_min_i32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_min_i32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_min_i32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_min_i32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_min_i32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_min_i32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_min_i32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_min_i32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_min_i32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_min_i32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_min_i32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_min_i32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_min_i32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_min_i32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_min_i32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_min_i32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_min_i32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_min_i32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_min_i32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_min_i32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_min_i32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_min_i32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_min_i32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_min_i32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x0c,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_max_i32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x1a]
|
|
|
|
v_max_i32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x1b]
|
|
|
|
v_max_i32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x1a]
|
|
|
|
v_max_i32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x1a]
|
|
|
|
v_max_i32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x1a]
|
|
|
|
v_max_i32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x1a]
|
|
|
|
v_max_i32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x1a]
|
|
|
|
v_max_i32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x1a]
|
|
|
|
v_max_i32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x1a]
|
|
|
|
v_max_i32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x1a]
|
|
|
|
v_max_i32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x1a]
|
|
|
|
v_max_i32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x1a]
|
|
|
|
v_max_i32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x1a]
|
|
|
|
v_max_i32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x1a]
|
|
|
|
v_max_i32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x1a]
|
|
|
|
v_max_i32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x1a]
|
|
|
|
v_max_i32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x1a,0x56,0x34,0x12,0xaf]
|
|
|
|
v_max_i32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x1a,0x73,0x72,0x71,0x3f]
|
|
|
|
v_max_i32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x1a]
|
|
|
|
v_max_i32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_i32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x0d,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_i32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_max_i32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_max_i32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_max_i32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_max_i32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_max_i32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_max_i32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_max_i32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_max_i32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_max_i32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_max_i32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_max_i32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_max_i32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_max_i32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_max_i32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_max_i32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_max_i32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_max_i32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_max_i32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_max_i32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_max_i32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_max_i32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_max_i32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_max_i32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_max_i32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_max_i32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_max_i32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_max_i32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x0d,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_min_u32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x1c]
|
|
|
|
v_min_u32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x1d]
|
|
|
|
v_min_u32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x1c]
|
|
|
|
v_min_u32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x1c]
|
|
|
|
v_min_u32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x1c]
|
|
|
|
v_min_u32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x1c]
|
|
|
|
v_min_u32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x1c]
|
|
|
|
v_min_u32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x1c]
|
|
|
|
v_min_u32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x1c]
|
|
|
|
v_min_u32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x1c]
|
|
|
|
v_min_u32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x1c]
|
|
|
|
v_min_u32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x1c]
|
|
|
|
v_min_u32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x1c]
|
|
|
|
v_min_u32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x1c]
|
|
|
|
v_min_u32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x1c]
|
|
|
|
v_min_u32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x1c]
|
|
|
|
v_min_u32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x1c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_min_u32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x1c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_min_u32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x1c]
|
|
|
|
v_min_u32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_u32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x0e,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_u32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_min_u32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_min_u32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_min_u32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_min_u32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_min_u32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_min_u32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_min_u32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_min_u32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_min_u32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_min_u32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_min_u32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_min_u32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_min_u32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_min_u32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_min_u32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_min_u32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_min_u32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_min_u32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_min_u32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_min_u32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_min_u32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_min_u32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_min_u32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_min_u32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_min_u32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_min_u32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_min_u32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x0e,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_max_u32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x1e]
|
|
|
|
v_max_u32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x1f]
|
|
|
|
v_max_u32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x1e]
|
|
|
|
v_max_u32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x1e]
|
|
|
|
v_max_u32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x1e]
|
|
|
|
v_max_u32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x1e]
|
|
|
|
v_max_u32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x1e]
|
|
|
|
v_max_u32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x1e]
|
|
|
|
v_max_u32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x1e]
|
|
|
|
v_max_u32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x1e]
|
|
|
|
v_max_u32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x1e]
|
|
|
|
v_max_u32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x1e]
|
|
|
|
v_max_u32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x1e]
|
|
|
|
v_max_u32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x1e]
|
|
|
|
v_max_u32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x1e]
|
|
|
|
v_max_u32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x1e]
|
|
|
|
v_max_u32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x1e,0x56,0x34,0x12,0xaf]
|
|
|
|
v_max_u32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x1e,0x73,0x72,0x71,0x3f]
|
|
|
|
v_max_u32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x1e]
|
|
|
|
v_max_u32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_u32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x0f,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_u32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_max_u32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_max_u32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_max_u32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_max_u32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_max_u32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_max_u32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_max_u32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_max_u32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_max_u32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_max_u32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_max_u32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_max_u32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_max_u32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_max_u32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_max_u32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_max_u32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_max_u32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_max_u32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_max_u32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_max_u32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_max_u32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_max_u32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_max_u32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_max_u32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_max_u32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_max_u32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_max_u32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x0f,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_lshrrev_b32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x20]
|
|
|
|
v_lshrrev_b32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x21]
|
|
|
|
v_lshrrev_b32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x20]
|
|
|
|
v_lshrrev_b32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x20]
|
|
|
|
v_lshrrev_b32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x20]
|
|
|
|
v_lshrrev_b32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x20]
|
|
|
|
v_lshrrev_b32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x20]
|
|
|
|
v_lshrrev_b32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x20]
|
|
|
|
v_lshrrev_b32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x20]
|
|
|
|
v_lshrrev_b32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x20]
|
|
|
|
v_lshrrev_b32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x20]
|
|
|
|
v_lshrrev_b32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x20]
|
|
|
|
v_lshrrev_b32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x20]
|
|
|
|
v_lshrrev_b32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x20]
|
|
|
|
v_lshrrev_b32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x20]
|
|
|
|
v_lshrrev_b32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x20]
|
|
|
|
v_lshrrev_b32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x20,0x56,0x34,0x12,0xaf]
|
|
|
|
v_lshrrev_b32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x20,0x73,0x72,0x71,0x3f]
|
|
|
|
v_lshrrev_b32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x20]
|
|
|
|
v_lshrrev_b32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_lshrrev_b32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x10,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_lshrrev_b32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x10,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_ashrrev_i32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x22]
|
|
|
|
v_ashrrev_i32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x23]
|
|
|
|
v_ashrrev_i32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x22]
|
|
|
|
v_ashrrev_i32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x22]
|
|
|
|
v_ashrrev_i32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x22]
|
|
|
|
v_ashrrev_i32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x22]
|
|
|
|
v_ashrrev_i32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x22]
|
|
|
|
v_ashrrev_i32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x22]
|
|
|
|
v_ashrrev_i32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x22]
|
|
|
|
v_ashrrev_i32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x22]
|
|
|
|
v_ashrrev_i32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x22]
|
|
|
|
v_ashrrev_i32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x22]
|
|
|
|
v_ashrrev_i32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x22]
|
|
|
|
v_ashrrev_i32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x22]
|
|
|
|
v_ashrrev_i32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x22]
|
|
|
|
v_ashrrev_i32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x22]
|
|
|
|
v_ashrrev_i32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x22,0x56,0x34,0x12,0xaf]
|
|
|
|
v_ashrrev_i32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x22,0x73,0x72,0x71,0x3f]
|
|
|
|
v_ashrrev_i32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x22]
|
|
|
|
v_ashrrev_i32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_ashrrev_i32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x11,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_ashrrev_i32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x11,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_lshlrev_b32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x24]
|
|
|
|
v_lshlrev_b32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x25]
|
|
|
|
v_lshlrev_b32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x24]
|
|
|
|
v_lshlrev_b32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x24]
|
|
|
|
v_lshlrev_b32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x24]
|
|
|
|
v_lshlrev_b32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x24]
|
|
|
|
v_lshlrev_b32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x24]
|
|
|
|
v_lshlrev_b32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x24]
|
|
|
|
v_lshlrev_b32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x24]
|
|
|
|
v_lshlrev_b32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x24]
|
|
|
|
v_lshlrev_b32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x24]
|
|
|
|
v_lshlrev_b32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x24]
|
|
|
|
v_lshlrev_b32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x24]
|
|
|
|
v_lshlrev_b32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x24]
|
|
|
|
v_lshlrev_b32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x24]
|
|
|
|
v_lshlrev_b32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x24]
|
|
|
|
v_lshlrev_b32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x24,0x56,0x34,0x12,0xaf]
|
|
|
|
v_lshlrev_b32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x24,0x73,0x72,0x71,0x3f]
|
|
|
|
v_lshlrev_b32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x24]
|
|
|
|
v_lshlrev_b32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_lshlrev_b32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x12,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_lshlrev_b32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x12,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_and_b32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x26]
|
|
|
|
v_and_b32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x27]
|
|
|
|
v_and_b32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x26]
|
|
|
|
v_and_b32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x26]
|
|
|
|
v_and_b32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x26]
|
|
|
|
v_and_b32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x26]
|
|
|
|
v_and_b32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x26]
|
|
|
|
v_and_b32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x26]
|
|
|
|
v_and_b32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x26]
|
|
|
|
v_and_b32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x26]
|
|
|
|
v_and_b32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x26]
|
|
|
|
v_and_b32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x26]
|
|
|
|
v_and_b32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x26]
|
|
|
|
v_and_b32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x26]
|
|
|
|
v_and_b32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x26]
|
|
|
|
v_and_b32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x26]
|
|
|
|
v_and_b32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x26,0x56,0x34,0x12,0xaf]
|
|
|
|
v_and_b32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x26,0x73,0x72,0x71,0x3f]
|
|
|
|
v_and_b32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x26]
|
|
|
|
v_and_b32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_and_b32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x13,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_and_b32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_and_b32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_and_b32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_and_b32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_and_b32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_and_b32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_and_b32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_and_b32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_and_b32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_and_b32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_and_b32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_and_b32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_and_b32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_and_b32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_and_b32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_and_b32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_and_b32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_and_b32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_and_b32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_and_b32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_and_b32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_and_b32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_and_b32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_and_b32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_and_b32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_and_b32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_and_b32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_and_b32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x13,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_or_b32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x28]
|
|
|
|
v_or_b32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x29]
|
|
|
|
v_or_b32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x28]
|
|
|
|
v_or_b32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x28]
|
|
|
|
v_or_b32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x28]
|
|
|
|
v_or_b32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x28]
|
|
|
|
v_or_b32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x28]
|
|
|
|
v_or_b32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x28]
|
|
|
|
v_or_b32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x28]
|
|
|
|
v_or_b32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x28]
|
|
|
|
v_or_b32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x28]
|
|
|
|
v_or_b32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x28]
|
|
|
|
v_or_b32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x28]
|
|
|
|
v_or_b32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x28]
|
|
|
|
v_or_b32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x28]
|
|
|
|
v_or_b32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x28]
|
|
|
|
v_or_b32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x28,0x56,0x34,0x12,0xaf]
|
|
|
|
v_or_b32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x28,0x73,0x72,0x71,0x3f]
|
|
|
|
v_or_b32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x28]
|
|
|
|
v_or_b32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_or_b32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x14,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_or_b32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_or_b32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_or_b32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_or_b32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_or_b32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_or_b32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_or_b32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_or_b32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_or_b32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_or_b32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_or_b32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_or_b32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_or_b32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_or_b32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_or_b32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_or_b32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_or_b32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_or_b32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_or_b32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_or_b32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_or_b32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_or_b32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_or_b32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_or_b32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_or_b32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_or_b32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_or_b32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_or_b32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x14,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_xor_b32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x2a]
|
|
|
|
v_xor_b32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x2b]
|
|
|
|
v_xor_b32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x2a]
|
|
|
|
v_xor_b32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x2a]
|
|
|
|
v_xor_b32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x2a]
|
|
|
|
v_xor_b32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x2a]
|
|
|
|
v_xor_b32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x2a]
|
|
|
|
v_xor_b32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x2a]
|
|
|
|
v_xor_b32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x2a]
|
|
|
|
v_xor_b32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x2a]
|
|
|
|
v_xor_b32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x2a]
|
|
|
|
v_xor_b32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x2a]
|
|
|
|
v_xor_b32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x2a]
|
|
|
|
v_xor_b32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x2a]
|
|
|
|
v_xor_b32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x2a]
|
|
|
|
v_xor_b32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x2a]
|
|
|
|
v_xor_b32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x2a,0x56,0x34,0x12,0xaf]
|
|
|
|
v_xor_b32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x2a,0x73,0x72,0x71,0x3f]
|
|
|
|
v_xor_b32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x2a]
|
|
|
|
v_xor_b32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_xor_b32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x15,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_xor_b32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_xor_b32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_xor_b32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_xor_b32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_xor_b32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_xor_b32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_xor_b32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_xor_b32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_xor_b32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_xor_b32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_xor_b32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_xor_b32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_xor_b32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_xor_b32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_xor_b32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_xor_b32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_xor_b32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_xor_b32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_xor_b32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_xor_b32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_xor_b32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_xor_b32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_xor_b32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x15,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_xor_b32_e64 v5, v1, exec_hi
|
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// CHECK: [0x05,0x00,0x15,0xd1,0x01,0xff,0x00,0x00]
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v_xor_b32_e64 v5, v1, 0
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// CHECK: [0x05,0x00,0x15,0xd1,0x01,0x01,0x01,0x00]
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v_xor_b32_e64 v5, v1, -1
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// CHECK: [0x05,0x00,0x15,0xd1,0x01,0x83,0x01,0x00]
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v_xor_b32_e64 v5, v1, 0.5
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// CHECK: [0x05,0x00,0x15,0xd1,0x01,0xe1,0x01,0x00]
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v_xor_b32_e64 v5, v1, -4.0
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// CHECK: [0x05,0x00,0x15,0xd1,0x01,0xef,0x01,0x00]
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v_mac_f32 v5, v1, v2
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// CHECK: [0x01,0x05,0x0a,0x2c]
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v_mac_f32 v255, v1, v2
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// CHECK: [0x01,0x05,0xfe,0x2d]
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v_mac_f32 v5, v255, v2
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// CHECK: [0xff,0x05,0x0a,0x2c]
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v_mac_f32 v5, s1, v2
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// CHECK: [0x01,0x04,0x0a,0x2c]
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v_mac_f32 v5, s101, v2
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// CHECK: [0x65,0x04,0x0a,0x2c]
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v_mac_f32 v5, flat_scratch_lo, v2
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// CHECK: [0x66,0x04,0x0a,0x2c]
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v_mac_f32 v5, flat_scratch_hi, v2
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// CHECK: [0x67,0x04,0x0a,0x2c]
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v_mac_f32 v5, vcc_lo, v2
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// CHECK: [0x6a,0x04,0x0a,0x2c]
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v_mac_f32 v5, vcc_hi, v2
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// CHECK: [0x6b,0x04,0x0a,0x2c]
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v_mac_f32 v5, m0, v2
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// CHECK: [0x7c,0x04,0x0a,0x2c]
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v_mac_f32 v5, exec_lo, v2
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// CHECK: [0x7e,0x04,0x0a,0x2c]
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v_mac_f32 v5, exec_hi, v2
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// CHECK: [0x7f,0x04,0x0a,0x2c]
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v_mac_f32 v5, 0, v2
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// CHECK: [0x80,0x04,0x0a,0x2c]
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v_mac_f32 v5, -1, v2
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// CHECK: [0xc1,0x04,0x0a,0x2c]
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v_mac_f32 v5, 0.5, v2
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// CHECK: [0xf0,0x04,0x0a,0x2c]
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v_mac_f32 v5, -4.0, v2
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// CHECK: [0xf7,0x04,0x0a,0x2c]
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v_mac_f32 v5, 0xaf123456, v2
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// CHECK: [0xff,0x04,0x0a,0x2c,0x56,0x34,0x12,0xaf]
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v_mac_f32 v5, 0x3f717273, v2
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// CHECK: [0xff,0x04,0x0a,0x2c,0x73,0x72,0x71,0x3f]
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v_mac_f32 v5, v1, v255
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// CHECK: [0x01,0xff,0x0b,0x2c]
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v_mac_f32_e64 v5, v1, v2
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0x05,0x02,0x00]
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v_mac_f32_e64 v255, v1, v2
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// CHECK: [0xff,0x00,0x16,0xd1,0x01,0x05,0x02,0x00]
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v_mac_f32_e64 v5, v255, v2
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// CHECK: [0x05,0x00,0x16,0xd1,0xff,0x05,0x02,0x00]
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v_mac_f32_e64 v5, s1, v2
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0x04,0x02,0x00]
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v_mac_f32_e64 v5, s101, v2
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// CHECK: [0x05,0x00,0x16,0xd1,0x65,0x04,0x02,0x00]
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v_mac_f32_e64 v5, flat_scratch_lo, v2
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// CHECK: [0x05,0x00,0x16,0xd1,0x66,0x04,0x02,0x00]
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v_mac_f32_e64 v5, flat_scratch_hi, v2
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// CHECK: [0x05,0x00,0x16,0xd1,0x67,0x04,0x02,0x00]
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v_mac_f32_e64 v5, vcc_lo, v2
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// CHECK: [0x05,0x00,0x16,0xd1,0x6a,0x04,0x02,0x00]
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v_mac_f32_e64 v5, vcc_hi, v2
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// CHECK: [0x05,0x00,0x16,0xd1,0x6b,0x04,0x02,0x00]
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v_mac_f32_e64 v5, m0, v2
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// CHECK: [0x05,0x00,0x16,0xd1,0x7c,0x04,0x02,0x00]
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v_mac_f32_e64 v5, exec_lo, v2
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// CHECK: [0x05,0x00,0x16,0xd1,0x7e,0x04,0x02,0x00]
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v_mac_f32_e64 v5, exec_hi, v2
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// CHECK: [0x05,0x00,0x16,0xd1,0x7f,0x04,0x02,0x00]
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v_mac_f32_e64 v5, 0, v2
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// CHECK: [0x05,0x00,0x16,0xd1,0x80,0x04,0x02,0x00]
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v_mac_f32_e64 v5, -1, v2
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// CHECK: [0x05,0x00,0x16,0xd1,0xc1,0x04,0x02,0x00]
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v_mac_f32_e64 v5, 0.5, v2
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// CHECK: [0x05,0x00,0x16,0xd1,0xf0,0x04,0x02,0x00]
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v_mac_f32_e64 v5, -4.0, v2
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// CHECK: [0x05,0x00,0x16,0xd1,0xf7,0x04,0x02,0x00]
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v_mac_f32_e64 v5, v1, v255
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0xff,0x03,0x00]
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v_mac_f32_e64 v5, v1, s2
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0x05,0x00,0x00]
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v_mac_f32_e64 v5, v1, s101
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0xcb,0x00,0x00]
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v_mac_f32_e64 v5, v1, flat_scratch_lo
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0xcd,0x00,0x00]
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v_mac_f32_e64 v5, v1, flat_scratch_hi
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0xcf,0x00,0x00]
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v_mac_f32_e64 v5, v1, vcc_lo
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0xd5,0x00,0x00]
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v_mac_f32_e64 v5, v1, vcc_hi
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0xd7,0x00,0x00]
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v_mac_f32_e64 v5, v1, m0
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0xf9,0x00,0x00]
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v_mac_f32_e64 v5, v1, exec_lo
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0xfd,0x00,0x00]
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v_mac_f32_e64 v5, v1, exec_hi
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0xff,0x00,0x00]
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v_mac_f32_e64 v5, v1, 0
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0x01,0x01,0x00]
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v_mac_f32_e64 v5, v1, -1
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0x83,0x01,0x00]
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v_mac_f32_e64 v5, v1, 0.5
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0xe1,0x01,0x00]
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v_mac_f32_e64 v5, v1, -4.0
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0xef,0x01,0x00]
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v_mac_f32_e64 v5, -v1, v2
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0x05,0x02,0x20]
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v_mac_f32_e64 v5, v1, -v2
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0x05,0x02,0x40]
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v_mac_f32_e64 v5, -v1, -v2
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0x05,0x02,0x60]
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v_mac_f32_e64 v5, |v1|, v2
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// CHECK: [0x05,0x01,0x16,0xd1,0x01,0x05,0x02,0x00]
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v_mac_f32_e64 v5, v1, |v2|
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// CHECK: [0x05,0x02,0x16,0xd1,0x01,0x05,0x02,0x00]
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v_mac_f32_e64 v5, |v1|, |v2|
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// CHECK: [0x05,0x03,0x16,0xd1,0x01,0x05,0x02,0x00]
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v_mac_f32_e64 v5, v1, v2 clamp
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// CHECK: [0x05,0x80,0x16,0xd1,0x01,0x05,0x02,0x00]
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v_mac_f32_e64 v5, v1, v2 mul:2
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0x05,0x02,0x08]
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v_mac_f32_e64 v5, v1, v2 mul:4
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0x05,0x02,0x10]
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v_mac_f32_e64 v5, v1, v2 div:2
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// CHECK: [0x05,0x00,0x16,0xd1,0x01,0x05,0x02,0x18]
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v_madmk_f32 v5, v1, 0x11213141, v3
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// CHECK: [0x01,0x07,0x0a,0x2e,0x41,0x31,0x21,0x11]
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v_madmk_f32 v255, v1, 0x11213141, v3
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// CHECK: [0x01,0x07,0xfe,0x2f,0x41,0x31,0x21,0x11]
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v_madmk_f32 v5, v255, 0x11213141, v3
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// CHECK: [0xff,0x07,0x0a,0x2e,0x41,0x31,0x21,0x11]
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v_madmk_f32 v5, 0, 0x11213141, v3
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// CHECK: [0x80,0x06,0x0a,0x2e,0x41,0x31,0x21,0x11]
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v_madmk_f32 v5, -1, 0x11213141, v3
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// CHECK: [0xc1,0x06,0x0a,0x2e,0x41,0x31,0x21,0x11]
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v_madmk_f32 v5, 0.5, 0x11213141, v3
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// CHECK: [0xf0,0x06,0x0a,0x2e,0x41,0x31,0x21,0x11]
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v_madmk_f32 v5, -4.0, 0x11213141, v3
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// CHECK: [0xf7,0x06,0x0a,0x2e,0x41,0x31,0x21,0x11]
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v_madmk_f32 v5, v1, 0xa1b1c1d1, v3
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// CHECK: [0x01,0x07,0x0a,0x2e,0xd1,0xc1,0xb1,0xa1]
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v_madmk_f32 v5, v1, 0x11213141, v255
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// CHECK: [0x01,0xff,0x0b,0x2e,0x41,0x31,0x21,0x11]
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v_madak_f32 v5, v1, v2, 0x11213141
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// CHECK: [0x01,0x05,0x0a,0x30,0x41,0x31,0x21,0x11]
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v_madak_f32 v255, v1, v2, 0x11213141
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// CHECK: [0x01,0x05,0xfe,0x31,0x41,0x31,0x21,0x11]
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v_madak_f32 v5, v255, v2, 0x11213141
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// CHECK: [0xff,0x05,0x0a,0x30,0x41,0x31,0x21,0x11]
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v_madak_f32 v5, 0, v2, 0x11213141
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// CHECK: [0x80,0x04,0x0a,0x30,0x41,0x31,0x21,0x11]
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v_madak_f32 v5, -1, v2, 0x11213141
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// CHECK: [0xc1,0x04,0x0a,0x30,0x41,0x31,0x21,0x11]
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v_madak_f32 v5, 0.5, v2, 0x11213141
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// CHECK: [0xf0,0x04,0x0a,0x30,0x41,0x31,0x21,0x11]
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v_madak_f32 v5, -4.0, v2, 0x11213141
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// CHECK: [0xf7,0x04,0x0a,0x30,0x41,0x31,0x21,0x11]
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v_madak_f32 v5, v1, v255, 0x11213141
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// CHECK: [0x01,0xff,0x0b,0x30,0x41,0x31,0x21,0x11]
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v_madak_f32 v5, v1, v2, 0xa1b1c1d1
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// CHECK: [0x01,0x05,0x0a,0x30,0xd1,0xc1,0xb1,0xa1]
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v_add_co_u32 v5, vcc, v1, v2
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// CHECK: [0x01,0x05,0x0a,0x32]
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v_add_co_u32 v255, vcc, v1, v2
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// CHECK: [0x01,0x05,0xfe,0x33]
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v_add_co_u32 v5, vcc, v255, v2
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// CHECK: [0xff,0x05,0x0a,0x32]
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v_add_co_u32 v5, vcc, s1, v2
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// CHECK: [0x01,0x04,0x0a,0x32]
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v_add_co_u32 v5, vcc, s101, v2
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// CHECK: [0x65,0x04,0x0a,0x32]
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v_add_co_u32 v5, vcc, flat_scratch_lo, v2
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// CHECK: [0x66,0x04,0x0a,0x32]
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v_add_co_u32 v5, vcc, flat_scratch_hi, v2
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// CHECK: [0x67,0x04,0x0a,0x32]
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v_add_co_u32 v5, vcc, vcc_lo, v2
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// CHECK: [0x6a,0x04,0x0a,0x32]
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v_add_co_u32 v5, vcc, vcc_hi, v2
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// CHECK: [0x6b,0x04,0x0a,0x32]
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v_add_co_u32 v5, vcc, m0, v2
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// CHECK: [0x7c,0x04,0x0a,0x32]
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v_add_co_u32 v5, vcc, exec_lo, v2
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// CHECK: [0x7e,0x04,0x0a,0x32]
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v_add_co_u32 v5, vcc, exec_hi, v2
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// CHECK: [0x7f,0x04,0x0a,0x32]
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v_add_co_u32 v5, vcc, 0, v2
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// CHECK: [0x80,0x04,0x0a,0x32]
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v_add_co_u32 v5, vcc, -1, v2
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// CHECK: [0xc1,0x04,0x0a,0x32]
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v_add_co_u32 v5, vcc, 0.5, v2
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// CHECK: [0xf0,0x04,0x0a,0x32]
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v_add_co_u32 v5, vcc, -4.0, v2
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// CHECK: [0xf7,0x04,0x0a,0x32]
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v_add_co_u32 v5, vcc, 0xaf123456, v2
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// CHECK: [0xff,0x04,0x0a,0x32,0x56,0x34,0x12,0xaf]
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v_add_co_u32 v5, vcc, 0x3f717273, v2
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// CHECK: [0xff,0x04,0x0a,0x32,0x73,0x72,0x71,0x3f]
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v_add_co_u32 v5, vcc, v1, v255
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// CHECK: [0x01,0xff,0x0b,0x32]
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v_add_co_u32_e64 v5, s[12:13], v1, v2
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// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0x05,0x02,0x00]
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v_add_co_u32_e64 v255, s[12:13], v1, v2
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// CHECK: [0xff,0x0c,0x19,0xd1,0x01,0x05,0x02,0x00]
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v_add_co_u32_e64 v5, s[14:15], v1, v2
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// CHECK: [0x05,0x0e,0x19,0xd1,0x01,0x05,0x02,0x00]
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v_add_co_u32_e64 v5, s[100:101], v1, v2
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// CHECK: [0x05,0x64,0x19,0xd1,0x01,0x05,0x02,0x00]
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v_add_co_u32_e64 v5, flat_scratch, v1, v2
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// CHECK: [0x05,0x66,0x19,0xd1,0x01,0x05,0x02,0x00]
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v_add_co_u32_e64 v5, vcc, v1, v2
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// CHECK: [0x05,0x6a,0x19,0xd1,0x01,0x05,0x02,0x00]
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v_add_co_u32_e64 v5, s[12:13], v255, v2
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// CHECK: [0x05,0x0c,0x19,0xd1,0xff,0x05,0x02,0x00]
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v_add_co_u32_e64 v5, s[12:13], s1, v2
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// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0x04,0x02,0x00]
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v_add_co_u32_e64 v5, s[12:13], s101, v2
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// CHECK: [0x05,0x0c,0x19,0xd1,0x65,0x04,0x02,0x00]
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v_add_co_u32_e64 v5, s[12:13], flat_scratch_lo, v2
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// CHECK: [0x05,0x0c,0x19,0xd1,0x66,0x04,0x02,0x00]
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v_add_co_u32_e64 v5, s[12:13], flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], vcc_lo, v2
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], vcc_hi, v2
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], m0, v2
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], exec_lo, v2
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], exec_hi, v2
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], 0, v2
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], -1, v2
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], 0.5, v2
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], -4.0, v2
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], v1, v255
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], v1, s2
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], v1, s101
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], v1, vcc_lo
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], v1, vcc_hi
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], v1, m0
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], v1, exec_lo
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], v1, exec_hi
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], v1, 0
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], v1, -1
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], v1, 0.5
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_add_co_u32_e64 v5, s[12:13], v1, -4.0
|
|
// CHECK: [0x05,0x0c,0x19,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_sub_co_u32 v5, vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x34]
|
|
|
|
v_sub_co_u32 v255, vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x35]
|
|
|
|
v_sub_co_u32 v5, vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x34]
|
|
|
|
v_sub_co_u32 v5, vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x34]
|
|
|
|
v_sub_co_u32 v5, vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x34]
|
|
|
|
v_sub_co_u32 v5, vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x34]
|
|
|
|
v_sub_co_u32 v5, vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x34]
|
|
|
|
v_sub_co_u32 v5, vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x34]
|
|
|
|
v_sub_co_u32 v5, vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x34]
|
|
|
|
v_sub_co_u32 v5, vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x34]
|
|
|
|
v_sub_co_u32 v5, vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x34]
|
|
|
|
v_sub_co_u32 v5, vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x34]
|
|
|
|
v_sub_co_u32 v5, vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x34]
|
|
|
|
v_sub_co_u32 v5, vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x34]
|
|
|
|
v_sub_co_u32 v5, vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x34]
|
|
|
|
v_sub_co_u32 v5, vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x34]
|
|
|
|
v_sub_co_u32 v5, vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x34,0x56,0x34,0x12,0xaf]
|
|
|
|
v_sub_co_u32 v5, vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x34,0x73,0x72,0x71,0x3f]
|
|
|
|
v_sub_co_u32 v5, vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x34]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], v1, v2
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v255, s[12:13], v1, v2
|
|
// CHECK: [0xff,0x0c,0x1a,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[14:15], v1, v2
|
|
// CHECK: [0x05,0x0e,0x1a,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[100:101], v1, v2
|
|
// CHECK: [0x05,0x64,0x1a,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, flat_scratch, v1, v2
|
|
// CHECK: [0x05,0x66,0x1a,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, vcc, v1, v2
|
|
// CHECK: [0x05,0x6a,0x1a,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], v255, v2
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], s1, v2
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], s101, v2
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], vcc_lo, v2
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], vcc_hi, v2
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], m0, v2
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], exec_lo, v2
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], exec_hi, v2
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], 0, v2
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], -1, v2
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], 0.5, v2
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], -4.0, v2
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], v1, v255
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], v1, s2
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], v1, s101
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], v1, vcc_lo
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], v1, vcc_hi
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], v1, m0
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], v1, exec_lo
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], v1, exec_hi
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], v1, 0
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], v1, -1
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], v1, 0.5
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_sub_co_u32_e64 v5, s[12:13], v1, -4.0
|
|
// CHECK: [0x05,0x0c,0x1a,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_subrev_co_u32 v5, vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x36]
|
|
|
|
v_subrev_co_u32 v255, vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x37]
|
|
|
|
v_subrev_co_u32 v5, vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x36]
|
|
|
|
v_subrev_co_u32 v5, vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x36]
|
|
|
|
v_subrev_co_u32 v5, vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x36]
|
|
|
|
v_subrev_co_u32 v5, vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x36]
|
|
|
|
v_subrev_co_u32 v5, vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x36]
|
|
|
|
v_subrev_co_u32 v5, vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x36]
|
|
|
|
v_subrev_co_u32 v5, vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x36]
|
|
|
|
v_subrev_co_u32 v5, vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x36]
|
|
|
|
v_subrev_co_u32 v5, vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x36]
|
|
|
|
v_subrev_co_u32 v5, vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x36]
|
|
|
|
v_subrev_co_u32 v5, vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x36]
|
|
|
|
v_subrev_co_u32 v5, vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x36]
|
|
|
|
v_subrev_co_u32 v5, vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x36]
|
|
|
|
v_subrev_co_u32 v5, vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x36]
|
|
|
|
v_subrev_co_u32 v5, vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x36,0x56,0x34,0x12,0xaf]
|
|
|
|
v_subrev_co_u32 v5, vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x36,0x73,0x72,0x71,0x3f]
|
|
|
|
v_subrev_co_u32 v5, vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x36]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], v1, v2
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v255, s[12:13], v1, v2
|
|
// CHECK: [0xff,0x0c,0x1b,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[14:15], v1, v2
|
|
// CHECK: [0x05,0x0e,0x1b,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[100:101], v1, v2
|
|
// CHECK: [0x05,0x64,0x1b,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, flat_scratch, v1, v2
|
|
// CHECK: [0x05,0x66,0x1b,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, vcc, v1, v2
|
|
// CHECK: [0x05,0x6a,0x1b,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], v255, v2
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], s1, v2
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], s101, v2
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], vcc_lo, v2
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], vcc_hi, v2
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], m0, v2
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], exec_lo, v2
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], exec_hi, v2
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], 0, v2
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], -1, v2
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], 0.5, v2
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], -4.0, v2
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], v1, v255
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], v1, s2
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], v1, s101
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], v1, vcc_lo
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], v1, vcc_hi
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], v1, m0
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], v1, exec_lo
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], v1, exec_hi
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], v1, 0
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], v1, -1
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], v1, 0.5
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_subrev_co_u32_e64 v5, s[12:13], v1, -4.0
|
|
// CHECK: [0x05,0x0c,0x1b,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_addc_co_u32 v5, vcc, v1, v2, vcc
|
|
// CHECK: [0x01,0x05,0x0a,0x38]
|
|
|
|
v_addc_co_u32 v255, vcc, v1, v2, vcc
|
|
// CHECK: [0x01,0x05,0xfe,0x39]
|
|
|
|
v_addc_co_u32 v5, vcc, v255, v2, vcc
|
|
// CHECK: [0xff,0x05,0x0a,0x38]
|
|
|
|
v_addc_co_u32 v5, vcc, 0, v2, vcc
|
|
// CHECK: [0x80,0x04,0x0a,0x38]
|
|
|
|
v_addc_co_u32 v5, vcc, -1, v2, vcc
|
|
// CHECK: [0xc1,0x04,0x0a,0x38]
|
|
|
|
v_addc_co_u32 v5, vcc, 0.5, v2, vcc
|
|
// CHECK: [0xf0,0x04,0x0a,0x38]
|
|
|
|
v_addc_co_u32 v5, vcc, -4.0, v2, vcc
|
|
// CHECK: [0xf7,0x04,0x0a,0x38]
|
|
|
|
v_addc_co_u32 v5, vcc, v1, v255, vcc
|
|
// CHECK: [0x01,0xff,0x0b,0x38]
|
|
|
|
v_addc_co_u32_e64 v5, s[12:13], v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_addc_co_u32_e64 v255, s[12:13], v1, v2, s[6:7]
|
|
// CHECK: [0xff,0x0c,0x1c,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_addc_co_u32_e64 v5, s[14:15], v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x0e,0x1c,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_addc_co_u32_e64 v5, s[100:101], v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x64,0x1c,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_addc_co_u32_e64 v5, flat_scratch, v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x66,0x1c,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_addc_co_u32_e64 v5, vcc, v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x6a,0x1c,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_addc_co_u32_e64 v5, s[12:13], v255, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1c,0xd1,0xff,0x05,0x1a,0x00]
|
|
|
|
v_addc_co_u32_e64 v5, s[12:13], 0, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1c,0xd1,0x80,0x04,0x1a,0x00]
|
|
|
|
v_addc_co_u32_e64 v5, s[12:13], -1, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1c,0xd1,0xc1,0x04,0x1a,0x00]
|
|
|
|
v_addc_co_u32_e64 v5, s[12:13], 0.5, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1c,0xd1,0xf0,0x04,0x1a,0x00]
|
|
|
|
v_addc_co_u32_e64 v5, s[12:13], -4.0, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1c,0xd1,0xf7,0x04,0x1a,0x00]
|
|
|
|
v_addc_co_u32_e64 v5, s[12:13], v1, v255, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0xff,0x1b,0x00]
|
|
|
|
v_addc_co_u32_e64 v5, s[12:13], v1, 0, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x01,0x19,0x00]
|
|
|
|
v_addc_co_u32_e64 v5, s[12:13], v1, -1, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x83,0x19,0x00]
|
|
|
|
v_addc_co_u32_e64 v5, s[12:13], v1, 0.5, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0xe1,0x19,0x00]
|
|
|
|
v_addc_co_u32_e64 v5, s[12:13], v1, -4.0, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0xef,0x19,0x00]
|
|
|
|
v_addc_co_u32_e64 v5, s[12:13], v1, v2, s[8:9]
|
|
// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x22,0x00]
|
|
|
|
v_addc_co_u32_e64 v5, s[12:13], v1, v2, s[100:101]
|
|
// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x92,0x01]
|
|
|
|
v_addc_co_u32_e64 v5, s[12:13], v1, v2, flat_scratch
|
|
// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_addc_co_u32_e64 v5, s[12:13], v1, v2, vcc
|
|
// CHECK: [0x05,0x0c,0x1c,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_subb_co_u32 v5, vcc, v1, v2, vcc
|
|
// CHECK: [0x01,0x05,0x0a,0x3a]
|
|
|
|
v_subb_co_u32 v255, vcc, v1, v2, vcc
|
|
// CHECK: [0x01,0x05,0xfe,0x3b]
|
|
|
|
v_subb_co_u32 v5, vcc, v255, v2, vcc
|
|
// CHECK: [0xff,0x05,0x0a,0x3a]
|
|
|
|
v_subb_co_u32 v5, vcc, 0, v2, vcc
|
|
// CHECK: [0x80,0x04,0x0a,0x3a]
|
|
|
|
v_subb_co_u32 v5, vcc, -1, v2, vcc
|
|
// CHECK: [0xc1,0x04,0x0a,0x3a]
|
|
|
|
v_subb_co_u32 v5, vcc, 0.5, v2, vcc
|
|
// CHECK: [0xf0,0x04,0x0a,0x3a]
|
|
|
|
v_subb_co_u32 v5, vcc, -4.0, v2, vcc
|
|
// CHECK: [0xf7,0x04,0x0a,0x3a]
|
|
|
|
v_subb_co_u32 v5, vcc, v1, v255, vcc
|
|
// CHECK: [0x01,0xff,0x0b,0x3a]
|
|
|
|
v_subb_co_u32_e64 v5, s[12:13], v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_subb_co_u32_e64 v255, s[12:13], v1, v2, s[6:7]
|
|
// CHECK: [0xff,0x0c,0x1d,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_subb_co_u32_e64 v5, s[14:15], v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x0e,0x1d,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_subb_co_u32_e64 v5, s[100:101], v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x64,0x1d,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_subb_co_u32_e64 v5, flat_scratch, v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x66,0x1d,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_subb_co_u32_e64 v5, vcc, v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x6a,0x1d,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_subb_co_u32_e64 v5, s[12:13], v255, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1d,0xd1,0xff,0x05,0x1a,0x00]
|
|
|
|
v_subb_co_u32_e64 v5, s[12:13], 0, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1d,0xd1,0x80,0x04,0x1a,0x00]
|
|
|
|
v_subb_co_u32_e64 v5, s[12:13], -1, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1d,0xd1,0xc1,0x04,0x1a,0x00]
|
|
|
|
v_subb_co_u32_e64 v5, s[12:13], 0.5, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1d,0xd1,0xf0,0x04,0x1a,0x00]
|
|
|
|
v_subb_co_u32_e64 v5, s[12:13], -4.0, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1d,0xd1,0xf7,0x04,0x1a,0x00]
|
|
|
|
v_subb_co_u32_e64 v5, s[12:13], v1, v255, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0xff,0x1b,0x00]
|
|
|
|
v_subb_co_u32_e64 v5, s[12:13], v1, 0, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x01,0x19,0x00]
|
|
|
|
v_subb_co_u32_e64 v5, s[12:13], v1, -1, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x83,0x19,0x00]
|
|
|
|
v_subb_co_u32_e64 v5, s[12:13], v1, 0.5, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0xe1,0x19,0x00]
|
|
|
|
v_subb_co_u32_e64 v5, s[12:13], v1, -4.0, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0xef,0x19,0x00]
|
|
|
|
v_subb_co_u32_e64 v5, s[12:13], v1, v2, s[8:9]
|
|
// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x22,0x00]
|
|
|
|
v_subb_co_u32_e64 v5, s[12:13], v1, v2, s[100:101]
|
|
// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x92,0x01]
|
|
|
|
v_subb_co_u32_e64 v5, s[12:13], v1, v2, flat_scratch
|
|
// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_subb_co_u32_e64 v5, s[12:13], v1, v2, vcc
|
|
// CHECK: [0x05,0x0c,0x1d,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_subbrev_co_u32 v5, vcc, v1, v2, vcc
|
|
// CHECK: [0x01,0x05,0x0a,0x3c]
|
|
|
|
v_subbrev_co_u32 v255, vcc, v1, v2, vcc
|
|
// CHECK: [0x01,0x05,0xfe,0x3d]
|
|
|
|
v_subbrev_co_u32 v5, vcc, v255, v2, vcc
|
|
// CHECK: [0xff,0x05,0x0a,0x3c]
|
|
|
|
v_subbrev_co_u32 v5, vcc, 0, v2, vcc
|
|
// CHECK: [0x80,0x04,0x0a,0x3c]
|
|
|
|
v_subbrev_co_u32 v5, vcc, -1, v2, vcc
|
|
// CHECK: [0xc1,0x04,0x0a,0x3c]
|
|
|
|
v_subbrev_co_u32 v5, vcc, 0.5, v2, vcc
|
|
// CHECK: [0xf0,0x04,0x0a,0x3c]
|
|
|
|
v_subbrev_co_u32 v5, vcc, -4.0, v2, vcc
|
|
// CHECK: [0xf7,0x04,0x0a,0x3c]
|
|
|
|
v_subbrev_co_u32 v5, vcc, v1, v255, vcc
|
|
// CHECK: [0x01,0xff,0x0b,0x3c]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[12:13], v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v255, s[12:13], v1, v2, s[6:7]
|
|
// CHECK: [0xff,0x0c,0x1e,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[14:15], v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x0e,0x1e,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[100:101], v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x64,0x1e,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v5, flat_scratch, v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x66,0x1e,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v5, vcc, v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x6a,0x1e,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[12:13], v255, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1e,0xd1,0xff,0x05,0x1a,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[12:13], 0, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1e,0xd1,0x80,0x04,0x1a,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[12:13], -1, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1e,0xd1,0xc1,0x04,0x1a,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[12:13], 0.5, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1e,0xd1,0xf0,0x04,0x1a,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[12:13], -4.0, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1e,0xd1,0xf7,0x04,0x1a,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[12:13], v1, v255, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0xff,0x1b,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[12:13], v1, 0, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x01,0x19,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[12:13], v1, -1, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x83,0x19,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[12:13], v1, 0.5, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0xe1,0x19,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[12:13], v1, -4.0, s[6:7]
|
|
// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0xef,0x19,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[12:13], v1, v2, s[8:9]
|
|
// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x22,0x00]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[12:13], v1, v2, s[100:101]
|
|
// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x92,0x01]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[12:13], v1, v2, flat_scratch
|
|
// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_subbrev_co_u32_e64 v5, s[12:13], v1, v2, vcc
|
|
// CHECK: [0x05,0x0c,0x1e,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_add_f16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x3e]
|
|
|
|
v_add_f16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x3f]
|
|
|
|
v_add_f16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x3e]
|
|
|
|
v_add_f16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x3e]
|
|
|
|
v_add_f16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x3e]
|
|
|
|
v_add_f16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x3e]
|
|
|
|
v_add_f16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x3e]
|
|
|
|
v_add_f16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x3e]
|
|
|
|
v_add_f16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x3e]
|
|
|
|
v_add_f16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x3e]
|
|
|
|
v_add_f16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x3e]
|
|
|
|
v_add_f16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x3e]
|
|
|
|
v_add_f16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x3e]
|
|
|
|
v_add_f16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x3e]
|
|
|
|
v_add_f16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x3e]
|
|
|
|
v_add_f16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x3e]
|
|
|
|
v_add_f16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x3e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_add_f16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x3e,0x56,0x34,0x00,0x00]
|
|
|
|
v_add_f16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x3e]
|
|
|
|
v_add_f16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x1f,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_add_f16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_add_f16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_add_f16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_add_f16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_add_f16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_add_f16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_add_f16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_add_f16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_add_f16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_add_f16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_add_f16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_add_f16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_add_f16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_add_f16_e64 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0x05,0x02,0x20]
|
|
|
|
v_add_f16_e64 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0x05,0x02,0x40]
|
|
|
|
v_add_f16_e64 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x1f,0xd1,0x01,0x05,0x02,0x60]
|
|
|
|
v_add_f16_e64 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x1f,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x1f,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x1f,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f16_e64 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x1f,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_f16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x40]
|
|
|
|
v_sub_f16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x41]
|
|
|
|
v_sub_f16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x40]
|
|
|
|
v_sub_f16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x40]
|
|
|
|
v_sub_f16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x40]
|
|
|
|
v_sub_f16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x40]
|
|
|
|
v_sub_f16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x40]
|
|
|
|
v_sub_f16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x40]
|
|
|
|
v_sub_f16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x40]
|
|
|
|
v_sub_f16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x40]
|
|
|
|
v_sub_f16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x40]
|
|
|
|
v_sub_f16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x40]
|
|
|
|
v_sub_f16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x40]
|
|
|
|
v_sub_f16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x40]
|
|
|
|
v_sub_f16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x40]
|
|
|
|
v_sub_f16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x40]
|
|
|
|
v_sub_f16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x40,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_sub_f16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x40,0x56,0x34,0x00,0x00]
|
|
|
|
v_sub_f16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x40]
|
|
|
|
v_sub_f16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x20,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_sub_f16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_sub_f16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_sub_f16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_sub_f16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_sub_f16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_sub_f16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_sub_f16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_sub_f16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_sub_f16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_sub_f16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_sub_f16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_sub_f16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_sub_f16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_sub_f16_e64 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0x05,0x02,0x20]
|
|
|
|
v_sub_f16_e64 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0x05,0x02,0x40]
|
|
|
|
v_sub_f16_e64 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x20,0xd1,0x01,0x05,0x02,0x60]
|
|
|
|
v_sub_f16_e64 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x20,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x20,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x20,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_f16_e64 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x20,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_f16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x42]
|
|
|
|
v_subrev_f16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x43]
|
|
|
|
v_subrev_f16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x42]
|
|
|
|
v_subrev_f16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x42]
|
|
|
|
v_subrev_f16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x42]
|
|
|
|
v_subrev_f16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x42]
|
|
|
|
v_subrev_f16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x42]
|
|
|
|
v_subrev_f16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x42]
|
|
|
|
v_subrev_f16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x42]
|
|
|
|
v_subrev_f16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x42]
|
|
|
|
v_subrev_f16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x42]
|
|
|
|
v_subrev_f16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x42]
|
|
|
|
v_subrev_f16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x42]
|
|
|
|
v_subrev_f16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x42]
|
|
|
|
v_subrev_f16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x42]
|
|
|
|
v_subrev_f16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x42]
|
|
|
|
v_subrev_f16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x42,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_subrev_f16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x42,0x56,0x34,0x00,0x00]
|
|
|
|
v_subrev_f16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x42]
|
|
|
|
v_subrev_f16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x21,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_subrev_f16_e64 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0x05,0x02,0x20]
|
|
|
|
v_subrev_f16_e64 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0x05,0x02,0x40]
|
|
|
|
v_subrev_f16_e64 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x21,0xd1,0x01,0x05,0x02,0x60]
|
|
|
|
v_subrev_f16_e64 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x21,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x21,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x21,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_f16_e64 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x21,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x44]
|
|
|
|
v_mul_f16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x45]
|
|
|
|
v_mul_f16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x44]
|
|
|
|
v_mul_f16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x44]
|
|
|
|
v_mul_f16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x44]
|
|
|
|
v_mul_f16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x44]
|
|
|
|
v_mul_f16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x44]
|
|
|
|
v_mul_f16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x44]
|
|
|
|
v_mul_f16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x44]
|
|
|
|
v_mul_f16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x44]
|
|
|
|
v_mul_f16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x44]
|
|
|
|
v_mul_f16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x44]
|
|
|
|
v_mul_f16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x44]
|
|
|
|
v_mul_f16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x44]
|
|
|
|
v_mul_f16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x44]
|
|
|
|
v_mul_f16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x44]
|
|
|
|
v_mul_f16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x44,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_mul_f16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x44,0x56,0x34,0x00,0x00]
|
|
|
|
v_mul_f16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x44]
|
|
|
|
v_mul_f16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x22,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_mul_f16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_mul_f16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_mul_f16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_mul_f16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_mul_f16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_mul_f16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_mul_f16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_mul_f16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_mul_f16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_mul_f16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_f16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_mul_f16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_mul_f16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_mul_f16_e64 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0x05,0x02,0x20]
|
|
|
|
v_mul_f16_e64 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0x05,0x02,0x40]
|
|
|
|
v_mul_f16_e64 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x22,0xd1,0x01,0x05,0x02,0x60]
|
|
|
|
v_mul_f16_e64 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x22,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x22,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x22,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f16_e64 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x22,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mac_f16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x46]
|
|
|
|
v_mac_f16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x47]
|
|
|
|
v_mac_f16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x46]
|
|
|
|
v_mac_f16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x46]
|
|
|
|
v_mac_f16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x46]
|
|
|
|
v_mac_f16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x46]
|
|
|
|
v_mac_f16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x46]
|
|
|
|
v_mac_f16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x46]
|
|
|
|
v_mac_f16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x46]
|
|
|
|
v_mac_f16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x46]
|
|
|
|
v_mac_f16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x46]
|
|
|
|
v_mac_f16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x46]
|
|
|
|
v_mac_f16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x46]
|
|
|
|
v_mac_f16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x46]
|
|
|
|
v_mac_f16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x46]
|
|
|
|
v_mac_f16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x46]
|
|
|
|
v_mac_f16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x46,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_mac_f16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x46,0x56,0x34,0x00,0x00]
|
|
|
|
v_mac_f16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x46]
|
|
|
|
v_mac_f16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x23,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_mac_f16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_mac_f16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_mac_f16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_mac_f16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_mac_f16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_mac_f16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_mac_f16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_mac_f16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_mac_f16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_mac_f16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_mac_f16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_mac_f16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_mac_f16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_mac_f16_e64 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0x05,0x02,0x20]
|
|
|
|
v_mac_f16_e64 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0x05,0x02,0x40]
|
|
|
|
v_mac_f16_e64 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x23,0xd1,0x01,0x05,0x02,0x60]
|
|
|
|
v_mac_f16_e64 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x23,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x23,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x23,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mac_f16_e64 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x23,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_madmk_f16 v5, v1, 0x1121, v3
|
|
// CHECK: [0x01,0x07,0x0a,0x48,0x21,0x11,0x00,0x00]
|
|
|
|
v_madmk_f16 v255, v1, 0x1121, v3
|
|
// CHECK: [0x01,0x07,0xfe,0x49,0x21,0x11,0x00,0x00]
|
|
|
|
v_madmk_f16 v5, v255, 0x1121, v3
|
|
// CHECK: [0xff,0x07,0x0a,0x48,0x21,0x11,0x00,0x00]
|
|
|
|
v_madmk_f16 v5, 0, 0x1121, v3
|
|
// CHECK: [0x80,0x06,0x0a,0x48,0x21,0x11,0x00,0x00]
|
|
|
|
v_madmk_f16 v5, -1, 0x1121, v3
|
|
// CHECK: [0xc1,0x06,0x0a,0x48,0x21,0x11,0x00,0x00]
|
|
|
|
v_madmk_f16 v5, 0.5, 0x1121, v3
|
|
// CHECK: [0xf0,0x06,0x0a,0x48,0x21,0x11,0x00,0x00]
|
|
|
|
v_madmk_f16 v5, -4.0, 0x1121, v3
|
|
// CHECK: [0xf7,0x06,0x0a,0x48,0x21,0x11,0x00,0x00]
|
|
|
|
v_madmk_f16 v5, v1, 0xa1b1, v3
|
|
// CHECK: [0x01,0x07,0x0a,0x48,0xb1,0xa1,0x00,0x00]
|
|
|
|
v_madmk_f16 v5, v1, 0x1121, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x48,0x21,0x11,0x00,0x00]
|
|
|
|
v_madak_f16 v5, v1, v2, 0x1121
|
|
// CHECK: [0x01,0x05,0x0a,0x4a,0x21,0x11,0x00,0x00]
|
|
|
|
v_madak_f16 v255, v1, v2, 0x1121
|
|
// CHECK: [0x01,0x05,0xfe,0x4b,0x21,0x11,0x00,0x00]
|
|
|
|
v_madak_f16 v5, v255, v2, 0x1121
|
|
// CHECK: [0xff,0x05,0x0a,0x4a,0x21,0x11,0x00,0x00]
|
|
|
|
v_madak_f16 v5, 0, v2, 0x1121
|
|
// CHECK: [0x80,0x04,0x0a,0x4a,0x21,0x11,0x00,0x00]
|
|
|
|
v_madak_f16 v5, -1, v2, 0x1121
|
|
// CHECK: [0xc1,0x04,0x0a,0x4a,0x21,0x11,0x00,0x00]
|
|
|
|
v_madak_f16 v5, 0.5, v2, 0x1121
|
|
// CHECK: [0xf0,0x04,0x0a,0x4a,0x21,0x11,0x00,0x00]
|
|
|
|
v_madak_f16 v5, -4.0, v2, 0x1121
|
|
// CHECK: [0xf7,0x04,0x0a,0x4a,0x21,0x11,0x00,0x00]
|
|
|
|
v_madak_f16 v5, v1, v255, 0x1121
|
|
// CHECK: [0x01,0xff,0x0b,0x4a,0x21,0x11,0x00,0x00]
|
|
|
|
v_madak_f16 v5, v1, v2, 0xa1b1
|
|
// CHECK: [0x01,0x05,0x0a,0x4a,0xb1,0xa1,0x00,0x00]
|
|
|
|
v_add_u16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x4c]
|
|
|
|
v_add_u16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x4d]
|
|
|
|
v_add_u16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x4c]
|
|
|
|
v_add_u16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x4c]
|
|
|
|
v_add_u16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x4c]
|
|
|
|
v_add_u16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x4c]
|
|
|
|
v_add_u16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x4c]
|
|
|
|
v_add_u16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x4c]
|
|
|
|
v_add_u16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x4c]
|
|
|
|
v_add_u16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x4c]
|
|
|
|
v_add_u16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x4c]
|
|
|
|
v_add_u16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x4c]
|
|
|
|
v_add_u16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x4c]
|
|
|
|
v_add_u16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x4c]
|
|
|
|
v_add_u16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x4c]
|
|
|
|
v_add_u16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x4c]
|
|
|
|
v_add_u16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x4c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_add_u16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x4c,0x56,0x34,0x00,0x00]
|
|
|
|
v_add_u16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x4c]
|
|
|
|
v_add_u16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_u16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x26,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_u16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_add_u16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_add_u16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_add_u16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_add_u16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_add_u16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_add_u16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_add_u16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_add_u16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_add_u16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_add_u16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_add_u16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_add_u16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_add_u16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_add_u16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_add_u16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_add_u16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_add_u16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_add_u16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_add_u16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_add_u16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_add_u16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_add_u16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_add_u16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_add_u16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_add_u16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_add_u16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_add_u16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x26,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_sub_u16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x4e]
|
|
|
|
v_sub_u16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x4f]
|
|
|
|
v_sub_u16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x4e]
|
|
|
|
v_sub_u16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x4e]
|
|
|
|
v_sub_u16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x4e]
|
|
|
|
v_sub_u16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x4e]
|
|
|
|
v_sub_u16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x4e]
|
|
|
|
v_sub_u16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x4e]
|
|
|
|
v_sub_u16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x4e]
|
|
|
|
v_sub_u16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x4e]
|
|
|
|
v_sub_u16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x4e]
|
|
|
|
v_sub_u16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x4e]
|
|
|
|
v_sub_u16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x4e]
|
|
|
|
v_sub_u16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x4e]
|
|
|
|
v_sub_u16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x4e]
|
|
|
|
v_sub_u16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x4e]
|
|
|
|
v_sub_u16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x4e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_sub_u16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x4e,0x56,0x34,0x00,0x00]
|
|
|
|
v_sub_u16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x4e]
|
|
|
|
v_sub_u16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_u16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x27,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_u16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_sub_u16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_sub_u16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_sub_u16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_sub_u16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_sub_u16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_sub_u16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_sub_u16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_sub_u16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_sub_u16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_sub_u16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_sub_u16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_sub_u16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_sub_u16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_sub_u16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_sub_u16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_sub_u16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_sub_u16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_sub_u16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_sub_u16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_sub_u16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_sub_u16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_sub_u16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_sub_u16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_sub_u16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_sub_u16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_sub_u16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_sub_u16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x27,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_subrev_u16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x50]
|
|
|
|
v_subrev_u16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x51]
|
|
|
|
v_subrev_u16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x50]
|
|
|
|
v_subrev_u16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x50]
|
|
|
|
v_subrev_u16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x50]
|
|
|
|
v_subrev_u16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x50]
|
|
|
|
v_subrev_u16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x50]
|
|
|
|
v_subrev_u16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x50]
|
|
|
|
v_subrev_u16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x50]
|
|
|
|
v_subrev_u16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x50]
|
|
|
|
v_subrev_u16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x50]
|
|
|
|
v_subrev_u16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x50]
|
|
|
|
v_subrev_u16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x50]
|
|
|
|
v_subrev_u16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x50]
|
|
|
|
v_subrev_u16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x50]
|
|
|
|
v_subrev_u16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x50]
|
|
|
|
v_subrev_u16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x50,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_subrev_u16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x50,0x56,0x34,0x00,0x00]
|
|
|
|
v_subrev_u16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x50]
|
|
|
|
v_subrev_u16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_u16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x28,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_u16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_subrev_u16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_subrev_u16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_subrev_u16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_subrev_u16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_subrev_u16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_subrev_u16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_subrev_u16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_subrev_u16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_subrev_u16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_subrev_u16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_subrev_u16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_subrev_u16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_subrev_u16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_subrev_u16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_subrev_u16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_subrev_u16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_subrev_u16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_subrev_u16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_subrev_u16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_subrev_u16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_subrev_u16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_subrev_u16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_subrev_u16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_subrev_u16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_subrev_u16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_subrev_u16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_subrev_u16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x28,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_mul_lo_u16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x52]
|
|
|
|
v_mul_lo_u16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x53]
|
|
|
|
v_mul_lo_u16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x52]
|
|
|
|
v_mul_lo_u16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x52]
|
|
|
|
v_mul_lo_u16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x52]
|
|
|
|
v_mul_lo_u16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x52]
|
|
|
|
v_mul_lo_u16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x52]
|
|
|
|
v_mul_lo_u16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x52]
|
|
|
|
v_mul_lo_u16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x52]
|
|
|
|
v_mul_lo_u16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x52]
|
|
|
|
v_mul_lo_u16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x52]
|
|
|
|
v_mul_lo_u16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x52]
|
|
|
|
v_mul_lo_u16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x52]
|
|
|
|
v_mul_lo_u16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x52]
|
|
|
|
v_mul_lo_u16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x52]
|
|
|
|
v_mul_lo_u16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x52]
|
|
|
|
v_mul_lo_u16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x52,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_mul_lo_u16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x52,0x56,0x34,0x00,0x00]
|
|
|
|
v_mul_lo_u16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x52]
|
|
|
|
v_mul_lo_u16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_lo_u16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x29,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_mul_lo_u16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x29,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_lshlrev_b16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x54]
|
|
|
|
v_lshlrev_b16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x55]
|
|
|
|
v_lshlrev_b16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x54]
|
|
|
|
v_lshlrev_b16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x54]
|
|
|
|
v_lshlrev_b16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x54]
|
|
|
|
v_lshlrev_b16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x54]
|
|
|
|
v_lshlrev_b16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x54]
|
|
|
|
v_lshlrev_b16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x54]
|
|
|
|
v_lshlrev_b16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x54]
|
|
|
|
v_lshlrev_b16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x54]
|
|
|
|
v_lshlrev_b16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x54]
|
|
|
|
v_lshlrev_b16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x54]
|
|
|
|
v_lshlrev_b16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x54]
|
|
|
|
v_lshlrev_b16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x54]
|
|
|
|
v_lshlrev_b16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x54]
|
|
|
|
v_lshlrev_b16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x54]
|
|
|
|
v_lshlrev_b16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x54,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_lshlrev_b16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x54,0x56,0x34,0x00,0x00]
|
|
|
|
v_lshlrev_b16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x54]
|
|
|
|
v_lshlrev_b16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_lshlrev_b16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x2a,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_lshlrev_b16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x2a,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_lshrrev_b16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x56]
|
|
|
|
v_lshrrev_b16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x57]
|
|
|
|
v_lshrrev_b16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x56]
|
|
|
|
v_lshrrev_b16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x56]
|
|
|
|
v_lshrrev_b16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x56]
|
|
|
|
v_lshrrev_b16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x56]
|
|
|
|
v_lshrrev_b16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x56]
|
|
|
|
v_lshrrev_b16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x56]
|
|
|
|
v_lshrrev_b16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x56]
|
|
|
|
v_lshrrev_b16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x56]
|
|
|
|
v_lshrrev_b16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x56]
|
|
|
|
v_lshrrev_b16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x56]
|
|
|
|
v_lshrrev_b16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x56]
|
|
|
|
v_lshrrev_b16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x56]
|
|
|
|
v_lshrrev_b16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x56]
|
|
|
|
v_lshrrev_b16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x56]
|
|
|
|
v_lshrrev_b16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x56,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_lshrrev_b16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x56,0x56,0x34,0x00,0x00]
|
|
|
|
v_lshrrev_b16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x56]
|
|
|
|
v_lshrrev_b16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_lshrrev_b16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x2b,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_lshrrev_b16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x2b,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_ashrrev_i16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x58]
|
|
|
|
v_ashrrev_i16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x59]
|
|
|
|
v_ashrrev_i16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x58]
|
|
|
|
v_ashrrev_i16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x58]
|
|
|
|
v_ashrrev_i16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x58]
|
|
|
|
v_ashrrev_i16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x58]
|
|
|
|
v_ashrrev_i16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x58]
|
|
|
|
v_ashrrev_i16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x58]
|
|
|
|
v_ashrrev_i16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x58]
|
|
|
|
v_ashrrev_i16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x58]
|
|
|
|
v_ashrrev_i16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x58]
|
|
|
|
v_ashrrev_i16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x58]
|
|
|
|
v_ashrrev_i16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x58]
|
|
|
|
v_ashrrev_i16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x58]
|
|
|
|
v_ashrrev_i16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x58]
|
|
|
|
v_ashrrev_i16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x58]
|
|
|
|
v_ashrrev_i16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x58,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_ashrrev_i16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x58,0x56,0x34,0x00,0x00]
|
|
|
|
v_ashrrev_i16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x58]
|
|
|
|
v_ashrrev_i16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_ashrrev_i16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x2c,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_ashrrev_i16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x2c,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_max_f16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x5a]
|
|
|
|
v_max_f16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x5b]
|
|
|
|
v_max_f16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x5a]
|
|
|
|
v_max_f16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x5a]
|
|
|
|
v_max_f16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x5a]
|
|
|
|
v_max_f16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x5a]
|
|
|
|
v_max_f16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x5a]
|
|
|
|
v_max_f16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x5a]
|
|
|
|
v_max_f16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x5a]
|
|
|
|
v_max_f16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x5a]
|
|
|
|
v_max_f16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x5a]
|
|
|
|
v_max_f16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x5a]
|
|
|
|
v_max_f16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x5a]
|
|
|
|
v_max_f16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x5a]
|
|
|
|
v_max_f16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x5a]
|
|
|
|
v_max_f16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x5a]
|
|
|
|
v_max_f16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x5a,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_max_f16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x5a,0x56,0x34,0x00,0x00]
|
|
|
|
v_max_f16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x5a]
|
|
|
|
v_max_f16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x2d,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_max_f16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_max_f16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_max_f16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_max_f16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_max_f16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_max_f16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_max_f16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_max_f16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_max_f16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_max_f16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_max_f16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_max_f16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_max_f16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_max_f16_e64 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0x05,0x02,0x20]
|
|
|
|
v_max_f16_e64 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0x05,0x02,0x40]
|
|
|
|
v_max_f16_e64 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x2d,0xd1,0x01,0x05,0x02,0x60]
|
|
|
|
v_max_f16_e64 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x2d,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x2d,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x2d,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f16_e64 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x2d,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x5c]
|
|
|
|
v_min_f16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x5d]
|
|
|
|
v_min_f16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x5c]
|
|
|
|
v_min_f16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x5c]
|
|
|
|
v_min_f16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x5c]
|
|
|
|
v_min_f16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x5c]
|
|
|
|
v_min_f16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x5c]
|
|
|
|
v_min_f16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x5c]
|
|
|
|
v_min_f16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x5c]
|
|
|
|
v_min_f16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x5c]
|
|
|
|
v_min_f16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x5c]
|
|
|
|
v_min_f16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x5c]
|
|
|
|
v_min_f16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x5c]
|
|
|
|
v_min_f16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x5c]
|
|
|
|
v_min_f16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x5c]
|
|
|
|
v_min_f16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x5c]
|
|
|
|
v_min_f16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x5c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_min_f16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x5c,0x56,0x34,0x00,0x00]
|
|
|
|
v_min_f16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x5c]
|
|
|
|
v_min_f16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x2e,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_min_f16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_min_f16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_min_f16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_min_f16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_min_f16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_min_f16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_min_f16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_min_f16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_min_f16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_min_f16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_min_f16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_min_f16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_min_f16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_min_f16_e64 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0x05,0x02,0x20]
|
|
|
|
v_min_f16_e64 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0x05,0x02,0x40]
|
|
|
|
v_min_f16_e64 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x2e,0xd1,0x01,0x05,0x02,0x60]
|
|
|
|
v_min_f16_e64 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x2e,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x2e,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x2e,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f16_e64 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x2e,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_u16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x5e]
|
|
|
|
v_max_u16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x5f]
|
|
|
|
v_max_u16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x5e]
|
|
|
|
v_max_u16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x5e]
|
|
|
|
v_max_u16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x5e]
|
|
|
|
v_max_u16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x5e]
|
|
|
|
v_max_u16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x5e]
|
|
|
|
v_max_u16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x5e]
|
|
|
|
v_max_u16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x5e]
|
|
|
|
v_max_u16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x5e]
|
|
|
|
v_max_u16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x5e]
|
|
|
|
v_max_u16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x5e]
|
|
|
|
v_max_u16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x5e]
|
|
|
|
v_max_u16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x5e]
|
|
|
|
v_max_u16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x5e]
|
|
|
|
v_max_u16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x5e]
|
|
|
|
v_max_u16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x5e,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_max_u16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x5e,0x56,0x34,0x00,0x00]
|
|
|
|
v_max_u16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x5e]
|
|
|
|
v_max_u16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_u16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x2f,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_u16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_max_u16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_max_u16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_max_u16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_max_u16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_max_u16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_max_u16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_max_u16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_max_u16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_max_u16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_max_u16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_max_u16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_max_u16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_max_u16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_max_u16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_max_u16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_max_u16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_max_u16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_max_u16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_max_u16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_max_u16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_max_u16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_max_u16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_max_u16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_max_u16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_max_u16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_max_u16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_max_u16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x2f,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_max_i16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x60]
|
|
|
|
v_max_i16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x61]
|
|
|
|
v_max_i16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x60]
|
|
|
|
v_max_i16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x60]
|
|
|
|
v_max_i16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x60]
|
|
|
|
v_max_i16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x60]
|
|
|
|
v_max_i16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x60]
|
|
|
|
v_max_i16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x60]
|
|
|
|
v_max_i16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x60]
|
|
|
|
v_max_i16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x60]
|
|
|
|
v_max_i16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x60]
|
|
|
|
v_max_i16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x60]
|
|
|
|
v_max_i16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x60]
|
|
|
|
v_max_i16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x60]
|
|
|
|
v_max_i16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x60]
|
|
|
|
v_max_i16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x60]
|
|
|
|
v_max_i16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x60,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_max_i16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x60,0x56,0x34,0x00,0x00]
|
|
|
|
v_max_i16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x60]
|
|
|
|
v_max_i16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_i16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x30,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_i16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_max_i16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_max_i16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_max_i16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_max_i16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_max_i16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_max_i16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_max_i16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_max_i16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_max_i16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_max_i16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_max_i16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_max_i16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_max_i16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_max_i16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_max_i16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_max_i16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_max_i16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_max_i16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_max_i16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_max_i16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_max_i16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_max_i16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_max_i16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_max_i16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_max_i16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_max_i16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_max_i16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x30,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_min_u16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x62]
|
|
|
|
v_min_u16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x63]
|
|
|
|
v_min_u16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x62]
|
|
|
|
v_min_u16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x62]
|
|
|
|
v_min_u16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x62]
|
|
|
|
v_min_u16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x62]
|
|
|
|
v_min_u16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x62]
|
|
|
|
v_min_u16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x62]
|
|
|
|
v_min_u16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x62]
|
|
|
|
v_min_u16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x62]
|
|
|
|
v_min_u16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x62]
|
|
|
|
v_min_u16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x62]
|
|
|
|
v_min_u16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x62]
|
|
|
|
v_min_u16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x62]
|
|
|
|
v_min_u16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x62]
|
|
|
|
v_min_u16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x62]
|
|
|
|
v_min_u16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x62,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_min_u16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x62,0x56,0x34,0x00,0x00]
|
|
|
|
v_min_u16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x62]
|
|
|
|
v_min_u16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_u16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x31,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_u16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_min_u16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_min_u16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_min_u16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_min_u16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_min_u16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_min_u16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_min_u16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_min_u16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_min_u16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_min_u16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_min_u16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_min_u16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_min_u16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_min_u16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_min_u16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_min_u16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_min_u16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_min_u16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_min_u16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_min_u16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_min_u16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_min_u16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_min_u16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_min_u16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_min_u16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_min_u16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_min_u16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x31,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_min_i16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x64]
|
|
|
|
v_min_i16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x65]
|
|
|
|
v_min_i16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x64]
|
|
|
|
v_min_i16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x64]
|
|
|
|
v_min_i16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x64]
|
|
|
|
v_min_i16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x64]
|
|
|
|
v_min_i16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x64]
|
|
|
|
v_min_i16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x64]
|
|
|
|
v_min_i16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x64]
|
|
|
|
v_min_i16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x64]
|
|
|
|
v_min_i16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x64]
|
|
|
|
v_min_i16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x64]
|
|
|
|
v_min_i16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x64]
|
|
|
|
v_min_i16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x64]
|
|
|
|
v_min_i16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x64]
|
|
|
|
v_min_i16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x64]
|
|
|
|
v_min_i16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x64,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_min_i16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x64,0x56,0x34,0x00,0x00]
|
|
|
|
v_min_i16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x64]
|
|
|
|
v_min_i16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_i16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x32,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_i16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_min_i16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_min_i16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_min_i16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_min_i16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_min_i16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_min_i16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_min_i16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_min_i16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_min_i16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_min_i16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_min_i16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_min_i16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_min_i16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_min_i16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_min_i16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_min_i16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_min_i16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_min_i16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_min_i16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_min_i16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_min_i16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_min_i16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_min_i16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_min_i16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_min_i16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_min_i16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_min_i16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x32,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_ldexp_f16 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x66]
|
|
|
|
v_ldexp_f16 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x67]
|
|
|
|
v_ldexp_f16 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x66]
|
|
|
|
v_ldexp_f16 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x66]
|
|
|
|
v_ldexp_f16 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x66]
|
|
|
|
v_ldexp_f16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x66]
|
|
|
|
v_ldexp_f16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x66]
|
|
|
|
v_ldexp_f16 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x66]
|
|
|
|
v_ldexp_f16 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x66]
|
|
|
|
v_ldexp_f16 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x66]
|
|
|
|
v_ldexp_f16 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x66]
|
|
|
|
v_ldexp_f16 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x66]
|
|
|
|
v_ldexp_f16 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x66]
|
|
|
|
v_ldexp_f16 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x66]
|
|
|
|
v_ldexp_f16 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x66]
|
|
|
|
v_ldexp_f16 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x66]
|
|
|
|
v_ldexp_f16 v5, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x66,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_ldexp_f16 v5, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x66,0x56,0x34,0x00,0x00]
|
|
|
|
v_ldexp_f16 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x66]
|
|
|
|
v_ldexp_f16_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x33,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x33,0xd1,0x01,0x05,0x02,0x20]
|
|
|
|
v_ldexp_f16_e64 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x33,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_ldexp_f16_e64 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x33,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_u32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x68]
|
|
|
|
v_add_u32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x69]
|
|
|
|
v_add_u32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x68]
|
|
|
|
v_add_u32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x68]
|
|
|
|
v_add_u32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x68]
|
|
|
|
v_add_u32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x68]
|
|
|
|
v_add_u32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x68]
|
|
|
|
v_add_u32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x68]
|
|
|
|
v_add_u32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x68]
|
|
|
|
v_add_u32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x68]
|
|
|
|
v_add_u32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x68]
|
|
|
|
v_add_u32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x68]
|
|
|
|
v_add_u32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x68]
|
|
|
|
v_add_u32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x68]
|
|
|
|
v_add_u32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x68]
|
|
|
|
v_add_u32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x68]
|
|
|
|
v_add_u32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x68,0x56,0x34,0x12,0xaf]
|
|
|
|
v_add_u32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x68,0x73,0x72,0x71,0x3f]
|
|
|
|
v_add_u32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x68]
|
|
|
|
v_add_u32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_u32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x34,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_u32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_add_u32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_add_u32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_add_u32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_add_u32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_add_u32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_add_u32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_add_u32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_add_u32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_add_u32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_add_u32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_add_u32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_add_u32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_add_u32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_add_u32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_add_u32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_add_u32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_add_u32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_add_u32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_add_u32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_add_u32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_add_u32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_add_u32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_add_u32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_add_u32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_add_u32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_add_u32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_add_u32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x34,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_sub_u32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x6a]
|
|
|
|
v_sub_u32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x6b]
|
|
|
|
v_sub_u32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x6a]
|
|
|
|
v_sub_u32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x6a]
|
|
|
|
v_sub_u32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x6a]
|
|
|
|
v_sub_u32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x6a]
|
|
|
|
v_sub_u32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x6a]
|
|
|
|
v_sub_u32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x6a]
|
|
|
|
v_sub_u32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x6a]
|
|
|
|
v_sub_u32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x6a]
|
|
|
|
v_sub_u32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x6a]
|
|
|
|
v_sub_u32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x6a]
|
|
|
|
v_sub_u32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x6a]
|
|
|
|
v_sub_u32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x6a]
|
|
|
|
v_sub_u32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x6a]
|
|
|
|
v_sub_u32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x6a]
|
|
|
|
v_sub_u32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x6a,0x56,0x34,0x12,0xaf]
|
|
|
|
v_sub_u32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x6a,0x73,0x72,0x71,0x3f]
|
|
|
|
v_sub_u32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x6a]
|
|
|
|
v_sub_u32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_u32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x35,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_u32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_sub_u32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_sub_u32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_sub_u32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_sub_u32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_sub_u32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_sub_u32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_sub_u32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_sub_u32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_sub_u32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_sub_u32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_sub_u32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_sub_u32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_sub_u32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_sub_u32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_sub_u32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_sub_u32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_sub_u32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_sub_u32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_sub_u32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_sub_u32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_sub_u32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_sub_u32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_sub_u32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_sub_u32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_sub_u32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_sub_u32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_sub_u32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x35,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_subrev_u32 v5, v1, v2
|
|
// CHECK: [0x01,0x05,0x0a,0x6c]
|
|
|
|
v_subrev_u32 v255, v1, v2
|
|
// CHECK: [0x01,0x05,0xfe,0x6d]
|
|
|
|
v_subrev_u32 v5, v255, v2
|
|
// CHECK: [0xff,0x05,0x0a,0x6c]
|
|
|
|
v_subrev_u32 v5, s1, v2
|
|
// CHECK: [0x01,0x04,0x0a,0x6c]
|
|
|
|
v_subrev_u32 v5, s101, v2
|
|
// CHECK: [0x65,0x04,0x0a,0x6c]
|
|
|
|
v_subrev_u32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x0a,0x6c]
|
|
|
|
v_subrev_u32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x0a,0x6c]
|
|
|
|
v_subrev_u32 v5, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x0a,0x6c]
|
|
|
|
v_subrev_u32 v5, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x0a,0x6c]
|
|
|
|
v_subrev_u32 v5, m0, v2
|
|
// CHECK: [0x7c,0x04,0x0a,0x6c]
|
|
|
|
v_subrev_u32 v5, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x0a,0x6c]
|
|
|
|
v_subrev_u32 v5, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x0a,0x6c]
|
|
|
|
v_subrev_u32 v5, 0, v2
|
|
// CHECK: [0x80,0x04,0x0a,0x6c]
|
|
|
|
v_subrev_u32 v5, -1, v2
|
|
// CHECK: [0xc1,0x04,0x0a,0x6c]
|
|
|
|
v_subrev_u32 v5, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x0a,0x6c]
|
|
|
|
v_subrev_u32 v5, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x0a,0x6c]
|
|
|
|
v_subrev_u32 v5, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x6c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_subrev_u32 v5, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x0a,0x6c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_subrev_u32 v5, v1, v255
|
|
// CHECK: [0x01,0xff,0x0b,0x6c]
|
|
|
|
v_subrev_u32_e64 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_u32_e64 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x36,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_subrev_u32_e64 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_subrev_u32_e64 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_subrev_u32_e64 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_subrev_u32_e64 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_subrev_u32_e64 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_subrev_u32_e64 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_subrev_u32_e64 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_subrev_u32_e64 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_subrev_u32_e64 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_subrev_u32_e64 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_subrev_u32_e64 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_subrev_u32_e64 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_subrev_u32_e64 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_subrev_u32_e64 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_subrev_u32_e64 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_subrev_u32_e64 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_subrev_u32_e64 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_subrev_u32_e64 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_subrev_u32_e64 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_subrev_u32_e64 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_subrev_u32_e64 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_subrev_u32_e64 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_subrev_u32_e64 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_subrev_u32_e64 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_subrev_u32_e64 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_subrev_u32_e64 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_subrev_u32_e64 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_subrev_u32_e64 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x36,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xc0,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_mad_legacy_f32 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_mad_legacy_f32 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_mad_legacy_f32 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_mad_legacy_f32 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xc0,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xc0,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xc0,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xc0,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xc0,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, v3 mul:2
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, v3 mul:4
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x0e,0x14]
|
|
|
|
v_mad_legacy_f32 v5, v1, v2, v3 div:2
|
|
// CHECK: [0x05,0x00,0xc0,0xd1,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_mad_f32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xc1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_f32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_f32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_f32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_f32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_f32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_f32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_f32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_f32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_f32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_f32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_mad_f32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_mad_f32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_mad_f32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_mad_f32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_mad_f32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_mad_f32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_mad_f32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_f32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_mad_f32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_f32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_mad_f32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_mad_f32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_f32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_mad_f32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_mad_f32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_mad_f32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_mad_f32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_mad_f32 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_mad_f32 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_mad_f32 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_mad_f32 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_mad_f32 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xc1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xc1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xc1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xc1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xc1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f32 v5, v1, v2, v3 mul:2
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_mad_f32 v5, v1, v2, v3 mul:4
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0x0e,0x14]
|
|
|
|
v_mad_f32 v5, v1, v2, v3 div:2
|
|
// CHECK: [0x05,0x00,0xc1,0xd1,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_mad_i32_i24 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i32_i24 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xc2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i32_i24 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_i32_i24 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i24 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i24 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i24 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i24 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i24 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i24 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i24 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i24 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i24 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i24 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i24 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i24 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i24 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_i32_i24 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_i32_i24 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_i32_i24 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_i32_i24 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_i32_i24 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_i32_i24 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_i32_i24 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_i32_i24 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_i32_i24 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_i32_i24 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_mad_i32_i24 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_mad_i32_i24 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_mad_i32_i24 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_mad_i32_i24 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_mad_i32_i24 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_mad_i32_i24 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_mad_i32_i24 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_i32_i24 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_mad_i32_i24 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_i32_i24 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_mad_i32_i24 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_mad_i32_i24 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_i32_i24 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_mad_i32_i24 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_mad_i32_i24 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_mad_i32_i24 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_mad_i32_i24 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xc2,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_mad_i32_i24 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xc2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xc3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u24 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_u32_u24 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_u32_u24 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_u32_u24 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_u32_u24 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_u32_u24 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_u32_u24 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_u32_u24 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_u32_u24 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_u32_u24 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_u32_u24 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_mad_u32_u24 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_mad_u32_u24 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_mad_u32_u24 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_mad_u32_u24 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_mad_u32_u24 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_mad_u32_u24 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_mad_u32_u24 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_u32_u24 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_mad_u32_u24 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_u32_u24 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_mad_u32_u24 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_mad_u32_u24 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_u32_u24 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_mad_u32_u24 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_mad_u32_u24 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_mad_u32_u24 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_mad_u32_u24 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xc3,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_mad_u32_u24 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xc3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xc4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_cubeid_f32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_cubeid_f32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_cubeid_f32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_cubeid_f32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_cubeid_f32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_cubeid_f32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_cubeid_f32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_cubeid_f32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_cubeid_f32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_cubeid_f32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_cubeid_f32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_cubeid_f32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_cubeid_f32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_cubeid_f32 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_cubeid_f32 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_cubeid_f32 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_cubeid_f32 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_cubeid_f32 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xc4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xc4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xc4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xc4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xc4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubeid_f32 v5, v1, v2, v3 mul:2
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_cubeid_f32 v5, v1, v2, v3 mul:4
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0x0e,0x14]
|
|
|
|
v_cubeid_f32 v5, v1, v2, v3 div:2
|
|
// CHECK: [0x05,0x00,0xc4,0xd1,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_cubesc_f32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xc5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_cubesc_f32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_cubesc_f32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_cubesc_f32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_cubesc_f32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_cubesc_f32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_cubesc_f32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_cubesc_f32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_cubesc_f32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_cubesc_f32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_cubesc_f32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_cubesc_f32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_cubesc_f32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_cubesc_f32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_cubesc_f32 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_cubesc_f32 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_cubesc_f32 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_cubesc_f32 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_cubesc_f32 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xc5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xc5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xc5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xc5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xc5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubesc_f32 v5, v1, v2, v3 mul:2
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_cubesc_f32 v5, v1, v2, v3 mul:4
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0x0e,0x14]
|
|
|
|
v_cubesc_f32 v5, v1, v2, v3 div:2
|
|
// CHECK: [0x05,0x00,0xc5,0xd1,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_cubetc_f32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xc6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_cubetc_f32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_cubetc_f32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_cubetc_f32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_cubetc_f32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_cubetc_f32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_cubetc_f32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_cubetc_f32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_cubetc_f32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_cubetc_f32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_cubetc_f32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_cubetc_f32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_cubetc_f32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_cubetc_f32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_cubetc_f32 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_cubetc_f32 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_cubetc_f32 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_cubetc_f32 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_cubetc_f32 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xc6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xc6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xc6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xc6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xc6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubetc_f32 v5, v1, v2, v3 mul:2
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_cubetc_f32 v5, v1, v2, v3 mul:4
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0x0e,0x14]
|
|
|
|
v_cubetc_f32 v5, v1, v2, v3 div:2
|
|
// CHECK: [0x05,0x00,0xc6,0xd1,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_cubema_f32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubema_f32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xc7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_cubema_f32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_cubema_f32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_cubema_f32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_cubema_f32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_cubema_f32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_cubema_f32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_cubema_f32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_cubema_f32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_cubema_f32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_cubema_f32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_cubema_f32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_cubema_f32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_cubema_f32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_cubema_f32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_cubema_f32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_cubema_f32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_cubema_f32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_cubema_f32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_cubema_f32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_cubema_f32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_cubema_f32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_cubema_f32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_cubema_f32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_cubema_f32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_cubema_f32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_cubema_f32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_cubema_f32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_cubema_f32 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_cubema_f32 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_cubema_f32 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_cubema_f32 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_cubema_f32 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xc7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xc7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xc7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xc7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xc7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cubema_f32 v5, v1, v2, v3 mul:2
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_cubema_f32 v5, v1, v2, v3 mul:4
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0x0e,0x14]
|
|
|
|
v_cubema_f32 v5, v1, v2, v3 div:2
|
|
// CHECK: [0x05,0x00,0xc7,0xd1,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_bfe_u32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_bfe_u32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xc8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_bfe_u32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_bfe_u32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_bfe_u32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_bfe_u32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_bfe_u32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_bfe_u32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_bfe_u32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_bfe_u32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_bfe_u32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_bfe_u32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_bfe_u32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_bfe_u32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_bfe_u32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_bfe_u32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_bfe_u32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_bfe_u32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_bfe_u32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_bfe_u32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_bfe_u32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_bfe_u32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_bfe_u32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_bfe_u32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_bfe_u32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_bfe_u32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_bfe_u32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_bfe_u32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_bfe_u32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_bfe_u32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_bfe_u32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_bfe_u32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_bfe_u32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_bfe_u32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_bfe_u32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_bfe_u32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_bfe_u32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_bfe_u32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_bfe_u32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_bfe_u32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_bfe_u32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_bfe_u32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_bfe_u32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_bfe_u32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xc8,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_bfe_i32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_bfe_i32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xc9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_bfe_i32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_bfe_i32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_bfe_i32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_bfe_i32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_bfe_i32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_bfe_i32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_bfe_i32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_bfe_i32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_bfe_i32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_bfe_i32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_bfe_i32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_bfe_i32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_bfe_i32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_bfe_i32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_bfe_i32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_bfe_i32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_bfe_i32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_bfe_i32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_bfe_i32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_bfe_i32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_bfe_i32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_bfe_i32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_bfe_i32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_bfe_i32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_bfe_i32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_bfe_i32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_bfe_i32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_bfe_i32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_bfe_i32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_bfe_i32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_bfe_i32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_bfe_i32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_bfe_i32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_bfe_i32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_bfe_i32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_bfe_i32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_bfe_i32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_bfe_i32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_bfe_i32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_bfe_i32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_bfe_i32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_bfe_i32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xc9,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_bfi_b32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_bfi_b32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xca,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_bfi_b32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_bfi_b32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_bfi_b32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_bfi_b32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_bfi_b32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_bfi_b32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_bfi_b32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_bfi_b32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_bfi_b32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_bfi_b32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_bfi_b32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_bfi_b32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_bfi_b32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_bfi_b32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_bfi_b32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_bfi_b32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_bfi_b32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_bfi_b32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_bfi_b32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_bfi_b32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_bfi_b32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_bfi_b32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_bfi_b32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_bfi_b32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_bfi_b32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_bfi_b32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_bfi_b32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_bfi_b32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_bfi_b32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_bfi_b32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_bfi_b32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_bfi_b32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_bfi_b32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_bfi_b32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_bfi_b32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_bfi_b32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_bfi_b32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_bfi_b32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_bfi_b32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_bfi_b32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_bfi_b32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_bfi_b32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xca,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_fma_f32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xcb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_fma_f32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_fma_f32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_fma_f32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_fma_f32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_fma_f32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_fma_f32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_fma_f32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_fma_f32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_fma_f32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_fma_f32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_fma_f32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_fma_f32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_fma_f32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_fma_f32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_fma_f32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_fma_f32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_fma_f32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_fma_f32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_fma_f32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_fma_f32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_fma_f32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_fma_f32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_fma_f32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_fma_f32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_fma_f32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_fma_f32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_fma_f32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_fma_f32 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_fma_f32 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_fma_f32 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_fma_f32 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_fma_f32 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xcb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xcb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xcb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xcb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xcb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f32 v5, v1, v2, v3 mul:2
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_fma_f32 v5, v1, v2, v3 mul:4
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0x0e,0x14]
|
|
|
|
v_fma_f32 v5, v1, v2, v3 div:2
|
|
// CHECK: [0x05,0x00,0xcb,0xd1,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f64 v[254:255], v[1:2], v[2:3], v[3:4]
|
|
// CHECK: [0xfe,0x00,0xcc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[254:255], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0xfe,0x05,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], s[2:3], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x02,0x04,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], s[4:5], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x04,0x04,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], s[100:101], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x64,0x04,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], flat_scratch, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], vcc, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], exec, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], 0, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], -1, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], 0.5, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], -4.0, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[254:255], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0xfd,0x0f,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], s[4:5], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x09,0x0c,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], s[6:7], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x0d,0x0c,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], s[100:101], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0xc9,0x0c,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], flat_scratch, v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], vcc, v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], exec, v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], 0, v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], -1, v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], 0.5, v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], -4.0, v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], v[254:255]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0xfa,0x07]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], s[6:7]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], s[8:9]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0x22,0x00]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], s[100:101]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0x92,0x01]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], flat_scratch
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], vcc
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], exec
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], 0
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], -1
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], 0.5
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], -4.0
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_fma_f64 v[5:6], -v[1:2], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], -v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], -v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_fma_f64 v[5:6], -v[1:2], -v[2:3], -v[3:4]
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_fma_f64 v[5:6], |v[1:2]|, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x01,0xcc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], |v[2:3]|, v[3:4]
|
|
// CHECK: [0x05,0x02,0xcc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], |v[3:4]|
|
|
// CHECK: [0x05,0x04,0xcc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], |v[1:2]|, |v[2:3]|, |v[3:4]|
|
|
// CHECK: [0x05,0x07,0xcc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], v[3:4] clamp
|
|
// CHECK: [0x05,0x80,0xcc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], v[3:4] mul:2
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], v[3:4] mul:4
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0x0e,0x14]
|
|
|
|
v_fma_f64 v[5:6], v[1:2], v[2:3], v[3:4] div:2
|
|
// CHECK: [0x05,0x00,0xcc,0xd1,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_lerp_u8 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_lerp_u8 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xcd,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_lerp_u8 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_lerp_u8 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_lerp_u8 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_lerp_u8 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_lerp_u8 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_lerp_u8 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_lerp_u8 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_lerp_u8 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_lerp_u8 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_lerp_u8 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_lerp_u8 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_lerp_u8 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_lerp_u8 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_lerp_u8 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_lerp_u8 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_lerp_u8 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_lerp_u8 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_lerp_u8 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_lerp_u8 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_lerp_u8 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_lerp_u8 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_lerp_u8 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_lerp_u8 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_lerp_u8 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_lerp_u8 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_lerp_u8 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_lerp_u8 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_lerp_u8 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_lerp_u8 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_lerp_u8 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_lerp_u8 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_lerp_u8 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_lerp_u8 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_lerp_u8 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_lerp_u8 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_lerp_u8 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_lerp_u8 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_lerp_u8 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_lerp_u8 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_lerp_u8 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_lerp_u8 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_lerp_u8 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xcd,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_alignbit_b32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_alignbit_b32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xce,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_alignbit_b32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_alignbit_b32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_alignbit_b32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_alignbit_b32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_alignbit_b32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_alignbit_b32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_alignbit_b32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_alignbit_b32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_alignbit_b32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_alignbit_b32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_alignbit_b32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_alignbit_b32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_alignbit_b32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_alignbit_b32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_alignbit_b32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_alignbit_b32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_alignbit_b32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_alignbit_b32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_alignbit_b32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_alignbit_b32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_alignbit_b32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_alignbit_b32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_alignbit_b32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_alignbit_b32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_alignbit_b32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_alignbit_b32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_alignbit_b32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_alignbit_b32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_alignbit_b32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_alignbit_b32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xce,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_alignbyte_b32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_alignbyte_b32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xcf,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_alignbyte_b32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_alignbyte_b32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_alignbyte_b32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_alignbyte_b32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_alignbyte_b32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_alignbyte_b32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_alignbyte_b32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_alignbyte_b32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_alignbyte_b32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_alignbyte_b32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_alignbyte_b32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_alignbyte_b32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_alignbyte_b32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_alignbyte_b32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_alignbyte_b32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_alignbyte_b32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_alignbyte_b32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_alignbyte_b32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_alignbyte_b32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_alignbyte_b32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_alignbyte_b32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_alignbyte_b32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_alignbyte_b32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_alignbyte_b32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_alignbyte_b32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_alignbyte_b32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_alignbyte_b32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_alignbyte_b32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_alignbyte_b32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_alignbyte_b32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xcf,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_min3_f32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xd0,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_min3_f32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_min3_f32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_min3_f32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_min3_f32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_min3_f32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_min3_f32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_min3_f32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_min3_f32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_min3_f32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_min3_f32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_min3_f32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_min3_f32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_min3_f32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_min3_f32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_min3_f32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_min3_f32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_min3_f32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_min3_f32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_min3_f32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_min3_f32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_min3_f32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_min3_f32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_min3_f32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_min3_f32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_min3_f32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_min3_f32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_min3_f32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_min3_f32 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_min3_f32 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_min3_f32 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_min3_f32 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_min3_f32 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xd0,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xd0,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xd0,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xd0,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xd0,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f32 v5, v1, v2, v3 mul:2
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_min3_f32 v5, v1, v2, v3 mul:4
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0x0e,0x14]
|
|
|
|
v_min3_f32 v5, v1, v2, v3 div:2
|
|
// CHECK: [0x05,0x00,0xd0,0xd1,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_min3_i32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_i32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xd1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_i32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_min3_i32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_min3_i32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_min3_i32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_min3_i32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_min3_i32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_min3_i32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_min3_i32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_min3_i32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_min3_i32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_min3_i32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_min3_i32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_min3_i32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_min3_i32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_min3_i32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_min3_i32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_min3_i32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_min3_i32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_min3_i32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_min3_i32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_min3_i32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_min3_i32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_min3_i32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_min3_i32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_min3_i32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_min3_i32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_min3_i32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_min3_i32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_min3_i32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_min3_i32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_min3_i32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_min3_i32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_min3_i32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_min3_i32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_min3_i32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_min3_i32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_min3_i32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_min3_i32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_min3_i32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_min3_i32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_min3_i32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_min3_i32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xd1,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_min3_u32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_u32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xd2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_u32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_min3_u32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_min3_u32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_min3_u32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_min3_u32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_min3_u32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_min3_u32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_min3_u32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_min3_u32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_min3_u32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_min3_u32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_min3_u32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_min3_u32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_min3_u32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_min3_u32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_min3_u32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_min3_u32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_min3_u32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_min3_u32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_min3_u32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_min3_u32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_min3_u32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_min3_u32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_min3_u32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_min3_u32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_min3_u32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_min3_u32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_min3_u32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_min3_u32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_min3_u32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_min3_u32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_min3_u32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_min3_u32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_min3_u32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_min3_u32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_min3_u32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_min3_u32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_min3_u32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_min3_u32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_min3_u32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_min3_u32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_min3_u32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xd2,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_max3_f32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xd3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_max3_f32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_max3_f32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_max3_f32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_max3_f32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_max3_f32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_max3_f32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_max3_f32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_max3_f32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_max3_f32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_max3_f32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_max3_f32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_max3_f32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_max3_f32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_max3_f32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_max3_f32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_max3_f32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_max3_f32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_max3_f32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_max3_f32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_max3_f32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_max3_f32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_max3_f32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_max3_f32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_max3_f32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_max3_f32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_max3_f32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_max3_f32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_max3_f32 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_max3_f32 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_max3_f32 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_max3_f32 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_max3_f32 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xd3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xd3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xd3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xd3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xd3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f32 v5, v1, v2, v3 mul:2
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_max3_f32 v5, v1, v2, v3 mul:4
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0x0e,0x14]
|
|
|
|
v_max3_f32 v5, v1, v2, v3 div:2
|
|
// CHECK: [0x05,0x00,0xd3,0xd1,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_max3_i32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_i32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xd4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_i32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_max3_i32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_max3_i32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_max3_i32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_max3_i32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_max3_i32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_max3_i32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_max3_i32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_max3_i32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_max3_i32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_max3_i32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_max3_i32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_max3_i32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_max3_i32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_max3_i32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_max3_i32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_max3_i32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_max3_i32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_max3_i32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_max3_i32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_max3_i32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_max3_i32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_max3_i32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_max3_i32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_max3_i32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_max3_i32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_max3_i32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_max3_i32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_max3_i32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_max3_i32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_max3_i32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_max3_i32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_max3_i32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_max3_i32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_max3_i32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_max3_i32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_max3_i32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_max3_i32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_max3_i32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_max3_i32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_max3_i32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_max3_i32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xd4,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_max3_u32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_u32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xd5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_u32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_max3_u32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_max3_u32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_max3_u32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_max3_u32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_max3_u32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_max3_u32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_max3_u32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_max3_u32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_max3_u32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_max3_u32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_max3_u32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_max3_u32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_max3_u32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_max3_u32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_max3_u32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_max3_u32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_max3_u32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_max3_u32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_max3_u32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_max3_u32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_max3_u32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_max3_u32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_max3_u32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_max3_u32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_max3_u32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_max3_u32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_max3_u32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_max3_u32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_max3_u32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_max3_u32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_max3_u32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_max3_u32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_max3_u32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_max3_u32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_max3_u32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_max3_u32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_max3_u32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_max3_u32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_max3_u32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_max3_u32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_max3_u32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xd5,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_med3_f32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xd6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_med3_f32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_med3_f32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_med3_f32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_med3_f32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_med3_f32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_med3_f32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_med3_f32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_med3_f32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_med3_f32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_med3_f32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_med3_f32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_med3_f32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_med3_f32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_med3_f32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_med3_f32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_med3_f32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_med3_f32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_med3_f32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_med3_f32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_med3_f32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_med3_f32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_med3_f32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_med3_f32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_med3_f32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_med3_f32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_med3_f32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_med3_f32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_med3_f32 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_med3_f32 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_med3_f32 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_med3_f32 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_med3_f32 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xd6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xd6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xd6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xd6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xd6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f32 v5, v1, v2, v3 mul:2
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_med3_f32 v5, v1, v2, v3 mul:4
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x0e,0x14]
|
|
|
|
v_med3_f32 v5, v1, v2, v3 div:2
|
|
// CHECK: [0x05,0x00,0xd6,0xd1,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_med3_i32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_i32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xd7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_i32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_med3_i32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_med3_i32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_med3_i32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_med3_i32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_med3_i32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_med3_i32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_med3_i32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_med3_i32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_med3_i32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_med3_i32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_med3_i32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_med3_i32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_med3_i32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_med3_i32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_med3_i32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_med3_i32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_med3_i32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_med3_i32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_med3_i32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_med3_i32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_med3_i32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_med3_i32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_med3_i32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_med3_i32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_med3_i32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_med3_i32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_med3_i32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_med3_i32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_med3_i32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_med3_i32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_med3_i32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_med3_i32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_med3_i32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_med3_i32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_med3_i32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_med3_i32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_med3_i32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_med3_i32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_med3_i32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_med3_i32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_med3_i32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xd7,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_med3_u32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_u32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xd8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_u32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_med3_u32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_med3_u32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_med3_u32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_med3_u32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_med3_u32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_med3_u32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_med3_u32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_med3_u32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_med3_u32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_med3_u32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_med3_u32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_med3_u32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_med3_u32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_med3_u32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_med3_u32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_med3_u32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_med3_u32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_med3_u32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_med3_u32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_med3_u32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_med3_u32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_med3_u32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_med3_u32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_med3_u32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_med3_u32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_med3_u32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_med3_u32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_med3_u32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_med3_u32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_med3_u32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_med3_u32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_med3_u32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_med3_u32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_med3_u32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_med3_u32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_med3_u32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_med3_u32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_med3_u32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_med3_u32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_med3_u32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_med3_u32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xd8,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_sad_u8 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_sad_u8 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xd9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_sad_u8 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_sad_u8 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_sad_u8 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_sad_u8 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_sad_u8 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_sad_u8 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_sad_u8 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_sad_u8 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_sad_u8 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_sad_u8 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_sad_u8 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_sad_u8 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_sad_u8 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_sad_u8 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_sad_u8 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_sad_u8 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_sad_u8 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_sad_u8 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_sad_u8 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_sad_u8 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_sad_u8 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_sad_u8 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_sad_u8 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_sad_u8 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_sad_u8 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_sad_u8 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_sad_u8 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_sad_u8 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_sad_u8 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_sad_u8 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_sad_u8 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_sad_u8 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_sad_u8 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_sad_u8 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_sad_u8 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_sad_u8 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_sad_u8 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_sad_u8 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_sad_u8 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_sad_u8 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_sad_u8 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_sad_u8 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xd9,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_sad_u8 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xd9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xda,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_sad_hi_u8 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_sad_hi_u8 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_sad_hi_u8 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_sad_hi_u8 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_sad_hi_u8 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_sad_hi_u8 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_sad_hi_u8 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_sad_hi_u8 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_sad_hi_u8 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_sad_hi_u8 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_sad_hi_u8 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_sad_hi_u8 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_sad_hi_u8 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_sad_hi_u8 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_sad_hi_u8 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_sad_hi_u8 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_sad_hi_u8 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_sad_hi_u8 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_sad_hi_u8 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_sad_hi_u8 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_sad_hi_u8 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_sad_hi_u8 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_sad_hi_u8 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_sad_hi_u8 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_sad_hi_u8 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_sad_hi_u8 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_sad_hi_u8 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_sad_hi_u8 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xda,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_sad_hi_u8 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xda,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_sad_u16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_sad_u16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xdb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_sad_u16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_sad_u16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_sad_u16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_sad_u16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_sad_u16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_sad_u16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_sad_u16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_sad_u16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_sad_u16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_sad_u16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_sad_u16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_sad_u16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_sad_u16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_sad_u16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_sad_u16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_sad_u16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_sad_u16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_sad_u16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_sad_u16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_sad_u16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_sad_u16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_sad_u16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_sad_u16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_sad_u16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_sad_u16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_sad_u16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_sad_u16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_sad_u16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_sad_u16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_sad_u16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_sad_u16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_sad_u16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_sad_u16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_sad_u16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_sad_u16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_sad_u16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_sad_u16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_sad_u16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_sad_u16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_sad_u16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_sad_u16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_sad_u16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xdb,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_sad_u16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xdb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_sad_u32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_sad_u32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xdc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_sad_u32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_sad_u32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_sad_u32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_sad_u32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_sad_u32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_sad_u32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_sad_u32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_sad_u32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_sad_u32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_sad_u32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_sad_u32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_sad_u32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_sad_u32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_sad_u32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_sad_u32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_sad_u32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_sad_u32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_sad_u32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_sad_u32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_sad_u32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_sad_u32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_sad_u32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_sad_u32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_sad_u32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_sad_u32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_sad_u32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_sad_u32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_sad_u32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_sad_u32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_sad_u32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_sad_u32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_sad_u32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_sad_u32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_sad_u32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_sad_u32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_sad_u32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_sad_u32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_sad_u32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_sad_u32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_sad_u32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_sad_u32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_sad_u32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xdc,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_sad_u32 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xdc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xdd,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_cvt_pk_u8_f32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_cvt_pk_u8_f32 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xdd,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_cvt_pk_u8_f32 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xdd,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xde,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_div_fixup_f32 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_div_fixup_f32 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_div_fixup_f32 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_div_fixup_f32 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xde,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xde,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xde,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xde,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xde,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, v3 mul:2
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, v3 mul:4
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0x0e,0x14]
|
|
|
|
v_div_fixup_f32 v5, v1, v2, v3 div:2
|
|
// CHECK: [0x05,0x00,0xde,0xd1,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[254:255], v[1:2], v[2:3], v[3:4]
|
|
// CHECK: [0xfe,0x00,0xdf,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[254:255], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0xfe,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], s[2:3], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x02,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], s[4:5], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x04,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], s[100:101], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x64,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], flat_scratch, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], vcc, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], exec, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], 0, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], -1, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], 0.5, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], -4.0, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[254:255], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0xfd,0x0f,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], s[4:5], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x09,0x0c,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], s[6:7], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x0d,0x0c,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], s[100:101], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0xc9,0x0c,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], flat_scratch, v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], vcc, v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], exec, v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], 0, v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], -1, v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], 0.5, v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], -4.0, v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], v[254:255]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0xfa,0x07]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], s[6:7]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], s[8:9]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0x22,0x00]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], s[100:101]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0x92,0x01]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], flat_scratch
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], vcc
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], exec
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], 0
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], -1
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], 0.5
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], -4.0
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_div_fixup_f64 v[5:6], -v[1:2], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], -v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], -v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_div_fixup_f64 v[5:6], -v[1:2], -v[2:3], -v[3:4]
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_div_fixup_f64 v[5:6], |v[1:2]|, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x01,0xdf,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], |v[2:3]|, v[3:4]
|
|
// CHECK: [0x05,0x02,0xdf,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], |v[3:4]|
|
|
// CHECK: [0x05,0x04,0xdf,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], |v[1:2]|, |v[2:3]|, |v[3:4]|
|
|
// CHECK: [0x05,0x07,0xdf,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], v[3:4] clamp
|
|
// CHECK: [0x05,0x80,0xdf,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], v[3:4] mul:2
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], v[3:4] mul:4
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0x0e,0x14]
|
|
|
|
v_div_fixup_f64 v[5:6], v[1:2], v[2:3], v[3:4] div:2
|
|
// CHECK: [0x05,0x00,0xdf,0xd1,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, v2, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_scale_f32 v255, vcc, v1, v2, v3
|
|
// CHECK: [0xff,0x6a,0xe0,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, v255, v2, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, s1, v2, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, s101, v2, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, m0, v2, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, 0, v2, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, -1, v2, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, 0.5, v2, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, -4.0, v2, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, v255, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, s2, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, s101, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, m0, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, 0, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, -1, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, 0.5, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, -4.0, v3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, v2, v255
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, v2, s3
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, v2, s101
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, v2, m0
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, v2, 0
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, v2, -1
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, v2, 0.5
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_div_scale_f32 v5, vcc, v1, v2, -4.0
|
|
// CHECK: [0x05,0x6a,0xe0,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_scale_f64 v[254:255], vcc, v[1:2], v[2:3], v[3:4]
|
|
// CHECK: [0xfe,0x6a,0xe1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[254:255], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0xfe,0x05,0x0e,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, s[2:3], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x02,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, s[4:5], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x04,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, s[100:101], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x64,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, flat_scratch, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, vcc, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, exec, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, 0, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, -1, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, 0.5, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, -4.0, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], v[254:255], v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0xfd,0x0f,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], s[4:5], v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0x09,0x0c,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], s[6:7], v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0x0d,0x0c,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], s[100:101], v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0xc9,0x0c,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], flat_scratch, v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], vcc, v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], exec, v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], 0, v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], -1, v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], 0.5, v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], -4.0, v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], v[2:3], v[254:255]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0x05,0xfa,0x07]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], v[2:3], s[6:7]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], v[2:3], s[8:9]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0x05,0x22,0x00]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], v[2:3], s[100:101]
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0x05,0x92,0x01]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], v[2:3], flat_scratch
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], v[2:3], vcc
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], v[2:3], exec
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], v[2:3], 0
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], v[2:3], -1
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], v[2:3], 0.5
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_div_scale_f64 v[5:6], vcc, v[1:2], v[2:3], -4.0
|
|
// CHECK: [0x05,0x6a,0xe1,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_div_fmas_f32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fmas_f32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xe2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fmas_f32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_div_fmas_f32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_div_fmas_f32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_div_fmas_f32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_div_fmas_f32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_div_fmas_f32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_div_fmas_f32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_div_fmas_f32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_div_fmas_f32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_div_fmas_f32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_div_fmas_f32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_div_fmas_f32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_div_fmas_f32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_div_fmas_f32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_div_fmas_f32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_div_fmas_f32 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_div_fmas_f32 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_div_fmas_f32 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_div_fmas_f32 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_div_fmas_f32 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xe2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fmas_f32 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xe2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fmas_f32 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xe2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fmas_f32 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xe2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fmas_f32 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xe2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fmas_f32 v5, v1, v2, v3 mul:2
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_div_fmas_f32 v5, v1, v2, v3 mul:4
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0x05,0x0e,0x14]
|
|
|
|
v_div_fmas_f32 v5, v1, v2, v3 div:2
|
|
// CHECK: [0x05,0x00,0xe2,0xd1,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fmas_f64 v[254:255], v[1:2], v[2:3], v[3:4]
|
|
// CHECK: [0xfe,0x00,0xe3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], v[254:255], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0xfe,0x05,0x0e,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], vcc, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], 0, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], -1, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], 0.5, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], -4.0, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], v[254:255], v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0xfd,0x0f,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], vcc, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], 0, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], -1, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], 0.5, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], -4.0, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], v[2:3], v[254:255]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0x05,0xfa,0x07]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], v[2:3], vcc
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], v[2:3], 0
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], v[2:3], -1
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], v[2:3], 0.5
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], v[2:3], -4.0
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_div_fmas_f64 v[5:6], -v[1:2], v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], -v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], v[2:3], -v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_div_fmas_f64 v[5:6], -v[1:2], -v[2:3], -v[3:4]
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_div_fmas_f64 v[5:6], |v[1:2]|, v[2:3], v[3:4]
|
|
// CHECK: [0x05,0x01,0xe3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], |v[2:3]|, v[3:4]
|
|
// CHECK: [0x05,0x02,0xe3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], v[2:3], |v[3:4]|
|
|
// CHECK: [0x05,0x04,0xe3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], |v[1:2]|, |v[2:3]|, |v[3:4]|
|
|
// CHECK: [0x05,0x07,0xe3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], v[2:3], v[3:4] clamp
|
|
// CHECK: [0x05,0x80,0xe3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], v[2:3], v[3:4] mul:2
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], v[2:3], v[3:4] mul:4
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0x05,0x0e,0x14]
|
|
|
|
v_div_fmas_f64 v[5:6], v[1:2], v[2:3], v[3:4] div:2
|
|
// CHECK: [0x05,0x00,0xe3,0xd1,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_msad_u8 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_msad_u8 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xe4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_msad_u8 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_msad_u8 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_msad_u8 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_msad_u8 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_msad_u8 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_msad_u8 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_msad_u8 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_msad_u8 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_msad_u8 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_msad_u8 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_msad_u8 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_msad_u8 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_msad_u8 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_msad_u8 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_msad_u8 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_msad_u8 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_msad_u8 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_msad_u8 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_msad_u8 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_msad_u8 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_msad_u8 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_msad_u8 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_msad_u8 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_msad_u8 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_msad_u8 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_msad_u8 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_msad_u8 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_msad_u8 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_msad_u8 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_msad_u8 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_msad_u8 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_msad_u8 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_msad_u8 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_msad_u8 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_msad_u8 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_msad_u8 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_msad_u8 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_msad_u8 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_msad_u8 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_msad_u8 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_msad_u8 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_msad_u8 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xe4,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_msad_u8 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xe4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[254:255], v[1:2], v2, v[3:4]
|
|
// CHECK: [0xfe,0x00,0xe5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[254:255], v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0xfe,0x05,0x0e,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], s[2:3], v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x02,0x04,0x0e,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], s[4:5], v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x04,0x04,0x0e,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], s[100:101], v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x64,0x04,0x0e,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], flat_scratch, v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], vcc, v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], exec, v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], 0, v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], -1, v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], 0.5, v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], -4.0, v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], v255, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], s2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], s101, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], flat_scratch_lo, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], flat_scratch_hi, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], vcc_lo, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], vcc_hi, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], m0, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], exec_lo, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], exec_hi, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], 0, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], -1, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], 0.5, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], -4.0, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, v[254:255]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xfa,0x07]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, s[6:7]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, s[8:9]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x22,0x00]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, s[100:101]
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x92,0x01]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, flat_scratch
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, vcc
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, exec
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, 0
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, -1
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, 0.5
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, -4.0
|
|
// CHECK: [0x05,0x00,0xe5,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4] clamp
|
|
// CHECK: [0x05,0x80,0xe5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[254:255], v[1:2], v2, v[3:4]
|
|
// CHECK: [0xfe,0x00,0xe6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[254:255], v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0xfe,0x05,0x0e,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], s[2:3], v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x02,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], s[4:5], v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x04,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], s[100:101], v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x64,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], flat_scratch, v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], vcc, v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], exec, v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], 0, v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], -1, v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], 0.5, v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], -4.0, v2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], v255, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], s2, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], s101, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], flat_scratch_lo, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], flat_scratch_hi, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], vcc_lo, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], vcc_hi, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], m0, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], exec_lo, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], exec_hi, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], 0, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], -1, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], 0.5, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], -4.0, v[3:4]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, v[254:255]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xfa,0x07]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, s[6:7]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, s[8:9]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x22,0x00]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, s[100:101]
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x92,0x01]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, flat_scratch
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, vcc
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, exec
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, 0
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, -1
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, 0.5
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, -4.0
|
|
// CHECK: [0x05,0x00,0xe6,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4] clamp
|
|
// CHECK: [0x05,0x80,0xe6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], v[1:2], v2, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], s[2:3], v2, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x02,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], s[4:5], v2, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x04,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], s[100:101], v2, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x64,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], flat_scratch, v2, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], vcc, v2, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], exec, v2, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], 0, v2, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], -1, v2, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], 0.5, v2, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], -4.0, v2, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], v[1:2], s2, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], v[1:2], s101, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], v[1:2], flat_scratch_lo, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], v[1:2], flat_scratch_hi, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], v[1:2], vcc_lo, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], v[1:2], vcc_hi, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], v[1:2], m0, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], v[1:2], exec_lo, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], v[1:2], exec_hi, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], v[1:2], 0, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], v[1:2], -1, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], v[1:2], 0.5, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], v[1:2], -4.0, v[3:6]
|
|
// CHECK: [0xfc,0x00,0xe7,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_mqsad_u32_u8 v[252:255], v[1:2], v2, v[3:6] clamp
|
|
// CHECK: [0xfc,0x80,0xe7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[254:255], s[12:13], v1, v2, v[3:4]
|
|
// CHECK: [0xfe,0x0c,0xe8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[14:15], v1, v2, v[3:4]
|
|
// CHECK: [0x05,0x0e,0xe8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[100:101], v1, v2, v[3:4]
|
|
// CHECK: [0x05,0x64,0xe8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], flat_scratch, v1, v2, v[3:4]
|
|
// CHECK: [0x05,0x66,0xe8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], vcc, v1, v2, v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v255, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], s1, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], s101, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], flat_scratch_lo, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], flat_scratch_hi, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], vcc_lo, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], vcc_hi, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], m0, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], exec_lo, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], exec_hi, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], 0, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], -1, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], 0.5, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], -4.0, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, v255, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, s2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, s101, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, flat_scratch_lo, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, flat_scratch_hi, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, vcc_lo, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, vcc_hi, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, m0, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, exec_lo, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, exec_hi, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, 0, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, -1, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, 0.5, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, -4.0, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, v2, v[254:255]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x05,0xfa,0x07]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, v2, s[8:9]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x05,0x22,0x00]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, v2, s[100:101]
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x05,0x92,0x01]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, v2, flat_scratch
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, v2, vcc
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, v2, exec
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, v2, 0
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, v2, -1
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, v2, 0.5
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, v2, -4.0
|
|
// CHECK: [0x05,0x0c,0xe8,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_mad_u64_u32 v[5:6], s[12:13], v1, v2, v[3:4] clamp
|
|
// CHECK: [0x05,0x8c,0xe8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[254:255], s[12:13], v1, v2, v[3:4]
|
|
// CHECK: [0xfe,0x0c,0xe9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[14:15], v1, v2, v[3:4]
|
|
// CHECK: [0x05,0x0e,0xe9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[100:101], v1, v2, v[3:4]
|
|
// CHECK: [0x05,0x64,0xe9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], flat_scratch, v1, v2, v[3:4]
|
|
// CHECK: [0x05,0x66,0xe9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], vcc, v1, v2, v[3:4]
|
|
// CHECK: [0x05,0x6a,0xe9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v255, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], s1, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], s101, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], flat_scratch_lo, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], flat_scratch_hi, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], vcc_lo, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], vcc_hi, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], m0, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], exec_lo, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], exec_hi, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], 0, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], -1, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], 0.5, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], -4.0, v2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, v255, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, s2, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, s101, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, flat_scratch_lo, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, flat_scratch_hi, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, vcc_lo, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, vcc_hi, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, m0, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, exec_lo, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, exec_hi, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, 0, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, -1, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, 0.5, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, -4.0, v[3:4]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, v2, v[254:255]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x05,0xfa,0x07]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, v2, s[6:7]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x05,0x1a,0x00]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, v2, s[8:9]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x05,0x22,0x00]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, v2, s[100:101]
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x05,0x92,0x01]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, v2, flat_scratch
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, v2, vcc
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, v2, exec
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, v2, 0
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, v2, -1
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, v2, 0.5
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, v2, -4.0
|
|
// CHECK: [0x05,0x0c,0xe9,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_mad_i64_i32 v[5:6], s[12:13], v1, v2, v[3:4] clamp
|
|
// CHECK: [0x05,0x8c,0xe9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xea,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_legacy_f16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_legacy_f16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_legacy_f16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_legacy_f16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_legacy_f16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_legacy_f16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_legacy_f16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_legacy_f16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_legacy_f16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_legacy_f16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_mad_legacy_f16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_mad_legacy_f16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_mad_legacy_f16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_legacy_f16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_mad_legacy_f16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_legacy_f16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_mad_legacy_f16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_mad_legacy_f16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_legacy_f16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_mad_legacy_f16 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_mad_legacy_f16 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_mad_legacy_f16 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_mad_legacy_f16 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xea,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_mad_legacy_f16 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xea,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xea,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xea,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xea,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_f16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xea,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_u16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_u16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xeb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_u16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_u16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_u16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_u16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_u16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_u16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_u16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_u16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_u16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_u16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_u16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_legacy_u16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_legacy_u16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_legacy_u16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_legacy_u16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_legacy_u16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_legacy_u16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_legacy_u16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_legacy_u16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_legacy_u16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_legacy_u16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_mad_legacy_u16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_mad_legacy_u16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_mad_legacy_u16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_legacy_u16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_mad_legacy_u16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_legacy_u16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_mad_legacy_u16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_mad_legacy_u16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_legacy_u16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xeb,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_mad_legacy_u16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xeb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_i16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_i16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xec,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_i16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_legacy_i16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_i16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_i16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_i16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_i16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_i16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_i16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_i16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_i16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_legacy_i16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_legacy_i16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_legacy_i16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_legacy_i16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_legacy_i16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_legacy_i16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_legacy_i16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_legacy_i16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_legacy_i16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_legacy_i16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_legacy_i16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_mad_legacy_i16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_mad_legacy_i16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_mad_legacy_i16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_legacy_i16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_mad_legacy_i16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_legacy_i16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_mad_legacy_i16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_mad_legacy_i16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_legacy_i16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xec,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_mad_legacy_i16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xec,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_perm_b32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_perm_b32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xed,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_perm_b32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_perm_b32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_perm_b32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_perm_b32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_perm_b32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_perm_b32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_perm_b32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_perm_b32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_perm_b32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_perm_b32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_perm_b32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_perm_b32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_perm_b32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_perm_b32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_perm_b32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_perm_b32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_perm_b32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_perm_b32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_perm_b32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_perm_b32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_perm_b32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_perm_b32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_perm_b32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_perm_b32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_perm_b32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_perm_b32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_perm_b32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_perm_b32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_perm_b32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_perm_b32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_perm_b32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_perm_b32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_perm_b32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_perm_b32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_perm_b32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_perm_b32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_perm_b32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_perm_b32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_perm_b32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_perm_b32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_perm_b32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_perm_b32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xed,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_fma_legacy_f16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_legacy_f16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xee,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_legacy_f16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_fma_legacy_f16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_fma_legacy_f16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_fma_legacy_f16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_fma_legacy_f16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_fma_legacy_f16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_fma_legacy_f16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_fma_legacy_f16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_fma_legacy_f16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_fma_legacy_f16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_fma_legacy_f16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_fma_legacy_f16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_fma_legacy_f16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_fma_legacy_f16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_fma_legacy_f16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_fma_legacy_f16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_fma_legacy_f16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_fma_legacy_f16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_fma_legacy_f16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_fma_legacy_f16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_fma_legacy_f16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_fma_legacy_f16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_fma_legacy_f16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_fma_legacy_f16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_fma_legacy_f16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_fma_legacy_f16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_fma_legacy_f16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_fma_legacy_f16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_fma_legacy_f16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_fma_legacy_f16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_fma_legacy_f16 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_fma_legacy_f16 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_fma_legacy_f16 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_fma_legacy_f16 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xee,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_fma_legacy_f16 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xee,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_legacy_f16 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xee,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_legacy_f16 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xee,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_legacy_f16 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xee,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_legacy_f16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xee,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xef,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_div_fixup_legacy_f16 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_div_fixup_legacy_f16 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xef,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_div_fixup_legacy_f16 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xef,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xef,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xef,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xef,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_legacy_f16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xef,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0xf0,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0xff,0x05,0x02,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x65,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x66,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x67,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x80,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0xff,0x03,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0x05,0x00,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0xff,0x00,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0x83,0x01,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0xef,0x01,0x00]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0xf0,0xd1,0x01,0x05,0x02,0x20]
|
|
|
|
v_cvt_pkaccum_u8_f32 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0xf0,0xd1,0x01,0x05,0x02,0x00]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xf1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, v3 op_sel:[0,0,0,0]
|
|
// CHECK: [0x05,0x00,0xf1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, v3 op_sel:[1,0,0,0]
|
|
// CHECK: [0x05,0x08,0xf1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, v3 op_sel:[0,1,0,0]
|
|
// CHECK: [0x05,0x10,0xf1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, v3 op_sel:[0,0,1,0]
|
|
// CHECK: [0x05,0x20,0xf1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, v3 op_sel:[0,0,0,1]
|
|
// CHECK: [0x05,0x40,0xf1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, v3 op_sel:[1,1,1,1]
|
|
// CHECK: [0x05,0x78,0xf1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u32_u16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xf1,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xf2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, v3 op_sel:[0,0,0,0]
|
|
// CHECK: [0x05,0x00,0xf2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, v3 op_sel:[1,0,0,0]
|
|
// CHECK: [0x05,0x08,0xf2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, v3 op_sel:[0,1,0,0]
|
|
// CHECK: [0x05,0x10,0xf2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, v3 op_sel:[0,0,1,0]
|
|
// CHECK: [0x05,0x20,0xf2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, v3 op_sel:[0,0,0,1]
|
|
// CHECK: [0x05,0x40,0xf2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, v3 op_sel:[1,1,1,1]
|
|
// CHECK: [0x05,0x78,0xf2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i32_i16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xf2,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_xad_u32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_xad_u32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xf3,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_xad_u32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_xad_u32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_xad_u32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_xad_u32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_xad_u32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_xad_u32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_xad_u32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_xad_u32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_xad_u32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_xad_u32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_xad_u32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_xad_u32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_xad_u32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_xad_u32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_xad_u32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_xad_u32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_xad_u32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_xad_u32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_xad_u32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_xad_u32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_xad_u32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_xad_u32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_xad_u32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_xad_u32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_xad_u32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_xad_u32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_xad_u32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_xad_u32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_xad_u32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_xad_u32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_xad_u32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_xad_u32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_xad_u32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_xad_u32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_xad_u32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_xad_u32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_xad_u32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_xad_u32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_xad_u32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_xad_u32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_xad_u32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_xad_u32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xf3,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_min3_f16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xf4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_min3_f16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_min3_f16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_min3_f16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_min3_f16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_min3_f16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_min3_f16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_min3_f16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_min3_f16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_min3_f16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_min3_f16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_min3_f16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_min3_f16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_min3_f16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_min3_f16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_min3_f16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_min3_f16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_min3_f16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_min3_f16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_min3_f16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_min3_f16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_min3_f16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_min3_f16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_min3_f16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_min3_f16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_min3_f16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_min3_f16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_min3_f16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_min3_f16 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_min3_f16 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_min3_f16 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_min3_f16 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_min3_f16 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xf4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xf4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xf4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xf4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, v1, v2, v3 op_sel:[0,0,0,0]
|
|
// CHECK: [0x05,0x00,0xf4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, v1, v2, v3 op_sel:[1,0,0,0]
|
|
// CHECK: [0x05,0x08,0xf4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, v1, v2, v3 op_sel:[0,1,0,0]
|
|
// CHECK: [0x05,0x10,0xf4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, v1, v2, v3 op_sel:[0,0,1,0]
|
|
// CHECK: [0x05,0x20,0xf4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, v1, v2, v3 op_sel:[0,0,0,1]
|
|
// CHECK: [0x05,0x40,0xf4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, v1, v2, v3 op_sel:[1,1,1,1]
|
|
// CHECK: [0x05,0x78,0xf4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_f16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xf4,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_i16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xf5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_min3_i16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_min3_i16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_min3_i16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_min3_i16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_min3_i16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_min3_i16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_min3_i16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_min3_i16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_min3_i16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_min3_i16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_min3_i16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_min3_i16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_min3_i16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_min3_i16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_min3_i16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_min3_i16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_min3_i16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_min3_i16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_min3_i16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_min3_i16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_min3_i16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_min3_i16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_min3_i16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_min3_i16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_min3_i16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_min3_i16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_min3_i16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_min3_i16 v5, v1, v2, v3 op_sel:[0,0,0,0]
|
|
// CHECK: [0x05,0x00,0xf5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, v1, v2, v3 op_sel:[1,0,0,0]
|
|
// CHECK: [0x05,0x08,0xf5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, v1, v2, v3 op_sel:[0,1,0,0]
|
|
// CHECK: [0x05,0x10,0xf5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, v1, v2, v3 op_sel:[0,0,1,0]
|
|
// CHECK: [0x05,0x20,0xf5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, v1, v2, v3 op_sel:[0,0,0,1]
|
|
// CHECK: [0x05,0x40,0xf5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_i16 v5, v1, v2, v3 op_sel:[1,1,1,1]
|
|
// CHECK: [0x05,0x78,0xf5,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_u16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xf6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_min3_u16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_min3_u16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_min3_u16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_min3_u16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_min3_u16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_min3_u16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_min3_u16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_min3_u16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_min3_u16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_min3_u16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_min3_u16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_min3_u16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_min3_u16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_min3_u16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_min3_u16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_min3_u16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_min3_u16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_min3_u16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_min3_u16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_min3_u16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_min3_u16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_min3_u16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_min3_u16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_min3_u16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_min3_u16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_min3_u16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_min3_u16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_min3_u16 v5, v1, v2, v3 op_sel:[0,0,0,0]
|
|
// CHECK: [0x05,0x00,0xf6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, v1, v2, v3 op_sel:[1,0,0,0]
|
|
// CHECK: [0x05,0x08,0xf6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, v1, v2, v3 op_sel:[0,1,0,0]
|
|
// CHECK: [0x05,0x10,0xf6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, v1, v2, v3 op_sel:[0,0,1,0]
|
|
// CHECK: [0x05,0x20,0xf6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, v1, v2, v3 op_sel:[0,0,0,1]
|
|
// CHECK: [0x05,0x40,0xf6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_min3_u16 v5, v1, v2, v3 op_sel:[1,1,1,1]
|
|
// CHECK: [0x05,0x78,0xf6,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xf7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_max3_f16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_max3_f16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_max3_f16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_max3_f16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_max3_f16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_max3_f16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_max3_f16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_max3_f16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_max3_f16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_max3_f16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_max3_f16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_max3_f16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_max3_f16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_max3_f16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_max3_f16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_max3_f16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_max3_f16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_max3_f16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_max3_f16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_max3_f16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_max3_f16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_max3_f16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_max3_f16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_max3_f16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_max3_f16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_max3_f16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_max3_f16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_max3_f16 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_max3_f16 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_max3_f16 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_max3_f16 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_max3_f16 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xf7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xf7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xf7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xf7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, v1, v2, v3 op_sel:[0,0,0,0]
|
|
// CHECK: [0x05,0x00,0xf7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, v1, v2, v3 op_sel:[1,0,0,0]
|
|
// CHECK: [0x05,0x08,0xf7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, v1, v2, v3 op_sel:[0,1,0,0]
|
|
// CHECK: [0x05,0x10,0xf7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, v1, v2, v3 op_sel:[0,0,1,0]
|
|
// CHECK: [0x05,0x20,0xf7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, v1, v2, v3 op_sel:[0,0,0,1]
|
|
// CHECK: [0x05,0x40,0xf7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, v1, v2, v3 op_sel:[1,1,1,1]
|
|
// CHECK: [0x05,0x78,0xf7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_f16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xf7,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_i16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xf8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_max3_i16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_max3_i16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_max3_i16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_max3_i16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_max3_i16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_max3_i16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_max3_i16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_max3_i16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_max3_i16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_max3_i16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_max3_i16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_max3_i16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_max3_i16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_max3_i16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_max3_i16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_max3_i16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_max3_i16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_max3_i16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_max3_i16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_max3_i16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_max3_i16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_max3_i16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_max3_i16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_max3_i16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_max3_i16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_max3_i16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_max3_i16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_max3_i16 v5, v1, v2, v3 op_sel:[0,0,0,0]
|
|
// CHECK: [0x05,0x00,0xf8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, v1, v2, v3 op_sel:[1,0,0,0]
|
|
// CHECK: [0x05,0x08,0xf8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, v1, v2, v3 op_sel:[0,1,0,0]
|
|
// CHECK: [0x05,0x10,0xf8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, v1, v2, v3 op_sel:[0,0,1,0]
|
|
// CHECK: [0x05,0x20,0xf8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, v1, v2, v3 op_sel:[0,0,0,1]
|
|
// CHECK: [0x05,0x40,0xf8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_i16 v5, v1, v2, v3 op_sel:[1,1,1,1]
|
|
// CHECK: [0x05,0x78,0xf8,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_u16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xf9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_max3_u16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_max3_u16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_max3_u16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_max3_u16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_max3_u16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_max3_u16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_max3_u16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_max3_u16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_max3_u16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_max3_u16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_max3_u16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_max3_u16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_max3_u16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_max3_u16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_max3_u16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_max3_u16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_max3_u16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_max3_u16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_max3_u16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_max3_u16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_max3_u16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_max3_u16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_max3_u16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_max3_u16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_max3_u16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_max3_u16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_max3_u16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_max3_u16 v5, v1, v2, v3 op_sel:[0,0,0,0]
|
|
// CHECK: [0x05,0x00,0xf9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, v1, v2, v3 op_sel:[1,0,0,0]
|
|
// CHECK: [0x05,0x08,0xf9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, v1, v2, v3 op_sel:[0,1,0,0]
|
|
// CHECK: [0x05,0x10,0xf9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, v1, v2, v3 op_sel:[0,0,1,0]
|
|
// CHECK: [0x05,0x20,0xf9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, v1, v2, v3 op_sel:[0,0,0,1]
|
|
// CHECK: [0x05,0x40,0xf9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_max3_u16 v5, v1, v2, v3 op_sel:[1,1,1,1]
|
|
// CHECK: [0x05,0x78,0xf9,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xfa,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_med3_f16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_med3_f16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_med3_f16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_med3_f16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_med3_f16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_med3_f16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_med3_f16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_med3_f16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_med3_f16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_med3_f16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_med3_f16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_med3_f16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_med3_f16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_med3_f16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_med3_f16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_med3_f16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_med3_f16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_med3_f16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_med3_f16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_med3_f16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_med3_f16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_med3_f16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_med3_f16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_med3_f16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_med3_f16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_med3_f16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_med3_f16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_med3_f16 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0x0e,0x24]
|
|
|
|
v_med3_f16 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0x0e,0x44]
|
|
|
|
v_med3_f16 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0x0e,0x84]
|
|
|
|
v_med3_f16 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_med3_f16 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xfa,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xfa,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xfa,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xfa,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, v1, v2, v3 op_sel:[0,0,0,0]
|
|
// CHECK: [0x05,0x00,0xfa,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, v1, v2, v3 op_sel:[1,0,0,0]
|
|
// CHECK: [0x05,0x08,0xfa,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, v1, v2, v3 op_sel:[0,1,0,0]
|
|
// CHECK: [0x05,0x10,0xfa,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, v1, v2, v3 op_sel:[0,0,1,0]
|
|
// CHECK: [0x05,0x20,0xfa,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, v1, v2, v3 op_sel:[0,0,0,1]
|
|
// CHECK: [0x05,0x40,0xfa,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, v1, v2, v3 op_sel:[1,1,1,1]
|
|
// CHECK: [0x05,0x78,0xfa,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_f16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xfa,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_i16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xfb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_med3_i16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_med3_i16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_med3_i16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_med3_i16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_med3_i16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_med3_i16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_med3_i16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_med3_i16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_med3_i16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_med3_i16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_med3_i16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_med3_i16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_med3_i16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_med3_i16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_med3_i16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_med3_i16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_med3_i16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_med3_i16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_med3_i16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_med3_i16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_med3_i16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_med3_i16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_med3_i16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_med3_i16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_med3_i16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_med3_i16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_med3_i16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_med3_i16 v5, v1, v2, v3 op_sel:[0,0,0,0]
|
|
// CHECK: [0x05,0x00,0xfb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, v1, v2, v3 op_sel:[1,0,0,0]
|
|
// CHECK: [0x05,0x08,0xfb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, v1, v2, v3 op_sel:[0,1,0,0]
|
|
// CHECK: [0x05,0x10,0xfb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, v1, v2, v3 op_sel:[0,0,1,0]
|
|
// CHECK: [0x05,0x20,0xfb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, v1, v2, v3 op_sel:[0,0,0,1]
|
|
// CHECK: [0x05,0x40,0xfb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_i16 v5, v1, v2, v3 op_sel:[1,1,1,1]
|
|
// CHECK: [0x05,0x78,0xfb,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_u16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xfc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_med3_u16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_med3_u16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_med3_u16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_med3_u16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_med3_u16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_med3_u16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_med3_u16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_med3_u16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_med3_u16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_med3_u16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_med3_u16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_med3_u16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_med3_u16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_med3_u16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_med3_u16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_med3_u16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_med3_u16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_med3_u16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_med3_u16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_med3_u16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_med3_u16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_med3_u16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_med3_u16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_med3_u16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_med3_u16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_med3_u16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_med3_u16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_med3_u16 v5, v1, v2, v3 op_sel:[0,0,0,0]
|
|
// CHECK: [0x05,0x00,0xfc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, v1, v2, v3 op_sel:[1,0,0,0]
|
|
// CHECK: [0x05,0x08,0xfc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, v1, v2, v3 op_sel:[0,1,0,0]
|
|
// CHECK: [0x05,0x10,0xfc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, v1, v2, v3 op_sel:[0,0,1,0]
|
|
// CHECK: [0x05,0x20,0xfc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, v1, v2, v3 op_sel:[0,0,0,1]
|
|
// CHECK: [0x05,0x40,0xfc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_med3_u16 v5, v1, v2, v3 op_sel:[1,1,1,1]
|
|
// CHECK: [0x05,0x78,0xfc,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xfd,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_lshl_add_u32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_lshl_add_u32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_lshl_add_u32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_lshl_add_u32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_lshl_add_u32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_lshl_add_u32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_lshl_add_u32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_lshl_add_u32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_lshl_add_u32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_lshl_add_u32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_lshl_add_u32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_lshl_add_u32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_lshl_add_u32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_lshl_add_u32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_lshl_add_u32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_lshl_add_u32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_lshl_add_u32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_lshl_add_u32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_lshl_add_u32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_lshl_add_u32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_lshl_add_u32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_lshl_add_u32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_lshl_add_u32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_lshl_add_u32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_lshl_add_u32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_lshl_add_u32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_lshl_add_u32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_lshl_add_u32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xfd,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_add_lshl_u32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_add_lshl_u32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xfe,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_add_lshl_u32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_add_lshl_u32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_add_lshl_u32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_add_lshl_u32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_add_lshl_u32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_add_lshl_u32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_add_lshl_u32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_add_lshl_u32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_add_lshl_u32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_add_lshl_u32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_add_lshl_u32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_add_lshl_u32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_add_lshl_u32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_add_lshl_u32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_add_lshl_u32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_add_lshl_u32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_add_lshl_u32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_add_lshl_u32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_add_lshl_u32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_add_lshl_u32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_add_lshl_u32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_add_lshl_u32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_add_lshl_u32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_add_lshl_u32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_add_lshl_u32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_add_lshl_u32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_add_lshl_u32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_add_lshl_u32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_add_lshl_u32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_add_lshl_u32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_add_lshl_u32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_add_lshl_u32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_add_lshl_u32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_add_lshl_u32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_add_lshl_u32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_add_lshl_u32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_add_lshl_u32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_add_lshl_u32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_add_lshl_u32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_add_lshl_u32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_add_lshl_u32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_add_lshl_u32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xfe,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_add3_u32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_add3_u32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xff,0xd1,0x01,0x05,0x0e,0x04]
|
|
|
|
v_add3_u32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0xff,0x05,0x0e,0x04]
|
|
|
|
v_add3_u32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x04,0x0e,0x04]
|
|
|
|
v_add3_u32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x65,0x04,0x0e,0x04]
|
|
|
|
v_add3_u32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x66,0x04,0x0e,0x04]
|
|
|
|
v_add3_u32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x67,0x04,0x0e,0x04]
|
|
|
|
v_add3_u32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_add3_u32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_add3_u32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_add3_u32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_add3_u32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_add3_u32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x80,0x04,0x0e,0x04]
|
|
|
|
v_add3_u32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_add3_u32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_add3_u32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_add3_u32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0xff,0x0f,0x04]
|
|
|
|
v_add3_u32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x05,0x0c,0x04]
|
|
|
|
v_add3_u32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_add3_u32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_add3_u32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_add3_u32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_add3_u32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_add3_u32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_add3_u32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_add3_u32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0xff,0x0c,0x04]
|
|
|
|
v_add3_u32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x01,0x0d,0x04]
|
|
|
|
v_add3_u32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x83,0x0d,0x04]
|
|
|
|
v_add3_u32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_add3_u32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0xef,0x0d,0x04]
|
|
|
|
v_add3_u32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x05,0xfe,0x07]
|
|
|
|
v_add3_u32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x05,0x0e,0x00]
|
|
|
|
v_add3_u32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x05,0x96,0x01]
|
|
|
|
v_add3_u32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x05,0x9a,0x01]
|
|
|
|
v_add3_u32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x05,0x9e,0x01]
|
|
|
|
v_add3_u32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x05,0xaa,0x01]
|
|
|
|
v_add3_u32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x05,0xae,0x01]
|
|
|
|
v_add3_u32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x05,0xf2,0x01]
|
|
|
|
v_add3_u32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x05,0xfa,0x01]
|
|
|
|
v_add3_u32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x05,0xfe,0x01]
|
|
|
|
v_add3_u32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x05,0x02,0x02]
|
|
|
|
v_add3_u32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x05,0x06,0x03]
|
|
|
|
v_add3_u32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x05,0xc2,0x03]
|
|
|
|
v_add3_u32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xff,0xd1,0x01,0x05,0xde,0x03]
|
|
|
|
v_lshl_or_b32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_lshl_or_b32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0x00,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_lshl_or_b32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0xff,0x05,0x0e,0x04]
|
|
|
|
v_lshl_or_b32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x04,0x0e,0x04]
|
|
|
|
v_lshl_or_b32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x65,0x04,0x0e,0x04]
|
|
|
|
v_lshl_or_b32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x66,0x04,0x0e,0x04]
|
|
|
|
v_lshl_or_b32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x67,0x04,0x0e,0x04]
|
|
|
|
v_lshl_or_b32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_lshl_or_b32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_lshl_or_b32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_lshl_or_b32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_lshl_or_b32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_lshl_or_b32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x80,0x04,0x0e,0x04]
|
|
|
|
v_lshl_or_b32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_lshl_or_b32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_lshl_or_b32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_lshl_or_b32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0xff,0x0f,0x04]
|
|
|
|
v_lshl_or_b32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x05,0x0c,0x04]
|
|
|
|
v_lshl_or_b32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_lshl_or_b32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_lshl_or_b32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_lshl_or_b32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_lshl_or_b32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_lshl_or_b32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_lshl_or_b32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_lshl_or_b32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0xff,0x0c,0x04]
|
|
|
|
v_lshl_or_b32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x01,0x0d,0x04]
|
|
|
|
v_lshl_or_b32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x83,0x0d,0x04]
|
|
|
|
v_lshl_or_b32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_lshl_or_b32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0xef,0x0d,0x04]
|
|
|
|
v_lshl_or_b32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x05,0xfe,0x07]
|
|
|
|
v_lshl_or_b32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x05,0x0e,0x00]
|
|
|
|
v_lshl_or_b32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x05,0x96,0x01]
|
|
|
|
v_lshl_or_b32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x05,0x9a,0x01]
|
|
|
|
v_lshl_or_b32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x05,0x9e,0x01]
|
|
|
|
v_lshl_or_b32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x05,0xaa,0x01]
|
|
|
|
v_lshl_or_b32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x05,0xae,0x01]
|
|
|
|
v_lshl_or_b32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x05,0xf2,0x01]
|
|
|
|
v_lshl_or_b32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x05,0xfa,0x01]
|
|
|
|
v_lshl_or_b32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x05,0xfe,0x01]
|
|
|
|
v_lshl_or_b32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x05,0x02,0x02]
|
|
|
|
v_lshl_or_b32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x05,0x06,0x03]
|
|
|
|
v_lshl_or_b32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x05,0xc2,0x03]
|
|
|
|
v_lshl_or_b32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0x00,0xd2,0x01,0x05,0xde,0x03]
|
|
|
|
v_and_or_b32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_and_or_b32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0x01,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_and_or_b32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0xff,0x05,0x0e,0x04]
|
|
|
|
v_and_or_b32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x04,0x0e,0x04]
|
|
|
|
v_and_or_b32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x65,0x04,0x0e,0x04]
|
|
|
|
v_and_or_b32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x66,0x04,0x0e,0x04]
|
|
|
|
v_and_or_b32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x67,0x04,0x0e,0x04]
|
|
|
|
v_and_or_b32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_and_or_b32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_and_or_b32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_and_or_b32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_and_or_b32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_and_or_b32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x80,0x04,0x0e,0x04]
|
|
|
|
v_and_or_b32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_and_or_b32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_and_or_b32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_and_or_b32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0xff,0x0f,0x04]
|
|
|
|
v_and_or_b32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x05,0x0c,0x04]
|
|
|
|
v_and_or_b32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_and_or_b32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_and_or_b32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_and_or_b32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_and_or_b32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_and_or_b32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_and_or_b32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_and_or_b32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0xff,0x0c,0x04]
|
|
|
|
v_and_or_b32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x01,0x0d,0x04]
|
|
|
|
v_and_or_b32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x83,0x0d,0x04]
|
|
|
|
v_and_or_b32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_and_or_b32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0xef,0x0d,0x04]
|
|
|
|
v_and_or_b32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x05,0xfe,0x07]
|
|
|
|
v_and_or_b32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x05,0x0e,0x00]
|
|
|
|
v_and_or_b32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x05,0x96,0x01]
|
|
|
|
v_and_or_b32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x05,0x9a,0x01]
|
|
|
|
v_and_or_b32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x05,0x9e,0x01]
|
|
|
|
v_and_or_b32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x05,0xaa,0x01]
|
|
|
|
v_and_or_b32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x05,0xae,0x01]
|
|
|
|
v_and_or_b32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x05,0xf2,0x01]
|
|
|
|
v_and_or_b32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x05,0xfa,0x01]
|
|
|
|
v_and_or_b32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x05,0xfe,0x01]
|
|
|
|
v_and_or_b32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x05,0x02,0x02]
|
|
|
|
v_and_or_b32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x05,0x06,0x03]
|
|
|
|
v_and_or_b32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x05,0xc2,0x03]
|
|
|
|
v_and_or_b32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0x01,0xd2,0x01,0x05,0xde,0x03]
|
|
|
|
v_or3_b32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_or3_b32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0x02,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_or3_b32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0xff,0x05,0x0e,0x04]
|
|
|
|
v_or3_b32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x04,0x0e,0x04]
|
|
|
|
v_or3_b32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x65,0x04,0x0e,0x04]
|
|
|
|
v_or3_b32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x66,0x04,0x0e,0x04]
|
|
|
|
v_or3_b32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x67,0x04,0x0e,0x04]
|
|
|
|
v_or3_b32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_or3_b32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_or3_b32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_or3_b32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_or3_b32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_or3_b32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x80,0x04,0x0e,0x04]
|
|
|
|
v_or3_b32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_or3_b32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_or3_b32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_or3_b32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0xff,0x0f,0x04]
|
|
|
|
v_or3_b32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x05,0x0c,0x04]
|
|
|
|
v_or3_b32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_or3_b32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_or3_b32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_or3_b32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_or3_b32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_or3_b32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_or3_b32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_or3_b32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0xff,0x0c,0x04]
|
|
|
|
v_or3_b32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x01,0x0d,0x04]
|
|
|
|
v_or3_b32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x83,0x0d,0x04]
|
|
|
|
v_or3_b32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_or3_b32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0xef,0x0d,0x04]
|
|
|
|
v_or3_b32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x05,0xfe,0x07]
|
|
|
|
v_or3_b32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x05,0x0e,0x00]
|
|
|
|
v_or3_b32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x05,0x96,0x01]
|
|
|
|
v_or3_b32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x05,0x9a,0x01]
|
|
|
|
v_or3_b32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x05,0x9e,0x01]
|
|
|
|
v_or3_b32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x05,0xaa,0x01]
|
|
|
|
v_or3_b32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x05,0xae,0x01]
|
|
|
|
v_or3_b32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x05,0xf2,0x01]
|
|
|
|
v_or3_b32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x05,0xfa,0x01]
|
|
|
|
v_or3_b32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x05,0xfe,0x01]
|
|
|
|
v_or3_b32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x05,0x02,0x02]
|
|
|
|
v_or3_b32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x05,0x06,0x03]
|
|
|
|
v_or3_b32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x05,0xc2,0x03]
|
|
|
|
v_or3_b32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0x02,0xd2,0x01,0x05,0xde,0x03]
|
|
|
|
v_mad_f16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0x03,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x80,0x04,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_f16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_f16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_f16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_f16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_f16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_f16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_f16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_f16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_f16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_f16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x01,0x0d,0x04]
|
|
|
|
v_mad_f16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x83,0x0d,0x04]
|
|
|
|
v_mad_f16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_mad_f16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0xef,0x0d,0x04]
|
|
|
|
v_mad_f16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0xfe,0x07]
|
|
|
|
v_mad_f16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0x0e,0x00]
|
|
|
|
v_mad_f16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0x96,0x01]
|
|
|
|
v_mad_f16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_f16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0x9e,0x01]
|
|
|
|
v_mad_f16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_f16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0xae,0x01]
|
|
|
|
v_mad_f16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0xf2,0x01]
|
|
|
|
v_mad_f16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_f16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0xfe,0x01]
|
|
|
|
v_mad_f16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0x02,0x02]
|
|
|
|
v_mad_f16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0x06,0x03]
|
|
|
|
v_mad_f16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0xc2,0x03]
|
|
|
|
v_mad_f16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0xde,0x03]
|
|
|
|
v_mad_f16 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0x0e,0x24]
|
|
|
|
v_mad_f16 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0x0e,0x44]
|
|
|
|
v_mad_f16 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0x0e,0x84]
|
|
|
|
v_mad_f16 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_mad_f16 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0x03,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0x03,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0x03,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0x03,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, v1, v2, v3 op_sel:[0,0,0,0]
|
|
// CHECK: [0x05,0x00,0x03,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, v1, v2, v3 op_sel:[1,0,0,0]
|
|
// CHECK: [0x05,0x08,0x03,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, v1, v2, v3 op_sel:[0,1,0,0]
|
|
// CHECK: [0x05,0x10,0x03,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, v1, v2, v3 op_sel:[0,0,1,0]
|
|
// CHECK: [0x05,0x20,0x03,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, v1, v2, v3 op_sel:[0,0,0,1]
|
|
// CHECK: [0x05,0x40,0x03,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, v1, v2, v3 op_sel:[1,1,1,1]
|
|
// CHECK: [0x05,0x78,0x03,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_f16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0x03,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0x04,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x80,0x04,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_u16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_u16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_u16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_u16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_u16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_u16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_u16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_u16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_u16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_u16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x01,0x0d,0x04]
|
|
|
|
v_mad_u16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x83,0x0d,0x04]
|
|
|
|
v_mad_u16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_mad_u16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0xef,0x0d,0x04]
|
|
|
|
v_mad_u16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0xfe,0x07]
|
|
|
|
v_mad_u16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0x0e,0x00]
|
|
|
|
v_mad_u16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0x96,0x01]
|
|
|
|
v_mad_u16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_u16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0x9e,0x01]
|
|
|
|
v_mad_u16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_u16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0xae,0x01]
|
|
|
|
v_mad_u16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0xf2,0x01]
|
|
|
|
v_mad_u16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_u16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0xfe,0x01]
|
|
|
|
v_mad_u16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0x02,0x02]
|
|
|
|
v_mad_u16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0x06,0x03]
|
|
|
|
v_mad_u16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0xc2,0x03]
|
|
|
|
v_mad_u16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0xde,0x03]
|
|
|
|
v_mad_u16 v5, v1, v2, v3 op_sel:[0,0,0,0]
|
|
// CHECK: [0x05,0x00,0x04,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, v1, v2, v3 op_sel:[1,0,0,0]
|
|
// CHECK: [0x05,0x08,0x04,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, v1, v2, v3 op_sel:[0,1,0,0]
|
|
// CHECK: [0x05,0x10,0x04,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, v1, v2, v3 op_sel:[0,0,1,0]
|
|
// CHECK: [0x05,0x20,0x04,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, v1, v2, v3 op_sel:[0,0,0,1]
|
|
// CHECK: [0x05,0x40,0x04,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, v1, v2, v3 op_sel:[1,1,1,1]
|
|
// CHECK: [0x05,0x78,0x04,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_u16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0x04,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0x05,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x80,0x04,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_i16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_i16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_i16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_i16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_i16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_i16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_i16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_i16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_i16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_i16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x01,0x0d,0x04]
|
|
|
|
v_mad_i16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x83,0x0d,0x04]
|
|
|
|
v_mad_i16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_mad_i16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0xef,0x0d,0x04]
|
|
|
|
v_mad_i16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0xfe,0x07]
|
|
|
|
v_mad_i16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0x0e,0x00]
|
|
|
|
v_mad_i16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0x96,0x01]
|
|
|
|
v_mad_i16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_i16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0x9e,0x01]
|
|
|
|
v_mad_i16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_i16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0xae,0x01]
|
|
|
|
v_mad_i16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0xf2,0x01]
|
|
|
|
v_mad_i16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_i16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0xfe,0x01]
|
|
|
|
v_mad_i16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0x02,0x02]
|
|
|
|
v_mad_i16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0x06,0x03]
|
|
|
|
v_mad_i16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0xc2,0x03]
|
|
|
|
v_mad_i16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0xde,0x03]
|
|
|
|
v_mad_i16 v5, v1, v2, v3 op_sel:[0,0,0,0]
|
|
// CHECK: [0x05,0x00,0x05,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, v1, v2, v3 op_sel:[1,0,0,0]
|
|
// CHECK: [0x05,0x08,0x05,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, v1, v2, v3 op_sel:[0,1,0,0]
|
|
// CHECK: [0x05,0x10,0x05,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, v1, v2, v3 op_sel:[0,0,1,0]
|
|
// CHECK: [0x05,0x20,0x05,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, v1, v2, v3 op_sel:[0,0,0,1]
|
|
// CHECK: [0x05,0x40,0x05,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, v1, v2, v3 op_sel:[1,1,1,1]
|
|
// CHECK: [0x05,0x78,0x05,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_i16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0x05,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0x06,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0xff,0x05,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x04,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x65,0x04,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x66,0x04,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x67,0x04,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x80,0x04,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0xff,0x0f,0x04]
|
|
|
|
v_fma_f16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0x0c,0x04]
|
|
|
|
v_fma_f16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_fma_f16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_fma_f16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_fma_f16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_fma_f16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_fma_f16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_fma_f16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_fma_f16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0xff,0x0c,0x04]
|
|
|
|
v_fma_f16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x01,0x0d,0x04]
|
|
|
|
v_fma_f16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x83,0x0d,0x04]
|
|
|
|
v_fma_f16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_fma_f16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0xef,0x0d,0x04]
|
|
|
|
v_fma_f16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0xfe,0x07]
|
|
|
|
v_fma_f16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0x0e,0x00]
|
|
|
|
v_fma_f16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0x96,0x01]
|
|
|
|
v_fma_f16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0x9a,0x01]
|
|
|
|
v_fma_f16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0x9e,0x01]
|
|
|
|
v_fma_f16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0xaa,0x01]
|
|
|
|
v_fma_f16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0xae,0x01]
|
|
|
|
v_fma_f16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0xf2,0x01]
|
|
|
|
v_fma_f16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0xfa,0x01]
|
|
|
|
v_fma_f16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0xfe,0x01]
|
|
|
|
v_fma_f16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0x02,0x02]
|
|
|
|
v_fma_f16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0x06,0x03]
|
|
|
|
v_fma_f16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0xc2,0x03]
|
|
|
|
v_fma_f16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0xde,0x03]
|
|
|
|
v_fma_f16 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0x0e,0x24]
|
|
|
|
v_fma_f16 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0x0e,0x44]
|
|
|
|
v_fma_f16 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0x0e,0x84]
|
|
|
|
v_fma_f16 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_fma_f16 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0x06,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0x06,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0x06,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0x06,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, v1, v2, v3 op_sel:[0,0,0,0]
|
|
// CHECK: [0x05,0x00,0x06,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, v1, v2, v3 op_sel:[1,0,0,0]
|
|
// CHECK: [0x05,0x08,0x06,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, v1, v2, v3 op_sel:[0,1,0,0]
|
|
// CHECK: [0x05,0x10,0x06,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, v1, v2, v3 op_sel:[0,0,1,0]
|
|
// CHECK: [0x05,0x20,0x06,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, v1, v2, v3 op_sel:[0,0,0,1]
|
|
// CHECK: [0x05,0x40,0x06,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, v1, v2, v3 op_sel:[1,1,1,1]
|
|
// CHECK: [0x05,0x78,0x06,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_fma_f16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0x06,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0x07,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0xff,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x65,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x66,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x67,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x80,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0xff,0x0f,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0x0c,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0xff,0x0c,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x01,0x0d,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x83,0x0d,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0xef,0x0d,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0xfe,0x07]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0x0e,0x00]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0x96,0x01]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0x9a,0x01]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0x9e,0x01]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0xaa,0x01]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0xae,0x01]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0xf2,0x01]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0xfa,0x01]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0xfe,0x01]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0x02,0x02]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0x06,0x03]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0xc2,0x03]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0xde,0x03]
|
|
|
|
v_div_fixup_f16 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0x0e,0x24]
|
|
|
|
v_div_fixup_f16 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0x0e,0x44]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0x0e,0x84]
|
|
|
|
v_div_fixup_f16 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_div_fixup_f16 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0x07,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0x07,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0x07,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0x07,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, v3 op_sel:[0,0,0,0]
|
|
// CHECK: [0x05,0x00,0x07,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, v3 op_sel:[1,0,0,0]
|
|
// CHECK: [0x05,0x08,0x07,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, v3 op_sel:[0,1,0,0]
|
|
// CHECK: [0x05,0x10,0x07,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, v3 op_sel:[0,0,1,0]
|
|
// CHECK: [0x05,0x20,0x07,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, v3 op_sel:[0,0,0,1]
|
|
// CHECK: [0x05,0x40,0x07,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, v3 op_sel:[1,1,1,1]
|
|
// CHECK: [0x05,0x78,0x07,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_div_fixup_f16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0x07,0xd2,0x01,0x05,0x0e,0x04]
|
|
|
|
v_interp_p1ll_f16 v5, v2, attr0.x
|
|
// CHECK: [0x05,0x00,0x74,0xd2,0x00,0x04,0x02,0x00]
|
|
|
|
v_interp_p1ll_f16 v255, v2, attr0.x
|
|
// CHECK: [0xff,0x00,0x74,0xd2,0x00,0x04,0x02,0x00]
|
|
|
|
v_interp_p1ll_f16 v5, v2, attr1.x
|
|
// CHECK: [0x05,0x00,0x74,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_interp_p1ll_f16 v5, v2, attr31.x
|
|
// CHECK: [0x05,0x00,0x74,0xd2,0x1f,0x04,0x02,0x00]
|
|
|
|
v_interp_p1ll_f16 v5, v2, attr32.x
|
|
// CHECK: [0x05,0x00,0x74,0xd2,0x20,0x04,0x02,0x00]
|
|
|
|
v_interp_p1ll_f16 v5, v255, attr0.x
|
|
// CHECK: [0x05,0x00,0x74,0xd2,0x00,0xfe,0x03,0x00]
|
|
|
|
v_interp_p1ll_f16 v5, -v2, attr0.x
|
|
// CHECK: [0x05,0x00,0x74,0xd2,0x00,0x04,0x02,0x40]
|
|
|
|
v_interp_p1ll_f16 v5, |v2|, attr0.x
|
|
// CHECK: [0x05,0x02,0x74,0xd2,0x00,0x04,0x02,0x00]
|
|
|
|
v_interp_p1ll_f16 v5, v2, attr0.y
|
|
// CHECK: [0x05,0x00,0x74,0xd2,0x40,0x04,0x02,0x00]
|
|
|
|
v_interp_p1ll_f16 v5, v2, attr0.z
|
|
// CHECK: [0x05,0x00,0x74,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_interp_p1ll_f16 v5, v2, attr0.w
|
|
// CHECK: [0x05,0x00,0x74,0xd2,0xc0,0x04,0x02,0x00]
|
|
|
|
v_interp_p1ll_f16 v5, v2, attr0.x high
|
|
// CHECK: [0x05,0x00,0x74,0xd2,0x00,0x05,0x02,0x00]
|
|
|
|
v_interp_p1ll_f16 v5, v2, attr0.x clamp
|
|
// CHECK: [0x05,0x80,0x74,0xd2,0x00,0x04,0x02,0x00]
|
|
|
|
v_interp_p1ll_f16 v5, v2, attr0.x mul:2
|
|
// CHECK: [0x05,0x00,0x74,0xd2,0x00,0x04,0x02,0x08]
|
|
|
|
v_interp_p1ll_f16 v5, v2, attr0.x mul:4
|
|
// CHECK: [0x05,0x00,0x74,0xd2,0x00,0x04,0x02,0x10]
|
|
|
|
v_interp_p1ll_f16 v5, v2, attr0.x div:2
|
|
// CHECK: [0x05,0x00,0x74,0xd2,0x00,0x04,0x02,0x18]
|
|
|
|
v_interp_p1lv_f16 v5, v2, attr0.x, v3
|
|
// CHECK: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x04]
|
|
|
|
v_interp_p1lv_f16 v255, v2, attr0.x, v3
|
|
// CHECK: [0xff,0x00,0x75,0xd2,0x00,0x04,0x0e,0x04]
|
|
|
|
v_interp_p1lv_f16 v5, v2, attr1.x, v3
|
|
// CHECK: [0x05,0x00,0x75,0xd2,0x01,0x04,0x0e,0x04]
|
|
|
|
v_interp_p1lv_f16 v5, v2, attr31.x, v3
|
|
// CHECK: [0x05,0x00,0x75,0xd2,0x1f,0x04,0x0e,0x04]
|
|
|
|
v_interp_p1lv_f16 v5, v2, attr32.x, v3
|
|
// CHECK: [0x05,0x00,0x75,0xd2,0x20,0x04,0x0e,0x04]
|
|
|
|
v_interp_p1lv_f16 v5, v255, attr0.x, v3
|
|
// CHECK: [0x05,0x00,0x75,0xd2,0x00,0xfe,0x0f,0x04]
|
|
|
|
v_interp_p1lv_f16 v5, v2, attr0.x, v255
|
|
// CHECK: [0x05,0x00,0x75,0xd2,0x00,0x04,0xfe,0x07]
|
|
|
|
v_interp_p1lv_f16 v5, -v2, attr0.x, v3
|
|
// CHECK: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x44]
|
|
|
|
v_interp_p1lv_f16 v5, v2, attr0.x, -v3
|
|
// CHECK: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x84]
|
|
|
|
v_interp_p1lv_f16 v5, |v2|, attr0.x, v3
|
|
// CHECK: [0x05,0x02,0x75,0xd2,0x00,0x04,0x0e,0x04]
|
|
|
|
v_interp_p1lv_f16 v5, v2, attr0.x, |v3|
|
|
// CHECK: [0x05,0x04,0x75,0xd2,0x00,0x04,0x0e,0x04]
|
|
|
|
v_interp_p1lv_f16 v5, v2, attr0.y, v3
|
|
// CHECK: [0x05,0x00,0x75,0xd2,0x40,0x04,0x0e,0x04]
|
|
|
|
v_interp_p1lv_f16 v5, v2, attr0.z, v3
|
|
// CHECK: [0x05,0x00,0x75,0xd2,0x80,0x04,0x0e,0x04]
|
|
|
|
v_interp_p1lv_f16 v5, v2, attr0.w, v3
|
|
// CHECK: [0x05,0x00,0x75,0xd2,0xc0,0x04,0x0e,0x04]
|
|
|
|
v_interp_p1lv_f16 v5, v2, attr0.x, v3 high
|
|
// CHECK: [0x05,0x00,0x75,0xd2,0x00,0x05,0x0e,0x04]
|
|
|
|
v_interp_p1lv_f16 v5, v2, attr0.x, v3 clamp
|
|
// CHECK: [0x05,0x80,0x75,0xd2,0x00,0x04,0x0e,0x04]
|
|
|
|
v_interp_p1lv_f16 v5, v2, attr0.x, v3 mul:2
|
|
// CHECK: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x0c]
|
|
|
|
v_interp_p1lv_f16 v5, v2, attr0.x, v3 mul:4
|
|
// CHECK: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x14]
|
|
|
|
v_interp_p1lv_f16 v5, v2, attr0.x, v3 div:2
|
|
// CHECK: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x1c]
|
|
|
|
v_interp_p2_legacy_f16 v5, v2, attr0.x, v3
|
|
// CHECK: [0x05,0x00,0x76,0xd2,0x00,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_legacy_f16 v255, v2, attr0.x, v3
|
|
// CHECK: [0xff,0x00,0x76,0xd2,0x00,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_legacy_f16 v5, v2, attr1.x, v3
|
|
// CHECK: [0x05,0x00,0x76,0xd2,0x01,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_legacy_f16 v5, v2, attr31.x, v3
|
|
// CHECK: [0x05,0x00,0x76,0xd2,0x1f,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_legacy_f16 v5, v2, attr32.x, v3
|
|
// CHECK: [0x05,0x00,0x76,0xd2,0x20,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_legacy_f16 v5, v255, attr0.x, v3
|
|
// CHECK: [0x05,0x00,0x76,0xd2,0x00,0xfe,0x0f,0x04]
|
|
|
|
v_interp_p2_legacy_f16 v5, v2, attr0.x, v255
|
|
// CHECK: [0x05,0x00,0x76,0xd2,0x00,0x04,0xfe,0x07]
|
|
|
|
v_interp_p2_legacy_f16 v5, -v2, attr0.x, v3
|
|
// CHECK: [0x05,0x00,0x76,0xd2,0x00,0x04,0x0e,0x44]
|
|
|
|
v_interp_p2_legacy_f16 v5, v2, attr0.x, -v3
|
|
// CHECK: [0x05,0x00,0x76,0xd2,0x00,0x04,0x0e,0x84]
|
|
|
|
v_interp_p2_legacy_f16 v5, |v2|, attr0.x, v3
|
|
// CHECK: [0x05,0x02,0x76,0xd2,0x00,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_legacy_f16 v5, v2, attr0.x, |v3|
|
|
// CHECK: [0x05,0x04,0x76,0xd2,0x00,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_legacy_f16 v5, v2, attr0.y, v3
|
|
// CHECK: [0x05,0x00,0x76,0xd2,0x40,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_legacy_f16 v5, v2, attr0.z, v3
|
|
// CHECK: [0x05,0x00,0x76,0xd2,0x80,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_legacy_f16 v5, v2, attr0.w, v3
|
|
// CHECK: [0x05,0x00,0x76,0xd2,0xc0,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_legacy_f16 v5, v2, attr0.x, v3 high
|
|
// CHECK: [0x05,0x00,0x76,0xd2,0x00,0x05,0x0e,0x04]
|
|
|
|
v_interp_p2_legacy_f16 v5, v2, attr0.x, v3 clamp
|
|
// CHECK: [0x05,0x80,0x76,0xd2,0x00,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_f16 v5, v2, attr0.x, v3
|
|
// CHECK: [0x05,0x00,0x77,0xd2,0x00,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_f16 v255, v2, attr0.x, v3
|
|
// CHECK: [0xff,0x00,0x77,0xd2,0x00,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_f16 v5, v2, attr1.x, v3
|
|
// CHECK: [0x05,0x00,0x77,0xd2,0x01,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_f16 v5, v2, attr31.x, v3
|
|
// CHECK: [0x05,0x00,0x77,0xd2,0x1f,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_f16 v5, v2, attr32.x, v3
|
|
// CHECK: [0x05,0x00,0x77,0xd2,0x20,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_f16 v5, v255, attr0.x, v3
|
|
// CHECK: [0x05,0x00,0x77,0xd2,0x00,0xfe,0x0f,0x04]
|
|
|
|
v_interp_p2_f16 v5, v2, attr0.x, v255
|
|
// CHECK: [0x05,0x00,0x77,0xd2,0x00,0x04,0xfe,0x07]
|
|
|
|
v_interp_p2_f16 v5, -v2, attr0.x, v3
|
|
// CHECK: [0x05,0x00,0x77,0xd2,0x00,0x04,0x0e,0x44]
|
|
|
|
v_interp_p2_f16 v5, v2, attr0.x, -v3
|
|
// CHECK: [0x05,0x00,0x77,0xd2,0x00,0x04,0x0e,0x84]
|
|
|
|
v_interp_p2_f16 v5, |v2|, attr0.x, v3
|
|
// CHECK: [0x05,0x02,0x77,0xd2,0x00,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_f16 v5, v2, attr0.x, |v3|
|
|
// CHECK: [0x05,0x04,0x77,0xd2,0x00,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_f16 v5, v2, attr0.y, v3
|
|
// CHECK: [0x05,0x00,0x77,0xd2,0x40,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_f16 v5, v2, attr0.z, v3
|
|
// CHECK: [0x05,0x00,0x77,0xd2,0x80,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_f16 v5, v2, attr0.w, v3
|
|
// CHECK: [0x05,0x00,0x77,0xd2,0xc0,0x04,0x0e,0x04]
|
|
|
|
v_interp_p2_f16 v5, v2, attr0.x, v3 high
|
|
// CHECK: [0x05,0x00,0x77,0xd2,0x00,0x05,0x0e,0x04]
|
|
|
|
v_interp_p2_f16 v5, v2, attr0.x, v3 clamp
|
|
// CHECK: [0x05,0x80,0x77,0xd2,0x00,0x04,0x0e,0x04]
|
|
|
|
v_add_f64 v[5:6], v[1:2], v[2:3]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f64 v[254:255], v[1:2], v[2:3]
|
|
// CHECK: [0xfe,0x00,0x80,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f64 v[5:6], v[254:255], v[2:3]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0xfe,0x05,0x02,0x00]
|
|
|
|
v_add_f64 v[5:6], s[2:3], v[2:3]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x02,0x04,0x02,0x00]
|
|
|
|
v_add_f64 v[5:6], s[4:5], v[2:3]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x04,0x04,0x02,0x00]
|
|
|
|
v_add_f64 v[5:6], s[100:101], v[2:3]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x64,0x04,0x02,0x00]
|
|
|
|
v_add_f64 v[5:6], flat_scratch, v[2:3]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_add_f64 v[5:6], vcc, v[2:3]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_add_f64 v[5:6], exec, v[2:3]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_add_f64 v[5:6], 0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_add_f64 v[5:6], -1, v[2:3]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_add_f64 v[5:6], 0.5, v[2:3]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_add_f64 v[5:6], -4.0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_add_f64 v[5:6], v[1:2], v[254:255]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0xfd,0x03,0x00]
|
|
|
|
v_add_f64 v[5:6], v[1:2], s[4:5]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0x09,0x00,0x00]
|
|
|
|
v_add_f64 v[5:6], v[1:2], s[6:7]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0x0d,0x00,0x00]
|
|
|
|
v_add_f64 v[5:6], v[1:2], s[100:101]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0xc9,0x00,0x00]
|
|
|
|
v_add_f64 v[5:6], v[1:2], flat_scratch
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_add_f64 v[5:6], v[1:2], vcc
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_add_f64 v[5:6], v[1:2], exec
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_add_f64 v[5:6], v[1:2], 0
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_add_f64 v[5:6], v[1:2], -1
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_add_f64 v[5:6], v[1:2], 0.5
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_add_f64 v[5:6], v[1:2], -4.0
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_add_f64 v[5:6], -v[1:2], v[2:3]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0x05,0x02,0x20]
|
|
|
|
v_add_f64 v[5:6], v[1:2], -v[2:3]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0x05,0x02,0x40]
|
|
|
|
v_add_f64 v[5:6], -v[1:2], -v[2:3]
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0x05,0x02,0x60]
|
|
|
|
v_add_f64 v[5:6], |v[1:2]|, v[2:3]
|
|
// CHECK: [0x05,0x01,0x80,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f64 v[5:6], v[1:2], |v[2:3]|
|
|
// CHECK: [0x05,0x02,0x80,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f64 v[5:6], |v[1:2]|, |v[2:3]|
|
|
// CHECK: [0x05,0x03,0x80,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f64 v[5:6], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x05,0x80,0x80,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_f64 v[5:6], v[1:2], v[2:3] mul:2
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0x05,0x02,0x08]
|
|
|
|
v_add_f64 v[5:6], v[1:2], v[2:3] mul:4
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0x05,0x02,0x10]
|
|
|
|
v_add_f64 v[5:6], v[1:2], v[2:3] div:2
|
|
// CHECK: [0x05,0x00,0x80,0xd2,0x01,0x05,0x02,0x18]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], v[2:3]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f64 v[254:255], v[1:2], v[2:3]
|
|
// CHECK: [0xfe,0x00,0x81,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f64 v[5:6], v[254:255], v[2:3]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0xfe,0x05,0x02,0x00]
|
|
|
|
v_mul_f64 v[5:6], s[2:3], v[2:3]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x02,0x04,0x02,0x00]
|
|
|
|
v_mul_f64 v[5:6], s[4:5], v[2:3]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x04,0x04,0x02,0x00]
|
|
|
|
v_mul_f64 v[5:6], s[100:101], v[2:3]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x64,0x04,0x02,0x00]
|
|
|
|
v_mul_f64 v[5:6], flat_scratch, v[2:3]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_mul_f64 v[5:6], vcc, v[2:3]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_mul_f64 v[5:6], exec, v[2:3]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_mul_f64 v[5:6], 0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_mul_f64 v[5:6], -1, v[2:3]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_mul_f64 v[5:6], 0.5, v[2:3]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_mul_f64 v[5:6], -4.0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], v[254:255]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0xfd,0x03,0x00]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], s[4:5]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0x09,0x00,0x00]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], s[6:7]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0x0d,0x00,0x00]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], s[100:101]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0xc9,0x00,0x00]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], flat_scratch
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], vcc
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], exec
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], 0
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], -1
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], 0.5
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], -4.0
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_mul_f64 v[5:6], -v[1:2], v[2:3]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0x05,0x02,0x20]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], -v[2:3]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0x05,0x02,0x40]
|
|
|
|
v_mul_f64 v[5:6], -v[1:2], -v[2:3]
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0x05,0x02,0x60]
|
|
|
|
v_mul_f64 v[5:6], |v[1:2]|, v[2:3]
|
|
// CHECK: [0x05,0x01,0x81,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], |v[2:3]|
|
|
// CHECK: [0x05,0x02,0x81,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f64 v[5:6], |v[1:2]|, |v[2:3]|
|
|
// CHECK: [0x05,0x03,0x81,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x05,0x80,0x81,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], v[2:3] mul:2
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0x05,0x02,0x08]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], v[2:3] mul:4
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0x05,0x02,0x10]
|
|
|
|
v_mul_f64 v[5:6], v[1:2], v[2:3] div:2
|
|
// CHECK: [0x05,0x00,0x81,0xd2,0x01,0x05,0x02,0x18]
|
|
|
|
v_min_f64 v[5:6], v[1:2], v[2:3]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f64 v[254:255], v[1:2], v[2:3]
|
|
// CHECK: [0xfe,0x00,0x82,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f64 v[5:6], v[254:255], v[2:3]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0xfe,0x05,0x02,0x00]
|
|
|
|
v_min_f64 v[5:6], s[2:3], v[2:3]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x02,0x04,0x02,0x00]
|
|
|
|
v_min_f64 v[5:6], s[4:5], v[2:3]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x04,0x04,0x02,0x00]
|
|
|
|
v_min_f64 v[5:6], s[100:101], v[2:3]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x64,0x04,0x02,0x00]
|
|
|
|
v_min_f64 v[5:6], flat_scratch, v[2:3]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_min_f64 v[5:6], vcc, v[2:3]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_min_f64 v[5:6], exec, v[2:3]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_min_f64 v[5:6], 0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_min_f64 v[5:6], -1, v[2:3]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_min_f64 v[5:6], 0.5, v[2:3]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_min_f64 v[5:6], -4.0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_min_f64 v[5:6], v[1:2], v[254:255]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0xfd,0x03,0x00]
|
|
|
|
v_min_f64 v[5:6], v[1:2], s[4:5]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0x09,0x00,0x00]
|
|
|
|
v_min_f64 v[5:6], v[1:2], s[6:7]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0x0d,0x00,0x00]
|
|
|
|
v_min_f64 v[5:6], v[1:2], s[100:101]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0xc9,0x00,0x00]
|
|
|
|
v_min_f64 v[5:6], v[1:2], flat_scratch
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_min_f64 v[5:6], v[1:2], vcc
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_min_f64 v[5:6], v[1:2], exec
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_min_f64 v[5:6], v[1:2], 0
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_min_f64 v[5:6], v[1:2], -1
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_min_f64 v[5:6], v[1:2], 0.5
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_min_f64 v[5:6], v[1:2], -4.0
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_min_f64 v[5:6], -v[1:2], v[2:3]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0x05,0x02,0x20]
|
|
|
|
v_min_f64 v[5:6], v[1:2], -v[2:3]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0x05,0x02,0x40]
|
|
|
|
v_min_f64 v[5:6], -v[1:2], -v[2:3]
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0x05,0x02,0x60]
|
|
|
|
v_min_f64 v[5:6], |v[1:2]|, v[2:3]
|
|
// CHECK: [0x05,0x01,0x82,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f64 v[5:6], v[1:2], |v[2:3]|
|
|
// CHECK: [0x05,0x02,0x82,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f64 v[5:6], |v[1:2]|, |v[2:3]|
|
|
// CHECK: [0x05,0x03,0x82,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f64 v[5:6], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x05,0x80,0x82,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_min_f64 v[5:6], v[1:2], v[2:3] mul:2
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0x05,0x02,0x08]
|
|
|
|
v_min_f64 v[5:6], v[1:2], v[2:3] mul:4
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0x05,0x02,0x10]
|
|
|
|
v_min_f64 v[5:6], v[1:2], v[2:3] div:2
|
|
// CHECK: [0x05,0x00,0x82,0xd2,0x01,0x05,0x02,0x18]
|
|
|
|
v_max_f64 v[5:6], v[1:2], v[2:3]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f64 v[254:255], v[1:2], v[2:3]
|
|
// CHECK: [0xfe,0x00,0x83,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f64 v[5:6], v[254:255], v[2:3]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0xfe,0x05,0x02,0x00]
|
|
|
|
v_max_f64 v[5:6], s[2:3], v[2:3]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x02,0x04,0x02,0x00]
|
|
|
|
v_max_f64 v[5:6], s[4:5], v[2:3]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x04,0x04,0x02,0x00]
|
|
|
|
v_max_f64 v[5:6], s[100:101], v[2:3]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x64,0x04,0x02,0x00]
|
|
|
|
v_max_f64 v[5:6], flat_scratch, v[2:3]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_max_f64 v[5:6], vcc, v[2:3]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_max_f64 v[5:6], exec, v[2:3]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_max_f64 v[5:6], 0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_max_f64 v[5:6], -1, v[2:3]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_max_f64 v[5:6], 0.5, v[2:3]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_max_f64 v[5:6], -4.0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_max_f64 v[5:6], v[1:2], v[254:255]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0xfd,0x03,0x00]
|
|
|
|
v_max_f64 v[5:6], v[1:2], s[4:5]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0x09,0x00,0x00]
|
|
|
|
v_max_f64 v[5:6], v[1:2], s[6:7]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0x0d,0x00,0x00]
|
|
|
|
v_max_f64 v[5:6], v[1:2], s[100:101]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0xc9,0x00,0x00]
|
|
|
|
v_max_f64 v[5:6], v[1:2], flat_scratch
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_max_f64 v[5:6], v[1:2], vcc
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_max_f64 v[5:6], v[1:2], exec
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_max_f64 v[5:6], v[1:2], 0
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_max_f64 v[5:6], v[1:2], -1
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_max_f64 v[5:6], v[1:2], 0.5
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_max_f64 v[5:6], v[1:2], -4.0
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_max_f64 v[5:6], -v[1:2], v[2:3]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0x05,0x02,0x20]
|
|
|
|
v_max_f64 v[5:6], v[1:2], -v[2:3]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0x05,0x02,0x40]
|
|
|
|
v_max_f64 v[5:6], -v[1:2], -v[2:3]
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0x05,0x02,0x60]
|
|
|
|
v_max_f64 v[5:6], |v[1:2]|, v[2:3]
|
|
// CHECK: [0x05,0x01,0x83,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f64 v[5:6], v[1:2], |v[2:3]|
|
|
// CHECK: [0x05,0x02,0x83,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f64 v[5:6], |v[1:2]|, |v[2:3]|
|
|
// CHECK: [0x05,0x03,0x83,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f64 v[5:6], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x05,0x80,0x83,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_max_f64 v[5:6], v[1:2], v[2:3] mul:2
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0x05,0x02,0x08]
|
|
|
|
v_max_f64 v[5:6], v[1:2], v[2:3] mul:4
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0x05,0x02,0x10]
|
|
|
|
v_max_f64 v[5:6], v[1:2], v[2:3] div:2
|
|
// CHECK: [0x05,0x00,0x83,0xd2,0x01,0x05,0x02,0x18]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], v2
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_ldexp_f64 v[254:255], v[1:2], v2
|
|
// CHECK: [0xfe,0x00,0x84,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[254:255], v2
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0xfe,0x05,0x02,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], s[2:3], v2
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x02,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], s[4:5], v2
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x04,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], s[100:101], v2
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x64,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], flat_scratch, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], vcc, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], exec, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], 0, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], -1, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], 0.5, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], -4.0, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], v255
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], s2
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], s101
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], vcc_lo
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], vcc_hi
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], m0
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], exec_lo
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], exec_hi
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], 0
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], -1
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], 0.5
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], -4.0
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], -v[1:2], v2
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0x05,0x02,0x20]
|
|
|
|
v_ldexp_f64 v[5:6], |v[1:2]|, v2
|
|
// CHECK: [0x05,0x01,0x84,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], v2 clamp
|
|
// CHECK: [0x05,0x80,0x84,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], v2 mul:2
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0x05,0x02,0x08]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], v2 mul:4
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0x05,0x02,0x10]
|
|
|
|
v_ldexp_f64 v[5:6], v[1:2], v2 div:2
|
|
// CHECK: [0x05,0x00,0x84,0xd2,0x01,0x05,0x02,0x18]
|
|
|
|
v_mul_lo_u32 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_lo_u32 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x85,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_lo_u32 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_mul_lo_u32 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u32 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u32 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u32 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u32 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u32 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u32 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u32 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u32 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u32 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u32 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_mul_lo_u32 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_mul_lo_u32 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_mul_lo_u32 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_mul_lo_u32 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_mul_lo_u32 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_mul_lo_u32 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_mul_lo_u32 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_mul_lo_u32 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_mul_lo_u32 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_mul_lo_u32 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_mul_lo_u32 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_lo_u32 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_mul_lo_u32 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_mul_lo_u32 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x85,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_mul_hi_u32 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_hi_u32 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x86,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_hi_u32 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_mul_hi_u32 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_u32 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_mul_hi_u32 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_mul_hi_u32 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_mul_hi_u32 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_mul_hi_u32 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_mul_hi_u32 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_mul_hi_u32 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_mul_hi_u32 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_mul_hi_u32 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_mul_hi_u32 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_mul_hi_u32 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_hi_u32 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_mul_hi_u32 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_mul_hi_u32 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x86,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_mul_hi_i32 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_hi_i32 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x87,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_mul_hi_i32 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_mul_hi_i32 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_mul_hi_i32 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_mul_hi_i32 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_mul_hi_i32 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_mul_hi_i32 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_mul_hi_i32 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_mul_hi_i32 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_mul_hi_i32 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_mul_hi_i32 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_mul_hi_i32 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_mul_hi_i32 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_mul_hi_i32 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_hi_i32 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_mul_hi_i32 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_mul_hi_i32 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x87,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_ldexp_f32 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x88,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_ldexp_f32 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0x05,0x02,0x20]
|
|
|
|
v_ldexp_f32 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x88,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x88,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_ldexp_f32 v5, v1, v2 mul:2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0x05,0x02,0x08]
|
|
|
|
v_ldexp_f32 v5, v1, v2 mul:4
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0x05,0x02,0x10]
|
|
|
|
v_ldexp_f32 v5, v1, v2 div:2
|
|
// CHECK: [0x05,0x00,0x88,0xd2,0x01,0x05,0x02,0x18]
|
|
|
|
v_readlane_b32 s5, v1, s2
|
|
// CHECK: [0x05,0x00,0x89,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_readlane_b32 s101, v1, s2
|
|
// CHECK: [0x65,0x00,0x89,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_readlane_b32 flat_scratch_lo, v1, s2
|
|
// CHECK: [0x66,0x00,0x89,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_readlane_b32 flat_scratch_hi, v1, s2
|
|
// CHECK: [0x67,0x00,0x89,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_readlane_b32 s5, v255, s2
|
|
// CHECK: [0x05,0x00,0x89,0xd2,0xff,0x05,0x00,0x00]
|
|
|
|
v_readlane_b32 s5, v1, s101
|
|
// CHECK: [0x05,0x00,0x89,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_readlane_b32 s5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x89,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_readlane_b32 s5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x89,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_readlane_b32 s5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x89,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_readlane_b32 s5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x89,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_readlane_b32 s5, v1, m0
|
|
// CHECK: [0x05,0x00,0x89,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_readlane_b32 s5, v1, 0
|
|
// CHECK: [0x05,0x00,0x89,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_writelane_b32 v5, 0, s2
|
|
// CHECK: [0x05,0x00,0x8a,0xd2,0x80,0x04,0x00,0x00]
|
|
|
|
v_writelane_b32 v255, 0, s2
|
|
// CHECK: [0xff,0x00,0x8a,0xd2,0x80,0x04,0x00,0x00]
|
|
|
|
v_writelane_b32 v5, -1, s2
|
|
// CHECK: [0x05,0x00,0x8a,0xd2,0xc1,0x04,0x00,0x00]
|
|
|
|
v_writelane_b32 v5, 0.5, s2
|
|
// CHECK: [0x05,0x00,0x8a,0xd2,0xf0,0x04,0x00,0x00]
|
|
|
|
v_writelane_b32 v5, -4.0, s2
|
|
// CHECK: [0x05,0x00,0x8a,0xd2,0xf7,0x04,0x00,0x00]
|
|
|
|
v_writelane_b32 v5, 0, s101
|
|
// CHECK: [0x05,0x00,0x8a,0xd2,0x80,0xca,0x00,0x00]
|
|
|
|
v_writelane_b32 v5, 0, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x8a,0xd2,0x80,0xcc,0x00,0x00]
|
|
|
|
v_writelane_b32 v5, 0, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x8a,0xd2,0x80,0xce,0x00,0x00]
|
|
|
|
v_writelane_b32 v5, 0, vcc_lo
|
|
// CHECK: [0x05,0x00,0x8a,0xd2,0x80,0xd4,0x00,0x00]
|
|
|
|
v_writelane_b32 v5, 0, vcc_hi
|
|
// CHECK: [0x05,0x00,0x8a,0xd2,0x80,0xd6,0x00,0x00]
|
|
|
|
v_writelane_b32 v5, 0, m0
|
|
// CHECK: [0x05,0x00,0x8a,0xd2,0x80,0xf8,0x00,0x00]
|
|
|
|
v_writelane_b32 v5, 0, 0
|
|
// CHECK: [0x05,0x00,0x8a,0xd2,0x80,0x00,0x01,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_bcnt_u32_b32 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x8b,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_bcnt_u32_b32 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x8b,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x8c,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_mbcnt_lo_u32_b32 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x8c,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x8d,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_mbcnt_hi_u32_b32 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x8d,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_lshlrev_b64 v[254:255], v1, v[2:3]
|
|
// CHECK: [0xfe,0x00,0x8f,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], v255, v[2:3]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], s1, v[2:3]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], s101, v[2:3]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], flat_scratch_lo, v[2:3]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], flat_scratch_hi, v[2:3]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], vcc_lo, v[2:3]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], vcc_hi, v[2:3]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], m0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], exec_lo, v[2:3]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], exec_hi, v[2:3]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], 0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], -1, v[2:3]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], 0.5, v[2:3]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], -4.0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], v1, v[254:255]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x01,0xfd,0x03,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], v1, s[4:5]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x01,0x09,0x00,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], v1, s[6:7]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x01,0x0d,0x00,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], v1, s[100:101]
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x01,0xc9,0x00,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], v1, flat_scratch
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], v1, vcc
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], v1, exec
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], v1, 0
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], v1, -1
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], v1, 0.5
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_lshlrev_b64 v[5:6], v1, -4.0
|
|
// CHECK: [0x05,0x00,0x8f,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_lshrrev_b64 v[254:255], v1, v[2:3]
|
|
// CHECK: [0xfe,0x00,0x90,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], v255, v[2:3]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], s1, v[2:3]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], s101, v[2:3]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], flat_scratch_lo, v[2:3]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], flat_scratch_hi, v[2:3]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], vcc_lo, v[2:3]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], vcc_hi, v[2:3]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], m0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], exec_lo, v[2:3]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], exec_hi, v[2:3]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], 0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], -1, v[2:3]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], 0.5, v[2:3]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], -4.0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], v1, v[254:255]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x01,0xfd,0x03,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], v1, s[4:5]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x01,0x09,0x00,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], v1, s[6:7]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x01,0x0d,0x00,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], v1, s[100:101]
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x01,0xc9,0x00,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], v1, flat_scratch
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], v1, vcc
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], v1, exec
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], v1, 0
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], v1, -1
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], v1, 0.5
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_lshrrev_b64 v[5:6], v1, -4.0
|
|
// CHECK: [0x05,0x00,0x90,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], v1, v[2:3]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_ashrrev_i64 v[254:255], v1, v[2:3]
|
|
// CHECK: [0xfe,0x00,0x91,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], v255, v[2:3]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], s1, v[2:3]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], s101, v[2:3]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], flat_scratch_lo, v[2:3]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], flat_scratch_hi, v[2:3]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], vcc_lo, v[2:3]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], vcc_hi, v[2:3]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], m0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], exec_lo, v[2:3]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], exec_hi, v[2:3]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], 0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], -1, v[2:3]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], 0.5, v[2:3]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], -4.0, v[2:3]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], v1, v[254:255]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x01,0xfd,0x03,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], v1, s[4:5]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x01,0x09,0x00,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], v1, s[6:7]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x01,0x0d,0x00,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], v1, s[100:101]
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x01,0xc9,0x00,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], v1, flat_scratch
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], v1, vcc
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], v1, exec
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], v1, 0
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], v1, -1
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], v1, 0.5
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_ashrrev_i64 v[5:6], v1, -4.0
|
|
// CHECK: [0x05,0x00,0x91,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], v2
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_trig_preop_f64 v[254:255], v[1:2], v2
|
|
// CHECK: [0xfe,0x00,0x92,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[254:255], v2
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0xfe,0x05,0x02,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], s[2:3], v2
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x02,0x04,0x02,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], s[4:5], v2
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x04,0x04,0x02,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], s[100:101], v2
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x64,0x04,0x02,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], flat_scratch, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], vcc, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], exec, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], 0, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], -1, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], 0.5, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], -4.0, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], v255
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], s2
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], s101
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], vcc_lo
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], vcc_hi
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], m0
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], exec_lo
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], exec_hi
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], 0
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], -1
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], 0.5
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], -4.0
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], -v[1:2], v2
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0x05,0x02,0x20]
|
|
|
|
v_trig_preop_f64 v[5:6], |v[1:2]|, v2
|
|
// CHECK: [0x05,0x01,0x92,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], v2 clamp
|
|
// CHECK: [0x05,0x80,0x92,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], v2 mul:2
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0x05,0x02,0x08]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], v2 mul:4
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0x05,0x02,0x10]
|
|
|
|
v_trig_preop_f64 v[5:6], v[1:2], v2 div:2
|
|
// CHECK: [0x05,0x00,0x92,0xd2,0x01,0x05,0x02,0x18]
|
|
|
|
v_bfm_b32 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_bfm_b32 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x93,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_bfm_b32 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_bfm_b32 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_bfm_b32 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_bfm_b32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_bfm_b32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_bfm_b32 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_bfm_b32 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_bfm_b32 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_bfm_b32 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_bfm_b32 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_bfm_b32 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_bfm_b32 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_bfm_b32 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_bfm_b32 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_bfm_b32 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_bfm_b32 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_bfm_b32 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_bfm_b32 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_bfm_b32 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_bfm_b32 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_bfm_b32 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_bfm_b32 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_bfm_b32 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_bfm_b32 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_bfm_b32 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_bfm_b32 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_bfm_b32 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_bfm_b32 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x93,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x94,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0x05,0x02,0x20]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0x05,0x02,0x40]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x94,0xd2,0x01,0x05,0x02,0x60]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x94,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x94,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f32 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x94,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x95,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0x05,0x02,0x20]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0x05,0x02,0x40]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x95,0xd2,0x01,0x05,0x02,0x60]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x95,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x95,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f32 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x95,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x96,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0x05,0x02,0x20]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0x05,0x02,0x40]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x96,0xd2,0x01,0x05,0x02,0x60]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x96,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x96,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pkrtz_f16_f32 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x96,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x97,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cvt_pk_u16_u32 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x97,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x98,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cvt_pk_i16_i32 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x98,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x99,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0x05,0x02,0x20]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0x05,0x02,0x40]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0x05,0x02,0x60]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x99,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x99,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x99,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, v2 op_sel:[0,0,0]
|
|
// CHECK: [0x05,0x00,0x99,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, v2 op_sel:[1,0,0]
|
|
// CHECK: [0x05,0x08,0x99,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, v2 op_sel:[0,1,0]
|
|
// CHECK: [0x05,0x10,0x99,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, v2 op_sel:[0,0,1]
|
|
// CHECK: [0x05,0x40,0x99,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_i16_f16 v5, v1, v2 op_sel:[1,1,1]
|
|
// CHECK: [0x05,0x58,0x99,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x9a,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0x05,0x02,0x20]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0x05,0x02,0x40]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0x05,0x02,0x60]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0x9a,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0x9a,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0x9a,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, v2 op_sel:[0,0,0]
|
|
// CHECK: [0x05,0x00,0x9a,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, v2 op_sel:[1,0,0]
|
|
// CHECK: [0x05,0x08,0x9a,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, v2 op_sel:[0,1,0]
|
|
// CHECK: [0x05,0x10,0x9a,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, v2 op_sel:[0,0,1]
|
|
// CHECK: [0x05,0x40,0x9a,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_cvt_pknorm_u16_f16 v5, v1, v2 op_sel:[1,1,1]
|
|
// CHECK: [0x05,0x58,0x9a,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_i32 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_i32 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x9c,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_i32 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_add_i32 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_add_i32 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_add_i32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_add_i32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_add_i32 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_add_i32 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_add_i32 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_add_i32 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_add_i32 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_add_i32 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_add_i32 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_add_i32 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_add_i32 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_add_i32 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_add_i32 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_add_i32 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_add_i32 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_add_i32 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_add_i32 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_add_i32 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_add_i32 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_add_i32 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_add_i32 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_add_i32 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_add_i32 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_add_i32 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_add_i32 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x9c,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_sub_i32 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_i32 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x9d,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_i32 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_sub_i32 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_sub_i32 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_sub_i32 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_sub_i32 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_sub_i32 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_sub_i32 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_sub_i32 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_sub_i32 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_sub_i32 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_sub_i32 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_sub_i32 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_sub_i32 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_sub_i32 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_sub_i32 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_sub_i32 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_sub_i32 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_sub_i32 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_sub_i32 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_sub_i32 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_sub_i32 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_sub_i32 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_sub_i32 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_sub_i32 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_sub_i32 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_sub_i32 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_sub_i32 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_sub_i32 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x9d,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_add_i16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_i16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x9e,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_i16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_add_i16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_add_i16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_add_i16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_add_i16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_add_i16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_add_i16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_add_i16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_add_i16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_add_i16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_add_i16 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_add_i16 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_add_i16 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_add_i16 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_add_i16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_add_i16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_add_i16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_add_i16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_add_i16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_add_i16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_add_i16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_add_i16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_add_i16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_add_i16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_add_i16 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_add_i16 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_add_i16 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_add_i16 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_add_i16 v5, v1, v2 op_sel:[0,0,0]
|
|
// CHECK: [0x05,0x00,0x9e,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_i16 v5, v1, v2 op_sel:[1,0,0]
|
|
// CHECK: [0x05,0x08,0x9e,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_i16 v5, v1, v2 op_sel:[0,1,0]
|
|
// CHECK: [0x05,0x10,0x9e,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_i16 v5, v1, v2 op_sel:[0,0,1]
|
|
// CHECK: [0x05,0x40,0x9e,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_i16 v5, v1, v2 op_sel:[1,1,1]
|
|
// CHECK: [0x05,0x58,0x9e,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_add_i16 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x9e,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_i16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_i16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x9f,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_i16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_sub_i16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_sub_i16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_sub_i16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_sub_i16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_sub_i16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_sub_i16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_sub_i16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_sub_i16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_sub_i16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_sub_i16 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_sub_i16 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_sub_i16 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_sub_i16 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_sub_i16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_sub_i16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_sub_i16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_sub_i16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_sub_i16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_sub_i16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_sub_i16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_sub_i16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_sub_i16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_sub_i16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_sub_i16 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_sub_i16 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_sub_i16 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_sub_i16 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_sub_i16 v5, v1, v2 op_sel:[0,0,0]
|
|
// CHECK: [0x05,0x00,0x9f,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_i16 v5, v1, v2 op_sel:[1,0,0]
|
|
// CHECK: [0x05,0x08,0x9f,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_i16 v5, v1, v2 op_sel:[0,1,0]
|
|
// CHECK: [0x05,0x10,0x9f,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_i16 v5, v1, v2 op_sel:[0,0,1]
|
|
// CHECK: [0x05,0x40,0x9f,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_i16 v5, v1, v2 op_sel:[1,1,1]
|
|
// CHECK: [0x05,0x58,0x9f,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_sub_i16 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x9f,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0xa0,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0xff,0x05,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0x04,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x65,0x04,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x66,0x04,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x67,0x04,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x6a,0x04,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x6b,0x04,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x7c,0x04,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x7e,0x04,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x7f,0x04,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, 0, v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x80,0x04,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, -1, v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0xc1,0x04,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, 0.5, v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0xf0,0x04,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, -4.0, v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0xf7,0x04,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0xff,0x03,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0x05,0x00,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0xcb,0x00,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0xcd,0x00,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0xcf,0x00,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0xd5,0x00,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0xd7,0x00,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0xf9,0x00,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0xfd,0x00,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0xff,0x00,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, 0
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0x01,0x01,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, -1
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0x83,0x01,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, 0.5
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0xe1,0x01,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, -4.0
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0xef,0x01,0x00]
|
|
|
|
v_pack_b32_f16 v5, -v1, v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0x05,0x02,0x20]
|
|
|
|
v_pack_b32_f16 v5, v1, -v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0x05,0x02,0x40]
|
|
|
|
v_pack_b32_f16 v5, -v1, -v2
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0x05,0x02,0x60]
|
|
|
|
v_pack_b32_f16 v5, |v1|, v2
|
|
// CHECK: [0x05,0x01,0xa0,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, |v2|
|
|
// CHECK: [0x05,0x02,0xa0,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, |v1|, |v2|
|
|
// CHECK: [0x05,0x03,0xa0,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, v2 op_sel:[0,0,0]
|
|
// CHECK: [0x05,0x00,0xa0,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, v2 op_sel:[1,0,0]
|
|
// CHECK: [0x05,0x08,0xa0,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, v2 op_sel:[0,1,0]
|
|
// CHECK: [0x05,0x10,0xa0,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, v2 op_sel:[0,0,1]
|
|
// CHECK: [0x05,0x40,0xa0,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_pack_b32_f16 v5, v1, v2 op_sel:[1,1,1]
|
|
// CHECK: [0x05,0x58,0xa0,0xd2,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x81,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0xff,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x65,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x66,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x67,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x6a,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x6b,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x7c,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x7e,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x7f,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0xff,0x03,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0x05,0x00,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0xcb,0x00,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0xcd,0x00,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0xcf,0x00,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0xd5,0x00,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0xd7,0x00,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0xf9,0x00,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0xfd,0x00,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0xff,0x00,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, v2 op_sel:[0,0]
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, v2 op_sel:[1,0]
|
|
// CHECK: [0x05,0x08,0x81,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, v2 op_sel:[0,1]
|
|
// CHECK: [0x05,0x10,0x81,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, v2 op_sel:[1,1]
|
|
// CHECK: [0x05,0x18,0x81,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, v2 op_sel_hi:[1,1]
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, v2 op_sel_hi:[0,0]
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, v2 op_sel_hi:[1,0]
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0x05,0x02,0x08]
|
|
|
|
v_pk_mul_lo_u16 v5, v1, v2 op_sel_hi:[0,1]
|
|
// CHECK: [0x05,0x00,0x81,0xd3,0x01,0x05,0x02,0x10]
|
|
|
|
v_pk_add_i16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_i16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x82,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_i16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0xff,0x05,0x02,0x18]
|
|
|
|
v_pk_add_i16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0x04,0x02,0x18]
|
|
|
|
v_pk_add_i16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x65,0x04,0x02,0x18]
|
|
|
|
v_pk_add_i16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x66,0x04,0x02,0x18]
|
|
|
|
v_pk_add_i16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x67,0x04,0x02,0x18]
|
|
|
|
v_pk_add_i16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x6a,0x04,0x02,0x18]
|
|
|
|
v_pk_add_i16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x6b,0x04,0x02,0x18]
|
|
|
|
v_pk_add_i16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x7c,0x04,0x02,0x18]
|
|
|
|
v_pk_add_i16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x7e,0x04,0x02,0x18]
|
|
|
|
v_pk_add_i16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x7f,0x04,0x02,0x18]
|
|
|
|
v_pk_add_i16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0xff,0x03,0x18]
|
|
|
|
v_pk_add_i16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0x05,0x00,0x18]
|
|
|
|
v_pk_add_i16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0xcb,0x00,0x18]
|
|
|
|
v_pk_add_i16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0xcd,0x00,0x18]
|
|
|
|
v_pk_add_i16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0xcf,0x00,0x18]
|
|
|
|
v_pk_add_i16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0xd5,0x00,0x18]
|
|
|
|
v_pk_add_i16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0xd7,0x00,0x18]
|
|
|
|
v_pk_add_i16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0xf9,0x00,0x18]
|
|
|
|
v_pk_add_i16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0xfd,0x00,0x18]
|
|
|
|
v_pk_add_i16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0xff,0x00,0x18]
|
|
|
|
v_pk_add_i16 v5, v1, v2 op_sel:[0,0]
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_i16 v5, v1, v2 op_sel:[1,0]
|
|
// CHECK: [0x05,0x08,0x82,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_i16 v5, v1, v2 op_sel:[0,1]
|
|
// CHECK: [0x05,0x10,0x82,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_i16 v5, v1, v2 op_sel:[1,1]
|
|
// CHECK: [0x05,0x18,0x82,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_i16 v5, v1, v2 op_sel_hi:[1,1]
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_i16 v5, v1, v2 op_sel_hi:[0,0]
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_add_i16 v5, v1, v2 op_sel_hi:[1,0]
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0x05,0x02,0x08]
|
|
|
|
v_pk_add_i16 v5, v1, v2 op_sel_hi:[0,1]
|
|
// CHECK: [0x05,0x00,0x82,0xd3,0x01,0x05,0x02,0x10]
|
|
|
|
v_pk_add_i16 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x82,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x83,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0xff,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x65,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x66,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x67,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x6a,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x6b,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x7c,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x7e,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x7f,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0xff,0x03,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0x05,0x00,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0xcb,0x00,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0xcd,0x00,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0xcf,0x00,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0xd5,0x00,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0xd7,0x00,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0xf9,0x00,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0xfd,0x00,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0xff,0x00,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, v2 op_sel:[0,0]
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, v2 op_sel:[1,0]
|
|
// CHECK: [0x05,0x08,0x83,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, v2 op_sel:[0,1]
|
|
// CHECK: [0x05,0x10,0x83,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, v2 op_sel:[1,1]
|
|
// CHECK: [0x05,0x18,0x83,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, v2 op_sel_hi:[1,1]
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_i16 v5, v1, v2 op_sel_hi:[0,0]
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_sub_i16 v5, v1, v2 op_sel_hi:[1,0]
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0x05,0x02,0x08]
|
|
|
|
v_pk_sub_i16 v5, v1, v2 op_sel_hi:[0,1]
|
|
// CHECK: [0x05,0x00,0x83,0xd3,0x01,0x05,0x02,0x10]
|
|
|
|
v_pk_sub_i16 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x83,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x84,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0xff,0x05,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0x04,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x65,0x04,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x66,0x04,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x67,0x04,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x6a,0x04,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x6b,0x04,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x7c,0x04,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x7e,0x04,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x7f,0x04,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0xff,0x03,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0x05,0x00,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0xcb,0x00,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0xcd,0x00,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0xcf,0x00,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0xd5,0x00,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0xd7,0x00,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0xf9,0x00,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0xfd,0x00,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0xff,0x00,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, v2 op_sel:[0,0]
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, v2 op_sel:[1,0]
|
|
// CHECK: [0x05,0x08,0x84,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, v2 op_sel:[0,1]
|
|
// CHECK: [0x05,0x10,0x84,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, v2 op_sel:[1,1]
|
|
// CHECK: [0x05,0x18,0x84,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, v2 op_sel_hi:[1,1]
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, v2 op_sel_hi:[0,0]
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, v2 op_sel_hi:[1,0]
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0x05,0x02,0x08]
|
|
|
|
v_pk_lshlrev_b16 v5, v1, v2 op_sel_hi:[0,1]
|
|
// CHECK: [0x05,0x00,0x84,0xd3,0x01,0x05,0x02,0x10]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x85,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0xff,0x05,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0x04,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x65,0x04,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x66,0x04,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x67,0x04,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x6a,0x04,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x6b,0x04,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x7c,0x04,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x7e,0x04,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x7f,0x04,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0xff,0x03,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0x05,0x00,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0xcb,0x00,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0xcd,0x00,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0xcf,0x00,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0xd5,0x00,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0xd7,0x00,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0xf9,0x00,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0xfd,0x00,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0xff,0x00,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, v2 op_sel:[0,0]
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, v2 op_sel:[1,0]
|
|
// CHECK: [0x05,0x08,0x85,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, v2 op_sel:[0,1]
|
|
// CHECK: [0x05,0x10,0x85,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, v2 op_sel:[1,1]
|
|
// CHECK: [0x05,0x18,0x85,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, v2 op_sel_hi:[1,1]
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, v2 op_sel_hi:[0,0]
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, v2 op_sel_hi:[1,0]
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0x05,0x02,0x08]
|
|
|
|
v_pk_lshrrev_b16 v5, v1, v2 op_sel_hi:[0,1]
|
|
// CHECK: [0x05,0x00,0x85,0xd3,0x01,0x05,0x02,0x10]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x86,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0xff,0x05,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0x04,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x65,0x04,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x66,0x04,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x67,0x04,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x6a,0x04,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x6b,0x04,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x7c,0x04,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x7e,0x04,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x7f,0x04,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0xff,0x03,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0x05,0x00,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0xcb,0x00,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0xcd,0x00,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0xcf,0x00,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0xd5,0x00,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0xd7,0x00,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0xf9,0x00,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0xfd,0x00,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0xff,0x00,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, v2 op_sel:[0,0]
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, v2 op_sel:[1,0]
|
|
// CHECK: [0x05,0x08,0x86,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, v2 op_sel:[0,1]
|
|
// CHECK: [0x05,0x10,0x86,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, v2 op_sel:[1,1]
|
|
// CHECK: [0x05,0x18,0x86,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, v2 op_sel_hi:[1,1]
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, v2 op_sel_hi:[0,0]
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, v2 op_sel_hi:[1,0]
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0x05,0x02,0x08]
|
|
|
|
v_pk_ashrrev_i16 v5, v1, v2 op_sel_hi:[0,1]
|
|
// CHECK: [0x05,0x00,0x86,0xd3,0x01,0x05,0x02,0x10]
|
|
|
|
v_pk_max_i16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_i16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x87,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_i16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0xff,0x05,0x02,0x18]
|
|
|
|
v_pk_max_i16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0x04,0x02,0x18]
|
|
|
|
v_pk_max_i16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x65,0x04,0x02,0x18]
|
|
|
|
v_pk_max_i16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x66,0x04,0x02,0x18]
|
|
|
|
v_pk_max_i16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x67,0x04,0x02,0x18]
|
|
|
|
v_pk_max_i16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x6a,0x04,0x02,0x18]
|
|
|
|
v_pk_max_i16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x6b,0x04,0x02,0x18]
|
|
|
|
v_pk_max_i16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x7c,0x04,0x02,0x18]
|
|
|
|
v_pk_max_i16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x7e,0x04,0x02,0x18]
|
|
|
|
v_pk_max_i16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x7f,0x04,0x02,0x18]
|
|
|
|
v_pk_max_i16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0xff,0x03,0x18]
|
|
|
|
v_pk_max_i16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0x05,0x00,0x18]
|
|
|
|
v_pk_max_i16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0xcb,0x00,0x18]
|
|
|
|
v_pk_max_i16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0xcd,0x00,0x18]
|
|
|
|
v_pk_max_i16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0xcf,0x00,0x18]
|
|
|
|
v_pk_max_i16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0xd5,0x00,0x18]
|
|
|
|
v_pk_max_i16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0xd7,0x00,0x18]
|
|
|
|
v_pk_max_i16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0xf9,0x00,0x18]
|
|
|
|
v_pk_max_i16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0xfd,0x00,0x18]
|
|
|
|
v_pk_max_i16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0xff,0x00,0x18]
|
|
|
|
v_pk_max_i16 v5, v1, v2 op_sel:[0,0]
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_i16 v5, v1, v2 op_sel:[1,0]
|
|
// CHECK: [0x05,0x08,0x87,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_i16 v5, v1, v2 op_sel:[0,1]
|
|
// CHECK: [0x05,0x10,0x87,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_i16 v5, v1, v2 op_sel:[1,1]
|
|
// CHECK: [0x05,0x18,0x87,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_i16 v5, v1, v2 op_sel_hi:[1,1]
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_i16 v5, v1, v2 op_sel_hi:[0,0]
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_max_i16 v5, v1, v2 op_sel_hi:[1,0]
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0x05,0x02,0x08]
|
|
|
|
v_pk_max_i16 v5, v1, v2 op_sel_hi:[0,1]
|
|
// CHECK: [0x05,0x00,0x87,0xd3,0x01,0x05,0x02,0x10]
|
|
|
|
v_pk_min_i16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_i16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x88,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_i16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0xff,0x05,0x02,0x18]
|
|
|
|
v_pk_min_i16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0x04,0x02,0x18]
|
|
|
|
v_pk_min_i16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x65,0x04,0x02,0x18]
|
|
|
|
v_pk_min_i16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x66,0x04,0x02,0x18]
|
|
|
|
v_pk_min_i16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x67,0x04,0x02,0x18]
|
|
|
|
v_pk_min_i16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x6a,0x04,0x02,0x18]
|
|
|
|
v_pk_min_i16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x6b,0x04,0x02,0x18]
|
|
|
|
v_pk_min_i16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x7c,0x04,0x02,0x18]
|
|
|
|
v_pk_min_i16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x7e,0x04,0x02,0x18]
|
|
|
|
v_pk_min_i16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x7f,0x04,0x02,0x18]
|
|
|
|
v_pk_min_i16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0xff,0x03,0x18]
|
|
|
|
v_pk_min_i16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0x05,0x00,0x18]
|
|
|
|
v_pk_min_i16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0xcb,0x00,0x18]
|
|
|
|
v_pk_min_i16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0xcd,0x00,0x18]
|
|
|
|
v_pk_min_i16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0xcf,0x00,0x18]
|
|
|
|
v_pk_min_i16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0xd5,0x00,0x18]
|
|
|
|
v_pk_min_i16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0xd7,0x00,0x18]
|
|
|
|
v_pk_min_i16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0xf9,0x00,0x18]
|
|
|
|
v_pk_min_i16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0xfd,0x00,0x18]
|
|
|
|
v_pk_min_i16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0xff,0x00,0x18]
|
|
|
|
v_pk_min_i16 v5, v1, v2 op_sel:[0,0]
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_i16 v5, v1, v2 op_sel:[1,0]
|
|
// CHECK: [0x05,0x08,0x88,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_i16 v5, v1, v2 op_sel:[0,1]
|
|
// CHECK: [0x05,0x10,0x88,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_i16 v5, v1, v2 op_sel:[1,1]
|
|
// CHECK: [0x05,0x18,0x88,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_i16 v5, v1, v2 op_sel_hi:[1,1]
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_i16 v5, v1, v2 op_sel_hi:[0,0]
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_min_i16 v5, v1, v2 op_sel_hi:[1,0]
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0x05,0x02,0x08]
|
|
|
|
v_pk_min_i16 v5, v1, v2 op_sel_hi:[0,1]
|
|
// CHECK: [0x05,0x00,0x88,0xd3,0x01,0x05,0x02,0x10]
|
|
|
|
v_pk_add_u16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_u16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x8a,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_u16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0xff,0x05,0x02,0x18]
|
|
|
|
v_pk_add_u16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0x04,0x02,0x18]
|
|
|
|
v_pk_add_u16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x65,0x04,0x02,0x18]
|
|
|
|
v_pk_add_u16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x66,0x04,0x02,0x18]
|
|
|
|
v_pk_add_u16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x67,0x04,0x02,0x18]
|
|
|
|
v_pk_add_u16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x6a,0x04,0x02,0x18]
|
|
|
|
v_pk_add_u16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x6b,0x04,0x02,0x18]
|
|
|
|
v_pk_add_u16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x7c,0x04,0x02,0x18]
|
|
|
|
v_pk_add_u16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x7e,0x04,0x02,0x18]
|
|
|
|
v_pk_add_u16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x7f,0x04,0x02,0x18]
|
|
|
|
v_pk_add_u16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0xff,0x03,0x18]
|
|
|
|
v_pk_add_u16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0x05,0x00,0x18]
|
|
|
|
v_pk_add_u16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0xcb,0x00,0x18]
|
|
|
|
v_pk_add_u16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0xcd,0x00,0x18]
|
|
|
|
v_pk_add_u16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0xcf,0x00,0x18]
|
|
|
|
v_pk_add_u16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0xd5,0x00,0x18]
|
|
|
|
v_pk_add_u16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0xd7,0x00,0x18]
|
|
|
|
v_pk_add_u16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0xf9,0x00,0x18]
|
|
|
|
v_pk_add_u16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0xfd,0x00,0x18]
|
|
|
|
v_pk_add_u16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0xff,0x00,0x18]
|
|
|
|
v_pk_add_u16 v5, v1, v2 op_sel:[0,0]
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_u16 v5, v1, v2 op_sel:[1,0]
|
|
// CHECK: [0x05,0x08,0x8a,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_u16 v5, v1, v2 op_sel:[0,1]
|
|
// CHECK: [0x05,0x10,0x8a,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_u16 v5, v1, v2 op_sel:[1,1]
|
|
// CHECK: [0x05,0x18,0x8a,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_u16 v5, v1, v2 op_sel_hi:[1,1]
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_u16 v5, v1, v2 op_sel_hi:[0,0]
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_add_u16 v5, v1, v2 op_sel_hi:[1,0]
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0x05,0x02,0x08]
|
|
|
|
v_pk_add_u16 v5, v1, v2 op_sel_hi:[0,1]
|
|
// CHECK: [0x05,0x00,0x8a,0xd3,0x01,0x05,0x02,0x10]
|
|
|
|
v_pk_add_u16 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x8a,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0xff,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x65,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x66,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x67,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x6a,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x6b,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x7c,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x7e,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x7f,0x04,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xff,0x03,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x00,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xcb,0x00,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xcd,0x00,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xcf,0x00,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xd5,0x00,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xd7,0x00,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xf9,0x00,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xfd,0x00,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0xff,0x00,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, v2 op_sel:[0,0]
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, v2 op_sel:[1,0]
|
|
// CHECK: [0x05,0x08,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, v2 op_sel:[0,1]
|
|
// CHECK: [0x05,0x10,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, v2 op_sel:[1,1]
|
|
// CHECK: [0x05,0x18,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, v2 op_sel_hi:[1,1]
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_sub_u16 v5, v1, v2 op_sel_hi:[0,0]
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_sub_u16 v5, v1, v2 op_sel_hi:[1,0]
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x08]
|
|
|
|
v_pk_sub_u16 v5, v1, v2 op_sel_hi:[0,1]
|
|
// CHECK: [0x05,0x00,0x8b,0xd3,0x01,0x05,0x02,0x10]
|
|
|
|
v_pk_sub_u16 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x8b,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_u16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x8c,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0xff,0x05,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0x04,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x65,0x04,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x66,0x04,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x67,0x04,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x6a,0x04,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x6b,0x04,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x7c,0x04,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x7e,0x04,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x7f,0x04,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0xff,0x03,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0x05,0x00,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0xcb,0x00,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0xcd,0x00,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0xcf,0x00,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0xd5,0x00,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0xd7,0x00,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0xf9,0x00,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0xfd,0x00,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0xff,0x00,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, v2 op_sel:[0,0]
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, v2 op_sel:[1,0]
|
|
// CHECK: [0x05,0x08,0x8c,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, v2 op_sel:[0,1]
|
|
// CHECK: [0x05,0x10,0x8c,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, v2 op_sel:[1,1]
|
|
// CHECK: [0x05,0x18,0x8c,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, v2 op_sel_hi:[1,1]
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_u16 v5, v1, v2 op_sel_hi:[0,0]
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_max_u16 v5, v1, v2 op_sel_hi:[1,0]
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0x05,0x02,0x08]
|
|
|
|
v_pk_max_u16 v5, v1, v2 op_sel_hi:[0,1]
|
|
// CHECK: [0x05,0x00,0x8c,0xd3,0x01,0x05,0x02,0x10]
|
|
|
|
v_pk_min_u16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_u16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x8d,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_u16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0xff,0x05,0x02,0x18]
|
|
|
|
v_pk_min_u16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0x04,0x02,0x18]
|
|
|
|
v_pk_min_u16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x65,0x04,0x02,0x18]
|
|
|
|
v_pk_min_u16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x66,0x04,0x02,0x18]
|
|
|
|
v_pk_min_u16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x67,0x04,0x02,0x18]
|
|
|
|
v_pk_min_u16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x6a,0x04,0x02,0x18]
|
|
|
|
v_pk_min_u16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x6b,0x04,0x02,0x18]
|
|
|
|
v_pk_min_u16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x7c,0x04,0x02,0x18]
|
|
|
|
v_pk_min_u16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x7e,0x04,0x02,0x18]
|
|
|
|
v_pk_min_u16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x7f,0x04,0x02,0x18]
|
|
|
|
v_pk_min_u16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0xff,0x03,0x18]
|
|
|
|
v_pk_min_u16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0x05,0x00,0x18]
|
|
|
|
v_pk_min_u16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0xcb,0x00,0x18]
|
|
|
|
v_pk_min_u16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0xcd,0x00,0x18]
|
|
|
|
v_pk_min_u16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0xcf,0x00,0x18]
|
|
|
|
v_pk_min_u16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0xd5,0x00,0x18]
|
|
|
|
v_pk_min_u16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0xd7,0x00,0x18]
|
|
|
|
v_pk_min_u16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0xf9,0x00,0x18]
|
|
|
|
v_pk_min_u16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0xfd,0x00,0x18]
|
|
|
|
v_pk_min_u16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0xff,0x00,0x18]
|
|
|
|
v_pk_min_u16 v5, v1, v2 op_sel:[0,0]
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_u16 v5, v1, v2 op_sel:[1,0]
|
|
// CHECK: [0x05,0x08,0x8d,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_u16 v5, v1, v2 op_sel:[0,1]
|
|
// CHECK: [0x05,0x10,0x8d,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_u16 v5, v1, v2 op_sel:[1,1]
|
|
// CHECK: [0x05,0x18,0x8d,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_u16 v5, v1, v2 op_sel_hi:[1,1]
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_u16 v5, v1, v2 op_sel_hi:[0,0]
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_min_u16 v5, v1, v2 op_sel_hi:[1,0]
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0x05,0x02,0x08]
|
|
|
|
v_pk_min_u16 v5, v1, v2 op_sel_hi:[0,1]
|
|
// CHECK: [0x05,0x00,0x8d,0xd3,0x01,0x05,0x02,0x10]
|
|
|
|
v_pk_add_f16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_f16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x8f,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0xff,0x05,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0x04,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x65,0x04,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x66,0x04,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x67,0x04,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x6a,0x04,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x6b,0x04,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x7c,0x04,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x7e,0x04,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x7f,0x04,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0xff,0x03,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0x05,0x00,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0xcb,0x00,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0xcd,0x00,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0xcf,0x00,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0xd5,0x00,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0xd7,0x00,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0xf9,0x00,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0xfd,0x00,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0xff,0x00,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, v2 op_sel:[0,0]
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, v2 op_sel:[1,0]
|
|
// CHECK: [0x05,0x08,0x8f,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, v2 op_sel:[0,1]
|
|
// CHECK: [0x05,0x10,0x8f,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, v2 op_sel:[1,1]
|
|
// CHECK: [0x05,0x18,0x8f,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, v2 op_sel_hi:[1,1]
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, v2 op_sel_hi:[0,0]
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_add_f16 v5, v1, v2 op_sel_hi:[1,0]
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0x05,0x02,0x08]
|
|
|
|
v_pk_add_f16 v5, v1, v2 op_sel_hi:[0,1]
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0x05,0x02,0x10]
|
|
|
|
v_pk_add_f16 v5, v1, v2 neg_lo:[1,0]
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0x05,0x02,0x38]
|
|
|
|
v_pk_add_f16 v5, v1, v2 neg_lo:[0,1]
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0x05,0x02,0x58]
|
|
|
|
v_pk_add_f16 v5, v1, v2 neg_lo:[1,1]
|
|
// CHECK: [0x05,0x00,0x8f,0xd3,0x01,0x05,0x02,0x78]
|
|
|
|
v_pk_add_f16 v5, v1, v2 neg_hi:[1,0]
|
|
// CHECK: [0x05,0x01,0x8f,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, v2 neg_hi:[0,1]
|
|
// CHECK: [0x05,0x02,0x8f,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, v2 neg_hi:[1,1]
|
|
// CHECK: [0x05,0x03,0x8f,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_add_f16 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x8f,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x90,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0xff,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x65,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x66,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x67,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x6a,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x6b,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x7c,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x7e,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x7f,0x04,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0xff,0x03,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0x05,0x00,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0xcb,0x00,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0xcd,0x00,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0xcf,0x00,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0xd5,0x00,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0xd7,0x00,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0xf9,0x00,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0xfd,0x00,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0xff,0x00,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, v2 op_sel:[0,0]
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, v2 op_sel:[1,0]
|
|
// CHECK: [0x05,0x08,0x90,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, v2 op_sel:[0,1]
|
|
// CHECK: [0x05,0x10,0x90,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, v2 op_sel:[1,1]
|
|
// CHECK: [0x05,0x18,0x90,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, v2 op_sel_hi:[1,1]
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, v2 op_sel_hi:[0,0]
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_mul_f16 v5, v1, v2 op_sel_hi:[1,0]
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0x05,0x02,0x08]
|
|
|
|
v_pk_mul_f16 v5, v1, v2 op_sel_hi:[0,1]
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0x05,0x02,0x10]
|
|
|
|
v_pk_mul_f16 v5, v1, v2 neg_lo:[1,0]
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0x05,0x02,0x38]
|
|
|
|
v_pk_mul_f16 v5, v1, v2 neg_lo:[0,1]
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0x05,0x02,0x58]
|
|
|
|
v_pk_mul_f16 v5, v1, v2 neg_lo:[1,1]
|
|
// CHECK: [0x05,0x00,0x90,0xd3,0x01,0x05,0x02,0x78]
|
|
|
|
v_pk_mul_f16 v5, v1, v2 neg_hi:[1,0]
|
|
// CHECK: [0x05,0x01,0x90,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, v2 neg_hi:[0,1]
|
|
// CHECK: [0x05,0x02,0x90,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, v2 neg_hi:[1,1]
|
|
// CHECK: [0x05,0x03,0x90,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_mul_f16 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x90,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_f16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x91,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0xff,0x05,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0x04,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x65,0x04,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x66,0x04,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x67,0x04,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x6a,0x04,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x6b,0x04,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x7c,0x04,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x7e,0x04,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x7f,0x04,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0xff,0x03,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0x05,0x00,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0xcb,0x00,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0xcd,0x00,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0xcf,0x00,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0xd5,0x00,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0xd7,0x00,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0xf9,0x00,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0xfd,0x00,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0xff,0x00,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, v2 op_sel:[0,0]
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, v2 op_sel:[1,0]
|
|
// CHECK: [0x05,0x08,0x91,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, v2 op_sel:[0,1]
|
|
// CHECK: [0x05,0x10,0x91,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, v2 op_sel:[1,1]
|
|
// CHECK: [0x05,0x18,0x91,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, v2 op_sel_hi:[1,1]
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, v2 op_sel_hi:[0,0]
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_min_f16 v5, v1, v2 op_sel_hi:[1,0]
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0x05,0x02,0x08]
|
|
|
|
v_pk_min_f16 v5, v1, v2 op_sel_hi:[0,1]
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0x05,0x02,0x10]
|
|
|
|
v_pk_min_f16 v5, v1, v2 neg_lo:[1,0]
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0x05,0x02,0x38]
|
|
|
|
v_pk_min_f16 v5, v1, v2 neg_lo:[0,1]
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0x05,0x02,0x58]
|
|
|
|
v_pk_min_f16 v5, v1, v2 neg_lo:[1,1]
|
|
// CHECK: [0x05,0x00,0x91,0xd3,0x01,0x05,0x02,0x78]
|
|
|
|
v_pk_min_f16 v5, v1, v2 neg_hi:[1,0]
|
|
// CHECK: [0x05,0x01,0x91,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, v2 neg_hi:[0,1]
|
|
// CHECK: [0x05,0x02,0x91,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, v2 neg_hi:[1,1]
|
|
// CHECK: [0x05,0x03,0x91,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_min_f16 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x91,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_f16 v255, v1, v2
|
|
// CHECK: [0xff,0x00,0x92,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, v255, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0xff,0x05,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, s1, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0x04,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, s101, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x65,0x04,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, flat_scratch_lo, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x66,0x04,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, flat_scratch_hi, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x67,0x04,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, vcc_lo, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x6a,0x04,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, vcc_hi, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x6b,0x04,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, m0, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x7c,0x04,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, exec_lo, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x7e,0x04,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, exec_hi, v2
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x7f,0x04,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, v255
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0xff,0x03,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, s2
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0x05,0x00,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, s101
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0xcb,0x00,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0xcd,0x00,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0xcf,0x00,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, vcc_lo
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0xd5,0x00,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, vcc_hi
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0xd7,0x00,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, m0
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0xf9,0x00,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, exec_lo
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0xfd,0x00,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, exec_hi
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0xff,0x00,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, v2 op_sel:[0,0]
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, v2 op_sel:[1,0]
|
|
// CHECK: [0x05,0x08,0x92,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, v2 op_sel:[0,1]
|
|
// CHECK: [0x05,0x10,0x92,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, v2 op_sel:[1,1]
|
|
// CHECK: [0x05,0x18,0x92,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, v2 op_sel_hi:[1,1]
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, v2 op_sel_hi:[0,0]
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0x05,0x02,0x00]
|
|
|
|
v_pk_max_f16 v5, v1, v2 op_sel_hi:[1,0]
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0x05,0x02,0x08]
|
|
|
|
v_pk_max_f16 v5, v1, v2 op_sel_hi:[0,1]
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0x05,0x02,0x10]
|
|
|
|
v_pk_max_f16 v5, v1, v2 neg_lo:[1,0]
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0x05,0x02,0x38]
|
|
|
|
v_pk_max_f16 v5, v1, v2 neg_lo:[0,1]
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0x05,0x02,0x58]
|
|
|
|
v_pk_max_f16 v5, v1, v2 neg_lo:[1,1]
|
|
// CHECK: [0x05,0x00,0x92,0xd3,0x01,0x05,0x02,0x78]
|
|
|
|
v_pk_max_f16 v5, v1, v2 neg_hi:[1,0]
|
|
// CHECK: [0x05,0x01,0x92,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, v2 neg_hi:[0,1]
|
|
// CHECK: [0x05,0x02,0x92,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, v2 neg_hi:[1,1]
|
|
// CHECK: [0x05,0x03,0x92,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_pk_max_f16 v5, v1, v2 clamp
|
|
// CHECK: [0x05,0x80,0x92,0xd3,0x01,0x05,0x02,0x18]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x80,0x04,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x01,0x0d,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x83,0x0d,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0xef,0x0d,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0xfe,0x07]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x00]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x96,0x01]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x9e,0x01]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0xae,0x01]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0xf2,0x01]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0xfe,0x01]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x02,0x02]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x06,0x03]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0xc2,0x03]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0xde,0x03]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, v3 op_sel:[0,0,0]
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, v3 op_sel:[1,0,0]
|
|
// CHECK: [0x05,0x08,0xa0,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, v3 op_sel:[0,1,0]
|
|
// CHECK: [0x05,0x10,0xa0,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, v3 op_sel:[0,0,1]
|
|
// CHECK: [0x05,0x20,0xa0,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, v3 op_sel:[1,1,1]
|
|
// CHECK: [0x05,0x38,0xa0,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, v3 op_sel_hi:[0,0,0]
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, v3 op_sel_hi:[1,0,0]
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, v3 op_sel_hi:[0,1,0]
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x14]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, v3 op_sel_hi:[0,0,1]
|
|
// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, v3 op_sel_hi:[1,1,1]
|
|
// CHECK: [0x05,0x40,0xa0,0xd3,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_mad_mix_f32 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x24]
|
|
|
|
v_mad_mix_f32 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x44]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x0e,0x84]
|
|
|
|
v_mad_mix_f32 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xa0,0xd3,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_mad_mix_f32 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xa0,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xa0,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xa0,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xa0,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mix_f32 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xa0,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xa1,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x80,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x01,0x0d,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x83,0x0d,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0xef,0x0d,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0xfe,0x07]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x0e,0x00]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x96,0x01]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x9e,0x01]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0xae,0x01]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0xf2,0x01]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0xfe,0x01]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x02,0x02]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x06,0x03]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0xc2,0x03]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0xde,0x03]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, v3 op_sel:[0,0,0]
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, v3 op_sel:[1,0,0]
|
|
// CHECK: [0x05,0x08,0xa1,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, v3 op_sel:[0,1,0]
|
|
// CHECK: [0x05,0x10,0xa1,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, v3 op_sel:[0,0,1]
|
|
// CHECK: [0x05,0x20,0xa1,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, v3 op_sel:[1,1,1]
|
|
// CHECK: [0x05,0x38,0xa1,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, v3 op_sel_hi:[0,0,0]
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, v3 op_sel_hi:[1,0,0]
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, v3 op_sel_hi:[0,1,0]
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x0e,0x14]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, v3 op_sel_hi:[0,0,1]
|
|
// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, v3 op_sel_hi:[1,1,1]
|
|
// CHECK: [0x05,0x40,0xa1,0xd3,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_mad_mixlo_f16 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x0e,0x24]
|
|
|
|
v_mad_mixlo_f16 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x0e,0x44]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x0e,0x84]
|
|
|
|
v_mad_mixlo_f16 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xa1,0xd3,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_mad_mixlo_f16 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xa1,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xa1,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xa1,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xa1,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixlo_f16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xa1,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v255, v1, v2, v3
|
|
// CHECK: [0xff,0x00,0xa2,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v255, v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0xff,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, s1, v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, s101, v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x65,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, flat_scratch_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x66,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, flat_scratch_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x67,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, vcc_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x6a,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, vcc_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x6b,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, m0, v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x7c,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, exec_lo, v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x7e,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, exec_hi, v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x7f,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, 0, v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x80,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, -1, v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0xc1,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, 0.5, v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0xf0,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, -4.0, v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0xf7,0x04,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v255, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0xff,0x0f,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, s2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x0c,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, s101, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0xcb,0x0c,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, flat_scratch_lo, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0xcd,0x0c,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, flat_scratch_hi, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0xcf,0x0c,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, vcc_lo, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0xd5,0x0c,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, vcc_hi, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0xd7,0x0c,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, m0, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0xf9,0x0c,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, exec_lo, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0xfd,0x0c,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, exec_hi, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0xff,0x0c,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, 0, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x01,0x0d,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, -1, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x83,0x0d,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, 0.5, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0xe1,0x0d,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, -4.0, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0xef,0x0d,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, v255
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0xfe,0x07]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, s3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x0e,0x00]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, s101
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x96,0x01]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, flat_scratch_lo
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x9a,0x01]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, flat_scratch_hi
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x9e,0x01]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, vcc_lo
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0xaa,0x01]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, vcc_hi
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0xae,0x01]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, m0
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0xf2,0x01]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, exec_lo
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0xfa,0x01]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, exec_hi
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0xfe,0x01]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, 0
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x02,0x02]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, -1
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x06,0x03]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, 0.5
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0xc2,0x03]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, -4.0
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0xde,0x03]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, v3 op_sel:[0,0,0]
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, v3 op_sel:[1,0,0]
|
|
// CHECK: [0x05,0x08,0xa2,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, v3 op_sel:[0,1,0]
|
|
// CHECK: [0x05,0x10,0xa2,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, v3 op_sel:[0,0,1]
|
|
// CHECK: [0x05,0x20,0xa2,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, v3 op_sel:[1,1,1]
|
|
// CHECK: [0x05,0x38,0xa2,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, v3 op_sel_hi:[0,0,0]
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, v3 op_sel_hi:[1,0,0]
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x0e,0x0c]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, v3 op_sel_hi:[0,1,0]
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x0e,0x14]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, v3 op_sel_hi:[0,0,1]
|
|
// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, v3 op_sel_hi:[1,1,1]
|
|
// CHECK: [0x05,0x40,0xa2,0xd3,0x01,0x05,0x0e,0x1c]
|
|
|
|
v_mad_mixhi_f16 v5, -v1, v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x0e,0x24]
|
|
|
|
v_mad_mixhi_f16 v5, v1, -v2, v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x0e,0x44]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, -v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x0e,0x84]
|
|
|
|
v_mad_mixhi_f16 v5, -v1, -v2, -v3
|
|
// CHECK: [0x05,0x00,0xa2,0xd3,0x01,0x05,0x0e,0xe4]
|
|
|
|
v_mad_mixhi_f16 v5, |v1|, v2, v3
|
|
// CHECK: [0x05,0x01,0xa2,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, |v2|, v3
|
|
// CHECK: [0x05,0x02,0xa2,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, |v3|
|
|
// CHECK: [0x05,0x04,0xa2,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, |v1|, |v2|, |v3|
|
|
// CHECK: [0x05,0x07,0xa2,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_mad_mixhi_f16 v5, v1, v2, v3 clamp
|
|
// CHECK: [0x05,0x80,0xa2,0xd3,0x01,0x05,0x0e,0x04]
|
|
|
|
v_cmp_class_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x20,0x7c]
|
|
|
|
v_cmp_class_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x20,0x7c]
|
|
|
|
v_cmp_class_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x20,0x7c]
|
|
|
|
v_cmp_class_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x20,0x7c]
|
|
|
|
v_cmp_class_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x20,0x7c]
|
|
|
|
v_cmp_class_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x20,0x7c]
|
|
|
|
v_cmp_class_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x20,0x7c]
|
|
|
|
v_cmp_class_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x20,0x7c]
|
|
|
|
v_cmp_class_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x20,0x7c]
|
|
|
|
v_cmp_class_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x20,0x7c]
|
|
|
|
v_cmp_class_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x20,0x7c]
|
|
|
|
v_cmp_class_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x20,0x7c]
|
|
|
|
v_cmp_class_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x20,0x7c]
|
|
|
|
v_cmp_class_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x20,0x7c]
|
|
|
|
v_cmp_class_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x20,0x7c]
|
|
|
|
v_cmp_class_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x20,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_class_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x20,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_class_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x21,0x7c]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x10,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x10,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x10,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x10,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_class_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x10,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_class_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x22,0x7c]
|
|
|
|
v_cmpx_class_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x22,0x7c]
|
|
|
|
v_cmpx_class_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x22,0x7c]
|
|
|
|
v_cmpx_class_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x22,0x7c]
|
|
|
|
v_cmpx_class_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x22,0x7c]
|
|
|
|
v_cmpx_class_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x22,0x7c]
|
|
|
|
v_cmpx_class_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x22,0x7c]
|
|
|
|
v_cmpx_class_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x22,0x7c]
|
|
|
|
v_cmpx_class_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x22,0x7c]
|
|
|
|
v_cmpx_class_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x22,0x7c]
|
|
|
|
v_cmpx_class_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x22,0x7c]
|
|
|
|
v_cmpx_class_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x22,0x7c]
|
|
|
|
v_cmpx_class_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x22,0x7c]
|
|
|
|
v_cmpx_class_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x22,0x7c]
|
|
|
|
v_cmpx_class_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x22,0x7c]
|
|
|
|
v_cmpx_class_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x22,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_class_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x22,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_class_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x23,0x7c]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x11,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x11,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x11,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x11,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x11,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_class_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x11,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_class_f64 vcc, v[1:2], v2
|
|
// CHECK: [0x01,0x05,0x24,0x7c]
|
|
|
|
v_cmp_class_f64 vcc, v[254:255], v2
|
|
// CHECK: [0xfe,0x05,0x24,0x7c]
|
|
|
|
v_cmp_class_f64 vcc, s[2:3], v2
|
|
// CHECK: [0x02,0x04,0x24,0x7c]
|
|
|
|
v_cmp_class_f64 vcc, s[4:5], v2
|
|
// CHECK: [0x04,0x04,0x24,0x7c]
|
|
|
|
v_cmp_class_f64 vcc, s[100:101], v2
|
|
// CHECK: [0x64,0x04,0x24,0x7c]
|
|
|
|
v_cmp_class_f64 vcc, flat_scratch, v2
|
|
// CHECK: [0x66,0x04,0x24,0x7c]
|
|
|
|
v_cmp_class_f64 vcc, vcc, v2
|
|
// CHECK: [0x6a,0x04,0x24,0x7c]
|
|
|
|
v_cmp_class_f64 vcc, exec, v2
|
|
// CHECK: [0x7e,0x04,0x24,0x7c]
|
|
|
|
v_cmp_class_f64 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x24,0x7c]
|
|
|
|
v_cmp_class_f64 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x24,0x7c]
|
|
|
|
v_cmp_class_f64 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x24,0x7c]
|
|
|
|
v_cmp_class_f64 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x24,0x7c]
|
|
|
|
v_cmp_class_f64 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x24,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_class_f64 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x24,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_class_f64 vcc, v[1:2], v255
|
|
// CHECK: [0x01,0xff,0x25,0x7c]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], v[1:2], v2
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[12:13], v[1:2], v2
|
|
// CHECK: [0x0c,0x00,0x12,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[100:101], v[1:2], v2
|
|
// CHECK: [0x64,0x00,0x12,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f64_e64 flat_scratch, v[1:2], v2
|
|
// CHECK: [0x66,0x00,0x12,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f64_e64 vcc, v[1:2], v2
|
|
// CHECK: [0x6a,0x00,0x12,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], v[254:255], v2
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], s[2:3], v2
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], s[4:5], v2
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], s[100:101], v2
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], flat_scratch, v2
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], vcc, v2
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], exec, v2
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], v[1:2], v255
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], v[1:2], s2
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], v[1:2], s101
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], v[1:2], flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], v[1:2], flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], v[1:2], vcc_lo
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], v[1:2], vcc_hi
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], v[1:2], m0
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], v[1:2], exec_lo
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], v[1:2], exec_hi
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_class_f64_e64 s[10:11], -v[1:2], v2
|
|
// CHECK: [0x0a,0x00,0x12,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_class_f64 vcc, v[1:2], v2
|
|
// CHECK: [0x01,0x05,0x26,0x7c]
|
|
|
|
v_cmpx_class_f64 vcc, v[254:255], v2
|
|
// CHECK: [0xfe,0x05,0x26,0x7c]
|
|
|
|
v_cmpx_class_f64 vcc, s[2:3], v2
|
|
// CHECK: [0x02,0x04,0x26,0x7c]
|
|
|
|
v_cmpx_class_f64 vcc, s[4:5], v2
|
|
// CHECK: [0x04,0x04,0x26,0x7c]
|
|
|
|
v_cmpx_class_f64 vcc, s[100:101], v2
|
|
// CHECK: [0x64,0x04,0x26,0x7c]
|
|
|
|
v_cmpx_class_f64 vcc, flat_scratch, v2
|
|
// CHECK: [0x66,0x04,0x26,0x7c]
|
|
|
|
v_cmpx_class_f64 vcc, vcc, v2
|
|
// CHECK: [0x6a,0x04,0x26,0x7c]
|
|
|
|
v_cmpx_class_f64 vcc, exec, v2
|
|
// CHECK: [0x7e,0x04,0x26,0x7c]
|
|
|
|
v_cmpx_class_f64 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x26,0x7c]
|
|
|
|
v_cmpx_class_f64 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x26,0x7c]
|
|
|
|
v_cmpx_class_f64 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x26,0x7c]
|
|
|
|
v_cmpx_class_f64 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x26,0x7c]
|
|
|
|
v_cmpx_class_f64 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x26,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_class_f64 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x26,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_class_f64 vcc, v[1:2], v255
|
|
// CHECK: [0x01,0xff,0x27,0x7c]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], v[1:2], v2
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[12:13], v[1:2], v2
|
|
// CHECK: [0x0c,0x00,0x13,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[100:101], v[1:2], v2
|
|
// CHECK: [0x64,0x00,0x13,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 flat_scratch, v[1:2], v2
|
|
// CHECK: [0x66,0x00,0x13,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 vcc, v[1:2], v2
|
|
// CHECK: [0x6a,0x00,0x13,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 exec, v[1:2], v2
|
|
// CHECK: [0x7e,0x00,0x13,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], v[254:255], v2
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], s[2:3], v2
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], s[4:5], v2
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], s[100:101], v2
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], flat_scratch, v2
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], vcc, v2
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], exec, v2
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], v[1:2], v255
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], v[1:2], s2
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], v[1:2], s101
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], v[1:2], flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], v[1:2], flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], v[1:2], vcc_lo
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], v[1:2], vcc_hi
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], v[1:2], m0
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], v[1:2], exec_lo
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], v[1:2], exec_hi
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_class_f64_e64 s[10:11], -v[1:2], v2
|
|
// CHECK: [0x0a,0x00,0x13,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_class_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x28,0x7c]
|
|
|
|
v_cmp_class_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x28,0x7c]
|
|
|
|
v_cmp_class_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x28,0x7c]
|
|
|
|
v_cmp_class_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x28,0x7c]
|
|
|
|
v_cmp_class_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x28,0x7c]
|
|
|
|
v_cmp_class_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x28,0x7c]
|
|
|
|
v_cmp_class_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x28,0x7c]
|
|
|
|
v_cmp_class_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x28,0x7c]
|
|
|
|
v_cmp_class_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x28,0x7c]
|
|
|
|
v_cmp_class_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x28,0x7c]
|
|
|
|
v_cmp_class_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x28,0x7c]
|
|
|
|
v_cmp_class_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x28,0x7c]
|
|
|
|
v_cmp_class_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x28,0x7c]
|
|
|
|
v_cmp_class_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x28,0x7c]
|
|
|
|
v_cmp_class_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x28,0x7c]
|
|
|
|
v_cmp_class_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x28,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_class_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x28,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_class_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x29,0x7c]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x14,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x14,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x14,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x14,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_class_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x14,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_class_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x2a,0x7c]
|
|
|
|
v_cmpx_class_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x2a,0x7c]
|
|
|
|
v_cmpx_class_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x2a,0x7c]
|
|
|
|
v_cmpx_class_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x2a,0x7c]
|
|
|
|
v_cmpx_class_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x2a,0x7c]
|
|
|
|
v_cmpx_class_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x2a,0x7c]
|
|
|
|
v_cmpx_class_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x2a,0x7c]
|
|
|
|
v_cmpx_class_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x2a,0x7c]
|
|
|
|
v_cmpx_class_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x2a,0x7c]
|
|
|
|
v_cmpx_class_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x2a,0x7c]
|
|
|
|
v_cmpx_class_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x2a,0x7c]
|
|
|
|
v_cmpx_class_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x2a,0x7c]
|
|
|
|
v_cmpx_class_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x2a,0x7c]
|
|
|
|
v_cmpx_class_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x2a,0x7c]
|
|
|
|
v_cmpx_class_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x2a,0x7c]
|
|
|
|
v_cmpx_class_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x2a,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_class_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x2a,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_class_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x2b,0x7c]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x15,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x15,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x15,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x15,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x15,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_class_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x15,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_f_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x40,0x7c]
|
|
|
|
v_cmp_f_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x40,0x7c]
|
|
|
|
v_cmp_f_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x40,0x7c]
|
|
|
|
v_cmp_f_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x40,0x7c]
|
|
|
|
v_cmp_f_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x40,0x7c]
|
|
|
|
v_cmp_f_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x40,0x7c]
|
|
|
|
v_cmp_f_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x40,0x7c]
|
|
|
|
v_cmp_f_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x40,0x7c]
|
|
|
|
v_cmp_f_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x40,0x7c]
|
|
|
|
v_cmp_f_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x40,0x7c]
|
|
|
|
v_cmp_f_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x40,0x7c]
|
|
|
|
v_cmp_f_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x40,0x7c]
|
|
|
|
v_cmp_f_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x40,0x7c]
|
|
|
|
v_cmp_f_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x40,0x7c]
|
|
|
|
v_cmp_f_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x40,0x7c]
|
|
|
|
v_cmp_f_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x40,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_f_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x40,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_f_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x41,0x7c]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x20,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x20,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x20,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x20,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x20,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_f_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x20,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x42,0x7c]
|
|
|
|
v_cmp_lt_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x42,0x7c]
|
|
|
|
v_cmp_lt_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x42,0x7c]
|
|
|
|
v_cmp_lt_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x42,0x7c]
|
|
|
|
v_cmp_lt_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x42,0x7c]
|
|
|
|
v_cmp_lt_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x42,0x7c]
|
|
|
|
v_cmp_lt_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x42,0x7c]
|
|
|
|
v_cmp_lt_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x42,0x7c]
|
|
|
|
v_cmp_lt_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x42,0x7c]
|
|
|
|
v_cmp_lt_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x42,0x7c]
|
|
|
|
v_cmp_lt_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x42,0x7c]
|
|
|
|
v_cmp_lt_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x42,0x7c]
|
|
|
|
v_cmp_lt_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x42,0x7c]
|
|
|
|
v_cmp_lt_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x42,0x7c]
|
|
|
|
v_cmp_lt_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x42,0x7c]
|
|
|
|
v_cmp_lt_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x42,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_lt_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x42,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_lt_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x43,0x7c]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x21,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x21,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x21,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x21,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x21,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_lt_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x21,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x44,0x7c]
|
|
|
|
v_cmp_eq_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x44,0x7c]
|
|
|
|
v_cmp_eq_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x44,0x7c]
|
|
|
|
v_cmp_eq_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x44,0x7c]
|
|
|
|
v_cmp_eq_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x44,0x7c]
|
|
|
|
v_cmp_eq_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x44,0x7c]
|
|
|
|
v_cmp_eq_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x44,0x7c]
|
|
|
|
v_cmp_eq_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x44,0x7c]
|
|
|
|
v_cmp_eq_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x44,0x7c]
|
|
|
|
v_cmp_eq_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x44,0x7c]
|
|
|
|
v_cmp_eq_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x44,0x7c]
|
|
|
|
v_cmp_eq_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x44,0x7c]
|
|
|
|
v_cmp_eq_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x44,0x7c]
|
|
|
|
v_cmp_eq_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x44,0x7c]
|
|
|
|
v_cmp_eq_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x44,0x7c]
|
|
|
|
v_cmp_eq_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x44,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_eq_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x44,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_eq_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x45,0x7c]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x22,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x22,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x22,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x22,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x22,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_eq_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x22,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x46,0x7c]
|
|
|
|
v_cmp_le_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x46,0x7c]
|
|
|
|
v_cmp_le_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x46,0x7c]
|
|
|
|
v_cmp_le_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x46,0x7c]
|
|
|
|
v_cmp_le_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x46,0x7c]
|
|
|
|
v_cmp_le_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x46,0x7c]
|
|
|
|
v_cmp_le_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x46,0x7c]
|
|
|
|
v_cmp_le_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x46,0x7c]
|
|
|
|
v_cmp_le_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x46,0x7c]
|
|
|
|
v_cmp_le_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x46,0x7c]
|
|
|
|
v_cmp_le_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x46,0x7c]
|
|
|
|
v_cmp_le_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x46,0x7c]
|
|
|
|
v_cmp_le_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x46,0x7c]
|
|
|
|
v_cmp_le_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x46,0x7c]
|
|
|
|
v_cmp_le_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x46,0x7c]
|
|
|
|
v_cmp_le_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x46,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_le_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x46,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_le_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x47,0x7c]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x23,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x23,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x23,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x23,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x23,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_le_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x23,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x48,0x7c]
|
|
|
|
v_cmp_gt_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x48,0x7c]
|
|
|
|
v_cmp_gt_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x48,0x7c]
|
|
|
|
v_cmp_gt_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x48,0x7c]
|
|
|
|
v_cmp_gt_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x48,0x7c]
|
|
|
|
v_cmp_gt_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x48,0x7c]
|
|
|
|
v_cmp_gt_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x48,0x7c]
|
|
|
|
v_cmp_gt_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x48,0x7c]
|
|
|
|
v_cmp_gt_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x48,0x7c]
|
|
|
|
v_cmp_gt_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x48,0x7c]
|
|
|
|
v_cmp_gt_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x48,0x7c]
|
|
|
|
v_cmp_gt_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x48,0x7c]
|
|
|
|
v_cmp_gt_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x48,0x7c]
|
|
|
|
v_cmp_gt_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x48,0x7c]
|
|
|
|
v_cmp_gt_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x48,0x7c]
|
|
|
|
v_cmp_gt_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x48,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_gt_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x48,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_gt_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x49,0x7c]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x24,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x24,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x24,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x24,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x24,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_gt_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x24,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x4a,0x7c]
|
|
|
|
v_cmp_lg_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x4a,0x7c]
|
|
|
|
v_cmp_lg_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x4a,0x7c]
|
|
|
|
v_cmp_lg_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x4a,0x7c]
|
|
|
|
v_cmp_lg_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x4a,0x7c]
|
|
|
|
v_cmp_lg_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x4a,0x7c]
|
|
|
|
v_cmp_lg_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x4a,0x7c]
|
|
|
|
v_cmp_lg_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x4a,0x7c]
|
|
|
|
v_cmp_lg_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x4a,0x7c]
|
|
|
|
v_cmp_lg_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x4a,0x7c]
|
|
|
|
v_cmp_lg_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x4a,0x7c]
|
|
|
|
v_cmp_lg_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x4a,0x7c]
|
|
|
|
v_cmp_lg_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x4a,0x7c]
|
|
|
|
v_cmp_lg_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x4a,0x7c]
|
|
|
|
v_cmp_lg_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x4a,0x7c]
|
|
|
|
v_cmp_lg_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x4a,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_lg_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x4a,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_lg_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x4b,0x7c]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x25,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x25,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x25,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x25,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x25,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_lg_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x25,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x4c,0x7c]
|
|
|
|
v_cmp_ge_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x4c,0x7c]
|
|
|
|
v_cmp_ge_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x4c,0x7c]
|
|
|
|
v_cmp_ge_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x4c,0x7c]
|
|
|
|
v_cmp_ge_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x4c,0x7c]
|
|
|
|
v_cmp_ge_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x4c,0x7c]
|
|
|
|
v_cmp_ge_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x4c,0x7c]
|
|
|
|
v_cmp_ge_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x4c,0x7c]
|
|
|
|
v_cmp_ge_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x4c,0x7c]
|
|
|
|
v_cmp_ge_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x4c,0x7c]
|
|
|
|
v_cmp_ge_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x4c,0x7c]
|
|
|
|
v_cmp_ge_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x4c,0x7c]
|
|
|
|
v_cmp_ge_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x4c,0x7c]
|
|
|
|
v_cmp_ge_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x4c,0x7c]
|
|
|
|
v_cmp_ge_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x4c,0x7c]
|
|
|
|
v_cmp_ge_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x4c,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_ge_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x4c,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_ge_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x4d,0x7c]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x26,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x26,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x26,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x26,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x26,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_ge_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x26,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x4e,0x7c]
|
|
|
|
v_cmp_o_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x4e,0x7c]
|
|
|
|
v_cmp_o_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x4e,0x7c]
|
|
|
|
v_cmp_o_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x4e,0x7c]
|
|
|
|
v_cmp_o_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x4e,0x7c]
|
|
|
|
v_cmp_o_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x4e,0x7c]
|
|
|
|
v_cmp_o_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x4e,0x7c]
|
|
|
|
v_cmp_o_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x4e,0x7c]
|
|
|
|
v_cmp_o_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x4e,0x7c]
|
|
|
|
v_cmp_o_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x4e,0x7c]
|
|
|
|
v_cmp_o_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x4e,0x7c]
|
|
|
|
v_cmp_o_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x4e,0x7c]
|
|
|
|
v_cmp_o_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x4e,0x7c]
|
|
|
|
v_cmp_o_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x4e,0x7c]
|
|
|
|
v_cmp_o_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x4e,0x7c]
|
|
|
|
v_cmp_o_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x4e,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_o_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x4e,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_o_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x4f,0x7c]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x27,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x27,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x27,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x27,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x27,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_o_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x27,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x50,0x7c]
|
|
|
|
v_cmp_u_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x50,0x7c]
|
|
|
|
v_cmp_u_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x50,0x7c]
|
|
|
|
v_cmp_u_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x50,0x7c]
|
|
|
|
v_cmp_u_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x50,0x7c]
|
|
|
|
v_cmp_u_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x50,0x7c]
|
|
|
|
v_cmp_u_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x50,0x7c]
|
|
|
|
v_cmp_u_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x50,0x7c]
|
|
|
|
v_cmp_u_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x50,0x7c]
|
|
|
|
v_cmp_u_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x50,0x7c]
|
|
|
|
v_cmp_u_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x50,0x7c]
|
|
|
|
v_cmp_u_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x50,0x7c]
|
|
|
|
v_cmp_u_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x50,0x7c]
|
|
|
|
v_cmp_u_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x50,0x7c]
|
|
|
|
v_cmp_u_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x50,0x7c]
|
|
|
|
v_cmp_u_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x50,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_u_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x50,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_u_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x51,0x7c]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x28,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x28,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x28,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x28,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x28,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_u_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x28,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x52,0x7c]
|
|
|
|
v_cmp_nge_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x52,0x7c]
|
|
|
|
v_cmp_nge_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x52,0x7c]
|
|
|
|
v_cmp_nge_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x52,0x7c]
|
|
|
|
v_cmp_nge_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x52,0x7c]
|
|
|
|
v_cmp_nge_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x52,0x7c]
|
|
|
|
v_cmp_nge_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x52,0x7c]
|
|
|
|
v_cmp_nge_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x52,0x7c]
|
|
|
|
v_cmp_nge_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x52,0x7c]
|
|
|
|
v_cmp_nge_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x52,0x7c]
|
|
|
|
v_cmp_nge_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x52,0x7c]
|
|
|
|
v_cmp_nge_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x52,0x7c]
|
|
|
|
v_cmp_nge_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x52,0x7c]
|
|
|
|
v_cmp_nge_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x52,0x7c]
|
|
|
|
v_cmp_nge_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x52,0x7c]
|
|
|
|
v_cmp_nge_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x52,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_nge_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x52,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_nge_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x53,0x7c]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x29,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x29,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x29,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x29,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x29,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_nge_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x29,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x54,0x7c]
|
|
|
|
v_cmp_nlg_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x54,0x7c]
|
|
|
|
v_cmp_nlg_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x54,0x7c]
|
|
|
|
v_cmp_nlg_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x54,0x7c]
|
|
|
|
v_cmp_nlg_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x54,0x7c]
|
|
|
|
v_cmp_nlg_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x54,0x7c]
|
|
|
|
v_cmp_nlg_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x54,0x7c]
|
|
|
|
v_cmp_nlg_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x54,0x7c]
|
|
|
|
v_cmp_nlg_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x54,0x7c]
|
|
|
|
v_cmp_nlg_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x54,0x7c]
|
|
|
|
v_cmp_nlg_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x54,0x7c]
|
|
|
|
v_cmp_nlg_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x54,0x7c]
|
|
|
|
v_cmp_nlg_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x54,0x7c]
|
|
|
|
v_cmp_nlg_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x54,0x7c]
|
|
|
|
v_cmp_nlg_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x54,0x7c]
|
|
|
|
v_cmp_nlg_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x54,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_nlg_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x54,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_nlg_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x55,0x7c]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x2a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x2a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x2a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x2a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x2a,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_nlg_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x2a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x56,0x7c]
|
|
|
|
v_cmp_ngt_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x56,0x7c]
|
|
|
|
v_cmp_ngt_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x56,0x7c]
|
|
|
|
v_cmp_ngt_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x56,0x7c]
|
|
|
|
v_cmp_ngt_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x56,0x7c]
|
|
|
|
v_cmp_ngt_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x56,0x7c]
|
|
|
|
v_cmp_ngt_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x56,0x7c]
|
|
|
|
v_cmp_ngt_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x56,0x7c]
|
|
|
|
v_cmp_ngt_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x56,0x7c]
|
|
|
|
v_cmp_ngt_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x56,0x7c]
|
|
|
|
v_cmp_ngt_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x56,0x7c]
|
|
|
|
v_cmp_ngt_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x56,0x7c]
|
|
|
|
v_cmp_ngt_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x56,0x7c]
|
|
|
|
v_cmp_ngt_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x56,0x7c]
|
|
|
|
v_cmp_ngt_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x56,0x7c]
|
|
|
|
v_cmp_ngt_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x56,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_ngt_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x56,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_ngt_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x57,0x7c]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x2b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x2b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x2b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x2b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x2b,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_ngt_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x2b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x58,0x7c]
|
|
|
|
v_cmp_nle_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x58,0x7c]
|
|
|
|
v_cmp_nle_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x58,0x7c]
|
|
|
|
v_cmp_nle_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x58,0x7c]
|
|
|
|
v_cmp_nle_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x58,0x7c]
|
|
|
|
v_cmp_nle_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x58,0x7c]
|
|
|
|
v_cmp_nle_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x58,0x7c]
|
|
|
|
v_cmp_nle_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x58,0x7c]
|
|
|
|
v_cmp_nle_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x58,0x7c]
|
|
|
|
v_cmp_nle_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x58,0x7c]
|
|
|
|
v_cmp_nle_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x58,0x7c]
|
|
|
|
v_cmp_nle_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x58,0x7c]
|
|
|
|
v_cmp_nle_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x58,0x7c]
|
|
|
|
v_cmp_nle_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x58,0x7c]
|
|
|
|
v_cmp_nle_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x58,0x7c]
|
|
|
|
v_cmp_nle_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x58,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_nle_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x58,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_nle_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x59,0x7c]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x2c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x2c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x2c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x2c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x2c,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_nle_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x2c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x5a,0x7c]
|
|
|
|
v_cmp_neq_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x5a,0x7c]
|
|
|
|
v_cmp_neq_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x5a,0x7c]
|
|
|
|
v_cmp_neq_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x5a,0x7c]
|
|
|
|
v_cmp_neq_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x5a,0x7c]
|
|
|
|
v_cmp_neq_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x5a,0x7c]
|
|
|
|
v_cmp_neq_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x5a,0x7c]
|
|
|
|
v_cmp_neq_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x5a,0x7c]
|
|
|
|
v_cmp_neq_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x5a,0x7c]
|
|
|
|
v_cmp_neq_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x5a,0x7c]
|
|
|
|
v_cmp_neq_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x5a,0x7c]
|
|
|
|
v_cmp_neq_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x5a,0x7c]
|
|
|
|
v_cmp_neq_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x5a,0x7c]
|
|
|
|
v_cmp_neq_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x5a,0x7c]
|
|
|
|
v_cmp_neq_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x5a,0x7c]
|
|
|
|
v_cmp_neq_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x5a,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_neq_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x5a,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_neq_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x5b,0x7c]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x2d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x2d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x2d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x2d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x2d,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_neq_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x2d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x5c,0x7c]
|
|
|
|
v_cmp_nlt_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x5c,0x7c]
|
|
|
|
v_cmp_nlt_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x5c,0x7c]
|
|
|
|
v_cmp_nlt_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x5c,0x7c]
|
|
|
|
v_cmp_nlt_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x5c,0x7c]
|
|
|
|
v_cmp_nlt_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x5c,0x7c]
|
|
|
|
v_cmp_nlt_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x5c,0x7c]
|
|
|
|
v_cmp_nlt_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x5c,0x7c]
|
|
|
|
v_cmp_nlt_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x5c,0x7c]
|
|
|
|
v_cmp_nlt_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x5c,0x7c]
|
|
|
|
v_cmp_nlt_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x5c,0x7c]
|
|
|
|
v_cmp_nlt_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x5c,0x7c]
|
|
|
|
v_cmp_nlt_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x5c,0x7c]
|
|
|
|
v_cmp_nlt_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x5c,0x7c]
|
|
|
|
v_cmp_nlt_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x5c,0x7c]
|
|
|
|
v_cmp_nlt_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x5c,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_nlt_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x5c,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_nlt_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x5d,0x7c]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x2e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x2e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x2e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x2e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x2e,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_nlt_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x2e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_tru_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x5e,0x7c]
|
|
|
|
v_cmp_tru_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x5e,0x7c]
|
|
|
|
v_cmp_tru_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x5e,0x7c]
|
|
|
|
v_cmp_tru_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x5e,0x7c]
|
|
|
|
v_cmp_tru_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x5e,0x7c]
|
|
|
|
v_cmp_tru_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x5e,0x7c]
|
|
|
|
v_cmp_tru_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x5e,0x7c]
|
|
|
|
v_cmp_tru_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x5e,0x7c]
|
|
|
|
v_cmp_tru_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x5e,0x7c]
|
|
|
|
v_cmp_tru_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x5e,0x7c]
|
|
|
|
v_cmp_tru_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x5e,0x7c]
|
|
|
|
v_cmp_tru_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x5e,0x7c]
|
|
|
|
v_cmp_tru_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x5e,0x7c]
|
|
|
|
v_cmp_tru_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x5e,0x7c]
|
|
|
|
v_cmp_tru_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x5e,0x7c]
|
|
|
|
v_cmp_tru_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x5e,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_tru_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x5e,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_tru_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x5f,0x7c]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x2f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x2f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x2f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x2f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x2f,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_tru_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x2f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x60,0x7c]
|
|
|
|
v_cmpx_f_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x60,0x7c]
|
|
|
|
v_cmpx_f_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x60,0x7c]
|
|
|
|
v_cmpx_f_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x60,0x7c]
|
|
|
|
v_cmpx_f_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x60,0x7c]
|
|
|
|
v_cmpx_f_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x60,0x7c]
|
|
|
|
v_cmpx_f_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x60,0x7c]
|
|
|
|
v_cmpx_f_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x60,0x7c]
|
|
|
|
v_cmpx_f_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x60,0x7c]
|
|
|
|
v_cmpx_f_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x60,0x7c]
|
|
|
|
v_cmpx_f_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x60,0x7c]
|
|
|
|
v_cmpx_f_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x60,0x7c]
|
|
|
|
v_cmpx_f_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x60,0x7c]
|
|
|
|
v_cmpx_f_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x60,0x7c]
|
|
|
|
v_cmpx_f_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x60,0x7c]
|
|
|
|
v_cmpx_f_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x60,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_f_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x60,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_f_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x61,0x7c]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x30,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x30,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x30,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x30,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x30,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x30,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_f_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x30,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x62,0x7c]
|
|
|
|
v_cmpx_lt_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x62,0x7c]
|
|
|
|
v_cmpx_lt_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x62,0x7c]
|
|
|
|
v_cmpx_lt_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x62,0x7c]
|
|
|
|
v_cmpx_lt_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x62,0x7c]
|
|
|
|
v_cmpx_lt_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x62,0x7c]
|
|
|
|
v_cmpx_lt_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x62,0x7c]
|
|
|
|
v_cmpx_lt_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x62,0x7c]
|
|
|
|
v_cmpx_lt_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x62,0x7c]
|
|
|
|
v_cmpx_lt_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x62,0x7c]
|
|
|
|
v_cmpx_lt_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x62,0x7c]
|
|
|
|
v_cmpx_lt_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x62,0x7c]
|
|
|
|
v_cmpx_lt_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x62,0x7c]
|
|
|
|
v_cmpx_lt_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x62,0x7c]
|
|
|
|
v_cmpx_lt_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x62,0x7c]
|
|
|
|
v_cmpx_lt_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x62,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_lt_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x62,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_lt_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x63,0x7c]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x31,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x31,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x31,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x31,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x31,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x31,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_lt_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x31,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x64,0x7c]
|
|
|
|
v_cmpx_eq_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x64,0x7c]
|
|
|
|
v_cmpx_eq_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x64,0x7c]
|
|
|
|
v_cmpx_eq_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x64,0x7c]
|
|
|
|
v_cmpx_eq_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x64,0x7c]
|
|
|
|
v_cmpx_eq_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x64,0x7c]
|
|
|
|
v_cmpx_eq_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x64,0x7c]
|
|
|
|
v_cmpx_eq_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x64,0x7c]
|
|
|
|
v_cmpx_eq_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x64,0x7c]
|
|
|
|
v_cmpx_eq_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x64,0x7c]
|
|
|
|
v_cmpx_eq_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x64,0x7c]
|
|
|
|
v_cmpx_eq_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x64,0x7c]
|
|
|
|
v_cmpx_eq_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x64,0x7c]
|
|
|
|
v_cmpx_eq_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x64,0x7c]
|
|
|
|
v_cmpx_eq_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x64,0x7c]
|
|
|
|
v_cmpx_eq_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x64,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_eq_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x64,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_eq_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x65,0x7c]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x32,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x32,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x32,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x32,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x32,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x32,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_eq_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x32,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x66,0x7c]
|
|
|
|
v_cmpx_le_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x66,0x7c]
|
|
|
|
v_cmpx_le_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x66,0x7c]
|
|
|
|
v_cmpx_le_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x66,0x7c]
|
|
|
|
v_cmpx_le_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x66,0x7c]
|
|
|
|
v_cmpx_le_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x66,0x7c]
|
|
|
|
v_cmpx_le_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x66,0x7c]
|
|
|
|
v_cmpx_le_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x66,0x7c]
|
|
|
|
v_cmpx_le_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x66,0x7c]
|
|
|
|
v_cmpx_le_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x66,0x7c]
|
|
|
|
v_cmpx_le_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x66,0x7c]
|
|
|
|
v_cmpx_le_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x66,0x7c]
|
|
|
|
v_cmpx_le_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x66,0x7c]
|
|
|
|
v_cmpx_le_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x66,0x7c]
|
|
|
|
v_cmpx_le_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x66,0x7c]
|
|
|
|
v_cmpx_le_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x66,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_le_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x66,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_le_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x67,0x7c]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x33,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x33,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x33,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x33,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x33,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x33,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_le_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x33,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x68,0x7c]
|
|
|
|
v_cmpx_gt_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x68,0x7c]
|
|
|
|
v_cmpx_gt_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x68,0x7c]
|
|
|
|
v_cmpx_gt_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x68,0x7c]
|
|
|
|
v_cmpx_gt_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x68,0x7c]
|
|
|
|
v_cmpx_gt_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x68,0x7c]
|
|
|
|
v_cmpx_gt_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x68,0x7c]
|
|
|
|
v_cmpx_gt_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x68,0x7c]
|
|
|
|
v_cmpx_gt_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x68,0x7c]
|
|
|
|
v_cmpx_gt_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x68,0x7c]
|
|
|
|
v_cmpx_gt_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x68,0x7c]
|
|
|
|
v_cmpx_gt_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x68,0x7c]
|
|
|
|
v_cmpx_gt_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x68,0x7c]
|
|
|
|
v_cmpx_gt_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x68,0x7c]
|
|
|
|
v_cmpx_gt_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x68,0x7c]
|
|
|
|
v_cmpx_gt_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x68,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_gt_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x68,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_gt_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x69,0x7c]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x34,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x34,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x34,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x34,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x34,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x34,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_gt_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x34,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x6a,0x7c]
|
|
|
|
v_cmpx_lg_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x6a,0x7c]
|
|
|
|
v_cmpx_lg_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x6a,0x7c]
|
|
|
|
v_cmpx_lg_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x6a,0x7c]
|
|
|
|
v_cmpx_lg_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x6a,0x7c]
|
|
|
|
v_cmpx_lg_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x6a,0x7c]
|
|
|
|
v_cmpx_lg_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x6a,0x7c]
|
|
|
|
v_cmpx_lg_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x6a,0x7c]
|
|
|
|
v_cmpx_lg_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x6a,0x7c]
|
|
|
|
v_cmpx_lg_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x6a,0x7c]
|
|
|
|
v_cmpx_lg_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x6a,0x7c]
|
|
|
|
v_cmpx_lg_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x6a,0x7c]
|
|
|
|
v_cmpx_lg_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x6a,0x7c]
|
|
|
|
v_cmpx_lg_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x6a,0x7c]
|
|
|
|
v_cmpx_lg_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x6a,0x7c]
|
|
|
|
v_cmpx_lg_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x6a,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_lg_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x6a,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_lg_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x6b,0x7c]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x35,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x35,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x35,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x35,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x35,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x35,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_lg_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x35,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x6c,0x7c]
|
|
|
|
v_cmpx_ge_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x6c,0x7c]
|
|
|
|
v_cmpx_ge_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x6c,0x7c]
|
|
|
|
v_cmpx_ge_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x6c,0x7c]
|
|
|
|
v_cmpx_ge_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x6c,0x7c]
|
|
|
|
v_cmpx_ge_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x6c,0x7c]
|
|
|
|
v_cmpx_ge_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x6c,0x7c]
|
|
|
|
v_cmpx_ge_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x6c,0x7c]
|
|
|
|
v_cmpx_ge_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x6c,0x7c]
|
|
|
|
v_cmpx_ge_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x6c,0x7c]
|
|
|
|
v_cmpx_ge_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x6c,0x7c]
|
|
|
|
v_cmpx_ge_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x6c,0x7c]
|
|
|
|
v_cmpx_ge_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x6c,0x7c]
|
|
|
|
v_cmpx_ge_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x6c,0x7c]
|
|
|
|
v_cmpx_ge_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x6c,0x7c]
|
|
|
|
v_cmpx_ge_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x6c,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_ge_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x6c,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_ge_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x6d,0x7c]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x36,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x36,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x36,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x36,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x36,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x36,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_ge_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x36,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x6e,0x7c]
|
|
|
|
v_cmpx_o_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x6e,0x7c]
|
|
|
|
v_cmpx_o_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x6e,0x7c]
|
|
|
|
v_cmpx_o_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x6e,0x7c]
|
|
|
|
v_cmpx_o_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x6e,0x7c]
|
|
|
|
v_cmpx_o_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x6e,0x7c]
|
|
|
|
v_cmpx_o_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x6e,0x7c]
|
|
|
|
v_cmpx_o_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x6e,0x7c]
|
|
|
|
v_cmpx_o_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x6e,0x7c]
|
|
|
|
v_cmpx_o_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x6e,0x7c]
|
|
|
|
v_cmpx_o_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x6e,0x7c]
|
|
|
|
v_cmpx_o_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x6e,0x7c]
|
|
|
|
v_cmpx_o_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x6e,0x7c]
|
|
|
|
v_cmpx_o_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x6e,0x7c]
|
|
|
|
v_cmpx_o_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x6e,0x7c]
|
|
|
|
v_cmpx_o_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x6e,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_o_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x6e,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_o_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x6f,0x7c]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x37,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x37,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x37,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x37,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x37,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x37,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_o_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x37,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x70,0x7c]
|
|
|
|
v_cmpx_u_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x70,0x7c]
|
|
|
|
v_cmpx_u_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x70,0x7c]
|
|
|
|
v_cmpx_u_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x70,0x7c]
|
|
|
|
v_cmpx_u_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x70,0x7c]
|
|
|
|
v_cmpx_u_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x70,0x7c]
|
|
|
|
v_cmpx_u_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x70,0x7c]
|
|
|
|
v_cmpx_u_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x70,0x7c]
|
|
|
|
v_cmpx_u_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x70,0x7c]
|
|
|
|
v_cmpx_u_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x70,0x7c]
|
|
|
|
v_cmpx_u_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x70,0x7c]
|
|
|
|
v_cmpx_u_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x70,0x7c]
|
|
|
|
v_cmpx_u_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x70,0x7c]
|
|
|
|
v_cmpx_u_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x70,0x7c]
|
|
|
|
v_cmpx_u_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x70,0x7c]
|
|
|
|
v_cmpx_u_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x70,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_u_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x70,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_u_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x71,0x7c]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x38,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x38,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x38,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x38,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x38,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x38,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_u_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x38,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x72,0x7c]
|
|
|
|
v_cmpx_nge_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x72,0x7c]
|
|
|
|
v_cmpx_nge_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x72,0x7c]
|
|
|
|
v_cmpx_nge_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x72,0x7c]
|
|
|
|
v_cmpx_nge_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x72,0x7c]
|
|
|
|
v_cmpx_nge_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x72,0x7c]
|
|
|
|
v_cmpx_nge_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x72,0x7c]
|
|
|
|
v_cmpx_nge_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x72,0x7c]
|
|
|
|
v_cmpx_nge_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x72,0x7c]
|
|
|
|
v_cmpx_nge_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x72,0x7c]
|
|
|
|
v_cmpx_nge_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x72,0x7c]
|
|
|
|
v_cmpx_nge_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x72,0x7c]
|
|
|
|
v_cmpx_nge_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x72,0x7c]
|
|
|
|
v_cmpx_nge_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x72,0x7c]
|
|
|
|
v_cmpx_nge_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x72,0x7c]
|
|
|
|
v_cmpx_nge_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x72,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_nge_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x72,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_nge_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x73,0x7c]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x39,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x39,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x39,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x39,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x39,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x39,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_nge_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x39,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x74,0x7c]
|
|
|
|
v_cmpx_nlg_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x74,0x7c]
|
|
|
|
v_cmpx_nlg_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x74,0x7c]
|
|
|
|
v_cmpx_nlg_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x74,0x7c]
|
|
|
|
v_cmpx_nlg_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x74,0x7c]
|
|
|
|
v_cmpx_nlg_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x74,0x7c]
|
|
|
|
v_cmpx_nlg_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x74,0x7c]
|
|
|
|
v_cmpx_nlg_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x74,0x7c]
|
|
|
|
v_cmpx_nlg_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x74,0x7c]
|
|
|
|
v_cmpx_nlg_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x74,0x7c]
|
|
|
|
v_cmpx_nlg_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x74,0x7c]
|
|
|
|
v_cmpx_nlg_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x74,0x7c]
|
|
|
|
v_cmpx_nlg_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x74,0x7c]
|
|
|
|
v_cmpx_nlg_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x74,0x7c]
|
|
|
|
v_cmpx_nlg_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x74,0x7c]
|
|
|
|
v_cmpx_nlg_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x74,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x74,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x75,0x7c]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x3a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x3a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x3a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x3a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x3a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x3a,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_nlg_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x3a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x76,0x7c]
|
|
|
|
v_cmpx_ngt_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x76,0x7c]
|
|
|
|
v_cmpx_ngt_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x76,0x7c]
|
|
|
|
v_cmpx_ngt_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x76,0x7c]
|
|
|
|
v_cmpx_ngt_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x76,0x7c]
|
|
|
|
v_cmpx_ngt_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x76,0x7c]
|
|
|
|
v_cmpx_ngt_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x76,0x7c]
|
|
|
|
v_cmpx_ngt_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x76,0x7c]
|
|
|
|
v_cmpx_ngt_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x76,0x7c]
|
|
|
|
v_cmpx_ngt_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x76,0x7c]
|
|
|
|
v_cmpx_ngt_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x76,0x7c]
|
|
|
|
v_cmpx_ngt_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x76,0x7c]
|
|
|
|
v_cmpx_ngt_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x76,0x7c]
|
|
|
|
v_cmpx_ngt_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x76,0x7c]
|
|
|
|
v_cmpx_ngt_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x76,0x7c]
|
|
|
|
v_cmpx_ngt_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x76,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x76,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x77,0x7c]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x3b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x3b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x3b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x3b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x3b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x3b,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_ngt_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x3b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x78,0x7c]
|
|
|
|
v_cmpx_nle_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x78,0x7c]
|
|
|
|
v_cmpx_nle_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x78,0x7c]
|
|
|
|
v_cmpx_nle_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x78,0x7c]
|
|
|
|
v_cmpx_nle_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x78,0x7c]
|
|
|
|
v_cmpx_nle_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x78,0x7c]
|
|
|
|
v_cmpx_nle_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x78,0x7c]
|
|
|
|
v_cmpx_nle_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x78,0x7c]
|
|
|
|
v_cmpx_nle_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x78,0x7c]
|
|
|
|
v_cmpx_nle_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x78,0x7c]
|
|
|
|
v_cmpx_nle_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x78,0x7c]
|
|
|
|
v_cmpx_nle_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x78,0x7c]
|
|
|
|
v_cmpx_nle_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x78,0x7c]
|
|
|
|
v_cmpx_nle_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x78,0x7c]
|
|
|
|
v_cmpx_nle_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x78,0x7c]
|
|
|
|
v_cmpx_nle_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x78,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_nle_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x78,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_nle_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x79,0x7c]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x3c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x3c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x3c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x3c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x3c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x3c,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_nle_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x3c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x7a,0x7c]
|
|
|
|
v_cmpx_neq_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x7a,0x7c]
|
|
|
|
v_cmpx_neq_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x7a,0x7c]
|
|
|
|
v_cmpx_neq_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x7a,0x7c]
|
|
|
|
v_cmpx_neq_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x7a,0x7c]
|
|
|
|
v_cmpx_neq_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x7a,0x7c]
|
|
|
|
v_cmpx_neq_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x7a,0x7c]
|
|
|
|
v_cmpx_neq_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x7a,0x7c]
|
|
|
|
v_cmpx_neq_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x7a,0x7c]
|
|
|
|
v_cmpx_neq_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x7a,0x7c]
|
|
|
|
v_cmpx_neq_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x7a,0x7c]
|
|
|
|
v_cmpx_neq_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x7a,0x7c]
|
|
|
|
v_cmpx_neq_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x7a,0x7c]
|
|
|
|
v_cmpx_neq_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x7a,0x7c]
|
|
|
|
v_cmpx_neq_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x7a,0x7c]
|
|
|
|
v_cmpx_neq_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x7a,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_neq_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x7a,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_neq_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x7b,0x7c]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x3d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x3d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x3d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x3d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x3d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x3d,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_neq_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x3d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x7c,0x7c]
|
|
|
|
v_cmpx_nlt_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x7c,0x7c]
|
|
|
|
v_cmpx_nlt_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x7c,0x7c]
|
|
|
|
v_cmpx_nlt_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x7c,0x7c]
|
|
|
|
v_cmpx_nlt_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x7c,0x7c]
|
|
|
|
v_cmpx_nlt_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x7c,0x7c]
|
|
|
|
v_cmpx_nlt_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x7c,0x7c]
|
|
|
|
v_cmpx_nlt_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x7c,0x7c]
|
|
|
|
v_cmpx_nlt_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x7c,0x7c]
|
|
|
|
v_cmpx_nlt_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x7c,0x7c]
|
|
|
|
v_cmpx_nlt_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x7c,0x7c]
|
|
|
|
v_cmpx_nlt_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x7c,0x7c]
|
|
|
|
v_cmpx_nlt_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x7c,0x7c]
|
|
|
|
v_cmpx_nlt_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x7c,0x7c]
|
|
|
|
v_cmpx_nlt_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x7c,0x7c]
|
|
|
|
v_cmpx_nlt_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x7c,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x7c,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x7d,0x7c]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x3e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x3e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x3e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x3e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x3e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x3e,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_nlt_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x3e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x7e,0x7c]
|
|
|
|
v_cmpx_tru_f16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x7e,0x7c]
|
|
|
|
v_cmpx_tru_f16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x7e,0x7c]
|
|
|
|
v_cmpx_tru_f16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x7e,0x7c]
|
|
|
|
v_cmpx_tru_f16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x7e,0x7c]
|
|
|
|
v_cmpx_tru_f16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x7e,0x7c]
|
|
|
|
v_cmpx_tru_f16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x7e,0x7c]
|
|
|
|
v_cmpx_tru_f16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x7e,0x7c]
|
|
|
|
v_cmpx_tru_f16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x7e,0x7c]
|
|
|
|
v_cmpx_tru_f16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x7e,0x7c]
|
|
|
|
v_cmpx_tru_f16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x7e,0x7c]
|
|
|
|
v_cmpx_tru_f16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x7e,0x7c]
|
|
|
|
v_cmpx_tru_f16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x7e,0x7c]
|
|
|
|
v_cmpx_tru_f16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x7e,0x7c]
|
|
|
|
v_cmpx_tru_f16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x7e,0x7c]
|
|
|
|
v_cmpx_tru_f16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x7e,0x7c,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_tru_f16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x7e,0x7c,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_tru_f16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x7f,0x7c]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x3f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x3f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x3f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x3f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x3f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x3f,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_tru_f16_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x3f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x80,0x7c]
|
|
|
|
v_cmp_f_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x80,0x7c]
|
|
|
|
v_cmp_f_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x80,0x7c]
|
|
|
|
v_cmp_f_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x80,0x7c]
|
|
|
|
v_cmp_f_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x80,0x7c]
|
|
|
|
v_cmp_f_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x80,0x7c]
|
|
|
|
v_cmp_f_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x80,0x7c]
|
|
|
|
v_cmp_f_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x80,0x7c]
|
|
|
|
v_cmp_f_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x80,0x7c]
|
|
|
|
v_cmp_f_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x80,0x7c]
|
|
|
|
v_cmp_f_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x80,0x7c]
|
|
|
|
v_cmp_f_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x80,0x7c]
|
|
|
|
v_cmp_f_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x80,0x7c]
|
|
|
|
v_cmp_f_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x80,0x7c]
|
|
|
|
v_cmp_f_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x80,0x7c]
|
|
|
|
v_cmp_f_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x80,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_f_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x80,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_f_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x81,0x7c]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x40,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x40,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x40,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x40,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x40,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_f_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x40,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x82,0x7c]
|
|
|
|
v_cmp_lt_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x82,0x7c]
|
|
|
|
v_cmp_lt_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x82,0x7c]
|
|
|
|
v_cmp_lt_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x82,0x7c]
|
|
|
|
v_cmp_lt_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x82,0x7c]
|
|
|
|
v_cmp_lt_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x82,0x7c]
|
|
|
|
v_cmp_lt_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x82,0x7c]
|
|
|
|
v_cmp_lt_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x82,0x7c]
|
|
|
|
v_cmp_lt_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x82,0x7c]
|
|
|
|
v_cmp_lt_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x82,0x7c]
|
|
|
|
v_cmp_lt_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x82,0x7c]
|
|
|
|
v_cmp_lt_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x82,0x7c]
|
|
|
|
v_cmp_lt_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x82,0x7c]
|
|
|
|
v_cmp_lt_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x82,0x7c]
|
|
|
|
v_cmp_lt_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x82,0x7c]
|
|
|
|
v_cmp_lt_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x82,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_lt_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x82,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_lt_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x83,0x7c]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x41,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x41,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x41,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x41,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x41,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_lt_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x41,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x84,0x7c]
|
|
|
|
v_cmp_eq_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x84,0x7c]
|
|
|
|
v_cmp_eq_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x84,0x7c]
|
|
|
|
v_cmp_eq_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x84,0x7c]
|
|
|
|
v_cmp_eq_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x84,0x7c]
|
|
|
|
v_cmp_eq_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x84,0x7c]
|
|
|
|
v_cmp_eq_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x84,0x7c]
|
|
|
|
v_cmp_eq_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x84,0x7c]
|
|
|
|
v_cmp_eq_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x84,0x7c]
|
|
|
|
v_cmp_eq_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x84,0x7c]
|
|
|
|
v_cmp_eq_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x84,0x7c]
|
|
|
|
v_cmp_eq_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x84,0x7c]
|
|
|
|
v_cmp_eq_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x84,0x7c]
|
|
|
|
v_cmp_eq_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x84,0x7c]
|
|
|
|
v_cmp_eq_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x84,0x7c]
|
|
|
|
v_cmp_eq_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x84,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_eq_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x84,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_eq_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x85,0x7c]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x42,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x42,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x42,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x42,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x42,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_eq_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x42,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x86,0x7c]
|
|
|
|
v_cmp_le_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x86,0x7c]
|
|
|
|
v_cmp_le_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x86,0x7c]
|
|
|
|
v_cmp_le_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x86,0x7c]
|
|
|
|
v_cmp_le_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x86,0x7c]
|
|
|
|
v_cmp_le_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x86,0x7c]
|
|
|
|
v_cmp_le_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x86,0x7c]
|
|
|
|
v_cmp_le_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x86,0x7c]
|
|
|
|
v_cmp_le_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x86,0x7c]
|
|
|
|
v_cmp_le_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x86,0x7c]
|
|
|
|
v_cmp_le_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x86,0x7c]
|
|
|
|
v_cmp_le_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x86,0x7c]
|
|
|
|
v_cmp_le_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x86,0x7c]
|
|
|
|
v_cmp_le_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x86,0x7c]
|
|
|
|
v_cmp_le_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x86,0x7c]
|
|
|
|
v_cmp_le_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x86,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_le_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x86,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_le_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x87,0x7c]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x43,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x43,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x43,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x43,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x43,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_le_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x43,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x88,0x7c]
|
|
|
|
v_cmp_gt_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x88,0x7c]
|
|
|
|
v_cmp_gt_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x88,0x7c]
|
|
|
|
v_cmp_gt_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x88,0x7c]
|
|
|
|
v_cmp_gt_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x88,0x7c]
|
|
|
|
v_cmp_gt_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x88,0x7c]
|
|
|
|
v_cmp_gt_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x88,0x7c]
|
|
|
|
v_cmp_gt_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x88,0x7c]
|
|
|
|
v_cmp_gt_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x88,0x7c]
|
|
|
|
v_cmp_gt_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x88,0x7c]
|
|
|
|
v_cmp_gt_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x88,0x7c]
|
|
|
|
v_cmp_gt_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x88,0x7c]
|
|
|
|
v_cmp_gt_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x88,0x7c]
|
|
|
|
v_cmp_gt_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x88,0x7c]
|
|
|
|
v_cmp_gt_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x88,0x7c]
|
|
|
|
v_cmp_gt_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x88,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_gt_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x88,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_gt_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x89,0x7c]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x44,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x44,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x44,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x44,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x44,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_gt_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x44,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x8a,0x7c]
|
|
|
|
v_cmp_lg_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x8a,0x7c]
|
|
|
|
v_cmp_lg_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x8a,0x7c]
|
|
|
|
v_cmp_lg_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x8a,0x7c]
|
|
|
|
v_cmp_lg_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x8a,0x7c]
|
|
|
|
v_cmp_lg_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x8a,0x7c]
|
|
|
|
v_cmp_lg_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x8a,0x7c]
|
|
|
|
v_cmp_lg_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x8a,0x7c]
|
|
|
|
v_cmp_lg_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x8a,0x7c]
|
|
|
|
v_cmp_lg_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x8a,0x7c]
|
|
|
|
v_cmp_lg_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x8a,0x7c]
|
|
|
|
v_cmp_lg_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x8a,0x7c]
|
|
|
|
v_cmp_lg_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x8a,0x7c]
|
|
|
|
v_cmp_lg_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x8a,0x7c]
|
|
|
|
v_cmp_lg_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x8a,0x7c]
|
|
|
|
v_cmp_lg_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x8a,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_lg_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x8a,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_lg_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x8b,0x7c]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x45,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x45,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x45,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x45,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x45,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_lg_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x45,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x8c,0x7c]
|
|
|
|
v_cmp_ge_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x8c,0x7c]
|
|
|
|
v_cmp_ge_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x8c,0x7c]
|
|
|
|
v_cmp_ge_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x8c,0x7c]
|
|
|
|
v_cmp_ge_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x8c,0x7c]
|
|
|
|
v_cmp_ge_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x8c,0x7c]
|
|
|
|
v_cmp_ge_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x8c,0x7c]
|
|
|
|
v_cmp_ge_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x8c,0x7c]
|
|
|
|
v_cmp_ge_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x8c,0x7c]
|
|
|
|
v_cmp_ge_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x8c,0x7c]
|
|
|
|
v_cmp_ge_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x8c,0x7c]
|
|
|
|
v_cmp_ge_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x8c,0x7c]
|
|
|
|
v_cmp_ge_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x8c,0x7c]
|
|
|
|
v_cmp_ge_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x8c,0x7c]
|
|
|
|
v_cmp_ge_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x8c,0x7c]
|
|
|
|
v_cmp_ge_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x8c,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_ge_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x8c,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_ge_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x8d,0x7c]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x46,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x46,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x46,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x46,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x46,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_ge_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x46,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x8e,0x7c]
|
|
|
|
v_cmp_o_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x8e,0x7c]
|
|
|
|
v_cmp_o_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x8e,0x7c]
|
|
|
|
v_cmp_o_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x8e,0x7c]
|
|
|
|
v_cmp_o_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x8e,0x7c]
|
|
|
|
v_cmp_o_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x8e,0x7c]
|
|
|
|
v_cmp_o_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x8e,0x7c]
|
|
|
|
v_cmp_o_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x8e,0x7c]
|
|
|
|
v_cmp_o_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x8e,0x7c]
|
|
|
|
v_cmp_o_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x8e,0x7c]
|
|
|
|
v_cmp_o_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x8e,0x7c]
|
|
|
|
v_cmp_o_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x8e,0x7c]
|
|
|
|
v_cmp_o_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x8e,0x7c]
|
|
|
|
v_cmp_o_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x8e,0x7c]
|
|
|
|
v_cmp_o_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x8e,0x7c]
|
|
|
|
v_cmp_o_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x8e,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_o_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x8e,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_o_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x8f,0x7c]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x47,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x47,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x47,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x47,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x47,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_o_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x47,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x90,0x7c]
|
|
|
|
v_cmp_u_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x90,0x7c]
|
|
|
|
v_cmp_u_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x90,0x7c]
|
|
|
|
v_cmp_u_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x90,0x7c]
|
|
|
|
v_cmp_u_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x90,0x7c]
|
|
|
|
v_cmp_u_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x90,0x7c]
|
|
|
|
v_cmp_u_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x90,0x7c]
|
|
|
|
v_cmp_u_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x90,0x7c]
|
|
|
|
v_cmp_u_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x90,0x7c]
|
|
|
|
v_cmp_u_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x90,0x7c]
|
|
|
|
v_cmp_u_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x90,0x7c]
|
|
|
|
v_cmp_u_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x90,0x7c]
|
|
|
|
v_cmp_u_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x90,0x7c]
|
|
|
|
v_cmp_u_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x90,0x7c]
|
|
|
|
v_cmp_u_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x90,0x7c]
|
|
|
|
v_cmp_u_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x90,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_u_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x90,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_u_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x91,0x7c]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x48,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x48,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x48,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x48,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x48,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_u_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x48,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x92,0x7c]
|
|
|
|
v_cmp_nge_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x92,0x7c]
|
|
|
|
v_cmp_nge_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x92,0x7c]
|
|
|
|
v_cmp_nge_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x92,0x7c]
|
|
|
|
v_cmp_nge_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x92,0x7c]
|
|
|
|
v_cmp_nge_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x92,0x7c]
|
|
|
|
v_cmp_nge_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x92,0x7c]
|
|
|
|
v_cmp_nge_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x92,0x7c]
|
|
|
|
v_cmp_nge_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x92,0x7c]
|
|
|
|
v_cmp_nge_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x92,0x7c]
|
|
|
|
v_cmp_nge_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x92,0x7c]
|
|
|
|
v_cmp_nge_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x92,0x7c]
|
|
|
|
v_cmp_nge_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x92,0x7c]
|
|
|
|
v_cmp_nge_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x92,0x7c]
|
|
|
|
v_cmp_nge_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x92,0x7c]
|
|
|
|
v_cmp_nge_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x92,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_nge_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x92,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_nge_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x93,0x7c]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x49,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x49,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x49,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x49,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x49,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_nge_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x49,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x94,0x7c]
|
|
|
|
v_cmp_nlg_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x94,0x7c]
|
|
|
|
v_cmp_nlg_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x94,0x7c]
|
|
|
|
v_cmp_nlg_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x94,0x7c]
|
|
|
|
v_cmp_nlg_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x94,0x7c]
|
|
|
|
v_cmp_nlg_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x94,0x7c]
|
|
|
|
v_cmp_nlg_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x94,0x7c]
|
|
|
|
v_cmp_nlg_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x94,0x7c]
|
|
|
|
v_cmp_nlg_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x94,0x7c]
|
|
|
|
v_cmp_nlg_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x94,0x7c]
|
|
|
|
v_cmp_nlg_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x94,0x7c]
|
|
|
|
v_cmp_nlg_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x94,0x7c]
|
|
|
|
v_cmp_nlg_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x94,0x7c]
|
|
|
|
v_cmp_nlg_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x94,0x7c]
|
|
|
|
v_cmp_nlg_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x94,0x7c]
|
|
|
|
v_cmp_nlg_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x94,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_nlg_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x94,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_nlg_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x95,0x7c]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x4a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x4a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x4a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x4a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0x83,0x01,0x00]
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|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0xe1,0x01,0x00]
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|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0xef,0x01,0x00]
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|
|
|
v_cmp_nlg_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0x05,0x02,0x20]
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|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0x05,0x02,0x40]
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|
|
|
v_cmp_nlg_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x4a,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_nlg_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x4a,0xd0,0x01,0x05,0x02,0x00]
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|
|
|
v_cmp_ngt_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x96,0x7c]
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|
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|
v_cmp_ngt_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x96,0x7c]
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|
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|
v_cmp_ngt_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x96,0x7c]
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|
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|
v_cmp_ngt_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x96,0x7c]
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|
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|
v_cmp_ngt_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x96,0x7c]
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|
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|
v_cmp_ngt_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x96,0x7c]
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|
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|
v_cmp_ngt_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x96,0x7c]
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|
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|
v_cmp_ngt_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x96,0x7c]
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|
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|
v_cmp_ngt_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x96,0x7c]
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|
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|
v_cmp_ngt_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x96,0x7c]
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|
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v_cmp_ngt_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x96,0x7c]
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|
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|
v_cmp_ngt_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x96,0x7c]
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|
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|
v_cmp_ngt_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x96,0x7c]
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|
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|
v_cmp_ngt_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x96,0x7c]
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|
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|
v_cmp_ngt_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x96,0x7c]
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|
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|
v_cmp_ngt_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x96,0x7c,0x56,0x34,0x12,0xaf]
|
|
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|
v_cmp_ngt_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x96,0x7c,0x73,0x72,0x71,0x3f]
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|
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|
v_cmp_ngt_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x97,0x7c]
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|
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|
v_cmp_ngt_f32_e64 s[10:11], v1, v2
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|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0x05,0x02,0x00]
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|
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|
v_cmp_ngt_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x4b,0xd0,0x01,0x05,0x02,0x00]
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|
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|
v_cmp_ngt_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x4b,0xd0,0x01,0x05,0x02,0x00]
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|
|
|
v_cmp_ngt_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x4b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x4b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0xcb,0x00,0x00]
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|
|
|
v_cmp_ngt_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0xd5,0x00,0x00]
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|
|
|
v_cmp_ngt_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0xfd,0x00,0x00]
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|
|
|
v_cmp_ngt_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0xff,0x00,0x00]
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|
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|
v_cmp_ngt_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0x01,0x01,0x00]
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|
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|
v_cmp_ngt_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0x83,0x01,0x00]
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|
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|
v_cmp_ngt_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0xe1,0x01,0x00]
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|
|
|
v_cmp_ngt_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x4b,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_ngt_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x4b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x98,0x7c]
|
|
|
|
v_cmp_nle_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x98,0x7c]
|
|
|
|
v_cmp_nle_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x98,0x7c]
|
|
|
|
v_cmp_nle_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x98,0x7c]
|
|
|
|
v_cmp_nle_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x98,0x7c]
|
|
|
|
v_cmp_nle_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x98,0x7c]
|
|
|
|
v_cmp_nle_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x98,0x7c]
|
|
|
|
v_cmp_nle_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x98,0x7c]
|
|
|
|
v_cmp_nle_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x98,0x7c]
|
|
|
|
v_cmp_nle_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x98,0x7c]
|
|
|
|
v_cmp_nle_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x98,0x7c]
|
|
|
|
v_cmp_nle_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x98,0x7c]
|
|
|
|
v_cmp_nle_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x98,0x7c]
|
|
|
|
v_cmp_nle_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x98,0x7c]
|
|
|
|
v_cmp_nle_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x98,0x7c]
|
|
|
|
v_cmp_nle_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x98,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_nle_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x98,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_nle_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x99,0x7c]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x4c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x4c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x4c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x4c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x4c,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_nle_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x4c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x9a,0x7c]
|
|
|
|
v_cmp_neq_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x9a,0x7c]
|
|
|
|
v_cmp_neq_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x9a,0x7c]
|
|
|
|
v_cmp_neq_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x9a,0x7c]
|
|
|
|
v_cmp_neq_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x9a,0x7c]
|
|
|
|
v_cmp_neq_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x9a,0x7c]
|
|
|
|
v_cmp_neq_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x9a,0x7c]
|
|
|
|
v_cmp_neq_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x9a,0x7c]
|
|
|
|
v_cmp_neq_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x9a,0x7c]
|
|
|
|
v_cmp_neq_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x9a,0x7c]
|
|
|
|
v_cmp_neq_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x9a,0x7c]
|
|
|
|
v_cmp_neq_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x9a,0x7c]
|
|
|
|
v_cmp_neq_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x9a,0x7c]
|
|
|
|
v_cmp_neq_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x9a,0x7c]
|
|
|
|
v_cmp_neq_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x9a,0x7c]
|
|
|
|
v_cmp_neq_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x9a,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_neq_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x9a,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_neq_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x9b,0x7c]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x4d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x4d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x4d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x4d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x4d,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_neq_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x4d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x9c,0x7c]
|
|
|
|
v_cmp_nlt_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x9c,0x7c]
|
|
|
|
v_cmp_nlt_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x9c,0x7c]
|
|
|
|
v_cmp_nlt_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x9c,0x7c]
|
|
|
|
v_cmp_nlt_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x9c,0x7c]
|
|
|
|
v_cmp_nlt_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x9c,0x7c]
|
|
|
|
v_cmp_nlt_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x9c,0x7c]
|
|
|
|
v_cmp_nlt_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x9c,0x7c]
|
|
|
|
v_cmp_nlt_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x9c,0x7c]
|
|
|
|
v_cmp_nlt_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x9c,0x7c]
|
|
|
|
v_cmp_nlt_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x9c,0x7c]
|
|
|
|
v_cmp_nlt_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x9c,0x7c]
|
|
|
|
v_cmp_nlt_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x9c,0x7c]
|
|
|
|
v_cmp_nlt_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x9c,0x7c]
|
|
|
|
v_cmp_nlt_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x9c,0x7c]
|
|
|
|
v_cmp_nlt_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x9c,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_nlt_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x9c,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_nlt_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x9d,0x7c]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x4e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x4e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x4e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x4e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x4e,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_nlt_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x4e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_tru_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x9e,0x7c]
|
|
|
|
v_cmp_tru_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x9e,0x7c]
|
|
|
|
v_cmp_tru_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x9e,0x7c]
|
|
|
|
v_cmp_tru_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x9e,0x7c]
|
|
|
|
v_cmp_tru_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x9e,0x7c]
|
|
|
|
v_cmp_tru_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x9e,0x7c]
|
|
|
|
v_cmp_tru_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x9e,0x7c]
|
|
|
|
v_cmp_tru_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x9e,0x7c]
|
|
|
|
v_cmp_tru_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x9e,0x7c]
|
|
|
|
v_cmp_tru_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x9e,0x7c]
|
|
|
|
v_cmp_tru_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x9e,0x7c]
|
|
|
|
v_cmp_tru_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x9e,0x7c]
|
|
|
|
v_cmp_tru_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x9e,0x7c]
|
|
|
|
v_cmp_tru_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x9e,0x7c]
|
|
|
|
v_cmp_tru_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x9e,0x7c]
|
|
|
|
v_cmp_tru_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x9e,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_tru_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x9e,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_tru_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x9f,0x7c]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x4f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x4f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x4f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x4f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x4f,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_tru_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x4f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xa0,0x7c]
|
|
|
|
v_cmpx_f_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xa0,0x7c]
|
|
|
|
v_cmpx_f_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xa0,0x7c]
|
|
|
|
v_cmpx_f_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xa0,0x7c]
|
|
|
|
v_cmpx_f_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xa0,0x7c]
|
|
|
|
v_cmpx_f_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xa0,0x7c]
|
|
|
|
v_cmpx_f_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xa0,0x7c]
|
|
|
|
v_cmpx_f_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xa0,0x7c]
|
|
|
|
v_cmpx_f_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xa0,0x7c]
|
|
|
|
v_cmpx_f_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xa0,0x7c]
|
|
|
|
v_cmpx_f_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xa0,0x7c]
|
|
|
|
v_cmpx_f_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xa0,0x7c]
|
|
|
|
v_cmpx_f_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xa0,0x7c]
|
|
|
|
v_cmpx_f_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xa0,0x7c]
|
|
|
|
v_cmpx_f_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xa0,0x7c]
|
|
|
|
v_cmpx_f_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xa0,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_f_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xa0,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_f_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xa1,0x7c]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x50,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x50,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x50,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x50,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x50,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x50,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_f_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x50,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xa2,0x7c]
|
|
|
|
v_cmpx_lt_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xa2,0x7c]
|
|
|
|
v_cmpx_lt_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xa2,0x7c]
|
|
|
|
v_cmpx_lt_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xa2,0x7c]
|
|
|
|
v_cmpx_lt_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xa2,0x7c]
|
|
|
|
v_cmpx_lt_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xa2,0x7c]
|
|
|
|
v_cmpx_lt_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xa2,0x7c]
|
|
|
|
v_cmpx_lt_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xa2,0x7c]
|
|
|
|
v_cmpx_lt_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xa2,0x7c]
|
|
|
|
v_cmpx_lt_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xa2,0x7c]
|
|
|
|
v_cmpx_lt_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xa2,0x7c]
|
|
|
|
v_cmpx_lt_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xa2,0x7c]
|
|
|
|
v_cmpx_lt_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xa2,0x7c]
|
|
|
|
v_cmpx_lt_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xa2,0x7c]
|
|
|
|
v_cmpx_lt_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xa2,0x7c]
|
|
|
|
v_cmpx_lt_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xa2,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_lt_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xa2,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_lt_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xa3,0x7c]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x51,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x51,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x51,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x51,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x51,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x51,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_lt_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x51,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xa4,0x7c]
|
|
|
|
v_cmpx_eq_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xa4,0x7c]
|
|
|
|
v_cmpx_eq_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xa4,0x7c]
|
|
|
|
v_cmpx_eq_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xa4,0x7c]
|
|
|
|
v_cmpx_eq_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xa4,0x7c]
|
|
|
|
v_cmpx_eq_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xa4,0x7c]
|
|
|
|
v_cmpx_eq_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xa4,0x7c]
|
|
|
|
v_cmpx_eq_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xa4,0x7c]
|
|
|
|
v_cmpx_eq_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xa4,0x7c]
|
|
|
|
v_cmpx_eq_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xa4,0x7c]
|
|
|
|
v_cmpx_eq_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xa4,0x7c]
|
|
|
|
v_cmpx_eq_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xa4,0x7c]
|
|
|
|
v_cmpx_eq_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xa4,0x7c]
|
|
|
|
v_cmpx_eq_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xa4,0x7c]
|
|
|
|
v_cmpx_eq_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xa4,0x7c]
|
|
|
|
v_cmpx_eq_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xa4,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_eq_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xa4,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_eq_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xa5,0x7c]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x52,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x52,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x52,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x52,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x52,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x52,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_eq_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x52,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xa6,0x7c]
|
|
|
|
v_cmpx_le_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xa6,0x7c]
|
|
|
|
v_cmpx_le_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xa6,0x7c]
|
|
|
|
v_cmpx_le_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xa6,0x7c]
|
|
|
|
v_cmpx_le_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xa6,0x7c]
|
|
|
|
v_cmpx_le_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xa6,0x7c]
|
|
|
|
v_cmpx_le_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xa6,0x7c]
|
|
|
|
v_cmpx_le_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xa6,0x7c]
|
|
|
|
v_cmpx_le_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xa6,0x7c]
|
|
|
|
v_cmpx_le_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xa6,0x7c]
|
|
|
|
v_cmpx_le_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xa6,0x7c]
|
|
|
|
v_cmpx_le_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xa6,0x7c]
|
|
|
|
v_cmpx_le_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xa6,0x7c]
|
|
|
|
v_cmpx_le_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xa6,0x7c]
|
|
|
|
v_cmpx_le_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xa6,0x7c]
|
|
|
|
v_cmpx_le_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xa6,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_le_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xa6,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_le_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xa7,0x7c]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x53,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x53,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x53,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x53,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x53,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x53,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_le_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x53,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xa8,0x7c]
|
|
|
|
v_cmpx_gt_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xa8,0x7c]
|
|
|
|
v_cmpx_gt_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xa8,0x7c]
|
|
|
|
v_cmpx_gt_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xa8,0x7c]
|
|
|
|
v_cmpx_gt_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xa8,0x7c]
|
|
|
|
v_cmpx_gt_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xa8,0x7c]
|
|
|
|
v_cmpx_gt_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xa8,0x7c]
|
|
|
|
v_cmpx_gt_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xa8,0x7c]
|
|
|
|
v_cmpx_gt_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xa8,0x7c]
|
|
|
|
v_cmpx_gt_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xa8,0x7c]
|
|
|
|
v_cmpx_gt_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xa8,0x7c]
|
|
|
|
v_cmpx_gt_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xa8,0x7c]
|
|
|
|
v_cmpx_gt_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xa8,0x7c]
|
|
|
|
v_cmpx_gt_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xa8,0x7c]
|
|
|
|
v_cmpx_gt_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xa8,0x7c]
|
|
|
|
v_cmpx_gt_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xa8,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_gt_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xa8,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_gt_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xa9,0x7c]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x54,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x54,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x54,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x54,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x54,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x54,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_gt_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x54,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xaa,0x7c]
|
|
|
|
v_cmpx_lg_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xaa,0x7c]
|
|
|
|
v_cmpx_lg_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xaa,0x7c]
|
|
|
|
v_cmpx_lg_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xaa,0x7c]
|
|
|
|
v_cmpx_lg_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xaa,0x7c]
|
|
|
|
v_cmpx_lg_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xaa,0x7c]
|
|
|
|
v_cmpx_lg_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xaa,0x7c]
|
|
|
|
v_cmpx_lg_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xaa,0x7c]
|
|
|
|
v_cmpx_lg_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xaa,0x7c]
|
|
|
|
v_cmpx_lg_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xaa,0x7c]
|
|
|
|
v_cmpx_lg_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xaa,0x7c]
|
|
|
|
v_cmpx_lg_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xaa,0x7c]
|
|
|
|
v_cmpx_lg_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xaa,0x7c]
|
|
|
|
v_cmpx_lg_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xaa,0x7c]
|
|
|
|
v_cmpx_lg_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xaa,0x7c]
|
|
|
|
v_cmpx_lg_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xaa,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_lg_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xaa,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_lg_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xab,0x7c]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x55,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x55,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x55,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x55,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x55,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x55,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_lg_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x55,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xac,0x7c]
|
|
|
|
v_cmpx_ge_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xac,0x7c]
|
|
|
|
v_cmpx_ge_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xac,0x7c]
|
|
|
|
v_cmpx_ge_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xac,0x7c]
|
|
|
|
v_cmpx_ge_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xac,0x7c]
|
|
|
|
v_cmpx_ge_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xac,0x7c]
|
|
|
|
v_cmpx_ge_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xac,0x7c]
|
|
|
|
v_cmpx_ge_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xac,0x7c]
|
|
|
|
v_cmpx_ge_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xac,0x7c]
|
|
|
|
v_cmpx_ge_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xac,0x7c]
|
|
|
|
v_cmpx_ge_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xac,0x7c]
|
|
|
|
v_cmpx_ge_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xac,0x7c]
|
|
|
|
v_cmpx_ge_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xac,0x7c]
|
|
|
|
v_cmpx_ge_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xac,0x7c]
|
|
|
|
v_cmpx_ge_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xac,0x7c]
|
|
|
|
v_cmpx_ge_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xac,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_ge_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xac,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_ge_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xad,0x7c]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x56,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x56,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x56,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x56,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x56,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x56,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_ge_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x56,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xae,0x7c]
|
|
|
|
v_cmpx_o_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xae,0x7c]
|
|
|
|
v_cmpx_o_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xae,0x7c]
|
|
|
|
v_cmpx_o_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xae,0x7c]
|
|
|
|
v_cmpx_o_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xae,0x7c]
|
|
|
|
v_cmpx_o_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xae,0x7c]
|
|
|
|
v_cmpx_o_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xae,0x7c]
|
|
|
|
v_cmpx_o_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xae,0x7c]
|
|
|
|
v_cmpx_o_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xae,0x7c]
|
|
|
|
v_cmpx_o_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xae,0x7c]
|
|
|
|
v_cmpx_o_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xae,0x7c]
|
|
|
|
v_cmpx_o_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xae,0x7c]
|
|
|
|
v_cmpx_o_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xae,0x7c]
|
|
|
|
v_cmpx_o_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xae,0x7c]
|
|
|
|
v_cmpx_o_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xae,0x7c]
|
|
|
|
v_cmpx_o_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xae,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_o_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xae,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_o_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xaf,0x7c]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x57,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x57,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x57,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x57,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x57,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x57,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_o_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x57,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xb0,0x7c]
|
|
|
|
v_cmpx_u_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xb0,0x7c]
|
|
|
|
v_cmpx_u_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xb0,0x7c]
|
|
|
|
v_cmpx_u_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xb0,0x7c]
|
|
|
|
v_cmpx_u_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xb0,0x7c]
|
|
|
|
v_cmpx_u_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xb0,0x7c]
|
|
|
|
v_cmpx_u_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xb0,0x7c]
|
|
|
|
v_cmpx_u_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xb0,0x7c]
|
|
|
|
v_cmpx_u_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xb0,0x7c]
|
|
|
|
v_cmpx_u_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xb0,0x7c]
|
|
|
|
v_cmpx_u_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xb0,0x7c]
|
|
|
|
v_cmpx_u_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xb0,0x7c]
|
|
|
|
v_cmpx_u_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xb0,0x7c]
|
|
|
|
v_cmpx_u_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xb0,0x7c]
|
|
|
|
v_cmpx_u_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xb0,0x7c]
|
|
|
|
v_cmpx_u_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xb0,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_u_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xb0,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_u_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xb1,0x7c]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x58,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x58,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x58,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x58,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x58,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x58,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_u_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x58,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xb2,0x7c]
|
|
|
|
v_cmpx_nge_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xb2,0x7c]
|
|
|
|
v_cmpx_nge_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xb2,0x7c]
|
|
|
|
v_cmpx_nge_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xb2,0x7c]
|
|
|
|
v_cmpx_nge_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xb2,0x7c]
|
|
|
|
v_cmpx_nge_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xb2,0x7c]
|
|
|
|
v_cmpx_nge_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xb2,0x7c]
|
|
|
|
v_cmpx_nge_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xb2,0x7c]
|
|
|
|
v_cmpx_nge_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xb2,0x7c]
|
|
|
|
v_cmpx_nge_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xb2,0x7c]
|
|
|
|
v_cmpx_nge_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xb2,0x7c]
|
|
|
|
v_cmpx_nge_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xb2,0x7c]
|
|
|
|
v_cmpx_nge_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xb2,0x7c]
|
|
|
|
v_cmpx_nge_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xb2,0x7c]
|
|
|
|
v_cmpx_nge_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xb2,0x7c]
|
|
|
|
v_cmpx_nge_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xb2,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_nge_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xb2,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_nge_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xb3,0x7c]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x59,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x59,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x59,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x59,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x59,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x59,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_nge_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x59,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xb4,0x7c]
|
|
|
|
v_cmpx_nlg_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xb4,0x7c]
|
|
|
|
v_cmpx_nlg_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xb4,0x7c]
|
|
|
|
v_cmpx_nlg_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xb4,0x7c]
|
|
|
|
v_cmpx_nlg_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xb4,0x7c]
|
|
|
|
v_cmpx_nlg_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xb4,0x7c]
|
|
|
|
v_cmpx_nlg_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xb4,0x7c]
|
|
|
|
v_cmpx_nlg_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xb4,0x7c]
|
|
|
|
v_cmpx_nlg_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xb4,0x7c]
|
|
|
|
v_cmpx_nlg_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xb4,0x7c]
|
|
|
|
v_cmpx_nlg_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xb4,0x7c]
|
|
|
|
v_cmpx_nlg_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xb4,0x7c]
|
|
|
|
v_cmpx_nlg_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xb4,0x7c]
|
|
|
|
v_cmpx_nlg_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xb4,0x7c]
|
|
|
|
v_cmpx_nlg_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xb4,0x7c]
|
|
|
|
v_cmpx_nlg_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xb4,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_nlg_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xb4,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_nlg_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xb5,0x7c]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x5a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x5a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x5a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x5a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x5a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x5a,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_nlg_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x5a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xb6,0x7c]
|
|
|
|
v_cmpx_ngt_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xb6,0x7c]
|
|
|
|
v_cmpx_ngt_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xb6,0x7c]
|
|
|
|
v_cmpx_ngt_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xb6,0x7c]
|
|
|
|
v_cmpx_ngt_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xb6,0x7c]
|
|
|
|
v_cmpx_ngt_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xb6,0x7c]
|
|
|
|
v_cmpx_ngt_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xb6,0x7c]
|
|
|
|
v_cmpx_ngt_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xb6,0x7c]
|
|
|
|
v_cmpx_ngt_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xb6,0x7c]
|
|
|
|
v_cmpx_ngt_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xb6,0x7c]
|
|
|
|
v_cmpx_ngt_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xb6,0x7c]
|
|
|
|
v_cmpx_ngt_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xb6,0x7c]
|
|
|
|
v_cmpx_ngt_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xb6,0x7c]
|
|
|
|
v_cmpx_ngt_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xb6,0x7c]
|
|
|
|
v_cmpx_ngt_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xb6,0x7c]
|
|
|
|
v_cmpx_ngt_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xb6,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_ngt_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xb6,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_ngt_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xb7,0x7c]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x5b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x5b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x5b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x5b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x5b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x5b,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_ngt_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x5b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xb8,0x7c]
|
|
|
|
v_cmpx_nle_f32 vcc, v255, v2
|
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// CHECK: [0xff,0x05,0xb8,0x7c]
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v_cmpx_nle_f32 vcc, s1, v2
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// CHECK: [0x01,0x04,0xb8,0x7c]
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v_cmpx_nle_f32 vcc, s101, v2
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// CHECK: [0x65,0x04,0xb8,0x7c]
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v_cmpx_nle_f32 vcc, flat_scratch_lo, v2
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// CHECK: [0x66,0x04,0xb8,0x7c]
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v_cmpx_nle_f32 vcc, flat_scratch_hi, v2
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// CHECK: [0x67,0x04,0xb8,0x7c]
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v_cmpx_nle_f32 vcc, vcc_lo, v2
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// CHECK: [0x6a,0x04,0xb8,0x7c]
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v_cmpx_nle_f32 vcc, vcc_hi, v2
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// CHECK: [0x6b,0x04,0xb8,0x7c]
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v_cmpx_nle_f32 vcc, m0, v2
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// CHECK: [0x7c,0x04,0xb8,0x7c]
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v_cmpx_nle_f32 vcc, exec_lo, v2
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// CHECK: [0x7e,0x04,0xb8,0x7c]
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v_cmpx_nle_f32 vcc, exec_hi, v2
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// CHECK: [0x7f,0x04,0xb8,0x7c]
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v_cmpx_nle_f32 vcc, 0, v2
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// CHECK: [0x80,0x04,0xb8,0x7c]
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v_cmpx_nle_f32 vcc, -1, v2
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// CHECK: [0xc1,0x04,0xb8,0x7c]
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v_cmpx_nle_f32 vcc, 0.5, v2
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// CHECK: [0xf0,0x04,0xb8,0x7c]
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v_cmpx_nle_f32 vcc, -4.0, v2
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// CHECK: [0xf7,0x04,0xb8,0x7c]
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v_cmpx_nle_f32 vcc, 0xaf123456, v2
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// CHECK: [0xff,0x04,0xb8,0x7c,0x56,0x34,0x12,0xaf]
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v_cmpx_nle_f32 vcc, 0x3f717273, v2
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// CHECK: [0xff,0x04,0xb8,0x7c,0x73,0x72,0x71,0x3f]
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v_cmpx_nle_f32 vcc, v1, v255
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// CHECK: [0x01,0xff,0xb9,0x7c]
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v_cmpx_nle_f32_e64 s[10:11], v1, v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_nle_f32_e64 s[12:13], v1, v2
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// CHECK: [0x0c,0x00,0x5c,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_nle_f32_e64 s[100:101], v1, v2
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// CHECK: [0x64,0x00,0x5c,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_nle_f32_e64 flat_scratch, v1, v2
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// CHECK: [0x66,0x00,0x5c,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_nle_f32_e64 vcc, v1, v2
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// CHECK: [0x6a,0x00,0x5c,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_nle_f32_e64 exec, v1, v2
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// CHECK: [0x7e,0x00,0x5c,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_nle_f32_e64 s[10:11], v255, v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0xff,0x05,0x02,0x00]
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v_cmpx_nle_f32_e64 s[10:11], s1, v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0x04,0x02,0x00]
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v_cmpx_nle_f32_e64 s[10:11], s101, v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x65,0x04,0x02,0x00]
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v_cmpx_nle_f32_e64 s[10:11], flat_scratch_lo, v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x66,0x04,0x02,0x00]
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v_cmpx_nle_f32_e64 s[10:11], flat_scratch_hi, v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x67,0x04,0x02,0x00]
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v_cmpx_nle_f32_e64 s[10:11], vcc_lo, v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x6a,0x04,0x02,0x00]
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v_cmpx_nle_f32_e64 s[10:11], vcc_hi, v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x6b,0x04,0x02,0x00]
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v_cmpx_nle_f32_e64 s[10:11], m0, v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x7c,0x04,0x02,0x00]
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v_cmpx_nle_f32_e64 s[10:11], exec_lo, v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x7e,0x04,0x02,0x00]
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v_cmpx_nle_f32_e64 s[10:11], exec_hi, v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x7f,0x04,0x02,0x00]
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v_cmpx_nle_f32_e64 s[10:11], 0, v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x80,0x04,0x02,0x00]
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v_cmpx_nle_f32_e64 s[10:11], -1, v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0xc1,0x04,0x02,0x00]
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v_cmpx_nle_f32_e64 s[10:11], 0.5, v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0xf0,0x04,0x02,0x00]
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v_cmpx_nle_f32_e64 s[10:11], -4.0, v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0xf7,0x04,0x02,0x00]
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v_cmpx_nle_f32_e64 s[10:11], v1, v255
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0xff,0x03,0x00]
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v_cmpx_nle_f32_e64 s[10:11], v1, s2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0x05,0x00,0x00]
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v_cmpx_nle_f32_e64 s[10:11], v1, s101
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0xcb,0x00,0x00]
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v_cmpx_nle_f32_e64 s[10:11], v1, flat_scratch_lo
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0xcd,0x00,0x00]
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v_cmpx_nle_f32_e64 s[10:11], v1, flat_scratch_hi
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0xcf,0x00,0x00]
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v_cmpx_nle_f32_e64 s[10:11], v1, vcc_lo
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0xd5,0x00,0x00]
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v_cmpx_nle_f32_e64 s[10:11], v1, vcc_hi
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0xd7,0x00,0x00]
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v_cmpx_nle_f32_e64 s[10:11], v1, m0
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0xf9,0x00,0x00]
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v_cmpx_nle_f32_e64 s[10:11], v1, exec_lo
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0xfd,0x00,0x00]
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v_cmpx_nle_f32_e64 s[10:11], v1, exec_hi
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0xff,0x00,0x00]
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v_cmpx_nle_f32_e64 s[10:11], v1, 0
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0x01,0x01,0x00]
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v_cmpx_nle_f32_e64 s[10:11], v1, -1
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0x83,0x01,0x00]
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v_cmpx_nle_f32_e64 s[10:11], v1, 0.5
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0xe1,0x01,0x00]
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v_cmpx_nle_f32_e64 s[10:11], v1, -4.0
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0xef,0x01,0x00]
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v_cmpx_nle_f32_e64 s[10:11], -v1, v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0x05,0x02,0x20]
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v_cmpx_nle_f32_e64 s[10:11], v1, -v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0x05,0x02,0x40]
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v_cmpx_nle_f32_e64 s[10:11], -v1, -v2
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// CHECK: [0x0a,0x00,0x5c,0xd0,0x01,0x05,0x02,0x60]
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v_cmpx_nle_f32_e64 s[10:11], v1, v2 clamp
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// CHECK: [0x0a,0x80,0x5c,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_neq_f32 vcc, v1, v2
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// CHECK: [0x01,0x05,0xba,0x7c]
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v_cmpx_neq_f32 vcc, v255, v2
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// CHECK: [0xff,0x05,0xba,0x7c]
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v_cmpx_neq_f32 vcc, s1, v2
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// CHECK: [0x01,0x04,0xba,0x7c]
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v_cmpx_neq_f32 vcc, s101, v2
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// CHECK: [0x65,0x04,0xba,0x7c]
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v_cmpx_neq_f32 vcc, flat_scratch_lo, v2
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// CHECK: [0x66,0x04,0xba,0x7c]
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v_cmpx_neq_f32 vcc, flat_scratch_hi, v2
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// CHECK: [0x67,0x04,0xba,0x7c]
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v_cmpx_neq_f32 vcc, vcc_lo, v2
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// CHECK: [0x6a,0x04,0xba,0x7c]
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v_cmpx_neq_f32 vcc, vcc_hi, v2
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// CHECK: [0x6b,0x04,0xba,0x7c]
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v_cmpx_neq_f32 vcc, m0, v2
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// CHECK: [0x7c,0x04,0xba,0x7c]
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v_cmpx_neq_f32 vcc, exec_lo, v2
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// CHECK: [0x7e,0x04,0xba,0x7c]
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v_cmpx_neq_f32 vcc, exec_hi, v2
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// CHECK: [0x7f,0x04,0xba,0x7c]
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v_cmpx_neq_f32 vcc, 0, v2
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// CHECK: [0x80,0x04,0xba,0x7c]
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v_cmpx_neq_f32 vcc, -1, v2
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// CHECK: [0xc1,0x04,0xba,0x7c]
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v_cmpx_neq_f32 vcc, 0.5, v2
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// CHECK: [0xf0,0x04,0xba,0x7c]
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v_cmpx_neq_f32 vcc, -4.0, v2
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// CHECK: [0xf7,0x04,0xba,0x7c]
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v_cmpx_neq_f32 vcc, 0xaf123456, v2
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// CHECK: [0xff,0x04,0xba,0x7c,0x56,0x34,0x12,0xaf]
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v_cmpx_neq_f32 vcc, 0x3f717273, v2
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// CHECK: [0xff,0x04,0xba,0x7c,0x73,0x72,0x71,0x3f]
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v_cmpx_neq_f32 vcc, v1, v255
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// CHECK: [0x01,0xff,0xbb,0x7c]
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v_cmpx_neq_f32_e64 s[10:11], v1, v2
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_neq_f32_e64 s[12:13], v1, v2
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// CHECK: [0x0c,0x00,0x5d,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_neq_f32_e64 s[100:101], v1, v2
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// CHECK: [0x64,0x00,0x5d,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_neq_f32_e64 flat_scratch, v1, v2
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// CHECK: [0x66,0x00,0x5d,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_neq_f32_e64 vcc, v1, v2
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// CHECK: [0x6a,0x00,0x5d,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_neq_f32_e64 exec, v1, v2
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// CHECK: [0x7e,0x00,0x5d,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_neq_f32_e64 s[10:11], v255, v2
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// CHECK: [0x0a,0x00,0x5d,0xd0,0xff,0x05,0x02,0x00]
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v_cmpx_neq_f32_e64 s[10:11], s1, v2
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0x04,0x02,0x00]
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v_cmpx_neq_f32_e64 s[10:11], s101, v2
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x65,0x04,0x02,0x00]
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v_cmpx_neq_f32_e64 s[10:11], flat_scratch_lo, v2
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x66,0x04,0x02,0x00]
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v_cmpx_neq_f32_e64 s[10:11], flat_scratch_hi, v2
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x67,0x04,0x02,0x00]
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v_cmpx_neq_f32_e64 s[10:11], vcc_lo, v2
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x6a,0x04,0x02,0x00]
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v_cmpx_neq_f32_e64 s[10:11], vcc_hi, v2
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x6b,0x04,0x02,0x00]
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v_cmpx_neq_f32_e64 s[10:11], m0, v2
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x7c,0x04,0x02,0x00]
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v_cmpx_neq_f32_e64 s[10:11], exec_lo, v2
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x7e,0x04,0x02,0x00]
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v_cmpx_neq_f32_e64 s[10:11], exec_hi, v2
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x7f,0x04,0x02,0x00]
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v_cmpx_neq_f32_e64 s[10:11], 0, v2
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x80,0x04,0x02,0x00]
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v_cmpx_neq_f32_e64 s[10:11], -1, v2
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// CHECK: [0x0a,0x00,0x5d,0xd0,0xc1,0x04,0x02,0x00]
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v_cmpx_neq_f32_e64 s[10:11], 0.5, v2
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// CHECK: [0x0a,0x00,0x5d,0xd0,0xf0,0x04,0x02,0x00]
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v_cmpx_neq_f32_e64 s[10:11], -4.0, v2
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// CHECK: [0x0a,0x00,0x5d,0xd0,0xf7,0x04,0x02,0x00]
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v_cmpx_neq_f32_e64 s[10:11], v1, v255
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0xff,0x03,0x00]
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v_cmpx_neq_f32_e64 s[10:11], v1, s2
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0x05,0x00,0x00]
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v_cmpx_neq_f32_e64 s[10:11], v1, s101
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0xcb,0x00,0x00]
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v_cmpx_neq_f32_e64 s[10:11], v1, flat_scratch_lo
|
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0xcd,0x00,0x00]
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v_cmpx_neq_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0xcf,0x00,0x00]
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v_cmpx_neq_f32_e64 s[10:11], v1, vcc_lo
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0xd5,0x00,0x00]
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v_cmpx_neq_f32_e64 s[10:11], v1, vcc_hi
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0xd7,0x00,0x00]
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v_cmpx_neq_f32_e64 s[10:11], v1, m0
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0xf9,0x00,0x00]
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v_cmpx_neq_f32_e64 s[10:11], v1, exec_lo
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0xfd,0x00,0x00]
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v_cmpx_neq_f32_e64 s[10:11], v1, exec_hi
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0xff,0x00,0x00]
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v_cmpx_neq_f32_e64 s[10:11], v1, 0
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|
// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0x01,0x01,0x00]
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v_cmpx_neq_f32_e64 s[10:11], v1, -1
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// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0x83,0x01,0x00]
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v_cmpx_neq_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_neq_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_neq_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_neq_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_neq_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x5d,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_neq_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x5d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xbc,0x7c]
|
|
|
|
v_cmpx_nlt_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xbc,0x7c]
|
|
|
|
v_cmpx_nlt_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xbc,0x7c]
|
|
|
|
v_cmpx_nlt_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xbc,0x7c]
|
|
|
|
v_cmpx_nlt_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xbc,0x7c]
|
|
|
|
v_cmpx_nlt_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xbc,0x7c]
|
|
|
|
v_cmpx_nlt_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xbc,0x7c]
|
|
|
|
v_cmpx_nlt_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xbc,0x7c]
|
|
|
|
v_cmpx_nlt_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xbc,0x7c]
|
|
|
|
v_cmpx_nlt_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xbc,0x7c]
|
|
|
|
v_cmpx_nlt_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xbc,0x7c]
|
|
|
|
v_cmpx_nlt_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xbc,0x7c]
|
|
|
|
v_cmpx_nlt_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xbc,0x7c]
|
|
|
|
v_cmpx_nlt_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xbc,0x7c]
|
|
|
|
v_cmpx_nlt_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xbc,0x7c]
|
|
|
|
v_cmpx_nlt_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xbc,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_nlt_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xbc,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_nlt_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xbd,0x7c]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x5e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x5e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x5e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x5e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x5e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x5e,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_nlt_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x5e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xbe,0x7c]
|
|
|
|
v_cmpx_tru_f32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xbe,0x7c]
|
|
|
|
v_cmpx_tru_f32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xbe,0x7c]
|
|
|
|
v_cmpx_tru_f32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xbe,0x7c]
|
|
|
|
v_cmpx_tru_f32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xbe,0x7c]
|
|
|
|
v_cmpx_tru_f32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xbe,0x7c]
|
|
|
|
v_cmpx_tru_f32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xbe,0x7c]
|
|
|
|
v_cmpx_tru_f32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xbe,0x7c]
|
|
|
|
v_cmpx_tru_f32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xbe,0x7c]
|
|
|
|
v_cmpx_tru_f32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xbe,0x7c]
|
|
|
|
v_cmpx_tru_f32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xbe,0x7c]
|
|
|
|
v_cmpx_tru_f32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xbe,0x7c]
|
|
|
|
v_cmpx_tru_f32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xbe,0x7c]
|
|
|
|
v_cmpx_tru_f32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xbe,0x7c]
|
|
|
|
v_cmpx_tru_f32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xbe,0x7c]
|
|
|
|
v_cmpx_tru_f32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xbe,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_tru_f32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xbe,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_tru_f32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xbf,0x7c]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0x5f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0x5f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0x5f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0x5f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0x5f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], -v1, v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, -v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], -v1, -v2
|
|
// CHECK: [0x0a,0x00,0x5f,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_tru_f32_e64 s[10:11], v1, v2 clamp
|
|
// CHECK: [0x0a,0x80,0x5f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xc0,0x7c]
|
|
|
|
v_cmp_f_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xc0,0x7c]
|
|
|
|
v_cmp_f_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xc0,0x7c]
|
|
|
|
v_cmp_f_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xc0,0x7c]
|
|
|
|
v_cmp_f_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xc0,0x7c]
|
|
|
|
v_cmp_f_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xc0,0x7c]
|
|
|
|
v_cmp_f_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xc0,0x7c]
|
|
|
|
v_cmp_f_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xc0,0x7c]
|
|
|
|
v_cmp_f_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xc0,0x7c]
|
|
|
|
v_cmp_f_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xc0,0x7c]
|
|
|
|
v_cmp_f_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xc0,0x7c]
|
|
|
|
v_cmp_f_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xc0,0x7c]
|
|
|
|
v_cmp_f_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc0,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_f_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc0,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_f_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xc1,0x7c]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x60,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x60,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x60,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x60,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x60,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_f_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x60,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xc2,0x7c]
|
|
|
|
v_cmp_lt_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xc2,0x7c]
|
|
|
|
v_cmp_lt_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xc2,0x7c]
|
|
|
|
v_cmp_lt_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xc2,0x7c]
|
|
|
|
v_cmp_lt_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xc2,0x7c]
|
|
|
|
v_cmp_lt_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xc2,0x7c]
|
|
|
|
v_cmp_lt_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xc2,0x7c]
|
|
|
|
v_cmp_lt_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xc2,0x7c]
|
|
|
|
v_cmp_lt_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xc2,0x7c]
|
|
|
|
v_cmp_lt_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xc2,0x7c]
|
|
|
|
v_cmp_lt_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xc2,0x7c]
|
|
|
|
v_cmp_lt_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xc2,0x7c]
|
|
|
|
v_cmp_lt_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc2,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_lt_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc2,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_lt_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xc3,0x7c]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x61,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x61,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x61,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x61,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x61,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_lt_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x61,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xc4,0x7c]
|
|
|
|
v_cmp_eq_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xc4,0x7c]
|
|
|
|
v_cmp_eq_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xc4,0x7c]
|
|
|
|
v_cmp_eq_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xc4,0x7c]
|
|
|
|
v_cmp_eq_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xc4,0x7c]
|
|
|
|
v_cmp_eq_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xc4,0x7c]
|
|
|
|
v_cmp_eq_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xc4,0x7c]
|
|
|
|
v_cmp_eq_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xc4,0x7c]
|
|
|
|
v_cmp_eq_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xc4,0x7c]
|
|
|
|
v_cmp_eq_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xc4,0x7c]
|
|
|
|
v_cmp_eq_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xc4,0x7c]
|
|
|
|
v_cmp_eq_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xc4,0x7c]
|
|
|
|
v_cmp_eq_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc4,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_eq_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc4,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_eq_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xc5,0x7c]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x62,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x62,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x62,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x62,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x62,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_eq_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x62,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xc6,0x7c]
|
|
|
|
v_cmp_le_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xc6,0x7c]
|
|
|
|
v_cmp_le_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xc6,0x7c]
|
|
|
|
v_cmp_le_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xc6,0x7c]
|
|
|
|
v_cmp_le_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xc6,0x7c]
|
|
|
|
v_cmp_le_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xc6,0x7c]
|
|
|
|
v_cmp_le_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xc6,0x7c]
|
|
|
|
v_cmp_le_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xc6,0x7c]
|
|
|
|
v_cmp_le_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xc6,0x7c]
|
|
|
|
v_cmp_le_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xc6,0x7c]
|
|
|
|
v_cmp_le_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xc6,0x7c]
|
|
|
|
v_cmp_le_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xc6,0x7c]
|
|
|
|
v_cmp_le_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc6,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_le_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc6,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_le_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xc7,0x7c]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x63,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x63,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x63,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x63,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x63,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_le_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x63,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xc8,0x7c]
|
|
|
|
v_cmp_gt_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xc8,0x7c]
|
|
|
|
v_cmp_gt_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xc8,0x7c]
|
|
|
|
v_cmp_gt_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xc8,0x7c]
|
|
|
|
v_cmp_gt_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xc8,0x7c]
|
|
|
|
v_cmp_gt_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xc8,0x7c]
|
|
|
|
v_cmp_gt_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xc8,0x7c]
|
|
|
|
v_cmp_gt_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xc8,0x7c]
|
|
|
|
v_cmp_gt_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xc8,0x7c]
|
|
|
|
v_cmp_gt_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xc8,0x7c]
|
|
|
|
v_cmp_gt_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xc8,0x7c]
|
|
|
|
v_cmp_gt_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xc8,0x7c]
|
|
|
|
v_cmp_gt_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc8,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_gt_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc8,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_gt_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xc9,0x7c]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x64,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x64,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x64,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x64,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x64,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_gt_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x64,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xca,0x7c]
|
|
|
|
v_cmp_lg_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xca,0x7c]
|
|
|
|
v_cmp_lg_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xca,0x7c]
|
|
|
|
v_cmp_lg_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xca,0x7c]
|
|
|
|
v_cmp_lg_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xca,0x7c]
|
|
|
|
v_cmp_lg_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xca,0x7c]
|
|
|
|
v_cmp_lg_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xca,0x7c]
|
|
|
|
v_cmp_lg_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xca,0x7c]
|
|
|
|
v_cmp_lg_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xca,0x7c]
|
|
|
|
v_cmp_lg_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xca,0x7c]
|
|
|
|
v_cmp_lg_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xca,0x7c]
|
|
|
|
v_cmp_lg_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xca,0x7c]
|
|
|
|
v_cmp_lg_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xca,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_lg_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xca,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_lg_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xcb,0x7c]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x65,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x65,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x65,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x65,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x65,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_lg_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x65,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xcc,0x7c]
|
|
|
|
v_cmp_ge_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xcc,0x7c]
|
|
|
|
v_cmp_ge_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xcc,0x7c]
|
|
|
|
v_cmp_ge_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xcc,0x7c]
|
|
|
|
v_cmp_ge_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xcc,0x7c]
|
|
|
|
v_cmp_ge_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xcc,0x7c]
|
|
|
|
v_cmp_ge_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xcc,0x7c]
|
|
|
|
v_cmp_ge_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xcc,0x7c]
|
|
|
|
v_cmp_ge_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xcc,0x7c]
|
|
|
|
v_cmp_ge_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xcc,0x7c]
|
|
|
|
v_cmp_ge_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xcc,0x7c]
|
|
|
|
v_cmp_ge_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xcc,0x7c]
|
|
|
|
v_cmp_ge_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xcc,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_ge_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xcc,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_ge_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xcd,0x7c]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x66,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x66,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x66,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x66,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x66,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_ge_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x66,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xce,0x7c]
|
|
|
|
v_cmp_o_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xce,0x7c]
|
|
|
|
v_cmp_o_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xce,0x7c]
|
|
|
|
v_cmp_o_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xce,0x7c]
|
|
|
|
v_cmp_o_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xce,0x7c]
|
|
|
|
v_cmp_o_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xce,0x7c]
|
|
|
|
v_cmp_o_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xce,0x7c]
|
|
|
|
v_cmp_o_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xce,0x7c]
|
|
|
|
v_cmp_o_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xce,0x7c]
|
|
|
|
v_cmp_o_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xce,0x7c]
|
|
|
|
v_cmp_o_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xce,0x7c]
|
|
|
|
v_cmp_o_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xce,0x7c]
|
|
|
|
v_cmp_o_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xce,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_o_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xce,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_o_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xcf,0x7c]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x67,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x67,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x67,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x67,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x67,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_o_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x67,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xd0,0x7c]
|
|
|
|
v_cmp_u_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xd0,0x7c]
|
|
|
|
v_cmp_u_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xd0,0x7c]
|
|
|
|
v_cmp_u_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xd0,0x7c]
|
|
|
|
v_cmp_u_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xd0,0x7c]
|
|
|
|
v_cmp_u_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xd0,0x7c]
|
|
|
|
v_cmp_u_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xd0,0x7c]
|
|
|
|
v_cmp_u_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xd0,0x7c]
|
|
|
|
v_cmp_u_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xd0,0x7c]
|
|
|
|
v_cmp_u_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xd0,0x7c]
|
|
|
|
v_cmp_u_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xd0,0x7c]
|
|
|
|
v_cmp_u_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xd0,0x7c]
|
|
|
|
v_cmp_u_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd0,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_u_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd0,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_u_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xd1,0x7c]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x68,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x68,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x68,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x68,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x68,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_u_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x68,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xd2,0x7c]
|
|
|
|
v_cmp_nge_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xd2,0x7c]
|
|
|
|
v_cmp_nge_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xd2,0x7c]
|
|
|
|
v_cmp_nge_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xd2,0x7c]
|
|
|
|
v_cmp_nge_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xd2,0x7c]
|
|
|
|
v_cmp_nge_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xd2,0x7c]
|
|
|
|
v_cmp_nge_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xd2,0x7c]
|
|
|
|
v_cmp_nge_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xd2,0x7c]
|
|
|
|
v_cmp_nge_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xd2,0x7c]
|
|
|
|
v_cmp_nge_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xd2,0x7c]
|
|
|
|
v_cmp_nge_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xd2,0x7c]
|
|
|
|
v_cmp_nge_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xd2,0x7c]
|
|
|
|
v_cmp_nge_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd2,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_nge_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd2,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_nge_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xd3,0x7c]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x69,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x69,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x69,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x69,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x69,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_nge_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x69,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xd4,0x7c]
|
|
|
|
v_cmp_nlg_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xd4,0x7c]
|
|
|
|
v_cmp_nlg_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xd4,0x7c]
|
|
|
|
v_cmp_nlg_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xd4,0x7c]
|
|
|
|
v_cmp_nlg_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xd4,0x7c]
|
|
|
|
v_cmp_nlg_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xd4,0x7c]
|
|
|
|
v_cmp_nlg_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xd4,0x7c]
|
|
|
|
v_cmp_nlg_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xd4,0x7c]
|
|
|
|
v_cmp_nlg_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xd4,0x7c]
|
|
|
|
v_cmp_nlg_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xd4,0x7c]
|
|
|
|
v_cmp_nlg_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xd4,0x7c]
|
|
|
|
v_cmp_nlg_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xd4,0x7c]
|
|
|
|
v_cmp_nlg_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd4,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_nlg_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd4,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_nlg_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xd5,0x7c]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x6a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x6a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x6a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x6a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6a,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_nlg_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x6a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xd6,0x7c]
|
|
|
|
v_cmp_ngt_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xd6,0x7c]
|
|
|
|
v_cmp_ngt_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xd6,0x7c]
|
|
|
|
v_cmp_ngt_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xd6,0x7c]
|
|
|
|
v_cmp_ngt_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xd6,0x7c]
|
|
|
|
v_cmp_ngt_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xd6,0x7c]
|
|
|
|
v_cmp_ngt_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xd6,0x7c]
|
|
|
|
v_cmp_ngt_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xd6,0x7c]
|
|
|
|
v_cmp_ngt_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xd6,0x7c]
|
|
|
|
v_cmp_ngt_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xd6,0x7c]
|
|
|
|
v_cmp_ngt_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xd6,0x7c]
|
|
|
|
v_cmp_ngt_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xd6,0x7c]
|
|
|
|
v_cmp_ngt_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd6,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_ngt_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd6,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_ngt_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xd7,0x7c]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x6b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x6b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x6b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x6b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6b,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_ngt_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x6b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xd8,0x7c]
|
|
|
|
v_cmp_nle_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xd8,0x7c]
|
|
|
|
v_cmp_nle_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xd8,0x7c]
|
|
|
|
v_cmp_nle_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xd8,0x7c]
|
|
|
|
v_cmp_nle_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xd8,0x7c]
|
|
|
|
v_cmp_nle_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xd8,0x7c]
|
|
|
|
v_cmp_nle_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xd8,0x7c]
|
|
|
|
v_cmp_nle_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xd8,0x7c]
|
|
|
|
v_cmp_nle_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xd8,0x7c]
|
|
|
|
v_cmp_nle_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xd8,0x7c]
|
|
|
|
v_cmp_nle_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xd8,0x7c]
|
|
|
|
v_cmp_nle_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xd8,0x7c]
|
|
|
|
v_cmp_nle_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd8,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_nle_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd8,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_nle_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xd9,0x7c]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x6c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x6c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x6c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x6c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6c,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_nle_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x6c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xda,0x7c]
|
|
|
|
v_cmp_neq_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xda,0x7c]
|
|
|
|
v_cmp_neq_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xda,0x7c]
|
|
|
|
v_cmp_neq_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xda,0x7c]
|
|
|
|
v_cmp_neq_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xda,0x7c]
|
|
|
|
v_cmp_neq_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xda,0x7c]
|
|
|
|
v_cmp_neq_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xda,0x7c]
|
|
|
|
v_cmp_neq_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xda,0x7c]
|
|
|
|
v_cmp_neq_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xda,0x7c]
|
|
|
|
v_cmp_neq_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xda,0x7c]
|
|
|
|
v_cmp_neq_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xda,0x7c]
|
|
|
|
v_cmp_neq_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xda,0x7c]
|
|
|
|
v_cmp_neq_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xda,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_neq_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xda,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_neq_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xdb,0x7c]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x6d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x6d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x6d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x6d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6d,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_neq_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x6d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xdc,0x7c]
|
|
|
|
v_cmp_nlt_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xdc,0x7c]
|
|
|
|
v_cmp_nlt_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xdc,0x7c]
|
|
|
|
v_cmp_nlt_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xdc,0x7c]
|
|
|
|
v_cmp_nlt_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xdc,0x7c]
|
|
|
|
v_cmp_nlt_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xdc,0x7c]
|
|
|
|
v_cmp_nlt_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xdc,0x7c]
|
|
|
|
v_cmp_nlt_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xdc,0x7c]
|
|
|
|
v_cmp_nlt_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xdc,0x7c]
|
|
|
|
v_cmp_nlt_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xdc,0x7c]
|
|
|
|
v_cmp_nlt_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xdc,0x7c]
|
|
|
|
v_cmp_nlt_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xdc,0x7c]
|
|
|
|
v_cmp_nlt_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xdc,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_nlt_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xdc,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_nlt_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xdd,0x7c]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x6e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x6e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x6e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x6e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x6e,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmp_nlt_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x6e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_tru_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xde,0x7c]
|
|
|
|
v_cmp_tru_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xde,0x7c]
|
|
|
|
v_cmp_tru_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xde,0x7c]
|
|
|
|
v_cmp_tru_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xde,0x7c]
|
|
|
|
v_cmp_tru_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xde,0x7c]
|
|
|
|
v_cmp_tru_f64 vcc, flat_scratch, v[2:3]
|
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// CHECK: [0x66,0x04,0xde,0x7c]
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v_cmp_tru_f64 vcc, vcc, v[2:3]
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// CHECK: [0x6a,0x04,0xde,0x7c]
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v_cmp_tru_f64 vcc, exec, v[2:3]
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// CHECK: [0x7e,0x04,0xde,0x7c]
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v_cmp_tru_f64 vcc, 0, v[2:3]
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// CHECK: [0x80,0x04,0xde,0x7c]
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v_cmp_tru_f64 vcc, -1, v[2:3]
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// CHECK: [0xc1,0x04,0xde,0x7c]
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v_cmp_tru_f64 vcc, 0.5, v[2:3]
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// CHECK: [0xf0,0x04,0xde,0x7c]
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v_cmp_tru_f64 vcc, -4.0, v[2:3]
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// CHECK: [0xf7,0x04,0xde,0x7c]
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v_cmp_tru_f64 vcc, 0xaf123456, v[2:3]
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// CHECK: [0xff,0x04,0xde,0x7c,0x56,0x34,0x12,0xaf]
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v_cmp_tru_f64 vcc, 0x3f717273, v[2:3]
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// CHECK: [0xff,0x04,0xde,0x7c,0x73,0x72,0x71,0x3f]
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v_cmp_tru_f64 vcc, v[1:2], v[254:255]
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// CHECK: [0x01,0xfd,0xdf,0x7c]
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v_cmp_tru_f64_e64 s[10:11], v[1:2], v[2:3]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x01,0x05,0x02,0x00]
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v_cmp_tru_f64_e64 s[12:13], v[1:2], v[2:3]
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// CHECK: [0x0c,0x00,0x6f,0xd0,0x01,0x05,0x02,0x00]
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v_cmp_tru_f64_e64 s[100:101], v[1:2], v[2:3]
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// CHECK: [0x64,0x00,0x6f,0xd0,0x01,0x05,0x02,0x00]
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v_cmp_tru_f64_e64 flat_scratch, v[1:2], v[2:3]
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// CHECK: [0x66,0x00,0x6f,0xd0,0x01,0x05,0x02,0x00]
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v_cmp_tru_f64_e64 vcc, v[1:2], v[2:3]
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// CHECK: [0x6a,0x00,0x6f,0xd0,0x01,0x05,0x02,0x00]
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v_cmp_tru_f64_e64 s[10:11], v[254:255], v[2:3]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0xfe,0x05,0x02,0x00]
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v_cmp_tru_f64_e64 s[10:11], s[2:3], v[2:3]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x02,0x04,0x02,0x00]
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v_cmp_tru_f64_e64 s[10:11], s[4:5], v[2:3]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x04,0x04,0x02,0x00]
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v_cmp_tru_f64_e64 s[10:11], s[100:101], v[2:3]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x64,0x04,0x02,0x00]
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v_cmp_tru_f64_e64 s[10:11], flat_scratch, v[2:3]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x66,0x04,0x02,0x00]
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v_cmp_tru_f64_e64 s[10:11], vcc, v[2:3]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x6a,0x04,0x02,0x00]
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v_cmp_tru_f64_e64 s[10:11], exec, v[2:3]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x7e,0x04,0x02,0x00]
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v_cmp_tru_f64_e64 s[10:11], 0, v[2:3]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x80,0x04,0x02,0x00]
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v_cmp_tru_f64_e64 s[10:11], -1, v[2:3]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0xc1,0x04,0x02,0x00]
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v_cmp_tru_f64_e64 s[10:11], 0.5, v[2:3]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0xf0,0x04,0x02,0x00]
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v_cmp_tru_f64_e64 s[10:11], -4.0, v[2:3]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0xf7,0x04,0x02,0x00]
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v_cmp_tru_f64_e64 s[10:11], v[1:2], v[254:255]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x01,0xfd,0x03,0x00]
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v_cmp_tru_f64_e64 s[10:11], v[1:2], s[4:5]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x01,0x09,0x00,0x00]
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v_cmp_tru_f64_e64 s[10:11], v[1:2], s[6:7]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x01,0x0d,0x00,0x00]
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v_cmp_tru_f64_e64 s[10:11], v[1:2], s[100:101]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x01,0xc9,0x00,0x00]
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v_cmp_tru_f64_e64 s[10:11], v[1:2], flat_scratch
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x01,0xcd,0x00,0x00]
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v_cmp_tru_f64_e64 s[10:11], v[1:2], vcc
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x01,0xd5,0x00,0x00]
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v_cmp_tru_f64_e64 s[10:11], v[1:2], exec
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x01,0xfd,0x00,0x00]
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v_cmp_tru_f64_e64 s[10:11], v[1:2], 0
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x01,0x01,0x01,0x00]
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v_cmp_tru_f64_e64 s[10:11], v[1:2], -1
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x01,0x83,0x01,0x00]
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v_cmp_tru_f64_e64 s[10:11], v[1:2], 0.5
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x01,0xe1,0x01,0x00]
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v_cmp_tru_f64_e64 s[10:11], v[1:2], -4.0
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x01,0xef,0x01,0x00]
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v_cmp_tru_f64_e64 s[10:11], -v[1:2], v[2:3]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x01,0x05,0x02,0x20]
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v_cmp_tru_f64_e64 s[10:11], v[1:2], -v[2:3]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x01,0x05,0x02,0x40]
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v_cmp_tru_f64_e64 s[10:11], -v[1:2], -v[2:3]
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// CHECK: [0x0a,0x00,0x6f,0xd0,0x01,0x05,0x02,0x60]
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v_cmp_tru_f64_e64 s[10:11], v[1:2], v[2:3] clamp
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// CHECK: [0x0a,0x80,0x6f,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_f_f64 vcc, v[1:2], v[2:3]
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// CHECK: [0x01,0x05,0xe0,0x7c]
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v_cmpx_f_f64 vcc, v[254:255], v[2:3]
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// CHECK: [0xfe,0x05,0xe0,0x7c]
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v_cmpx_f_f64 vcc, s[2:3], v[2:3]
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// CHECK: [0x02,0x04,0xe0,0x7c]
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v_cmpx_f_f64 vcc, s[4:5], v[2:3]
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// CHECK: [0x04,0x04,0xe0,0x7c]
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v_cmpx_f_f64 vcc, s[100:101], v[2:3]
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// CHECK: [0x64,0x04,0xe0,0x7c]
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v_cmpx_f_f64 vcc, flat_scratch, v[2:3]
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// CHECK: [0x66,0x04,0xe0,0x7c]
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v_cmpx_f_f64 vcc, vcc, v[2:3]
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// CHECK: [0x6a,0x04,0xe0,0x7c]
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v_cmpx_f_f64 vcc, exec, v[2:3]
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// CHECK: [0x7e,0x04,0xe0,0x7c]
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v_cmpx_f_f64 vcc, 0, v[2:3]
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// CHECK: [0x80,0x04,0xe0,0x7c]
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v_cmpx_f_f64 vcc, -1, v[2:3]
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// CHECK: [0xc1,0x04,0xe0,0x7c]
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v_cmpx_f_f64 vcc, 0.5, v[2:3]
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// CHECK: [0xf0,0x04,0xe0,0x7c]
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v_cmpx_f_f64 vcc, -4.0, v[2:3]
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// CHECK: [0xf7,0x04,0xe0,0x7c]
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v_cmpx_f_f64 vcc, 0xaf123456, v[2:3]
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// CHECK: [0xff,0x04,0xe0,0x7c,0x56,0x34,0x12,0xaf]
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v_cmpx_f_f64 vcc, 0x3f717273, v[2:3]
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// CHECK: [0xff,0x04,0xe0,0x7c,0x73,0x72,0x71,0x3f]
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v_cmpx_f_f64 vcc, v[1:2], v[254:255]
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// CHECK: [0x01,0xfd,0xe1,0x7c]
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v_cmpx_f_f64_e64 s[10:11], v[1:2], v[2:3]
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// CHECK: [0x0a,0x00,0x70,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_f_f64_e64 s[12:13], v[1:2], v[2:3]
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// CHECK: [0x0c,0x00,0x70,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_f_f64_e64 s[100:101], v[1:2], v[2:3]
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// CHECK: [0x64,0x00,0x70,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_f_f64_e64 flat_scratch, v[1:2], v[2:3]
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// CHECK: [0x66,0x00,0x70,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_f_f64_e64 vcc, v[1:2], v[2:3]
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// CHECK: [0x6a,0x00,0x70,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_f_f64_e64 exec, v[1:2], v[2:3]
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// CHECK: [0x7e,0x00,0x70,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_f_f64_e64 s[10:11], v[254:255], v[2:3]
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// CHECK: [0x0a,0x00,0x70,0xd0,0xfe,0x05,0x02,0x00]
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v_cmpx_f_f64_e64 s[10:11], s[2:3], v[2:3]
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// CHECK: [0x0a,0x00,0x70,0xd0,0x02,0x04,0x02,0x00]
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v_cmpx_f_f64_e64 s[10:11], s[4:5], v[2:3]
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// CHECK: [0x0a,0x00,0x70,0xd0,0x04,0x04,0x02,0x00]
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v_cmpx_f_f64_e64 s[10:11], s[100:101], v[2:3]
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// CHECK: [0x0a,0x00,0x70,0xd0,0x64,0x04,0x02,0x00]
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v_cmpx_f_f64_e64 s[10:11], flat_scratch, v[2:3]
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// CHECK: [0x0a,0x00,0x70,0xd0,0x66,0x04,0x02,0x00]
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v_cmpx_f_f64_e64 s[10:11], vcc, v[2:3]
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// CHECK: [0x0a,0x00,0x70,0xd0,0x6a,0x04,0x02,0x00]
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v_cmpx_f_f64_e64 s[10:11], exec, v[2:3]
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// CHECK: [0x0a,0x00,0x70,0xd0,0x7e,0x04,0x02,0x00]
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v_cmpx_f_f64_e64 s[10:11], 0, v[2:3]
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// CHECK: [0x0a,0x00,0x70,0xd0,0x80,0x04,0x02,0x00]
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v_cmpx_f_f64_e64 s[10:11], -1, v[2:3]
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// CHECK: [0x0a,0x00,0x70,0xd0,0xc1,0x04,0x02,0x00]
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v_cmpx_f_f64_e64 s[10:11], 0.5, v[2:3]
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// CHECK: [0x0a,0x00,0x70,0xd0,0xf0,0x04,0x02,0x00]
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v_cmpx_f_f64_e64 s[10:11], -4.0, v[2:3]
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// CHECK: [0x0a,0x00,0x70,0xd0,0xf7,0x04,0x02,0x00]
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v_cmpx_f_f64_e64 s[10:11], v[1:2], v[254:255]
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// CHECK: [0x0a,0x00,0x70,0xd0,0x01,0xfd,0x03,0x00]
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v_cmpx_f_f64_e64 s[10:11], v[1:2], s[4:5]
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// CHECK: [0x0a,0x00,0x70,0xd0,0x01,0x09,0x00,0x00]
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v_cmpx_f_f64_e64 s[10:11], v[1:2], s[6:7]
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// CHECK: [0x0a,0x00,0x70,0xd0,0x01,0x0d,0x00,0x00]
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v_cmpx_f_f64_e64 s[10:11], v[1:2], s[100:101]
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// CHECK: [0x0a,0x00,0x70,0xd0,0x01,0xc9,0x00,0x00]
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v_cmpx_f_f64_e64 s[10:11], v[1:2], flat_scratch
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// CHECK: [0x0a,0x00,0x70,0xd0,0x01,0xcd,0x00,0x00]
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v_cmpx_f_f64_e64 s[10:11], v[1:2], vcc
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// CHECK: [0x0a,0x00,0x70,0xd0,0x01,0xd5,0x00,0x00]
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v_cmpx_f_f64_e64 s[10:11], v[1:2], exec
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// CHECK: [0x0a,0x00,0x70,0xd0,0x01,0xfd,0x00,0x00]
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v_cmpx_f_f64_e64 s[10:11], v[1:2], 0
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// CHECK: [0x0a,0x00,0x70,0xd0,0x01,0x01,0x01,0x00]
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v_cmpx_f_f64_e64 s[10:11], v[1:2], -1
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// CHECK: [0x0a,0x00,0x70,0xd0,0x01,0x83,0x01,0x00]
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v_cmpx_f_f64_e64 s[10:11], v[1:2], 0.5
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// CHECK: [0x0a,0x00,0x70,0xd0,0x01,0xe1,0x01,0x00]
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v_cmpx_f_f64_e64 s[10:11], v[1:2], -4.0
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// CHECK: [0x0a,0x00,0x70,0xd0,0x01,0xef,0x01,0x00]
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v_cmpx_f_f64_e64 s[10:11], -v[1:2], v[2:3]
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// CHECK: [0x0a,0x00,0x70,0xd0,0x01,0x05,0x02,0x20]
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v_cmpx_f_f64_e64 s[10:11], v[1:2], -v[2:3]
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// CHECK: [0x0a,0x00,0x70,0xd0,0x01,0x05,0x02,0x40]
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v_cmpx_f_f64_e64 s[10:11], -v[1:2], -v[2:3]
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// CHECK: [0x0a,0x00,0x70,0xd0,0x01,0x05,0x02,0x60]
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v_cmpx_f_f64_e64 s[10:11], v[1:2], v[2:3] clamp
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// CHECK: [0x0a,0x80,0x70,0xd0,0x01,0x05,0x02,0x00]
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v_cmpx_lt_f64 vcc, v[1:2], v[2:3]
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// CHECK: [0x01,0x05,0xe2,0x7c]
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v_cmpx_lt_f64 vcc, v[254:255], v[2:3]
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// CHECK: [0xfe,0x05,0xe2,0x7c]
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v_cmpx_lt_f64 vcc, s[2:3], v[2:3]
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// CHECK: [0x02,0x04,0xe2,0x7c]
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v_cmpx_lt_f64 vcc, s[4:5], v[2:3]
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// CHECK: [0x04,0x04,0xe2,0x7c]
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v_cmpx_lt_f64 vcc, s[100:101], v[2:3]
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// CHECK: [0x64,0x04,0xe2,0x7c]
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v_cmpx_lt_f64 vcc, flat_scratch, v[2:3]
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// CHECK: [0x66,0x04,0xe2,0x7c]
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v_cmpx_lt_f64 vcc, vcc, v[2:3]
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// CHECK: [0x6a,0x04,0xe2,0x7c]
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v_cmpx_lt_f64 vcc, exec, v[2:3]
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// CHECK: [0x7e,0x04,0xe2,0x7c]
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v_cmpx_lt_f64 vcc, 0, v[2:3]
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// CHECK: [0x80,0x04,0xe2,0x7c]
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v_cmpx_lt_f64 vcc, -1, v[2:3]
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// CHECK: [0xc1,0x04,0xe2,0x7c]
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v_cmpx_lt_f64 vcc, 0.5, v[2:3]
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// CHECK: [0xf0,0x04,0xe2,0x7c]
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v_cmpx_lt_f64 vcc, -4.0, v[2:3]
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// CHECK: [0xf7,0x04,0xe2,0x7c]
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v_cmpx_lt_f64 vcc, 0xaf123456, v[2:3]
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// CHECK: [0xff,0x04,0xe2,0x7c,0x56,0x34,0x12,0xaf]
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v_cmpx_lt_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe2,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_lt_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xe3,0x7c]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x71,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x71,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x71,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x71,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0x71,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x71,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_lt_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x71,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xe4,0x7c]
|
|
|
|
v_cmpx_eq_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xe4,0x7c]
|
|
|
|
v_cmpx_eq_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xe4,0x7c]
|
|
|
|
v_cmpx_eq_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xe4,0x7c]
|
|
|
|
v_cmpx_eq_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xe4,0x7c]
|
|
|
|
v_cmpx_eq_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xe4,0x7c]
|
|
|
|
v_cmpx_eq_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xe4,0x7c]
|
|
|
|
v_cmpx_eq_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xe4,0x7c]
|
|
|
|
v_cmpx_eq_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xe4,0x7c]
|
|
|
|
v_cmpx_eq_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xe4,0x7c]
|
|
|
|
v_cmpx_eq_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xe4,0x7c]
|
|
|
|
v_cmpx_eq_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xe4,0x7c]
|
|
|
|
v_cmpx_eq_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe4,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_eq_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe4,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_eq_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xe5,0x7c]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x72,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x72,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x72,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x72,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0x72,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x72,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_eq_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x72,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xe6,0x7c]
|
|
|
|
v_cmpx_le_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xe6,0x7c]
|
|
|
|
v_cmpx_le_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xe6,0x7c]
|
|
|
|
v_cmpx_le_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xe6,0x7c]
|
|
|
|
v_cmpx_le_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xe6,0x7c]
|
|
|
|
v_cmpx_le_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xe6,0x7c]
|
|
|
|
v_cmpx_le_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xe6,0x7c]
|
|
|
|
v_cmpx_le_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xe6,0x7c]
|
|
|
|
v_cmpx_le_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xe6,0x7c]
|
|
|
|
v_cmpx_le_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xe6,0x7c]
|
|
|
|
v_cmpx_le_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xe6,0x7c]
|
|
|
|
v_cmpx_le_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xe6,0x7c]
|
|
|
|
v_cmpx_le_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe6,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_le_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe6,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_le_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xe7,0x7c]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x73,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x73,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x73,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x73,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0x73,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x73,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_le_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x73,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xe8,0x7c]
|
|
|
|
v_cmpx_gt_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xe8,0x7c]
|
|
|
|
v_cmpx_gt_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xe8,0x7c]
|
|
|
|
v_cmpx_gt_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xe8,0x7c]
|
|
|
|
v_cmpx_gt_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xe8,0x7c]
|
|
|
|
v_cmpx_gt_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xe8,0x7c]
|
|
|
|
v_cmpx_gt_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xe8,0x7c]
|
|
|
|
v_cmpx_gt_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xe8,0x7c]
|
|
|
|
v_cmpx_gt_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xe8,0x7c]
|
|
|
|
v_cmpx_gt_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xe8,0x7c]
|
|
|
|
v_cmpx_gt_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xe8,0x7c]
|
|
|
|
v_cmpx_gt_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xe8,0x7c]
|
|
|
|
v_cmpx_gt_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe8,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_gt_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe8,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_gt_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xe9,0x7c]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x74,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x74,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x74,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x74,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0x74,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x74,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_gt_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x74,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xea,0x7c]
|
|
|
|
v_cmpx_lg_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xea,0x7c]
|
|
|
|
v_cmpx_lg_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xea,0x7c]
|
|
|
|
v_cmpx_lg_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xea,0x7c]
|
|
|
|
v_cmpx_lg_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xea,0x7c]
|
|
|
|
v_cmpx_lg_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xea,0x7c]
|
|
|
|
v_cmpx_lg_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xea,0x7c]
|
|
|
|
v_cmpx_lg_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xea,0x7c]
|
|
|
|
v_cmpx_lg_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xea,0x7c]
|
|
|
|
v_cmpx_lg_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xea,0x7c]
|
|
|
|
v_cmpx_lg_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xea,0x7c]
|
|
|
|
v_cmpx_lg_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xea,0x7c]
|
|
|
|
v_cmpx_lg_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xea,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_lg_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xea,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_lg_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xeb,0x7c]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x75,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x75,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x75,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x75,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0x75,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x75,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_lg_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x75,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xec,0x7c]
|
|
|
|
v_cmpx_ge_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xec,0x7c]
|
|
|
|
v_cmpx_ge_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xec,0x7c]
|
|
|
|
v_cmpx_ge_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xec,0x7c]
|
|
|
|
v_cmpx_ge_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xec,0x7c]
|
|
|
|
v_cmpx_ge_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xec,0x7c]
|
|
|
|
v_cmpx_ge_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xec,0x7c]
|
|
|
|
v_cmpx_ge_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xec,0x7c]
|
|
|
|
v_cmpx_ge_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xec,0x7c]
|
|
|
|
v_cmpx_ge_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xec,0x7c]
|
|
|
|
v_cmpx_ge_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xec,0x7c]
|
|
|
|
v_cmpx_ge_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xec,0x7c]
|
|
|
|
v_cmpx_ge_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xec,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_ge_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xec,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_ge_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xed,0x7c]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x76,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x76,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x76,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x76,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0x76,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x76,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_ge_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x76,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xee,0x7c]
|
|
|
|
v_cmpx_o_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xee,0x7c]
|
|
|
|
v_cmpx_o_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xee,0x7c]
|
|
|
|
v_cmpx_o_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xee,0x7c]
|
|
|
|
v_cmpx_o_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xee,0x7c]
|
|
|
|
v_cmpx_o_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xee,0x7c]
|
|
|
|
v_cmpx_o_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xee,0x7c]
|
|
|
|
v_cmpx_o_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xee,0x7c]
|
|
|
|
v_cmpx_o_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xee,0x7c]
|
|
|
|
v_cmpx_o_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xee,0x7c]
|
|
|
|
v_cmpx_o_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xee,0x7c]
|
|
|
|
v_cmpx_o_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xee,0x7c]
|
|
|
|
v_cmpx_o_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xee,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_o_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xee,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_o_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xef,0x7c]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x77,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x77,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x77,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x77,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0x77,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x77,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_o_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x77,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xf0,0x7c]
|
|
|
|
v_cmpx_u_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xf0,0x7c]
|
|
|
|
v_cmpx_u_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xf0,0x7c]
|
|
|
|
v_cmpx_u_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xf0,0x7c]
|
|
|
|
v_cmpx_u_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xf0,0x7c]
|
|
|
|
v_cmpx_u_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xf0,0x7c]
|
|
|
|
v_cmpx_u_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xf0,0x7c]
|
|
|
|
v_cmpx_u_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xf0,0x7c]
|
|
|
|
v_cmpx_u_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xf0,0x7c]
|
|
|
|
v_cmpx_u_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xf0,0x7c]
|
|
|
|
v_cmpx_u_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xf0,0x7c]
|
|
|
|
v_cmpx_u_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xf0,0x7c]
|
|
|
|
v_cmpx_u_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf0,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_u_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf0,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_u_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xf1,0x7c]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x78,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x78,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x78,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x78,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0x78,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x78,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_u_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x78,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xf2,0x7c]
|
|
|
|
v_cmpx_nge_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xf2,0x7c]
|
|
|
|
v_cmpx_nge_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xf2,0x7c]
|
|
|
|
v_cmpx_nge_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xf2,0x7c]
|
|
|
|
v_cmpx_nge_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xf2,0x7c]
|
|
|
|
v_cmpx_nge_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xf2,0x7c]
|
|
|
|
v_cmpx_nge_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xf2,0x7c]
|
|
|
|
v_cmpx_nge_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xf2,0x7c]
|
|
|
|
v_cmpx_nge_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xf2,0x7c]
|
|
|
|
v_cmpx_nge_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xf2,0x7c]
|
|
|
|
v_cmpx_nge_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xf2,0x7c]
|
|
|
|
v_cmpx_nge_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xf2,0x7c]
|
|
|
|
v_cmpx_nge_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf2,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_nge_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf2,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_nge_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xf3,0x7c]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x79,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x79,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x79,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x79,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0x79,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x79,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_nge_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x79,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xf4,0x7c]
|
|
|
|
v_cmpx_nlg_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xf4,0x7c]
|
|
|
|
v_cmpx_nlg_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xf4,0x7c]
|
|
|
|
v_cmpx_nlg_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xf4,0x7c]
|
|
|
|
v_cmpx_nlg_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xf4,0x7c]
|
|
|
|
v_cmpx_nlg_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xf4,0x7c]
|
|
|
|
v_cmpx_nlg_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xf4,0x7c]
|
|
|
|
v_cmpx_nlg_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xf4,0x7c]
|
|
|
|
v_cmpx_nlg_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xf4,0x7c]
|
|
|
|
v_cmpx_nlg_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xf4,0x7c]
|
|
|
|
v_cmpx_nlg_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xf4,0x7c]
|
|
|
|
v_cmpx_nlg_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xf4,0x7c]
|
|
|
|
v_cmpx_nlg_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf4,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_nlg_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf4,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_nlg_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xf5,0x7c]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x7a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x7a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x7a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x7a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0x7a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7a,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_nlg_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x7a,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xf6,0x7c]
|
|
|
|
v_cmpx_ngt_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xf6,0x7c]
|
|
|
|
v_cmpx_ngt_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xf6,0x7c]
|
|
|
|
v_cmpx_ngt_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xf6,0x7c]
|
|
|
|
v_cmpx_ngt_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xf6,0x7c]
|
|
|
|
v_cmpx_ngt_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xf6,0x7c]
|
|
|
|
v_cmpx_ngt_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xf6,0x7c]
|
|
|
|
v_cmpx_ngt_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xf6,0x7c]
|
|
|
|
v_cmpx_ngt_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xf6,0x7c]
|
|
|
|
v_cmpx_ngt_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xf6,0x7c]
|
|
|
|
v_cmpx_ngt_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xf6,0x7c]
|
|
|
|
v_cmpx_ngt_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xf6,0x7c]
|
|
|
|
v_cmpx_ngt_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf6,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_ngt_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf6,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_ngt_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xf7,0x7c]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x7b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x7b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x7b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x7b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0x7b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7b,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_ngt_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x7b,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xf8,0x7c]
|
|
|
|
v_cmpx_nle_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xf8,0x7c]
|
|
|
|
v_cmpx_nle_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xf8,0x7c]
|
|
|
|
v_cmpx_nle_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xf8,0x7c]
|
|
|
|
v_cmpx_nle_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xf8,0x7c]
|
|
|
|
v_cmpx_nle_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xf8,0x7c]
|
|
|
|
v_cmpx_nle_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xf8,0x7c]
|
|
|
|
v_cmpx_nle_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xf8,0x7c]
|
|
|
|
v_cmpx_nle_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xf8,0x7c]
|
|
|
|
v_cmpx_nle_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xf8,0x7c]
|
|
|
|
v_cmpx_nle_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xf8,0x7c]
|
|
|
|
v_cmpx_nle_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xf8,0x7c]
|
|
|
|
v_cmpx_nle_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf8,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_nle_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf8,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_nle_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xf9,0x7c]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x7c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x7c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x7c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x7c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0x7c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7c,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_nle_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x7c,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xfa,0x7c]
|
|
|
|
v_cmpx_neq_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xfa,0x7c]
|
|
|
|
v_cmpx_neq_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xfa,0x7c]
|
|
|
|
v_cmpx_neq_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xfa,0x7c]
|
|
|
|
v_cmpx_neq_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xfa,0x7c]
|
|
|
|
v_cmpx_neq_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xfa,0x7c]
|
|
|
|
v_cmpx_neq_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xfa,0x7c]
|
|
|
|
v_cmpx_neq_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xfa,0x7c]
|
|
|
|
v_cmpx_neq_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xfa,0x7c]
|
|
|
|
v_cmpx_neq_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xfa,0x7c]
|
|
|
|
v_cmpx_neq_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xfa,0x7c]
|
|
|
|
v_cmpx_neq_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xfa,0x7c]
|
|
|
|
v_cmpx_neq_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xfa,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_neq_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xfa,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_neq_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xfb,0x7c]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x7d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x7d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x7d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x7d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0x7d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7d,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_neq_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x7d,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xfc,0x7c]
|
|
|
|
v_cmpx_nlt_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xfc,0x7c]
|
|
|
|
v_cmpx_nlt_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xfc,0x7c]
|
|
|
|
v_cmpx_nlt_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xfc,0x7c]
|
|
|
|
v_cmpx_nlt_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xfc,0x7c]
|
|
|
|
v_cmpx_nlt_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xfc,0x7c]
|
|
|
|
v_cmpx_nlt_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xfc,0x7c]
|
|
|
|
v_cmpx_nlt_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xfc,0x7c]
|
|
|
|
v_cmpx_nlt_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xfc,0x7c]
|
|
|
|
v_cmpx_nlt_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xfc,0x7c]
|
|
|
|
v_cmpx_nlt_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xfc,0x7c]
|
|
|
|
v_cmpx_nlt_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xfc,0x7c]
|
|
|
|
v_cmpx_nlt_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xfc,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_nlt_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xfc,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_nlt_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xfd,0x7c]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x7e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x7e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x7e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x7e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0x7e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7e,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_nlt_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x7e,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xfe,0x7c]
|
|
|
|
v_cmpx_tru_f64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xfe,0x7c]
|
|
|
|
v_cmpx_tru_f64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xfe,0x7c]
|
|
|
|
v_cmpx_tru_f64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xfe,0x7c]
|
|
|
|
v_cmpx_tru_f64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xfe,0x7c]
|
|
|
|
v_cmpx_tru_f64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xfe,0x7c]
|
|
|
|
v_cmpx_tru_f64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xfe,0x7c]
|
|
|
|
v_cmpx_tru_f64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xfe,0x7c]
|
|
|
|
v_cmpx_tru_f64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xfe,0x7c]
|
|
|
|
v_cmpx_tru_f64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xfe,0x7c]
|
|
|
|
v_cmpx_tru_f64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xfe,0x7c]
|
|
|
|
v_cmpx_tru_f64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xfe,0x7c]
|
|
|
|
v_cmpx_tru_f64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xfe,0x7c,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_tru_f64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xfe,0x7c,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_tru_f64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xff,0x7c]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0x7f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0x7f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0x7f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0x7f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0x7f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], -v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x01,0x05,0x02,0x20]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x01,0x05,0x02,0x40]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], -v[1:2], -v[2:3]
|
|
// CHECK: [0x0a,0x00,0x7f,0xd0,0x01,0x05,0x02,0x60]
|
|
|
|
v_cmpx_tru_f64_e64 s[10:11], v[1:2], v[2:3] clamp
|
|
// CHECK: [0x0a,0x80,0x7f,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x40,0x7d]
|
|
|
|
v_cmp_f_i16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x40,0x7d]
|
|
|
|
v_cmp_f_i16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x40,0x7d]
|
|
|
|
v_cmp_f_i16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x40,0x7d]
|
|
|
|
v_cmp_f_i16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x40,0x7d]
|
|
|
|
v_cmp_f_i16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x40,0x7d]
|
|
|
|
v_cmp_f_i16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x40,0x7d]
|
|
|
|
v_cmp_f_i16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x40,0x7d]
|
|
|
|
v_cmp_f_i16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x40,0x7d]
|
|
|
|
v_cmp_f_i16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x40,0x7d]
|
|
|
|
v_cmp_f_i16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x40,0x7d]
|
|
|
|
v_cmp_f_i16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x40,0x7d]
|
|
|
|
v_cmp_f_i16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x40,0x7d]
|
|
|
|
v_cmp_f_i16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x40,0x7d]
|
|
|
|
v_cmp_f_i16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x40,0x7d]
|
|
|
|
v_cmp_f_i16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x40,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_f_i16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x40,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_f_i16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x41,0x7d]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xa0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xa0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xa0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xa0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_f_i16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xa0,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_lt_i16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x42,0x7d]
|
|
|
|
v_cmp_lt_i16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x42,0x7d]
|
|
|
|
v_cmp_lt_i16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x42,0x7d]
|
|
|
|
v_cmp_lt_i16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x42,0x7d]
|
|
|
|
v_cmp_lt_i16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x42,0x7d]
|
|
|
|
v_cmp_lt_i16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x42,0x7d]
|
|
|
|
v_cmp_lt_i16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x42,0x7d]
|
|
|
|
v_cmp_lt_i16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x42,0x7d]
|
|
|
|
v_cmp_lt_i16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x42,0x7d]
|
|
|
|
v_cmp_lt_i16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x42,0x7d]
|
|
|
|
v_cmp_lt_i16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x42,0x7d]
|
|
|
|
v_cmp_lt_i16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x42,0x7d]
|
|
|
|
v_cmp_lt_i16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x42,0x7d]
|
|
|
|
v_cmp_lt_i16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x42,0x7d]
|
|
|
|
v_cmp_lt_i16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x42,0x7d]
|
|
|
|
v_cmp_lt_i16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x42,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_lt_i16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x42,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_lt_i16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x43,0x7d]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xa1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xa1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xa1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xa1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_lt_i16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xa1,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_eq_i16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x44,0x7d]
|
|
|
|
v_cmp_eq_i16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x44,0x7d]
|
|
|
|
v_cmp_eq_i16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x44,0x7d]
|
|
|
|
v_cmp_eq_i16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x44,0x7d]
|
|
|
|
v_cmp_eq_i16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x44,0x7d]
|
|
|
|
v_cmp_eq_i16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x44,0x7d]
|
|
|
|
v_cmp_eq_i16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x44,0x7d]
|
|
|
|
v_cmp_eq_i16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x44,0x7d]
|
|
|
|
v_cmp_eq_i16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x44,0x7d]
|
|
|
|
v_cmp_eq_i16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x44,0x7d]
|
|
|
|
v_cmp_eq_i16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x44,0x7d]
|
|
|
|
v_cmp_eq_i16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x44,0x7d]
|
|
|
|
v_cmp_eq_i16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x44,0x7d]
|
|
|
|
v_cmp_eq_i16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x44,0x7d]
|
|
|
|
v_cmp_eq_i16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x44,0x7d]
|
|
|
|
v_cmp_eq_i16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x44,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_eq_i16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x44,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_eq_i16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x45,0x7d]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xa2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xa2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xa2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xa2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_eq_i16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xa2,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_le_i16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x46,0x7d]
|
|
|
|
v_cmp_le_i16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x46,0x7d]
|
|
|
|
v_cmp_le_i16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x46,0x7d]
|
|
|
|
v_cmp_le_i16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x46,0x7d]
|
|
|
|
v_cmp_le_i16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x46,0x7d]
|
|
|
|
v_cmp_le_i16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x46,0x7d]
|
|
|
|
v_cmp_le_i16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x46,0x7d]
|
|
|
|
v_cmp_le_i16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x46,0x7d]
|
|
|
|
v_cmp_le_i16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x46,0x7d]
|
|
|
|
v_cmp_le_i16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x46,0x7d]
|
|
|
|
v_cmp_le_i16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x46,0x7d]
|
|
|
|
v_cmp_le_i16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x46,0x7d]
|
|
|
|
v_cmp_le_i16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x46,0x7d]
|
|
|
|
v_cmp_le_i16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x46,0x7d]
|
|
|
|
v_cmp_le_i16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x46,0x7d]
|
|
|
|
v_cmp_le_i16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x46,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_le_i16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x46,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_le_i16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x47,0x7d]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xa3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xa3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xa3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xa3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_le_i16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xa3,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_gt_i16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x48,0x7d]
|
|
|
|
v_cmp_gt_i16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x48,0x7d]
|
|
|
|
v_cmp_gt_i16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x48,0x7d]
|
|
|
|
v_cmp_gt_i16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x48,0x7d]
|
|
|
|
v_cmp_gt_i16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x48,0x7d]
|
|
|
|
v_cmp_gt_i16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x48,0x7d]
|
|
|
|
v_cmp_gt_i16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x48,0x7d]
|
|
|
|
v_cmp_gt_i16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x48,0x7d]
|
|
|
|
v_cmp_gt_i16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x48,0x7d]
|
|
|
|
v_cmp_gt_i16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x48,0x7d]
|
|
|
|
v_cmp_gt_i16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x48,0x7d]
|
|
|
|
v_cmp_gt_i16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x48,0x7d]
|
|
|
|
v_cmp_gt_i16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x48,0x7d]
|
|
|
|
v_cmp_gt_i16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x48,0x7d]
|
|
|
|
v_cmp_gt_i16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x48,0x7d]
|
|
|
|
v_cmp_gt_i16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x48,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_gt_i16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x48,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_gt_i16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x49,0x7d]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xa4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xa4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xa4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xa4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_gt_i16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xa4,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ne_i16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x4a,0x7d]
|
|
|
|
v_cmp_ne_i16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x4a,0x7d]
|
|
|
|
v_cmp_ne_i16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x4a,0x7d]
|
|
|
|
v_cmp_ne_i16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x4a,0x7d]
|
|
|
|
v_cmp_ne_i16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x4a,0x7d]
|
|
|
|
v_cmp_ne_i16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x4a,0x7d]
|
|
|
|
v_cmp_ne_i16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x4a,0x7d]
|
|
|
|
v_cmp_ne_i16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x4a,0x7d]
|
|
|
|
v_cmp_ne_i16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x4a,0x7d]
|
|
|
|
v_cmp_ne_i16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x4a,0x7d]
|
|
|
|
v_cmp_ne_i16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x4a,0x7d]
|
|
|
|
v_cmp_ne_i16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x4a,0x7d]
|
|
|
|
v_cmp_ne_i16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x4a,0x7d]
|
|
|
|
v_cmp_ne_i16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x4a,0x7d]
|
|
|
|
v_cmp_ne_i16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x4a,0x7d]
|
|
|
|
v_cmp_ne_i16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x4a,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_ne_i16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x4a,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_ne_i16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x4b,0x7d]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xa5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xa5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xa5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xa5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ne_i16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xa5,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ge_i16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x4c,0x7d]
|
|
|
|
v_cmp_ge_i16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x4c,0x7d]
|
|
|
|
v_cmp_ge_i16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x4c,0x7d]
|
|
|
|
v_cmp_ge_i16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x4c,0x7d]
|
|
|
|
v_cmp_ge_i16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x4c,0x7d]
|
|
|
|
v_cmp_ge_i16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x4c,0x7d]
|
|
|
|
v_cmp_ge_i16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x4c,0x7d]
|
|
|
|
v_cmp_ge_i16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x4c,0x7d]
|
|
|
|
v_cmp_ge_i16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x4c,0x7d]
|
|
|
|
v_cmp_ge_i16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x4c,0x7d]
|
|
|
|
v_cmp_ge_i16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x4c,0x7d]
|
|
|
|
v_cmp_ge_i16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x4c,0x7d]
|
|
|
|
v_cmp_ge_i16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x4c,0x7d]
|
|
|
|
v_cmp_ge_i16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x4c,0x7d]
|
|
|
|
v_cmp_ge_i16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x4c,0x7d]
|
|
|
|
v_cmp_ge_i16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x4c,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_ge_i16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x4c,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_ge_i16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x4d,0x7d]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xa6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xa6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xa6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xa6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ge_i16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xa6,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_t_i16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x4e,0x7d]
|
|
|
|
v_cmp_t_i16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x4e,0x7d]
|
|
|
|
v_cmp_t_i16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x4e,0x7d]
|
|
|
|
v_cmp_t_i16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x4e,0x7d]
|
|
|
|
v_cmp_t_i16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x4e,0x7d]
|
|
|
|
v_cmp_t_i16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x4e,0x7d]
|
|
|
|
v_cmp_t_i16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x4e,0x7d]
|
|
|
|
v_cmp_t_i16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x4e,0x7d]
|
|
|
|
v_cmp_t_i16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x4e,0x7d]
|
|
|
|
v_cmp_t_i16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x4e,0x7d]
|
|
|
|
v_cmp_t_i16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x4e,0x7d]
|
|
|
|
v_cmp_t_i16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x4e,0x7d]
|
|
|
|
v_cmp_t_i16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x4e,0x7d]
|
|
|
|
v_cmp_t_i16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x4e,0x7d]
|
|
|
|
v_cmp_t_i16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x4e,0x7d]
|
|
|
|
v_cmp_t_i16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x4e,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_t_i16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x4e,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_t_i16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x4f,0x7d]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xa7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xa7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xa7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xa7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_t_i16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xa7,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_f_u16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x50,0x7d]
|
|
|
|
v_cmp_f_u16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x50,0x7d]
|
|
|
|
v_cmp_f_u16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x50,0x7d]
|
|
|
|
v_cmp_f_u16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x50,0x7d]
|
|
|
|
v_cmp_f_u16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x50,0x7d]
|
|
|
|
v_cmp_f_u16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x50,0x7d]
|
|
|
|
v_cmp_f_u16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x50,0x7d]
|
|
|
|
v_cmp_f_u16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x50,0x7d]
|
|
|
|
v_cmp_f_u16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x50,0x7d]
|
|
|
|
v_cmp_f_u16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x50,0x7d]
|
|
|
|
v_cmp_f_u16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x50,0x7d]
|
|
|
|
v_cmp_f_u16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x50,0x7d]
|
|
|
|
v_cmp_f_u16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x50,0x7d]
|
|
|
|
v_cmp_f_u16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x50,0x7d]
|
|
|
|
v_cmp_f_u16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x50,0x7d]
|
|
|
|
v_cmp_f_u16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x50,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_f_u16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x50,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_f_u16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x51,0x7d]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xa8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xa8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xa8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xa8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_f_u16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xa8,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_lt_u16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x52,0x7d]
|
|
|
|
v_cmp_lt_u16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x52,0x7d]
|
|
|
|
v_cmp_lt_u16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x52,0x7d]
|
|
|
|
v_cmp_lt_u16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x52,0x7d]
|
|
|
|
v_cmp_lt_u16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x52,0x7d]
|
|
|
|
v_cmp_lt_u16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x52,0x7d]
|
|
|
|
v_cmp_lt_u16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x52,0x7d]
|
|
|
|
v_cmp_lt_u16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x52,0x7d]
|
|
|
|
v_cmp_lt_u16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x52,0x7d]
|
|
|
|
v_cmp_lt_u16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x52,0x7d]
|
|
|
|
v_cmp_lt_u16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x52,0x7d]
|
|
|
|
v_cmp_lt_u16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x52,0x7d]
|
|
|
|
v_cmp_lt_u16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x52,0x7d]
|
|
|
|
v_cmp_lt_u16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x52,0x7d]
|
|
|
|
v_cmp_lt_u16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x52,0x7d]
|
|
|
|
v_cmp_lt_u16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x52,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_lt_u16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x52,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_lt_u16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x53,0x7d]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xa9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xa9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xa9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xa9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_lt_u16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xa9,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_eq_u16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x54,0x7d]
|
|
|
|
v_cmp_eq_u16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x54,0x7d]
|
|
|
|
v_cmp_eq_u16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x54,0x7d]
|
|
|
|
v_cmp_eq_u16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x54,0x7d]
|
|
|
|
v_cmp_eq_u16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x54,0x7d]
|
|
|
|
v_cmp_eq_u16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x54,0x7d]
|
|
|
|
v_cmp_eq_u16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x54,0x7d]
|
|
|
|
v_cmp_eq_u16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x54,0x7d]
|
|
|
|
v_cmp_eq_u16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x54,0x7d]
|
|
|
|
v_cmp_eq_u16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x54,0x7d]
|
|
|
|
v_cmp_eq_u16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x54,0x7d]
|
|
|
|
v_cmp_eq_u16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x54,0x7d]
|
|
|
|
v_cmp_eq_u16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x54,0x7d]
|
|
|
|
v_cmp_eq_u16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x54,0x7d]
|
|
|
|
v_cmp_eq_u16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x54,0x7d]
|
|
|
|
v_cmp_eq_u16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x54,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_eq_u16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x54,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_eq_u16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x55,0x7d]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xaa,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xaa,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xaa,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xaa,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_eq_u16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xaa,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_le_u16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x56,0x7d]
|
|
|
|
v_cmp_le_u16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x56,0x7d]
|
|
|
|
v_cmp_le_u16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x56,0x7d]
|
|
|
|
v_cmp_le_u16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x56,0x7d]
|
|
|
|
v_cmp_le_u16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x56,0x7d]
|
|
|
|
v_cmp_le_u16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x56,0x7d]
|
|
|
|
v_cmp_le_u16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x56,0x7d]
|
|
|
|
v_cmp_le_u16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x56,0x7d]
|
|
|
|
v_cmp_le_u16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x56,0x7d]
|
|
|
|
v_cmp_le_u16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x56,0x7d]
|
|
|
|
v_cmp_le_u16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x56,0x7d]
|
|
|
|
v_cmp_le_u16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x56,0x7d]
|
|
|
|
v_cmp_le_u16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x56,0x7d]
|
|
|
|
v_cmp_le_u16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x56,0x7d]
|
|
|
|
v_cmp_le_u16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x56,0x7d]
|
|
|
|
v_cmp_le_u16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x56,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_le_u16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x56,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_le_u16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x57,0x7d]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xab,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xab,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xab,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xab,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_le_u16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xab,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_gt_u16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x58,0x7d]
|
|
|
|
v_cmp_gt_u16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x58,0x7d]
|
|
|
|
v_cmp_gt_u16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x58,0x7d]
|
|
|
|
v_cmp_gt_u16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x58,0x7d]
|
|
|
|
v_cmp_gt_u16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x58,0x7d]
|
|
|
|
v_cmp_gt_u16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x58,0x7d]
|
|
|
|
v_cmp_gt_u16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x58,0x7d]
|
|
|
|
v_cmp_gt_u16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x58,0x7d]
|
|
|
|
v_cmp_gt_u16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x58,0x7d]
|
|
|
|
v_cmp_gt_u16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x58,0x7d]
|
|
|
|
v_cmp_gt_u16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x58,0x7d]
|
|
|
|
v_cmp_gt_u16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x58,0x7d]
|
|
|
|
v_cmp_gt_u16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x58,0x7d]
|
|
|
|
v_cmp_gt_u16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x58,0x7d]
|
|
|
|
v_cmp_gt_u16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x58,0x7d]
|
|
|
|
v_cmp_gt_u16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x58,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_gt_u16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x58,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_gt_u16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x59,0x7d]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xac,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xac,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xac,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xac,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_gt_u16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xac,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ne_u16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x5a,0x7d]
|
|
|
|
v_cmp_ne_u16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x5a,0x7d]
|
|
|
|
v_cmp_ne_u16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x5a,0x7d]
|
|
|
|
v_cmp_ne_u16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x5a,0x7d]
|
|
|
|
v_cmp_ne_u16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x5a,0x7d]
|
|
|
|
v_cmp_ne_u16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x5a,0x7d]
|
|
|
|
v_cmp_ne_u16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x5a,0x7d]
|
|
|
|
v_cmp_ne_u16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x5a,0x7d]
|
|
|
|
v_cmp_ne_u16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x5a,0x7d]
|
|
|
|
v_cmp_ne_u16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x5a,0x7d]
|
|
|
|
v_cmp_ne_u16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x5a,0x7d]
|
|
|
|
v_cmp_ne_u16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x5a,0x7d]
|
|
|
|
v_cmp_ne_u16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x5a,0x7d]
|
|
|
|
v_cmp_ne_u16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x5a,0x7d]
|
|
|
|
v_cmp_ne_u16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x5a,0x7d]
|
|
|
|
v_cmp_ne_u16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x5a,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_ne_u16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x5a,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_ne_u16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x5b,0x7d]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xad,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xad,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xad,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xad,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ne_u16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xad,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ge_u16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x5c,0x7d]
|
|
|
|
v_cmp_ge_u16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x5c,0x7d]
|
|
|
|
v_cmp_ge_u16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x5c,0x7d]
|
|
|
|
v_cmp_ge_u16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x5c,0x7d]
|
|
|
|
v_cmp_ge_u16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x5c,0x7d]
|
|
|
|
v_cmp_ge_u16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x5c,0x7d]
|
|
|
|
v_cmp_ge_u16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x5c,0x7d]
|
|
|
|
v_cmp_ge_u16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x5c,0x7d]
|
|
|
|
v_cmp_ge_u16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x5c,0x7d]
|
|
|
|
v_cmp_ge_u16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x5c,0x7d]
|
|
|
|
v_cmp_ge_u16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x5c,0x7d]
|
|
|
|
v_cmp_ge_u16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x5c,0x7d]
|
|
|
|
v_cmp_ge_u16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x5c,0x7d]
|
|
|
|
v_cmp_ge_u16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x5c,0x7d]
|
|
|
|
v_cmp_ge_u16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x5c,0x7d]
|
|
|
|
v_cmp_ge_u16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x5c,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_ge_u16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x5c,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_ge_u16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x5d,0x7d]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xae,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xae,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xae,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xae,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ge_u16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xae,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_t_u16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x5e,0x7d]
|
|
|
|
v_cmp_t_u16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x5e,0x7d]
|
|
|
|
v_cmp_t_u16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x5e,0x7d]
|
|
|
|
v_cmp_t_u16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x5e,0x7d]
|
|
|
|
v_cmp_t_u16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x5e,0x7d]
|
|
|
|
v_cmp_t_u16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x5e,0x7d]
|
|
|
|
v_cmp_t_u16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x5e,0x7d]
|
|
|
|
v_cmp_t_u16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x5e,0x7d]
|
|
|
|
v_cmp_t_u16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x5e,0x7d]
|
|
|
|
v_cmp_t_u16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x5e,0x7d]
|
|
|
|
v_cmp_t_u16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x5e,0x7d]
|
|
|
|
v_cmp_t_u16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x5e,0x7d]
|
|
|
|
v_cmp_t_u16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x5e,0x7d]
|
|
|
|
v_cmp_t_u16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x5e,0x7d]
|
|
|
|
v_cmp_t_u16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x5e,0x7d]
|
|
|
|
v_cmp_t_u16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x5e,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmp_t_u16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x5e,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmp_t_u16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x5f,0x7d]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xaf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xaf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xaf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xaf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_t_u16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xaf,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_f_i16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x60,0x7d]
|
|
|
|
v_cmpx_f_i16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x60,0x7d]
|
|
|
|
v_cmpx_f_i16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x60,0x7d]
|
|
|
|
v_cmpx_f_i16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x60,0x7d]
|
|
|
|
v_cmpx_f_i16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x60,0x7d]
|
|
|
|
v_cmpx_f_i16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x60,0x7d]
|
|
|
|
v_cmpx_f_i16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x60,0x7d]
|
|
|
|
v_cmpx_f_i16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x60,0x7d]
|
|
|
|
v_cmpx_f_i16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x60,0x7d]
|
|
|
|
v_cmpx_f_i16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x60,0x7d]
|
|
|
|
v_cmpx_f_i16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x60,0x7d]
|
|
|
|
v_cmpx_f_i16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x60,0x7d]
|
|
|
|
v_cmpx_f_i16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x60,0x7d]
|
|
|
|
v_cmpx_f_i16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x60,0x7d]
|
|
|
|
v_cmpx_f_i16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x60,0x7d]
|
|
|
|
v_cmpx_f_i16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x60,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_f_i16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x60,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_f_i16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x61,0x7d]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xb0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xb0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xb0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xb0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xb0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_f_i16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xb0,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_lt_i16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x62,0x7d]
|
|
|
|
v_cmpx_lt_i16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x62,0x7d]
|
|
|
|
v_cmpx_lt_i16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x62,0x7d]
|
|
|
|
v_cmpx_lt_i16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x62,0x7d]
|
|
|
|
v_cmpx_lt_i16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x62,0x7d]
|
|
|
|
v_cmpx_lt_i16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x62,0x7d]
|
|
|
|
v_cmpx_lt_i16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x62,0x7d]
|
|
|
|
v_cmpx_lt_i16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x62,0x7d]
|
|
|
|
v_cmpx_lt_i16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x62,0x7d]
|
|
|
|
v_cmpx_lt_i16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x62,0x7d]
|
|
|
|
v_cmpx_lt_i16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x62,0x7d]
|
|
|
|
v_cmpx_lt_i16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x62,0x7d]
|
|
|
|
v_cmpx_lt_i16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x62,0x7d]
|
|
|
|
v_cmpx_lt_i16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x62,0x7d]
|
|
|
|
v_cmpx_lt_i16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x62,0x7d]
|
|
|
|
v_cmpx_lt_i16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x62,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_lt_i16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x62,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_lt_i16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x63,0x7d]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xb1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xb1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xb1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xb1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xb1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_lt_i16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xb1,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_eq_i16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x64,0x7d]
|
|
|
|
v_cmpx_eq_i16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x64,0x7d]
|
|
|
|
v_cmpx_eq_i16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x64,0x7d]
|
|
|
|
v_cmpx_eq_i16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x64,0x7d]
|
|
|
|
v_cmpx_eq_i16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x64,0x7d]
|
|
|
|
v_cmpx_eq_i16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x64,0x7d]
|
|
|
|
v_cmpx_eq_i16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x64,0x7d]
|
|
|
|
v_cmpx_eq_i16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x64,0x7d]
|
|
|
|
v_cmpx_eq_i16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x64,0x7d]
|
|
|
|
v_cmpx_eq_i16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x64,0x7d]
|
|
|
|
v_cmpx_eq_i16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x64,0x7d]
|
|
|
|
v_cmpx_eq_i16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x64,0x7d]
|
|
|
|
v_cmpx_eq_i16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x64,0x7d]
|
|
|
|
v_cmpx_eq_i16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x64,0x7d]
|
|
|
|
v_cmpx_eq_i16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x64,0x7d]
|
|
|
|
v_cmpx_eq_i16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x64,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_eq_i16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x64,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_eq_i16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x65,0x7d]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xb2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xb2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xb2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xb2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xb2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_eq_i16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xb2,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_le_i16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x66,0x7d]
|
|
|
|
v_cmpx_le_i16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x66,0x7d]
|
|
|
|
v_cmpx_le_i16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x66,0x7d]
|
|
|
|
v_cmpx_le_i16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x66,0x7d]
|
|
|
|
v_cmpx_le_i16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x66,0x7d]
|
|
|
|
v_cmpx_le_i16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x66,0x7d]
|
|
|
|
v_cmpx_le_i16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x66,0x7d]
|
|
|
|
v_cmpx_le_i16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x66,0x7d]
|
|
|
|
v_cmpx_le_i16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x66,0x7d]
|
|
|
|
v_cmpx_le_i16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x66,0x7d]
|
|
|
|
v_cmpx_le_i16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x66,0x7d]
|
|
|
|
v_cmpx_le_i16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x66,0x7d]
|
|
|
|
v_cmpx_le_i16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x66,0x7d]
|
|
|
|
v_cmpx_le_i16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x66,0x7d]
|
|
|
|
v_cmpx_le_i16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x66,0x7d]
|
|
|
|
v_cmpx_le_i16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x66,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_le_i16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x66,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_le_i16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x67,0x7d]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xb3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xb3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xb3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xb3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xb3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_le_i16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xb3,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_gt_i16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x68,0x7d]
|
|
|
|
v_cmpx_gt_i16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x68,0x7d]
|
|
|
|
v_cmpx_gt_i16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x68,0x7d]
|
|
|
|
v_cmpx_gt_i16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x68,0x7d]
|
|
|
|
v_cmpx_gt_i16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x68,0x7d]
|
|
|
|
v_cmpx_gt_i16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x68,0x7d]
|
|
|
|
v_cmpx_gt_i16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x68,0x7d]
|
|
|
|
v_cmpx_gt_i16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x68,0x7d]
|
|
|
|
v_cmpx_gt_i16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x68,0x7d]
|
|
|
|
v_cmpx_gt_i16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x68,0x7d]
|
|
|
|
v_cmpx_gt_i16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x68,0x7d]
|
|
|
|
v_cmpx_gt_i16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x68,0x7d]
|
|
|
|
v_cmpx_gt_i16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x68,0x7d]
|
|
|
|
v_cmpx_gt_i16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x68,0x7d]
|
|
|
|
v_cmpx_gt_i16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x68,0x7d]
|
|
|
|
v_cmpx_gt_i16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x68,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_gt_i16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x68,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_gt_i16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x69,0x7d]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xb4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xb4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xb4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xb4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xb4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_gt_i16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xb4,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ne_i16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x6a,0x7d]
|
|
|
|
v_cmpx_ne_i16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x6a,0x7d]
|
|
|
|
v_cmpx_ne_i16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x6a,0x7d]
|
|
|
|
v_cmpx_ne_i16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x6a,0x7d]
|
|
|
|
v_cmpx_ne_i16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x6a,0x7d]
|
|
|
|
v_cmpx_ne_i16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x6a,0x7d]
|
|
|
|
v_cmpx_ne_i16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x6a,0x7d]
|
|
|
|
v_cmpx_ne_i16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x6a,0x7d]
|
|
|
|
v_cmpx_ne_i16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x6a,0x7d]
|
|
|
|
v_cmpx_ne_i16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x6a,0x7d]
|
|
|
|
v_cmpx_ne_i16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x6a,0x7d]
|
|
|
|
v_cmpx_ne_i16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x6a,0x7d]
|
|
|
|
v_cmpx_ne_i16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x6a,0x7d]
|
|
|
|
v_cmpx_ne_i16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x6a,0x7d]
|
|
|
|
v_cmpx_ne_i16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x6a,0x7d]
|
|
|
|
v_cmpx_ne_i16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x6a,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_ne_i16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x6a,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_ne_i16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x6b,0x7d]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xb5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xb5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xb5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xb5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xb5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ne_i16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xb5,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ge_i16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x6c,0x7d]
|
|
|
|
v_cmpx_ge_i16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x6c,0x7d]
|
|
|
|
v_cmpx_ge_i16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x6c,0x7d]
|
|
|
|
v_cmpx_ge_i16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x6c,0x7d]
|
|
|
|
v_cmpx_ge_i16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x6c,0x7d]
|
|
|
|
v_cmpx_ge_i16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x6c,0x7d]
|
|
|
|
v_cmpx_ge_i16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x6c,0x7d]
|
|
|
|
v_cmpx_ge_i16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x6c,0x7d]
|
|
|
|
v_cmpx_ge_i16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x6c,0x7d]
|
|
|
|
v_cmpx_ge_i16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x6c,0x7d]
|
|
|
|
v_cmpx_ge_i16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x6c,0x7d]
|
|
|
|
v_cmpx_ge_i16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x6c,0x7d]
|
|
|
|
v_cmpx_ge_i16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x6c,0x7d]
|
|
|
|
v_cmpx_ge_i16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x6c,0x7d]
|
|
|
|
v_cmpx_ge_i16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x6c,0x7d]
|
|
|
|
v_cmpx_ge_i16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x6c,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_ge_i16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x6c,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_ge_i16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x6d,0x7d]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xb6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xb6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xb6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xb6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xb6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ge_i16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xb6,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_t_i16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x6e,0x7d]
|
|
|
|
v_cmpx_t_i16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x6e,0x7d]
|
|
|
|
v_cmpx_t_i16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x6e,0x7d]
|
|
|
|
v_cmpx_t_i16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x6e,0x7d]
|
|
|
|
v_cmpx_t_i16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x6e,0x7d]
|
|
|
|
v_cmpx_t_i16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x6e,0x7d]
|
|
|
|
v_cmpx_t_i16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x6e,0x7d]
|
|
|
|
v_cmpx_t_i16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x6e,0x7d]
|
|
|
|
v_cmpx_t_i16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x6e,0x7d]
|
|
|
|
v_cmpx_t_i16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x6e,0x7d]
|
|
|
|
v_cmpx_t_i16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x6e,0x7d]
|
|
|
|
v_cmpx_t_i16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x6e,0x7d]
|
|
|
|
v_cmpx_t_i16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x6e,0x7d]
|
|
|
|
v_cmpx_t_i16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x6e,0x7d]
|
|
|
|
v_cmpx_t_i16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x6e,0x7d]
|
|
|
|
v_cmpx_t_i16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x6e,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_t_i16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x6e,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_t_i16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x6f,0x7d]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xb7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xb7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xb7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xb7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xb7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_t_i16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xb7,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_f_u16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x70,0x7d]
|
|
|
|
v_cmpx_f_u16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x70,0x7d]
|
|
|
|
v_cmpx_f_u16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x70,0x7d]
|
|
|
|
v_cmpx_f_u16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x70,0x7d]
|
|
|
|
v_cmpx_f_u16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x70,0x7d]
|
|
|
|
v_cmpx_f_u16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x70,0x7d]
|
|
|
|
v_cmpx_f_u16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x70,0x7d]
|
|
|
|
v_cmpx_f_u16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x70,0x7d]
|
|
|
|
v_cmpx_f_u16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x70,0x7d]
|
|
|
|
v_cmpx_f_u16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x70,0x7d]
|
|
|
|
v_cmpx_f_u16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x70,0x7d]
|
|
|
|
v_cmpx_f_u16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x70,0x7d]
|
|
|
|
v_cmpx_f_u16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x70,0x7d]
|
|
|
|
v_cmpx_f_u16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x70,0x7d]
|
|
|
|
v_cmpx_f_u16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x70,0x7d]
|
|
|
|
v_cmpx_f_u16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x70,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_f_u16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x70,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_f_u16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x71,0x7d]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xb8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xb8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xb8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xb8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xb8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_f_u16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xb8,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_lt_u16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x72,0x7d]
|
|
|
|
v_cmpx_lt_u16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x72,0x7d]
|
|
|
|
v_cmpx_lt_u16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x72,0x7d]
|
|
|
|
v_cmpx_lt_u16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x72,0x7d]
|
|
|
|
v_cmpx_lt_u16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x72,0x7d]
|
|
|
|
v_cmpx_lt_u16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x72,0x7d]
|
|
|
|
v_cmpx_lt_u16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x72,0x7d]
|
|
|
|
v_cmpx_lt_u16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x72,0x7d]
|
|
|
|
v_cmpx_lt_u16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x72,0x7d]
|
|
|
|
v_cmpx_lt_u16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x72,0x7d]
|
|
|
|
v_cmpx_lt_u16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x72,0x7d]
|
|
|
|
v_cmpx_lt_u16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x72,0x7d]
|
|
|
|
v_cmpx_lt_u16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x72,0x7d]
|
|
|
|
v_cmpx_lt_u16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x72,0x7d]
|
|
|
|
v_cmpx_lt_u16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x72,0x7d]
|
|
|
|
v_cmpx_lt_u16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x72,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_lt_u16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x72,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_lt_u16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x73,0x7d]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xb9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xb9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xb9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xb9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xb9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_lt_u16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xb9,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_eq_u16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x74,0x7d]
|
|
|
|
v_cmpx_eq_u16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x74,0x7d]
|
|
|
|
v_cmpx_eq_u16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x74,0x7d]
|
|
|
|
v_cmpx_eq_u16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x74,0x7d]
|
|
|
|
v_cmpx_eq_u16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x74,0x7d]
|
|
|
|
v_cmpx_eq_u16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x74,0x7d]
|
|
|
|
v_cmpx_eq_u16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x74,0x7d]
|
|
|
|
v_cmpx_eq_u16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x74,0x7d]
|
|
|
|
v_cmpx_eq_u16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x74,0x7d]
|
|
|
|
v_cmpx_eq_u16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x74,0x7d]
|
|
|
|
v_cmpx_eq_u16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x74,0x7d]
|
|
|
|
v_cmpx_eq_u16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x74,0x7d]
|
|
|
|
v_cmpx_eq_u16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x74,0x7d]
|
|
|
|
v_cmpx_eq_u16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x74,0x7d]
|
|
|
|
v_cmpx_eq_u16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x74,0x7d]
|
|
|
|
v_cmpx_eq_u16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x74,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_eq_u16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x74,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_eq_u16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x75,0x7d]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xba,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xba,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xba,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xba,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xba,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_eq_u16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xba,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_le_u16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x76,0x7d]
|
|
|
|
v_cmpx_le_u16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x76,0x7d]
|
|
|
|
v_cmpx_le_u16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x76,0x7d]
|
|
|
|
v_cmpx_le_u16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x76,0x7d]
|
|
|
|
v_cmpx_le_u16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x76,0x7d]
|
|
|
|
v_cmpx_le_u16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x76,0x7d]
|
|
|
|
v_cmpx_le_u16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x76,0x7d]
|
|
|
|
v_cmpx_le_u16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x76,0x7d]
|
|
|
|
v_cmpx_le_u16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x76,0x7d]
|
|
|
|
v_cmpx_le_u16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x76,0x7d]
|
|
|
|
v_cmpx_le_u16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x76,0x7d]
|
|
|
|
v_cmpx_le_u16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x76,0x7d]
|
|
|
|
v_cmpx_le_u16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x76,0x7d]
|
|
|
|
v_cmpx_le_u16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x76,0x7d]
|
|
|
|
v_cmpx_le_u16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x76,0x7d]
|
|
|
|
v_cmpx_le_u16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x76,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_le_u16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x76,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_le_u16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x77,0x7d]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xbb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xbb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xbb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xbb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xbb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_le_u16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xbb,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_gt_u16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x78,0x7d]
|
|
|
|
v_cmpx_gt_u16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x78,0x7d]
|
|
|
|
v_cmpx_gt_u16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x78,0x7d]
|
|
|
|
v_cmpx_gt_u16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x78,0x7d]
|
|
|
|
v_cmpx_gt_u16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x78,0x7d]
|
|
|
|
v_cmpx_gt_u16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x78,0x7d]
|
|
|
|
v_cmpx_gt_u16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x78,0x7d]
|
|
|
|
v_cmpx_gt_u16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x78,0x7d]
|
|
|
|
v_cmpx_gt_u16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x78,0x7d]
|
|
|
|
v_cmpx_gt_u16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x78,0x7d]
|
|
|
|
v_cmpx_gt_u16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x78,0x7d]
|
|
|
|
v_cmpx_gt_u16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x78,0x7d]
|
|
|
|
v_cmpx_gt_u16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x78,0x7d]
|
|
|
|
v_cmpx_gt_u16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x78,0x7d]
|
|
|
|
v_cmpx_gt_u16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x78,0x7d]
|
|
|
|
v_cmpx_gt_u16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x78,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_gt_u16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x78,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_gt_u16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x79,0x7d]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xbc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xbc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xbc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xbc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xbc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_gt_u16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xbc,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ne_u16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x7a,0x7d]
|
|
|
|
v_cmpx_ne_u16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x7a,0x7d]
|
|
|
|
v_cmpx_ne_u16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x7a,0x7d]
|
|
|
|
v_cmpx_ne_u16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x7a,0x7d]
|
|
|
|
v_cmpx_ne_u16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x7a,0x7d]
|
|
|
|
v_cmpx_ne_u16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x7a,0x7d]
|
|
|
|
v_cmpx_ne_u16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x7a,0x7d]
|
|
|
|
v_cmpx_ne_u16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x7a,0x7d]
|
|
|
|
v_cmpx_ne_u16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x7a,0x7d]
|
|
|
|
v_cmpx_ne_u16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x7a,0x7d]
|
|
|
|
v_cmpx_ne_u16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x7a,0x7d]
|
|
|
|
v_cmpx_ne_u16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x7a,0x7d]
|
|
|
|
v_cmpx_ne_u16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x7a,0x7d]
|
|
|
|
v_cmpx_ne_u16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x7a,0x7d]
|
|
|
|
v_cmpx_ne_u16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x7a,0x7d]
|
|
|
|
v_cmpx_ne_u16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x7a,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_ne_u16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x7a,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_ne_u16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x7b,0x7d]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xbd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xbd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xbd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xbd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xbd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ne_u16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xbd,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ge_u16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x7c,0x7d]
|
|
|
|
v_cmpx_ge_u16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x7c,0x7d]
|
|
|
|
v_cmpx_ge_u16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x7c,0x7d]
|
|
|
|
v_cmpx_ge_u16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x7c,0x7d]
|
|
|
|
v_cmpx_ge_u16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x7c,0x7d]
|
|
|
|
v_cmpx_ge_u16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x7c,0x7d]
|
|
|
|
v_cmpx_ge_u16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x7c,0x7d]
|
|
|
|
v_cmpx_ge_u16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x7c,0x7d]
|
|
|
|
v_cmpx_ge_u16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x7c,0x7d]
|
|
|
|
v_cmpx_ge_u16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x7c,0x7d]
|
|
|
|
v_cmpx_ge_u16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x7c,0x7d]
|
|
|
|
v_cmpx_ge_u16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x7c,0x7d]
|
|
|
|
v_cmpx_ge_u16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x7c,0x7d]
|
|
|
|
v_cmpx_ge_u16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x7c,0x7d]
|
|
|
|
v_cmpx_ge_u16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x7c,0x7d]
|
|
|
|
v_cmpx_ge_u16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x7c,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_ge_u16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x7c,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_ge_u16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x7d,0x7d]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xbe,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xbe,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xbe,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xbe,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xbe,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ge_u16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xbe,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_t_u16 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x7e,0x7d]
|
|
|
|
v_cmpx_t_u16 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x7e,0x7d]
|
|
|
|
v_cmpx_t_u16 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x7e,0x7d]
|
|
|
|
v_cmpx_t_u16 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x7e,0x7d]
|
|
|
|
v_cmpx_t_u16 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x7e,0x7d]
|
|
|
|
v_cmpx_t_u16 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x7e,0x7d]
|
|
|
|
v_cmpx_t_u16 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x7e,0x7d]
|
|
|
|
v_cmpx_t_u16 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x7e,0x7d]
|
|
|
|
v_cmpx_t_u16 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x7e,0x7d]
|
|
|
|
v_cmpx_t_u16 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x7e,0x7d]
|
|
|
|
v_cmpx_t_u16 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x7e,0x7d]
|
|
|
|
v_cmpx_t_u16 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x7e,0x7d]
|
|
|
|
v_cmpx_t_u16 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x7e,0x7d]
|
|
|
|
v_cmpx_t_u16 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x7e,0x7d]
|
|
|
|
v_cmpx_t_u16 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x7e,0x7d]
|
|
|
|
v_cmpx_t_u16 vcc, 0xfe0b, v2
|
|
// CHECK: [0xff,0x04,0x7e,0x7d,0x0b,0xfe,0x00,0x00]
|
|
|
|
v_cmpx_t_u16 vcc, 0x3456, v2
|
|
// CHECK: [0xff,0x04,0x7e,0x7d,0x56,0x34,0x00,0x00]
|
|
|
|
v_cmpx_t_u16 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x7f,0x7d]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xbf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xbf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xbf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xbf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xbf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_t_u16_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xbf,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_f_i32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x80,0x7d]
|
|
|
|
v_cmp_f_i32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x80,0x7d]
|
|
|
|
v_cmp_f_i32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x80,0x7d]
|
|
|
|
v_cmp_f_i32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x80,0x7d]
|
|
|
|
v_cmp_f_i32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x80,0x7d]
|
|
|
|
v_cmp_f_i32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x80,0x7d]
|
|
|
|
v_cmp_f_i32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x80,0x7d]
|
|
|
|
v_cmp_f_i32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x80,0x7d]
|
|
|
|
v_cmp_f_i32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x80,0x7d]
|
|
|
|
v_cmp_f_i32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x80,0x7d]
|
|
|
|
v_cmp_f_i32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x80,0x7d]
|
|
|
|
v_cmp_f_i32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x80,0x7d]
|
|
|
|
v_cmp_f_i32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x80,0x7d]
|
|
|
|
v_cmp_f_i32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x80,0x7d]
|
|
|
|
v_cmp_f_i32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x80,0x7d]
|
|
|
|
v_cmp_f_i32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x80,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_f_i32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x80,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_f_i32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x81,0x7d]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xc0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xc0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xc0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xc0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_f_i32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xc0,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_lt_i32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x82,0x7d]
|
|
|
|
v_cmp_lt_i32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x82,0x7d]
|
|
|
|
v_cmp_lt_i32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x82,0x7d]
|
|
|
|
v_cmp_lt_i32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x82,0x7d]
|
|
|
|
v_cmp_lt_i32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x82,0x7d]
|
|
|
|
v_cmp_lt_i32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x82,0x7d]
|
|
|
|
v_cmp_lt_i32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x82,0x7d]
|
|
|
|
v_cmp_lt_i32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x82,0x7d]
|
|
|
|
v_cmp_lt_i32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x82,0x7d]
|
|
|
|
v_cmp_lt_i32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x82,0x7d]
|
|
|
|
v_cmp_lt_i32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x82,0x7d]
|
|
|
|
v_cmp_lt_i32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x82,0x7d]
|
|
|
|
v_cmp_lt_i32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x82,0x7d]
|
|
|
|
v_cmp_lt_i32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x82,0x7d]
|
|
|
|
v_cmp_lt_i32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x82,0x7d]
|
|
|
|
v_cmp_lt_i32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x82,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_lt_i32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x82,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_lt_i32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x83,0x7d]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xc1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xc1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xc1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xc1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_lt_i32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xc1,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_eq_i32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x84,0x7d]
|
|
|
|
v_cmp_eq_i32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x84,0x7d]
|
|
|
|
v_cmp_eq_i32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x84,0x7d]
|
|
|
|
v_cmp_eq_i32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x84,0x7d]
|
|
|
|
v_cmp_eq_i32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x84,0x7d]
|
|
|
|
v_cmp_eq_i32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x84,0x7d]
|
|
|
|
v_cmp_eq_i32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x84,0x7d]
|
|
|
|
v_cmp_eq_i32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x84,0x7d]
|
|
|
|
v_cmp_eq_i32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x84,0x7d]
|
|
|
|
v_cmp_eq_i32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x84,0x7d]
|
|
|
|
v_cmp_eq_i32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x84,0x7d]
|
|
|
|
v_cmp_eq_i32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x84,0x7d]
|
|
|
|
v_cmp_eq_i32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x84,0x7d]
|
|
|
|
v_cmp_eq_i32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x84,0x7d]
|
|
|
|
v_cmp_eq_i32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x84,0x7d]
|
|
|
|
v_cmp_eq_i32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x84,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_eq_i32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x84,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_eq_i32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x85,0x7d]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xc2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xc2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xc2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xc2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_eq_i32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xc2,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_le_i32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x86,0x7d]
|
|
|
|
v_cmp_le_i32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x86,0x7d]
|
|
|
|
v_cmp_le_i32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x86,0x7d]
|
|
|
|
v_cmp_le_i32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x86,0x7d]
|
|
|
|
v_cmp_le_i32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x86,0x7d]
|
|
|
|
v_cmp_le_i32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x86,0x7d]
|
|
|
|
v_cmp_le_i32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x86,0x7d]
|
|
|
|
v_cmp_le_i32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x86,0x7d]
|
|
|
|
v_cmp_le_i32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x86,0x7d]
|
|
|
|
v_cmp_le_i32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x86,0x7d]
|
|
|
|
v_cmp_le_i32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x86,0x7d]
|
|
|
|
v_cmp_le_i32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x86,0x7d]
|
|
|
|
v_cmp_le_i32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x86,0x7d]
|
|
|
|
v_cmp_le_i32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x86,0x7d]
|
|
|
|
v_cmp_le_i32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x86,0x7d]
|
|
|
|
v_cmp_le_i32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x86,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_le_i32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x86,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_le_i32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x87,0x7d]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xc3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xc3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xc3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xc3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_le_i32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xc3,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_gt_i32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x88,0x7d]
|
|
|
|
v_cmp_gt_i32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x88,0x7d]
|
|
|
|
v_cmp_gt_i32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x88,0x7d]
|
|
|
|
v_cmp_gt_i32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x88,0x7d]
|
|
|
|
v_cmp_gt_i32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x88,0x7d]
|
|
|
|
v_cmp_gt_i32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x88,0x7d]
|
|
|
|
v_cmp_gt_i32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x88,0x7d]
|
|
|
|
v_cmp_gt_i32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x88,0x7d]
|
|
|
|
v_cmp_gt_i32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x88,0x7d]
|
|
|
|
v_cmp_gt_i32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x88,0x7d]
|
|
|
|
v_cmp_gt_i32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x88,0x7d]
|
|
|
|
v_cmp_gt_i32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x88,0x7d]
|
|
|
|
v_cmp_gt_i32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x88,0x7d]
|
|
|
|
v_cmp_gt_i32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x88,0x7d]
|
|
|
|
v_cmp_gt_i32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x88,0x7d]
|
|
|
|
v_cmp_gt_i32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x88,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_gt_i32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x88,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_gt_i32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x89,0x7d]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xc4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xc4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xc4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xc4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_gt_i32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xc4,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ne_i32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x8a,0x7d]
|
|
|
|
v_cmp_ne_i32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x8a,0x7d]
|
|
|
|
v_cmp_ne_i32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x8a,0x7d]
|
|
|
|
v_cmp_ne_i32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x8a,0x7d]
|
|
|
|
v_cmp_ne_i32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x8a,0x7d]
|
|
|
|
v_cmp_ne_i32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x8a,0x7d]
|
|
|
|
v_cmp_ne_i32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x8a,0x7d]
|
|
|
|
v_cmp_ne_i32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x8a,0x7d]
|
|
|
|
v_cmp_ne_i32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x8a,0x7d]
|
|
|
|
v_cmp_ne_i32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x8a,0x7d]
|
|
|
|
v_cmp_ne_i32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x8a,0x7d]
|
|
|
|
v_cmp_ne_i32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x8a,0x7d]
|
|
|
|
v_cmp_ne_i32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x8a,0x7d]
|
|
|
|
v_cmp_ne_i32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x8a,0x7d]
|
|
|
|
v_cmp_ne_i32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x8a,0x7d]
|
|
|
|
v_cmp_ne_i32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x8a,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_ne_i32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x8a,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_ne_i32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x8b,0x7d]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xc5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xc5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xc5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xc5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ne_i32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xc5,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ge_i32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x8c,0x7d]
|
|
|
|
v_cmp_ge_i32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x8c,0x7d]
|
|
|
|
v_cmp_ge_i32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x8c,0x7d]
|
|
|
|
v_cmp_ge_i32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x8c,0x7d]
|
|
|
|
v_cmp_ge_i32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x8c,0x7d]
|
|
|
|
v_cmp_ge_i32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x8c,0x7d]
|
|
|
|
v_cmp_ge_i32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x8c,0x7d]
|
|
|
|
v_cmp_ge_i32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x8c,0x7d]
|
|
|
|
v_cmp_ge_i32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x8c,0x7d]
|
|
|
|
v_cmp_ge_i32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x8c,0x7d]
|
|
|
|
v_cmp_ge_i32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x8c,0x7d]
|
|
|
|
v_cmp_ge_i32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x8c,0x7d]
|
|
|
|
v_cmp_ge_i32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x8c,0x7d]
|
|
|
|
v_cmp_ge_i32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x8c,0x7d]
|
|
|
|
v_cmp_ge_i32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x8c,0x7d]
|
|
|
|
v_cmp_ge_i32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x8c,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_ge_i32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x8c,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_ge_i32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x8d,0x7d]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xc6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xc6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xc6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xc6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ge_i32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xc6,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_t_i32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x8e,0x7d]
|
|
|
|
v_cmp_t_i32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x8e,0x7d]
|
|
|
|
v_cmp_t_i32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x8e,0x7d]
|
|
|
|
v_cmp_t_i32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x8e,0x7d]
|
|
|
|
v_cmp_t_i32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x8e,0x7d]
|
|
|
|
v_cmp_t_i32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x8e,0x7d]
|
|
|
|
v_cmp_t_i32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x8e,0x7d]
|
|
|
|
v_cmp_t_i32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x8e,0x7d]
|
|
|
|
v_cmp_t_i32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x8e,0x7d]
|
|
|
|
v_cmp_t_i32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x8e,0x7d]
|
|
|
|
v_cmp_t_i32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x8e,0x7d]
|
|
|
|
v_cmp_t_i32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x8e,0x7d]
|
|
|
|
v_cmp_t_i32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x8e,0x7d]
|
|
|
|
v_cmp_t_i32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x8e,0x7d]
|
|
|
|
v_cmp_t_i32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x8e,0x7d]
|
|
|
|
v_cmp_t_i32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x8e,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_t_i32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x8e,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_t_i32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x8f,0x7d]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xc7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xc7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xc7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xc7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_t_i32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xc7,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_f_u32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x90,0x7d]
|
|
|
|
v_cmp_f_u32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x90,0x7d]
|
|
|
|
v_cmp_f_u32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x90,0x7d]
|
|
|
|
v_cmp_f_u32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x90,0x7d]
|
|
|
|
v_cmp_f_u32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x90,0x7d]
|
|
|
|
v_cmp_f_u32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x90,0x7d]
|
|
|
|
v_cmp_f_u32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x90,0x7d]
|
|
|
|
v_cmp_f_u32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x90,0x7d]
|
|
|
|
v_cmp_f_u32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x90,0x7d]
|
|
|
|
v_cmp_f_u32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x90,0x7d]
|
|
|
|
v_cmp_f_u32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x90,0x7d]
|
|
|
|
v_cmp_f_u32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x90,0x7d]
|
|
|
|
v_cmp_f_u32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x90,0x7d]
|
|
|
|
v_cmp_f_u32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x90,0x7d]
|
|
|
|
v_cmp_f_u32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x90,0x7d]
|
|
|
|
v_cmp_f_u32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x90,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_f_u32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x90,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_f_u32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x91,0x7d]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xc8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xc8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xc8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xc8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_f_u32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xc8,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_lt_u32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x92,0x7d]
|
|
|
|
v_cmp_lt_u32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x92,0x7d]
|
|
|
|
v_cmp_lt_u32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x92,0x7d]
|
|
|
|
v_cmp_lt_u32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x92,0x7d]
|
|
|
|
v_cmp_lt_u32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x92,0x7d]
|
|
|
|
v_cmp_lt_u32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x92,0x7d]
|
|
|
|
v_cmp_lt_u32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x92,0x7d]
|
|
|
|
v_cmp_lt_u32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x92,0x7d]
|
|
|
|
v_cmp_lt_u32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x92,0x7d]
|
|
|
|
v_cmp_lt_u32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x92,0x7d]
|
|
|
|
v_cmp_lt_u32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x92,0x7d]
|
|
|
|
v_cmp_lt_u32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x92,0x7d]
|
|
|
|
v_cmp_lt_u32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x92,0x7d]
|
|
|
|
v_cmp_lt_u32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x92,0x7d]
|
|
|
|
v_cmp_lt_u32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x92,0x7d]
|
|
|
|
v_cmp_lt_u32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x92,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_lt_u32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x92,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_lt_u32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x93,0x7d]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xc9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xc9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xc9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xc9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_lt_u32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xc9,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_eq_u32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x94,0x7d]
|
|
|
|
v_cmp_eq_u32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x94,0x7d]
|
|
|
|
v_cmp_eq_u32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x94,0x7d]
|
|
|
|
v_cmp_eq_u32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x94,0x7d]
|
|
|
|
v_cmp_eq_u32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x94,0x7d]
|
|
|
|
v_cmp_eq_u32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x94,0x7d]
|
|
|
|
v_cmp_eq_u32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x94,0x7d]
|
|
|
|
v_cmp_eq_u32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x94,0x7d]
|
|
|
|
v_cmp_eq_u32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x94,0x7d]
|
|
|
|
v_cmp_eq_u32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x94,0x7d]
|
|
|
|
v_cmp_eq_u32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x94,0x7d]
|
|
|
|
v_cmp_eq_u32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x94,0x7d]
|
|
|
|
v_cmp_eq_u32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x94,0x7d]
|
|
|
|
v_cmp_eq_u32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x94,0x7d]
|
|
|
|
v_cmp_eq_u32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x94,0x7d]
|
|
|
|
v_cmp_eq_u32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x94,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_eq_u32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x94,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_eq_u32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x95,0x7d]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xca,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xca,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xca,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xca,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x6a,0x04,0x02,0x00]
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|
|
|
v_cmp_eq_u32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_eq_u32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xca,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_le_u32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x96,0x7d]
|
|
|
|
v_cmp_le_u32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x96,0x7d]
|
|
|
|
v_cmp_le_u32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x96,0x7d]
|
|
|
|
v_cmp_le_u32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x96,0x7d]
|
|
|
|
v_cmp_le_u32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x96,0x7d]
|
|
|
|
v_cmp_le_u32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x96,0x7d]
|
|
|
|
v_cmp_le_u32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x96,0x7d]
|
|
|
|
v_cmp_le_u32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x96,0x7d]
|
|
|
|
v_cmp_le_u32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x96,0x7d]
|
|
|
|
v_cmp_le_u32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x96,0x7d]
|
|
|
|
v_cmp_le_u32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x96,0x7d]
|
|
|
|
v_cmp_le_u32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x96,0x7d]
|
|
|
|
v_cmp_le_u32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x96,0x7d]
|
|
|
|
v_cmp_le_u32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x96,0x7d]
|
|
|
|
v_cmp_le_u32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x96,0x7d]
|
|
|
|
v_cmp_le_u32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x96,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_le_u32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x96,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_le_u32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x97,0x7d]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xcb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xcb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xcb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xcb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_le_u32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xcb,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_gt_u32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x98,0x7d]
|
|
|
|
v_cmp_gt_u32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x98,0x7d]
|
|
|
|
v_cmp_gt_u32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x98,0x7d]
|
|
|
|
v_cmp_gt_u32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x98,0x7d]
|
|
|
|
v_cmp_gt_u32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x98,0x7d]
|
|
|
|
v_cmp_gt_u32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x98,0x7d]
|
|
|
|
v_cmp_gt_u32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x98,0x7d]
|
|
|
|
v_cmp_gt_u32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x98,0x7d]
|
|
|
|
v_cmp_gt_u32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x98,0x7d]
|
|
|
|
v_cmp_gt_u32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x98,0x7d]
|
|
|
|
v_cmp_gt_u32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x98,0x7d]
|
|
|
|
v_cmp_gt_u32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x98,0x7d]
|
|
|
|
v_cmp_gt_u32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x98,0x7d]
|
|
|
|
v_cmp_gt_u32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x98,0x7d]
|
|
|
|
v_cmp_gt_u32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x98,0x7d]
|
|
|
|
v_cmp_gt_u32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x98,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_gt_u32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x98,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_gt_u32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x99,0x7d]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xcc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xcc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xcc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xcc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_gt_u32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xcc,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ne_u32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x9a,0x7d]
|
|
|
|
v_cmp_ne_u32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x9a,0x7d]
|
|
|
|
v_cmp_ne_u32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x9a,0x7d]
|
|
|
|
v_cmp_ne_u32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x9a,0x7d]
|
|
|
|
v_cmp_ne_u32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x9a,0x7d]
|
|
|
|
v_cmp_ne_u32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x9a,0x7d]
|
|
|
|
v_cmp_ne_u32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x9a,0x7d]
|
|
|
|
v_cmp_ne_u32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x9a,0x7d]
|
|
|
|
v_cmp_ne_u32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x9a,0x7d]
|
|
|
|
v_cmp_ne_u32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x9a,0x7d]
|
|
|
|
v_cmp_ne_u32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x9a,0x7d]
|
|
|
|
v_cmp_ne_u32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x9a,0x7d]
|
|
|
|
v_cmp_ne_u32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x9a,0x7d]
|
|
|
|
v_cmp_ne_u32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x9a,0x7d]
|
|
|
|
v_cmp_ne_u32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x9a,0x7d]
|
|
|
|
v_cmp_ne_u32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x9a,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_ne_u32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x9a,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_ne_u32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x9b,0x7d]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xcd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xcd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xcd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xcd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ne_u32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xcd,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ge_u32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x9c,0x7d]
|
|
|
|
v_cmp_ge_u32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x9c,0x7d]
|
|
|
|
v_cmp_ge_u32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x9c,0x7d]
|
|
|
|
v_cmp_ge_u32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x9c,0x7d]
|
|
|
|
v_cmp_ge_u32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x9c,0x7d]
|
|
|
|
v_cmp_ge_u32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x9c,0x7d]
|
|
|
|
v_cmp_ge_u32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x9c,0x7d]
|
|
|
|
v_cmp_ge_u32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x9c,0x7d]
|
|
|
|
v_cmp_ge_u32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x9c,0x7d]
|
|
|
|
v_cmp_ge_u32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x9c,0x7d]
|
|
|
|
v_cmp_ge_u32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x9c,0x7d]
|
|
|
|
v_cmp_ge_u32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x9c,0x7d]
|
|
|
|
v_cmp_ge_u32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x9c,0x7d]
|
|
|
|
v_cmp_ge_u32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x9c,0x7d]
|
|
|
|
v_cmp_ge_u32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x9c,0x7d]
|
|
|
|
v_cmp_ge_u32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x9c,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_ge_u32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x9c,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_ge_u32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x9d,0x7d]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xce,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xce,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xce,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xce,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ge_u32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xce,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_t_u32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0x9e,0x7d]
|
|
|
|
v_cmp_t_u32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0x9e,0x7d]
|
|
|
|
v_cmp_t_u32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0x9e,0x7d]
|
|
|
|
v_cmp_t_u32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0x9e,0x7d]
|
|
|
|
v_cmp_t_u32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0x9e,0x7d]
|
|
|
|
v_cmp_t_u32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0x9e,0x7d]
|
|
|
|
v_cmp_t_u32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0x9e,0x7d]
|
|
|
|
v_cmp_t_u32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0x9e,0x7d]
|
|
|
|
v_cmp_t_u32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0x9e,0x7d]
|
|
|
|
v_cmp_t_u32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0x9e,0x7d]
|
|
|
|
v_cmp_t_u32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0x9e,0x7d]
|
|
|
|
v_cmp_t_u32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0x9e,0x7d]
|
|
|
|
v_cmp_t_u32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0x9e,0x7d]
|
|
|
|
v_cmp_t_u32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0x9e,0x7d]
|
|
|
|
v_cmp_t_u32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0x9e,0x7d]
|
|
|
|
v_cmp_t_u32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0x9e,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_t_u32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0x9e,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_t_u32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0x9f,0x7d]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xcf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xcf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xcf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xcf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_t_u32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xcf,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_f_i32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xa0,0x7d]
|
|
|
|
v_cmpx_f_i32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xa0,0x7d]
|
|
|
|
v_cmpx_f_i32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xa0,0x7d]
|
|
|
|
v_cmpx_f_i32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xa0,0x7d]
|
|
|
|
v_cmpx_f_i32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xa0,0x7d]
|
|
|
|
v_cmpx_f_i32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xa0,0x7d]
|
|
|
|
v_cmpx_f_i32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xa0,0x7d]
|
|
|
|
v_cmpx_f_i32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xa0,0x7d]
|
|
|
|
v_cmpx_f_i32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xa0,0x7d]
|
|
|
|
v_cmpx_f_i32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xa0,0x7d]
|
|
|
|
v_cmpx_f_i32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xa0,0x7d]
|
|
|
|
v_cmpx_f_i32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xa0,0x7d]
|
|
|
|
v_cmpx_f_i32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xa0,0x7d]
|
|
|
|
v_cmpx_f_i32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xa0,0x7d]
|
|
|
|
v_cmpx_f_i32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xa0,0x7d]
|
|
|
|
v_cmpx_f_i32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xa0,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_f_i32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xa0,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_f_i32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xa1,0x7d]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xd0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xd0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xd0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xd0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xd0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_f_i32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xd0,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_lt_i32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xa2,0x7d]
|
|
|
|
v_cmpx_lt_i32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xa2,0x7d]
|
|
|
|
v_cmpx_lt_i32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xa2,0x7d]
|
|
|
|
v_cmpx_lt_i32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xa2,0x7d]
|
|
|
|
v_cmpx_lt_i32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xa2,0x7d]
|
|
|
|
v_cmpx_lt_i32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xa2,0x7d]
|
|
|
|
v_cmpx_lt_i32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xa2,0x7d]
|
|
|
|
v_cmpx_lt_i32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xa2,0x7d]
|
|
|
|
v_cmpx_lt_i32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xa2,0x7d]
|
|
|
|
v_cmpx_lt_i32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xa2,0x7d]
|
|
|
|
v_cmpx_lt_i32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xa2,0x7d]
|
|
|
|
v_cmpx_lt_i32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xa2,0x7d]
|
|
|
|
v_cmpx_lt_i32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xa2,0x7d]
|
|
|
|
v_cmpx_lt_i32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xa2,0x7d]
|
|
|
|
v_cmpx_lt_i32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xa2,0x7d]
|
|
|
|
v_cmpx_lt_i32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xa2,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_lt_i32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xa2,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_lt_i32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xa3,0x7d]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xd1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xd1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xd1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xd1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xd1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_lt_i32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xd1,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_eq_i32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xa4,0x7d]
|
|
|
|
v_cmpx_eq_i32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xa4,0x7d]
|
|
|
|
v_cmpx_eq_i32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xa4,0x7d]
|
|
|
|
v_cmpx_eq_i32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xa4,0x7d]
|
|
|
|
v_cmpx_eq_i32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xa4,0x7d]
|
|
|
|
v_cmpx_eq_i32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xa4,0x7d]
|
|
|
|
v_cmpx_eq_i32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xa4,0x7d]
|
|
|
|
v_cmpx_eq_i32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xa4,0x7d]
|
|
|
|
v_cmpx_eq_i32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xa4,0x7d]
|
|
|
|
v_cmpx_eq_i32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xa4,0x7d]
|
|
|
|
v_cmpx_eq_i32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xa4,0x7d]
|
|
|
|
v_cmpx_eq_i32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xa4,0x7d]
|
|
|
|
v_cmpx_eq_i32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xa4,0x7d]
|
|
|
|
v_cmpx_eq_i32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xa4,0x7d]
|
|
|
|
v_cmpx_eq_i32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xa4,0x7d]
|
|
|
|
v_cmpx_eq_i32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xa4,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_eq_i32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xa4,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_eq_i32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xa5,0x7d]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xd2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xd2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xd2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xd2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xd2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_eq_i32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xd2,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_le_i32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xa6,0x7d]
|
|
|
|
v_cmpx_le_i32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xa6,0x7d]
|
|
|
|
v_cmpx_le_i32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xa6,0x7d]
|
|
|
|
v_cmpx_le_i32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xa6,0x7d]
|
|
|
|
v_cmpx_le_i32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xa6,0x7d]
|
|
|
|
v_cmpx_le_i32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xa6,0x7d]
|
|
|
|
v_cmpx_le_i32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xa6,0x7d]
|
|
|
|
v_cmpx_le_i32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xa6,0x7d]
|
|
|
|
v_cmpx_le_i32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xa6,0x7d]
|
|
|
|
v_cmpx_le_i32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xa6,0x7d]
|
|
|
|
v_cmpx_le_i32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xa6,0x7d]
|
|
|
|
v_cmpx_le_i32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xa6,0x7d]
|
|
|
|
v_cmpx_le_i32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xa6,0x7d]
|
|
|
|
v_cmpx_le_i32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xa6,0x7d]
|
|
|
|
v_cmpx_le_i32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xa6,0x7d]
|
|
|
|
v_cmpx_le_i32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xa6,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_le_i32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xa6,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_le_i32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xa7,0x7d]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xd3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xd3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xd3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xd3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xd3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_le_i32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xd3,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_gt_i32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xa8,0x7d]
|
|
|
|
v_cmpx_gt_i32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xa8,0x7d]
|
|
|
|
v_cmpx_gt_i32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xa8,0x7d]
|
|
|
|
v_cmpx_gt_i32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xa8,0x7d]
|
|
|
|
v_cmpx_gt_i32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xa8,0x7d]
|
|
|
|
v_cmpx_gt_i32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xa8,0x7d]
|
|
|
|
v_cmpx_gt_i32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xa8,0x7d]
|
|
|
|
v_cmpx_gt_i32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xa8,0x7d]
|
|
|
|
v_cmpx_gt_i32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xa8,0x7d]
|
|
|
|
v_cmpx_gt_i32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xa8,0x7d]
|
|
|
|
v_cmpx_gt_i32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xa8,0x7d]
|
|
|
|
v_cmpx_gt_i32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xa8,0x7d]
|
|
|
|
v_cmpx_gt_i32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xa8,0x7d]
|
|
|
|
v_cmpx_gt_i32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xa8,0x7d]
|
|
|
|
v_cmpx_gt_i32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xa8,0x7d]
|
|
|
|
v_cmpx_gt_i32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xa8,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_gt_i32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xa8,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_gt_i32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xa9,0x7d]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xd4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xd4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xd4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xd4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xd4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_gt_i32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xd4,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ne_i32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xaa,0x7d]
|
|
|
|
v_cmpx_ne_i32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xaa,0x7d]
|
|
|
|
v_cmpx_ne_i32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xaa,0x7d]
|
|
|
|
v_cmpx_ne_i32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xaa,0x7d]
|
|
|
|
v_cmpx_ne_i32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xaa,0x7d]
|
|
|
|
v_cmpx_ne_i32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xaa,0x7d]
|
|
|
|
v_cmpx_ne_i32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xaa,0x7d]
|
|
|
|
v_cmpx_ne_i32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xaa,0x7d]
|
|
|
|
v_cmpx_ne_i32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xaa,0x7d]
|
|
|
|
v_cmpx_ne_i32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xaa,0x7d]
|
|
|
|
v_cmpx_ne_i32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xaa,0x7d]
|
|
|
|
v_cmpx_ne_i32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xaa,0x7d]
|
|
|
|
v_cmpx_ne_i32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xaa,0x7d]
|
|
|
|
v_cmpx_ne_i32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xaa,0x7d]
|
|
|
|
v_cmpx_ne_i32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xaa,0x7d]
|
|
|
|
v_cmpx_ne_i32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xaa,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_ne_i32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xaa,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_ne_i32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xab,0x7d]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xd5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xd5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xd5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xd5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xd5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ne_i32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xd5,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ge_i32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xac,0x7d]
|
|
|
|
v_cmpx_ge_i32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xac,0x7d]
|
|
|
|
v_cmpx_ge_i32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xac,0x7d]
|
|
|
|
v_cmpx_ge_i32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xac,0x7d]
|
|
|
|
v_cmpx_ge_i32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xac,0x7d]
|
|
|
|
v_cmpx_ge_i32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xac,0x7d]
|
|
|
|
v_cmpx_ge_i32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xac,0x7d]
|
|
|
|
v_cmpx_ge_i32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xac,0x7d]
|
|
|
|
v_cmpx_ge_i32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xac,0x7d]
|
|
|
|
v_cmpx_ge_i32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xac,0x7d]
|
|
|
|
v_cmpx_ge_i32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xac,0x7d]
|
|
|
|
v_cmpx_ge_i32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xac,0x7d]
|
|
|
|
v_cmpx_ge_i32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xac,0x7d]
|
|
|
|
v_cmpx_ge_i32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xac,0x7d]
|
|
|
|
v_cmpx_ge_i32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xac,0x7d]
|
|
|
|
v_cmpx_ge_i32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xac,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_ge_i32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xac,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_ge_i32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xad,0x7d]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xd6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xd6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xd6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xd6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xd6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ge_i32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xd6,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_t_i32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xae,0x7d]
|
|
|
|
v_cmpx_t_i32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xae,0x7d]
|
|
|
|
v_cmpx_t_i32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xae,0x7d]
|
|
|
|
v_cmpx_t_i32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xae,0x7d]
|
|
|
|
v_cmpx_t_i32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xae,0x7d]
|
|
|
|
v_cmpx_t_i32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xae,0x7d]
|
|
|
|
v_cmpx_t_i32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xae,0x7d]
|
|
|
|
v_cmpx_t_i32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xae,0x7d]
|
|
|
|
v_cmpx_t_i32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xae,0x7d]
|
|
|
|
v_cmpx_t_i32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xae,0x7d]
|
|
|
|
v_cmpx_t_i32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xae,0x7d]
|
|
|
|
v_cmpx_t_i32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xae,0x7d]
|
|
|
|
v_cmpx_t_i32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xae,0x7d]
|
|
|
|
v_cmpx_t_i32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xae,0x7d]
|
|
|
|
v_cmpx_t_i32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xae,0x7d]
|
|
|
|
v_cmpx_t_i32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xae,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_t_i32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xae,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_t_i32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xaf,0x7d]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xd7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xd7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xd7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xd7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xd7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_t_i32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xd7,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_f_u32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xb0,0x7d]
|
|
|
|
v_cmpx_f_u32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xb0,0x7d]
|
|
|
|
v_cmpx_f_u32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xb0,0x7d]
|
|
|
|
v_cmpx_f_u32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xb0,0x7d]
|
|
|
|
v_cmpx_f_u32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xb0,0x7d]
|
|
|
|
v_cmpx_f_u32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xb0,0x7d]
|
|
|
|
v_cmpx_f_u32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xb0,0x7d]
|
|
|
|
v_cmpx_f_u32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xb0,0x7d]
|
|
|
|
v_cmpx_f_u32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xb0,0x7d]
|
|
|
|
v_cmpx_f_u32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xb0,0x7d]
|
|
|
|
v_cmpx_f_u32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xb0,0x7d]
|
|
|
|
v_cmpx_f_u32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xb0,0x7d]
|
|
|
|
v_cmpx_f_u32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xb0,0x7d]
|
|
|
|
v_cmpx_f_u32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xb0,0x7d]
|
|
|
|
v_cmpx_f_u32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xb0,0x7d]
|
|
|
|
v_cmpx_f_u32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xb0,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_f_u32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xb0,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_f_u32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xb1,0x7d]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xd8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xd8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xd8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xd8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xd8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_f_u32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xd8,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_lt_u32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xb2,0x7d]
|
|
|
|
v_cmpx_lt_u32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xb2,0x7d]
|
|
|
|
v_cmpx_lt_u32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xb2,0x7d]
|
|
|
|
v_cmpx_lt_u32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xb2,0x7d]
|
|
|
|
v_cmpx_lt_u32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xb2,0x7d]
|
|
|
|
v_cmpx_lt_u32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xb2,0x7d]
|
|
|
|
v_cmpx_lt_u32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xb2,0x7d]
|
|
|
|
v_cmpx_lt_u32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xb2,0x7d]
|
|
|
|
v_cmpx_lt_u32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xb2,0x7d]
|
|
|
|
v_cmpx_lt_u32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xb2,0x7d]
|
|
|
|
v_cmpx_lt_u32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xb2,0x7d]
|
|
|
|
v_cmpx_lt_u32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xb2,0x7d]
|
|
|
|
v_cmpx_lt_u32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xb2,0x7d]
|
|
|
|
v_cmpx_lt_u32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xb2,0x7d]
|
|
|
|
v_cmpx_lt_u32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xb2,0x7d]
|
|
|
|
v_cmpx_lt_u32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xb2,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_lt_u32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xb2,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_lt_u32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xb3,0x7d]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xd9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xd9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xd9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xd9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xd9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_lt_u32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xd9,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_eq_u32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xb4,0x7d]
|
|
|
|
v_cmpx_eq_u32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xb4,0x7d]
|
|
|
|
v_cmpx_eq_u32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xb4,0x7d]
|
|
|
|
v_cmpx_eq_u32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xb4,0x7d]
|
|
|
|
v_cmpx_eq_u32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xb4,0x7d]
|
|
|
|
v_cmpx_eq_u32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xb4,0x7d]
|
|
|
|
v_cmpx_eq_u32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xb4,0x7d]
|
|
|
|
v_cmpx_eq_u32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xb4,0x7d]
|
|
|
|
v_cmpx_eq_u32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xb4,0x7d]
|
|
|
|
v_cmpx_eq_u32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xb4,0x7d]
|
|
|
|
v_cmpx_eq_u32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xb4,0x7d]
|
|
|
|
v_cmpx_eq_u32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xb4,0x7d]
|
|
|
|
v_cmpx_eq_u32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xb4,0x7d]
|
|
|
|
v_cmpx_eq_u32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xb4,0x7d]
|
|
|
|
v_cmpx_eq_u32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xb4,0x7d]
|
|
|
|
v_cmpx_eq_u32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xb4,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_eq_u32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xb4,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_eq_u32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xb5,0x7d]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xda,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xda,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xda,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xda,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xda,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_eq_u32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xda,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_le_u32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xb6,0x7d]
|
|
|
|
v_cmpx_le_u32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xb6,0x7d]
|
|
|
|
v_cmpx_le_u32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xb6,0x7d]
|
|
|
|
v_cmpx_le_u32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xb6,0x7d]
|
|
|
|
v_cmpx_le_u32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xb6,0x7d]
|
|
|
|
v_cmpx_le_u32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xb6,0x7d]
|
|
|
|
v_cmpx_le_u32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xb6,0x7d]
|
|
|
|
v_cmpx_le_u32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xb6,0x7d]
|
|
|
|
v_cmpx_le_u32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xb6,0x7d]
|
|
|
|
v_cmpx_le_u32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xb6,0x7d]
|
|
|
|
v_cmpx_le_u32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xb6,0x7d]
|
|
|
|
v_cmpx_le_u32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xb6,0x7d]
|
|
|
|
v_cmpx_le_u32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xb6,0x7d]
|
|
|
|
v_cmpx_le_u32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xb6,0x7d]
|
|
|
|
v_cmpx_le_u32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xb6,0x7d]
|
|
|
|
v_cmpx_le_u32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xb6,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_le_u32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xb6,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_le_u32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xb7,0x7d]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xdb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xdb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xdb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xdb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xdb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_le_u32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xdb,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_gt_u32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xb8,0x7d]
|
|
|
|
v_cmpx_gt_u32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xb8,0x7d]
|
|
|
|
v_cmpx_gt_u32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xb8,0x7d]
|
|
|
|
v_cmpx_gt_u32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xb8,0x7d]
|
|
|
|
v_cmpx_gt_u32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xb8,0x7d]
|
|
|
|
v_cmpx_gt_u32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xb8,0x7d]
|
|
|
|
v_cmpx_gt_u32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xb8,0x7d]
|
|
|
|
v_cmpx_gt_u32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xb8,0x7d]
|
|
|
|
v_cmpx_gt_u32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xb8,0x7d]
|
|
|
|
v_cmpx_gt_u32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xb8,0x7d]
|
|
|
|
v_cmpx_gt_u32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xb8,0x7d]
|
|
|
|
v_cmpx_gt_u32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xb8,0x7d]
|
|
|
|
v_cmpx_gt_u32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xb8,0x7d]
|
|
|
|
v_cmpx_gt_u32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xb8,0x7d]
|
|
|
|
v_cmpx_gt_u32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xb8,0x7d]
|
|
|
|
v_cmpx_gt_u32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xb8,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_gt_u32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xb8,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_gt_u32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xb9,0x7d]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xdc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xdc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xdc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xdc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xdc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_gt_u32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xdc,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ne_u32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xba,0x7d]
|
|
|
|
v_cmpx_ne_u32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xba,0x7d]
|
|
|
|
v_cmpx_ne_u32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xba,0x7d]
|
|
|
|
v_cmpx_ne_u32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xba,0x7d]
|
|
|
|
v_cmpx_ne_u32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xba,0x7d]
|
|
|
|
v_cmpx_ne_u32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xba,0x7d]
|
|
|
|
v_cmpx_ne_u32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xba,0x7d]
|
|
|
|
v_cmpx_ne_u32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xba,0x7d]
|
|
|
|
v_cmpx_ne_u32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xba,0x7d]
|
|
|
|
v_cmpx_ne_u32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xba,0x7d]
|
|
|
|
v_cmpx_ne_u32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xba,0x7d]
|
|
|
|
v_cmpx_ne_u32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xba,0x7d]
|
|
|
|
v_cmpx_ne_u32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xba,0x7d]
|
|
|
|
v_cmpx_ne_u32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xba,0x7d]
|
|
|
|
v_cmpx_ne_u32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xba,0x7d]
|
|
|
|
v_cmpx_ne_u32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xba,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_ne_u32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xba,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_ne_u32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xbb,0x7d]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xdd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xdd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xdd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xdd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xdd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ne_u32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xdd,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ge_u32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xbc,0x7d]
|
|
|
|
v_cmpx_ge_u32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xbc,0x7d]
|
|
|
|
v_cmpx_ge_u32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xbc,0x7d]
|
|
|
|
v_cmpx_ge_u32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xbc,0x7d]
|
|
|
|
v_cmpx_ge_u32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xbc,0x7d]
|
|
|
|
v_cmpx_ge_u32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xbc,0x7d]
|
|
|
|
v_cmpx_ge_u32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xbc,0x7d]
|
|
|
|
v_cmpx_ge_u32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xbc,0x7d]
|
|
|
|
v_cmpx_ge_u32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xbc,0x7d]
|
|
|
|
v_cmpx_ge_u32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xbc,0x7d]
|
|
|
|
v_cmpx_ge_u32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xbc,0x7d]
|
|
|
|
v_cmpx_ge_u32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xbc,0x7d]
|
|
|
|
v_cmpx_ge_u32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xbc,0x7d]
|
|
|
|
v_cmpx_ge_u32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xbc,0x7d]
|
|
|
|
v_cmpx_ge_u32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xbc,0x7d]
|
|
|
|
v_cmpx_ge_u32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xbc,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_ge_u32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xbc,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_ge_u32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xbd,0x7d]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xde,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xde,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xde,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xde,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xde,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ge_u32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xde,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_t_u32 vcc, v1, v2
|
|
// CHECK: [0x01,0x05,0xbe,0x7d]
|
|
|
|
v_cmpx_t_u32 vcc, v255, v2
|
|
// CHECK: [0xff,0x05,0xbe,0x7d]
|
|
|
|
v_cmpx_t_u32 vcc, s1, v2
|
|
// CHECK: [0x01,0x04,0xbe,0x7d]
|
|
|
|
v_cmpx_t_u32 vcc, s101, v2
|
|
// CHECK: [0x65,0x04,0xbe,0x7d]
|
|
|
|
v_cmpx_t_u32 vcc, flat_scratch_lo, v2
|
|
// CHECK: [0x66,0x04,0xbe,0x7d]
|
|
|
|
v_cmpx_t_u32 vcc, flat_scratch_hi, v2
|
|
// CHECK: [0x67,0x04,0xbe,0x7d]
|
|
|
|
v_cmpx_t_u32 vcc, vcc_lo, v2
|
|
// CHECK: [0x6a,0x04,0xbe,0x7d]
|
|
|
|
v_cmpx_t_u32 vcc, vcc_hi, v2
|
|
// CHECK: [0x6b,0x04,0xbe,0x7d]
|
|
|
|
v_cmpx_t_u32 vcc, m0, v2
|
|
// CHECK: [0x7c,0x04,0xbe,0x7d]
|
|
|
|
v_cmpx_t_u32 vcc, exec_lo, v2
|
|
// CHECK: [0x7e,0x04,0xbe,0x7d]
|
|
|
|
v_cmpx_t_u32 vcc, exec_hi, v2
|
|
// CHECK: [0x7f,0x04,0xbe,0x7d]
|
|
|
|
v_cmpx_t_u32 vcc, 0, v2
|
|
// CHECK: [0x80,0x04,0xbe,0x7d]
|
|
|
|
v_cmpx_t_u32 vcc, -1, v2
|
|
// CHECK: [0xc1,0x04,0xbe,0x7d]
|
|
|
|
v_cmpx_t_u32 vcc, 0.5, v2
|
|
// CHECK: [0xf0,0x04,0xbe,0x7d]
|
|
|
|
v_cmpx_t_u32 vcc, -4.0, v2
|
|
// CHECK: [0xf7,0x04,0xbe,0x7d]
|
|
|
|
v_cmpx_t_u32 vcc, 0xaf123456, v2
|
|
// CHECK: [0xff,0x04,0xbe,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_t_u32 vcc, 0x3f717273, v2
|
|
// CHECK: [0xff,0x04,0xbe,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_t_u32 vcc, v1, v255
|
|
// CHECK: [0x01,0xff,0xbf,0x7d]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], v1, v2
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[12:13], v1, v2
|
|
// CHECK: [0x0c,0x00,0xdf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[100:101], v1, v2
|
|
// CHECK: [0x64,0x00,0xdf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 flat_scratch, v1, v2
|
|
// CHECK: [0x66,0x00,0xdf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 vcc, v1, v2
|
|
// CHECK: [0x6a,0x00,0xdf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 exec, v1, v2
|
|
// CHECK: [0x7e,0x00,0xdf,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], v255, v2
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0xff,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], s1, v2
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x01,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], s101, v2
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x65,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], flat_scratch_lo, v2
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], flat_scratch_hi, v2
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x67,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], vcc_lo, v2
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], vcc_hi, v2
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x6b,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], m0, v2
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x7c,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], exec_lo, v2
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], exec_hi, v2
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x7f,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], 0, v2
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], -1, v2
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], 0.5, v2
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], -4.0, v2
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], v1, v255
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x01,0xff,0x03,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], v1, s2
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x01,0x05,0x00,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], v1, s101
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x01,0xcb,0x00,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], v1, flat_scratch_lo
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], v1, flat_scratch_hi
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x01,0xcf,0x00,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], v1, vcc_lo
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], v1, vcc_hi
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x01,0xd7,0x00,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], v1, m0
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x01,0xf9,0x00,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], v1, exec_lo
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], v1, exec_hi
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x01,0xff,0x00,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], v1, 0
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], v1, -1
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], v1, 0.5
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_t_u32_e64 s[10:11], v1, -4.0
|
|
// CHECK: [0x0a,0x00,0xdf,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_f_i64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xc0,0x7d]
|
|
|
|
v_cmp_f_i64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xc0,0x7d]
|
|
|
|
v_cmp_f_i64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xc0,0x7d]
|
|
|
|
v_cmp_f_i64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xc0,0x7d]
|
|
|
|
v_cmp_f_i64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xc0,0x7d]
|
|
|
|
v_cmp_f_i64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xc0,0x7d]
|
|
|
|
v_cmp_f_i64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xc0,0x7d]
|
|
|
|
v_cmp_f_i64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xc0,0x7d]
|
|
|
|
v_cmp_f_i64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xc0,0x7d]
|
|
|
|
v_cmp_f_i64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xc0,0x7d]
|
|
|
|
v_cmp_f_i64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xc0,0x7d]
|
|
|
|
v_cmp_f_i64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xc0,0x7d]
|
|
|
|
v_cmp_f_i64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc0,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_f_i64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc0,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_f_i64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xc1,0x7d]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xe0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xe0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xe0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xe0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_f_i64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xe0,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_lt_i64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xc2,0x7d]
|
|
|
|
v_cmp_lt_i64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xc2,0x7d]
|
|
|
|
v_cmp_lt_i64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xc2,0x7d]
|
|
|
|
v_cmp_lt_i64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xc2,0x7d]
|
|
|
|
v_cmp_lt_i64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xc2,0x7d]
|
|
|
|
v_cmp_lt_i64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xc2,0x7d]
|
|
|
|
v_cmp_lt_i64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xc2,0x7d]
|
|
|
|
v_cmp_lt_i64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xc2,0x7d]
|
|
|
|
v_cmp_lt_i64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xc2,0x7d]
|
|
|
|
v_cmp_lt_i64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xc2,0x7d]
|
|
|
|
v_cmp_lt_i64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xc2,0x7d]
|
|
|
|
v_cmp_lt_i64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xc2,0x7d]
|
|
|
|
v_cmp_lt_i64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc2,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_lt_i64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc2,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_lt_i64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xc3,0x7d]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xe1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xe1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xe1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xe1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_lt_i64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xe1,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_eq_i64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xc4,0x7d]
|
|
|
|
v_cmp_eq_i64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xc4,0x7d]
|
|
|
|
v_cmp_eq_i64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xc4,0x7d]
|
|
|
|
v_cmp_eq_i64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xc4,0x7d]
|
|
|
|
v_cmp_eq_i64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xc4,0x7d]
|
|
|
|
v_cmp_eq_i64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xc4,0x7d]
|
|
|
|
v_cmp_eq_i64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xc4,0x7d]
|
|
|
|
v_cmp_eq_i64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xc4,0x7d]
|
|
|
|
v_cmp_eq_i64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xc4,0x7d]
|
|
|
|
v_cmp_eq_i64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xc4,0x7d]
|
|
|
|
v_cmp_eq_i64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xc4,0x7d]
|
|
|
|
v_cmp_eq_i64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xc4,0x7d]
|
|
|
|
v_cmp_eq_i64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc4,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_eq_i64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc4,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_eq_i64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xc5,0x7d]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xe2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xe2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xe2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xe2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_eq_i64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xe2,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_le_i64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xc6,0x7d]
|
|
|
|
v_cmp_le_i64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xc6,0x7d]
|
|
|
|
v_cmp_le_i64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xc6,0x7d]
|
|
|
|
v_cmp_le_i64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xc6,0x7d]
|
|
|
|
v_cmp_le_i64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xc6,0x7d]
|
|
|
|
v_cmp_le_i64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xc6,0x7d]
|
|
|
|
v_cmp_le_i64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xc6,0x7d]
|
|
|
|
v_cmp_le_i64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xc6,0x7d]
|
|
|
|
v_cmp_le_i64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xc6,0x7d]
|
|
|
|
v_cmp_le_i64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xc6,0x7d]
|
|
|
|
v_cmp_le_i64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xc6,0x7d]
|
|
|
|
v_cmp_le_i64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xc6,0x7d]
|
|
|
|
v_cmp_le_i64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc6,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_le_i64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc6,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_le_i64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xc7,0x7d]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xe3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xe3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xe3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xe3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_le_i64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xe3,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_gt_i64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xc8,0x7d]
|
|
|
|
v_cmp_gt_i64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xc8,0x7d]
|
|
|
|
v_cmp_gt_i64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xc8,0x7d]
|
|
|
|
v_cmp_gt_i64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xc8,0x7d]
|
|
|
|
v_cmp_gt_i64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xc8,0x7d]
|
|
|
|
v_cmp_gt_i64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xc8,0x7d]
|
|
|
|
v_cmp_gt_i64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xc8,0x7d]
|
|
|
|
v_cmp_gt_i64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xc8,0x7d]
|
|
|
|
v_cmp_gt_i64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xc8,0x7d]
|
|
|
|
v_cmp_gt_i64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xc8,0x7d]
|
|
|
|
v_cmp_gt_i64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xc8,0x7d]
|
|
|
|
v_cmp_gt_i64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xc8,0x7d]
|
|
|
|
v_cmp_gt_i64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc8,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_gt_i64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xc8,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_gt_i64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xc9,0x7d]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xe4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xe4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xe4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xe4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_gt_i64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xe4,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ne_i64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xca,0x7d]
|
|
|
|
v_cmp_ne_i64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xca,0x7d]
|
|
|
|
v_cmp_ne_i64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xca,0x7d]
|
|
|
|
v_cmp_ne_i64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xca,0x7d]
|
|
|
|
v_cmp_ne_i64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xca,0x7d]
|
|
|
|
v_cmp_ne_i64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xca,0x7d]
|
|
|
|
v_cmp_ne_i64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xca,0x7d]
|
|
|
|
v_cmp_ne_i64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xca,0x7d]
|
|
|
|
v_cmp_ne_i64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xca,0x7d]
|
|
|
|
v_cmp_ne_i64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xca,0x7d]
|
|
|
|
v_cmp_ne_i64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xca,0x7d]
|
|
|
|
v_cmp_ne_i64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xca,0x7d]
|
|
|
|
v_cmp_ne_i64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xca,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_ne_i64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xca,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_ne_i64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xcb,0x7d]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xe5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xe5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xe5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xe5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ne_i64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xe5,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ge_i64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xcc,0x7d]
|
|
|
|
v_cmp_ge_i64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xcc,0x7d]
|
|
|
|
v_cmp_ge_i64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xcc,0x7d]
|
|
|
|
v_cmp_ge_i64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xcc,0x7d]
|
|
|
|
v_cmp_ge_i64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xcc,0x7d]
|
|
|
|
v_cmp_ge_i64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xcc,0x7d]
|
|
|
|
v_cmp_ge_i64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xcc,0x7d]
|
|
|
|
v_cmp_ge_i64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xcc,0x7d]
|
|
|
|
v_cmp_ge_i64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xcc,0x7d]
|
|
|
|
v_cmp_ge_i64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xcc,0x7d]
|
|
|
|
v_cmp_ge_i64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xcc,0x7d]
|
|
|
|
v_cmp_ge_i64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xcc,0x7d]
|
|
|
|
v_cmp_ge_i64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xcc,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_ge_i64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xcc,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_ge_i64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xcd,0x7d]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xe6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xe6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xe6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xe6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ge_i64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xe6,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_t_i64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xce,0x7d]
|
|
|
|
v_cmp_t_i64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xce,0x7d]
|
|
|
|
v_cmp_t_i64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xce,0x7d]
|
|
|
|
v_cmp_t_i64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xce,0x7d]
|
|
|
|
v_cmp_t_i64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xce,0x7d]
|
|
|
|
v_cmp_t_i64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xce,0x7d]
|
|
|
|
v_cmp_t_i64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xce,0x7d]
|
|
|
|
v_cmp_t_i64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xce,0x7d]
|
|
|
|
v_cmp_t_i64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xce,0x7d]
|
|
|
|
v_cmp_t_i64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xce,0x7d]
|
|
|
|
v_cmp_t_i64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xce,0x7d]
|
|
|
|
v_cmp_t_i64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xce,0x7d]
|
|
|
|
v_cmp_t_i64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xce,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_t_i64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xce,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_t_i64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xcf,0x7d]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xe7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xe7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xe7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xe7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_t_i64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xe7,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_f_u64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xd0,0x7d]
|
|
|
|
v_cmp_f_u64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xd0,0x7d]
|
|
|
|
v_cmp_f_u64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xd0,0x7d]
|
|
|
|
v_cmp_f_u64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xd0,0x7d]
|
|
|
|
v_cmp_f_u64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xd0,0x7d]
|
|
|
|
v_cmp_f_u64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xd0,0x7d]
|
|
|
|
v_cmp_f_u64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xd0,0x7d]
|
|
|
|
v_cmp_f_u64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xd0,0x7d]
|
|
|
|
v_cmp_f_u64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xd0,0x7d]
|
|
|
|
v_cmp_f_u64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xd0,0x7d]
|
|
|
|
v_cmp_f_u64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xd0,0x7d]
|
|
|
|
v_cmp_f_u64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xd0,0x7d]
|
|
|
|
v_cmp_f_u64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd0,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_f_u64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd0,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_f_u64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xd1,0x7d]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xe8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xe8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xe8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xe8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_f_u64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xe8,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_lt_u64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xd2,0x7d]
|
|
|
|
v_cmp_lt_u64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xd2,0x7d]
|
|
|
|
v_cmp_lt_u64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xd2,0x7d]
|
|
|
|
v_cmp_lt_u64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xd2,0x7d]
|
|
|
|
v_cmp_lt_u64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xd2,0x7d]
|
|
|
|
v_cmp_lt_u64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xd2,0x7d]
|
|
|
|
v_cmp_lt_u64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xd2,0x7d]
|
|
|
|
v_cmp_lt_u64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xd2,0x7d]
|
|
|
|
v_cmp_lt_u64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xd2,0x7d]
|
|
|
|
v_cmp_lt_u64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xd2,0x7d]
|
|
|
|
v_cmp_lt_u64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xd2,0x7d]
|
|
|
|
v_cmp_lt_u64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xd2,0x7d]
|
|
|
|
v_cmp_lt_u64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd2,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_lt_u64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd2,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_lt_u64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xd3,0x7d]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xe9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xe9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xe9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xe9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_lt_u64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xe9,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_eq_u64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xd4,0x7d]
|
|
|
|
v_cmp_eq_u64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xd4,0x7d]
|
|
|
|
v_cmp_eq_u64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xd4,0x7d]
|
|
|
|
v_cmp_eq_u64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xd4,0x7d]
|
|
|
|
v_cmp_eq_u64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xd4,0x7d]
|
|
|
|
v_cmp_eq_u64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xd4,0x7d]
|
|
|
|
v_cmp_eq_u64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xd4,0x7d]
|
|
|
|
v_cmp_eq_u64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xd4,0x7d]
|
|
|
|
v_cmp_eq_u64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xd4,0x7d]
|
|
|
|
v_cmp_eq_u64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xd4,0x7d]
|
|
|
|
v_cmp_eq_u64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xd4,0x7d]
|
|
|
|
v_cmp_eq_u64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xd4,0x7d]
|
|
|
|
v_cmp_eq_u64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd4,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_eq_u64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd4,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_eq_u64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xd5,0x7d]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xea,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xea,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xea,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xea,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_eq_u64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xea,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_le_u64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xd6,0x7d]
|
|
|
|
v_cmp_le_u64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xd6,0x7d]
|
|
|
|
v_cmp_le_u64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xd6,0x7d]
|
|
|
|
v_cmp_le_u64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xd6,0x7d]
|
|
|
|
v_cmp_le_u64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xd6,0x7d]
|
|
|
|
v_cmp_le_u64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xd6,0x7d]
|
|
|
|
v_cmp_le_u64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xd6,0x7d]
|
|
|
|
v_cmp_le_u64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xd6,0x7d]
|
|
|
|
v_cmp_le_u64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xd6,0x7d]
|
|
|
|
v_cmp_le_u64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xd6,0x7d]
|
|
|
|
v_cmp_le_u64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xd6,0x7d]
|
|
|
|
v_cmp_le_u64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xd6,0x7d]
|
|
|
|
v_cmp_le_u64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd6,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_le_u64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd6,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_le_u64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xd7,0x7d]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xeb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xeb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xeb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xeb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_le_u64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xeb,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_gt_u64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xd8,0x7d]
|
|
|
|
v_cmp_gt_u64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xd8,0x7d]
|
|
|
|
v_cmp_gt_u64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xd8,0x7d]
|
|
|
|
v_cmp_gt_u64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xd8,0x7d]
|
|
|
|
v_cmp_gt_u64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xd8,0x7d]
|
|
|
|
v_cmp_gt_u64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xd8,0x7d]
|
|
|
|
v_cmp_gt_u64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xd8,0x7d]
|
|
|
|
v_cmp_gt_u64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xd8,0x7d]
|
|
|
|
v_cmp_gt_u64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xd8,0x7d]
|
|
|
|
v_cmp_gt_u64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xd8,0x7d]
|
|
|
|
v_cmp_gt_u64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xd8,0x7d]
|
|
|
|
v_cmp_gt_u64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xd8,0x7d]
|
|
|
|
v_cmp_gt_u64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd8,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_gt_u64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xd8,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_gt_u64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xd9,0x7d]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xec,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xec,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xec,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xec,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_gt_u64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xec,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ne_u64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xda,0x7d]
|
|
|
|
v_cmp_ne_u64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xda,0x7d]
|
|
|
|
v_cmp_ne_u64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xda,0x7d]
|
|
|
|
v_cmp_ne_u64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xda,0x7d]
|
|
|
|
v_cmp_ne_u64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xda,0x7d]
|
|
|
|
v_cmp_ne_u64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xda,0x7d]
|
|
|
|
v_cmp_ne_u64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xda,0x7d]
|
|
|
|
v_cmp_ne_u64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xda,0x7d]
|
|
|
|
v_cmp_ne_u64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xda,0x7d]
|
|
|
|
v_cmp_ne_u64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xda,0x7d]
|
|
|
|
v_cmp_ne_u64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xda,0x7d]
|
|
|
|
v_cmp_ne_u64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xda,0x7d]
|
|
|
|
v_cmp_ne_u64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xda,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_ne_u64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xda,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_ne_u64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xdb,0x7d]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xed,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xed,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xed,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xed,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ne_u64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xed,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_ge_u64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xdc,0x7d]
|
|
|
|
v_cmp_ge_u64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xdc,0x7d]
|
|
|
|
v_cmp_ge_u64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xdc,0x7d]
|
|
|
|
v_cmp_ge_u64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xdc,0x7d]
|
|
|
|
v_cmp_ge_u64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xdc,0x7d]
|
|
|
|
v_cmp_ge_u64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xdc,0x7d]
|
|
|
|
v_cmp_ge_u64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xdc,0x7d]
|
|
|
|
v_cmp_ge_u64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xdc,0x7d]
|
|
|
|
v_cmp_ge_u64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xdc,0x7d]
|
|
|
|
v_cmp_ge_u64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xdc,0x7d]
|
|
|
|
v_cmp_ge_u64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xdc,0x7d]
|
|
|
|
v_cmp_ge_u64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xdc,0x7d]
|
|
|
|
v_cmp_ge_u64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xdc,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_ge_u64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xdc,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_ge_u64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xdd,0x7d]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xee,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xee,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xee,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xee,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_ge_u64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xee,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmp_t_u64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xde,0x7d]
|
|
|
|
v_cmp_t_u64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xde,0x7d]
|
|
|
|
v_cmp_t_u64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xde,0x7d]
|
|
|
|
v_cmp_t_u64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xde,0x7d]
|
|
|
|
v_cmp_t_u64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xde,0x7d]
|
|
|
|
v_cmp_t_u64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xde,0x7d]
|
|
|
|
v_cmp_t_u64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xde,0x7d]
|
|
|
|
v_cmp_t_u64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xde,0x7d]
|
|
|
|
v_cmp_t_u64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xde,0x7d]
|
|
|
|
v_cmp_t_u64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xde,0x7d]
|
|
|
|
v_cmp_t_u64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xde,0x7d]
|
|
|
|
v_cmp_t_u64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xde,0x7d]
|
|
|
|
v_cmp_t_u64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xde,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmp_t_u64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xde,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmp_t_u64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xdf,0x7d]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xef,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xef,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xef,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xef,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmp_t_u64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xef,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_f_i64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xe0,0x7d]
|
|
|
|
v_cmpx_f_i64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xe0,0x7d]
|
|
|
|
v_cmpx_f_i64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xe0,0x7d]
|
|
|
|
v_cmpx_f_i64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xe0,0x7d]
|
|
|
|
v_cmpx_f_i64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xe0,0x7d]
|
|
|
|
v_cmpx_f_i64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xe0,0x7d]
|
|
|
|
v_cmpx_f_i64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xe0,0x7d]
|
|
|
|
v_cmpx_f_i64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xe0,0x7d]
|
|
|
|
v_cmpx_f_i64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xe0,0x7d]
|
|
|
|
v_cmpx_f_i64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xe0,0x7d]
|
|
|
|
v_cmpx_f_i64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xe0,0x7d]
|
|
|
|
v_cmpx_f_i64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xe0,0x7d]
|
|
|
|
v_cmpx_f_i64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe0,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_f_i64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe0,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_f_i64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xe1,0x7d]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xf0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xf0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xf0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xf0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0xf0,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_f_i64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xf0,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_lt_i64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xe2,0x7d]
|
|
|
|
v_cmpx_lt_i64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xe2,0x7d]
|
|
|
|
v_cmpx_lt_i64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xe2,0x7d]
|
|
|
|
v_cmpx_lt_i64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xe2,0x7d]
|
|
|
|
v_cmpx_lt_i64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xe2,0x7d]
|
|
|
|
v_cmpx_lt_i64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xe2,0x7d]
|
|
|
|
v_cmpx_lt_i64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xe2,0x7d]
|
|
|
|
v_cmpx_lt_i64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xe2,0x7d]
|
|
|
|
v_cmpx_lt_i64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xe2,0x7d]
|
|
|
|
v_cmpx_lt_i64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xe2,0x7d]
|
|
|
|
v_cmpx_lt_i64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xe2,0x7d]
|
|
|
|
v_cmpx_lt_i64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xe2,0x7d]
|
|
|
|
v_cmpx_lt_i64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe2,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_lt_i64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe2,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_lt_i64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xe3,0x7d]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xf1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xf1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xf1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xf1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0xf1,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_lt_i64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xf1,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_eq_i64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xe4,0x7d]
|
|
|
|
v_cmpx_eq_i64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xe4,0x7d]
|
|
|
|
v_cmpx_eq_i64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xe4,0x7d]
|
|
|
|
v_cmpx_eq_i64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xe4,0x7d]
|
|
|
|
v_cmpx_eq_i64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xe4,0x7d]
|
|
|
|
v_cmpx_eq_i64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xe4,0x7d]
|
|
|
|
v_cmpx_eq_i64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xe4,0x7d]
|
|
|
|
v_cmpx_eq_i64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xe4,0x7d]
|
|
|
|
v_cmpx_eq_i64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xe4,0x7d]
|
|
|
|
v_cmpx_eq_i64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xe4,0x7d]
|
|
|
|
v_cmpx_eq_i64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xe4,0x7d]
|
|
|
|
v_cmpx_eq_i64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xe4,0x7d]
|
|
|
|
v_cmpx_eq_i64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe4,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_eq_i64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe4,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_eq_i64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xe5,0x7d]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xf2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xf2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xf2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xf2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0xf2,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_eq_i64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xf2,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_le_i64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xe6,0x7d]
|
|
|
|
v_cmpx_le_i64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xe6,0x7d]
|
|
|
|
v_cmpx_le_i64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xe6,0x7d]
|
|
|
|
v_cmpx_le_i64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xe6,0x7d]
|
|
|
|
v_cmpx_le_i64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xe6,0x7d]
|
|
|
|
v_cmpx_le_i64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xe6,0x7d]
|
|
|
|
v_cmpx_le_i64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xe6,0x7d]
|
|
|
|
v_cmpx_le_i64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xe6,0x7d]
|
|
|
|
v_cmpx_le_i64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xe6,0x7d]
|
|
|
|
v_cmpx_le_i64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xe6,0x7d]
|
|
|
|
v_cmpx_le_i64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xe6,0x7d]
|
|
|
|
v_cmpx_le_i64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xe6,0x7d]
|
|
|
|
v_cmpx_le_i64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe6,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_le_i64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe6,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_le_i64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xe7,0x7d]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xf3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xf3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xf3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xf3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0xf3,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_le_i64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xf3,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_gt_i64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xe8,0x7d]
|
|
|
|
v_cmpx_gt_i64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xe8,0x7d]
|
|
|
|
v_cmpx_gt_i64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xe8,0x7d]
|
|
|
|
v_cmpx_gt_i64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xe8,0x7d]
|
|
|
|
v_cmpx_gt_i64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xe8,0x7d]
|
|
|
|
v_cmpx_gt_i64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xe8,0x7d]
|
|
|
|
v_cmpx_gt_i64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xe8,0x7d]
|
|
|
|
v_cmpx_gt_i64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xe8,0x7d]
|
|
|
|
v_cmpx_gt_i64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xe8,0x7d]
|
|
|
|
v_cmpx_gt_i64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xe8,0x7d]
|
|
|
|
v_cmpx_gt_i64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xe8,0x7d]
|
|
|
|
v_cmpx_gt_i64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xe8,0x7d]
|
|
|
|
v_cmpx_gt_i64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe8,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_gt_i64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xe8,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_gt_i64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xe9,0x7d]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xf4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xf4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xf4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xf4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0xf4,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_gt_i64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xf4,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ne_i64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xea,0x7d]
|
|
|
|
v_cmpx_ne_i64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xea,0x7d]
|
|
|
|
v_cmpx_ne_i64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xea,0x7d]
|
|
|
|
v_cmpx_ne_i64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xea,0x7d]
|
|
|
|
v_cmpx_ne_i64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xea,0x7d]
|
|
|
|
v_cmpx_ne_i64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xea,0x7d]
|
|
|
|
v_cmpx_ne_i64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xea,0x7d]
|
|
|
|
v_cmpx_ne_i64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xea,0x7d]
|
|
|
|
v_cmpx_ne_i64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xea,0x7d]
|
|
|
|
v_cmpx_ne_i64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xea,0x7d]
|
|
|
|
v_cmpx_ne_i64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xea,0x7d]
|
|
|
|
v_cmpx_ne_i64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xea,0x7d]
|
|
|
|
v_cmpx_ne_i64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xea,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_ne_i64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xea,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_ne_i64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xeb,0x7d]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xf5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xf5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xf5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xf5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0xf5,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ne_i64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xf5,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ge_i64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xec,0x7d]
|
|
|
|
v_cmpx_ge_i64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xec,0x7d]
|
|
|
|
v_cmpx_ge_i64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xec,0x7d]
|
|
|
|
v_cmpx_ge_i64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xec,0x7d]
|
|
|
|
v_cmpx_ge_i64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xec,0x7d]
|
|
|
|
v_cmpx_ge_i64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xec,0x7d]
|
|
|
|
v_cmpx_ge_i64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xec,0x7d]
|
|
|
|
v_cmpx_ge_i64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xec,0x7d]
|
|
|
|
v_cmpx_ge_i64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xec,0x7d]
|
|
|
|
v_cmpx_ge_i64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xec,0x7d]
|
|
|
|
v_cmpx_ge_i64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xec,0x7d]
|
|
|
|
v_cmpx_ge_i64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xec,0x7d]
|
|
|
|
v_cmpx_ge_i64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xec,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_ge_i64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xec,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_ge_i64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xed,0x7d]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xf6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xf6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xf6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xf6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0xf6,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ge_i64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xf6,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_t_i64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xee,0x7d]
|
|
|
|
v_cmpx_t_i64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xee,0x7d]
|
|
|
|
v_cmpx_t_i64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xee,0x7d]
|
|
|
|
v_cmpx_t_i64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xee,0x7d]
|
|
|
|
v_cmpx_t_i64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xee,0x7d]
|
|
|
|
v_cmpx_t_i64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xee,0x7d]
|
|
|
|
v_cmpx_t_i64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xee,0x7d]
|
|
|
|
v_cmpx_t_i64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xee,0x7d]
|
|
|
|
v_cmpx_t_i64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xee,0x7d]
|
|
|
|
v_cmpx_t_i64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xee,0x7d]
|
|
|
|
v_cmpx_t_i64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xee,0x7d]
|
|
|
|
v_cmpx_t_i64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xee,0x7d]
|
|
|
|
v_cmpx_t_i64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xee,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_t_i64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xee,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_t_i64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xef,0x7d]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xf7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xf7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xf7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xf7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0xf7,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_t_i64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xf7,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_f_u64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xf0,0x7d]
|
|
|
|
v_cmpx_f_u64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xf0,0x7d]
|
|
|
|
v_cmpx_f_u64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xf0,0x7d]
|
|
|
|
v_cmpx_f_u64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xf0,0x7d]
|
|
|
|
v_cmpx_f_u64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xf0,0x7d]
|
|
|
|
v_cmpx_f_u64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xf0,0x7d]
|
|
|
|
v_cmpx_f_u64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xf0,0x7d]
|
|
|
|
v_cmpx_f_u64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xf0,0x7d]
|
|
|
|
v_cmpx_f_u64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xf0,0x7d]
|
|
|
|
v_cmpx_f_u64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xf0,0x7d]
|
|
|
|
v_cmpx_f_u64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xf0,0x7d]
|
|
|
|
v_cmpx_f_u64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xf0,0x7d]
|
|
|
|
v_cmpx_f_u64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf0,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_f_u64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf0,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_f_u64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xf1,0x7d]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xf8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xf8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xf8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xf8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0xf8,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_f_u64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xf8,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_lt_u64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xf2,0x7d]
|
|
|
|
v_cmpx_lt_u64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xf2,0x7d]
|
|
|
|
v_cmpx_lt_u64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xf2,0x7d]
|
|
|
|
v_cmpx_lt_u64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xf2,0x7d]
|
|
|
|
v_cmpx_lt_u64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xf2,0x7d]
|
|
|
|
v_cmpx_lt_u64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xf2,0x7d]
|
|
|
|
v_cmpx_lt_u64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xf2,0x7d]
|
|
|
|
v_cmpx_lt_u64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xf2,0x7d]
|
|
|
|
v_cmpx_lt_u64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xf2,0x7d]
|
|
|
|
v_cmpx_lt_u64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xf2,0x7d]
|
|
|
|
v_cmpx_lt_u64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xf2,0x7d]
|
|
|
|
v_cmpx_lt_u64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xf2,0x7d]
|
|
|
|
v_cmpx_lt_u64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf2,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_lt_u64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf2,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_lt_u64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xf3,0x7d]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xf9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xf9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xf9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xf9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0xf9,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_lt_u64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xf9,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_eq_u64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xf4,0x7d]
|
|
|
|
v_cmpx_eq_u64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xf4,0x7d]
|
|
|
|
v_cmpx_eq_u64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xf4,0x7d]
|
|
|
|
v_cmpx_eq_u64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xf4,0x7d]
|
|
|
|
v_cmpx_eq_u64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xf4,0x7d]
|
|
|
|
v_cmpx_eq_u64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xf4,0x7d]
|
|
|
|
v_cmpx_eq_u64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xf4,0x7d]
|
|
|
|
v_cmpx_eq_u64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xf4,0x7d]
|
|
|
|
v_cmpx_eq_u64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xf4,0x7d]
|
|
|
|
v_cmpx_eq_u64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xf4,0x7d]
|
|
|
|
v_cmpx_eq_u64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xf4,0x7d]
|
|
|
|
v_cmpx_eq_u64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xf4,0x7d]
|
|
|
|
v_cmpx_eq_u64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf4,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_eq_u64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf4,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_eq_u64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xf5,0x7d]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xfa,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xfa,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xfa,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xfa,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0xfa,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_eq_u64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xfa,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_le_u64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xf6,0x7d]
|
|
|
|
v_cmpx_le_u64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xf6,0x7d]
|
|
|
|
v_cmpx_le_u64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xf6,0x7d]
|
|
|
|
v_cmpx_le_u64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xf6,0x7d]
|
|
|
|
v_cmpx_le_u64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xf6,0x7d]
|
|
|
|
v_cmpx_le_u64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xf6,0x7d]
|
|
|
|
v_cmpx_le_u64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xf6,0x7d]
|
|
|
|
v_cmpx_le_u64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xf6,0x7d]
|
|
|
|
v_cmpx_le_u64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xf6,0x7d]
|
|
|
|
v_cmpx_le_u64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xf6,0x7d]
|
|
|
|
v_cmpx_le_u64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xf6,0x7d]
|
|
|
|
v_cmpx_le_u64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xf6,0x7d]
|
|
|
|
v_cmpx_le_u64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf6,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_le_u64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf6,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_le_u64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xf7,0x7d]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xfb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xfb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xfb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xfb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0xfb,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_le_u64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xfb,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_gt_u64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xf8,0x7d]
|
|
|
|
v_cmpx_gt_u64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xf8,0x7d]
|
|
|
|
v_cmpx_gt_u64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xf8,0x7d]
|
|
|
|
v_cmpx_gt_u64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xf8,0x7d]
|
|
|
|
v_cmpx_gt_u64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xf8,0x7d]
|
|
|
|
v_cmpx_gt_u64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xf8,0x7d]
|
|
|
|
v_cmpx_gt_u64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xf8,0x7d]
|
|
|
|
v_cmpx_gt_u64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xf8,0x7d]
|
|
|
|
v_cmpx_gt_u64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xf8,0x7d]
|
|
|
|
v_cmpx_gt_u64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xf8,0x7d]
|
|
|
|
v_cmpx_gt_u64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xf8,0x7d]
|
|
|
|
v_cmpx_gt_u64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xf8,0x7d]
|
|
|
|
v_cmpx_gt_u64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf8,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_gt_u64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xf8,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_gt_u64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xf9,0x7d]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xfc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xfc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xfc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xfc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0xfc,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_gt_u64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xfc,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ne_u64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xfa,0x7d]
|
|
|
|
v_cmpx_ne_u64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xfa,0x7d]
|
|
|
|
v_cmpx_ne_u64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xfa,0x7d]
|
|
|
|
v_cmpx_ne_u64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xfa,0x7d]
|
|
|
|
v_cmpx_ne_u64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xfa,0x7d]
|
|
|
|
v_cmpx_ne_u64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xfa,0x7d]
|
|
|
|
v_cmpx_ne_u64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xfa,0x7d]
|
|
|
|
v_cmpx_ne_u64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xfa,0x7d]
|
|
|
|
v_cmpx_ne_u64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xfa,0x7d]
|
|
|
|
v_cmpx_ne_u64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xfa,0x7d]
|
|
|
|
v_cmpx_ne_u64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xfa,0x7d]
|
|
|
|
v_cmpx_ne_u64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xfa,0x7d]
|
|
|
|
v_cmpx_ne_u64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xfa,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_ne_u64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xfa,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_ne_u64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xfb,0x7d]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xfd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xfd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xfd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xfd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0xfd,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ne_u64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xfd,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_ge_u64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xfc,0x7d]
|
|
|
|
v_cmpx_ge_u64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xfc,0x7d]
|
|
|
|
v_cmpx_ge_u64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xfc,0x7d]
|
|
|
|
v_cmpx_ge_u64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xfc,0x7d]
|
|
|
|
v_cmpx_ge_u64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xfc,0x7d]
|
|
|
|
v_cmpx_ge_u64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xfc,0x7d]
|
|
|
|
v_cmpx_ge_u64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xfc,0x7d]
|
|
|
|
v_cmpx_ge_u64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xfc,0x7d]
|
|
|
|
v_cmpx_ge_u64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xfc,0x7d]
|
|
|
|
v_cmpx_ge_u64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xfc,0x7d]
|
|
|
|
v_cmpx_ge_u64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xfc,0x7d]
|
|
|
|
v_cmpx_ge_u64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xfc,0x7d]
|
|
|
|
v_cmpx_ge_u64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xfc,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_ge_u64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xfc,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_ge_u64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xfd,0x7d]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xfe,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xfe,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xfe,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xfe,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0xfe,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_ge_u64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xfe,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_cmpx_t_u64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x01,0x05,0xfe,0x7d]
|
|
|
|
v_cmpx_t_u64 vcc, v[254:255], v[2:3]
|
|
// CHECK: [0xfe,0x05,0xfe,0x7d]
|
|
|
|
v_cmpx_t_u64 vcc, s[2:3], v[2:3]
|
|
// CHECK: [0x02,0x04,0xfe,0x7d]
|
|
|
|
v_cmpx_t_u64 vcc, s[4:5], v[2:3]
|
|
// CHECK: [0x04,0x04,0xfe,0x7d]
|
|
|
|
v_cmpx_t_u64 vcc, s[100:101], v[2:3]
|
|
// CHECK: [0x64,0x04,0xfe,0x7d]
|
|
|
|
v_cmpx_t_u64 vcc, flat_scratch, v[2:3]
|
|
// CHECK: [0x66,0x04,0xfe,0x7d]
|
|
|
|
v_cmpx_t_u64 vcc, vcc, v[2:3]
|
|
// CHECK: [0x6a,0x04,0xfe,0x7d]
|
|
|
|
v_cmpx_t_u64 vcc, exec, v[2:3]
|
|
// CHECK: [0x7e,0x04,0xfe,0x7d]
|
|
|
|
v_cmpx_t_u64 vcc, 0, v[2:3]
|
|
// CHECK: [0x80,0x04,0xfe,0x7d]
|
|
|
|
v_cmpx_t_u64 vcc, -1, v[2:3]
|
|
// CHECK: [0xc1,0x04,0xfe,0x7d]
|
|
|
|
v_cmpx_t_u64 vcc, 0.5, v[2:3]
|
|
// CHECK: [0xf0,0x04,0xfe,0x7d]
|
|
|
|
v_cmpx_t_u64 vcc, -4.0, v[2:3]
|
|
// CHECK: [0xf7,0x04,0xfe,0x7d]
|
|
|
|
v_cmpx_t_u64 vcc, 0xaf123456, v[2:3]
|
|
// CHECK: [0xff,0x04,0xfe,0x7d,0x56,0x34,0x12,0xaf]
|
|
|
|
v_cmpx_t_u64 vcc, 0x3f717273, v[2:3]
|
|
// CHECK: [0xff,0x04,0xfe,0x7d,0x73,0x72,0x71,0x3f]
|
|
|
|
v_cmpx_t_u64 vcc, v[1:2], v[254:255]
|
|
// CHECK: [0x01,0xfd,0xff,0x7d]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], v[1:2], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[12:13], v[1:2], v[2:3]
|
|
// CHECK: [0x0c,0x00,0xff,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[100:101], v[1:2], v[2:3]
|
|
// CHECK: [0x64,0x00,0xff,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 flat_scratch, v[1:2], v[2:3]
|
|
// CHECK: [0x66,0x00,0xff,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 vcc, v[1:2], v[2:3]
|
|
// CHECK: [0x6a,0x00,0xff,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 exec, v[1:2], v[2:3]
|
|
// CHECK: [0x7e,0x00,0xff,0xd0,0x01,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], v[254:255], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0xfe,0x05,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], s[2:3], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x02,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], s[4:5], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x04,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], s[100:101], v[2:3]
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x64,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], flat_scratch, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x66,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], vcc, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x6a,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], exec, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x7e,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], 0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x80,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], -1, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0xc1,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], 0.5, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0xf0,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], -4.0, v[2:3]
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0xf7,0x04,0x02,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], v[1:2], v[254:255]
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x01,0xfd,0x03,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], v[1:2], s[4:5]
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x01,0x09,0x00,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], v[1:2], s[6:7]
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x01,0x0d,0x00,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], v[1:2], s[100:101]
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x01,0xc9,0x00,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], v[1:2], flat_scratch
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x01,0xcd,0x00,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], v[1:2], vcc
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x01,0xd5,0x00,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], v[1:2], exec
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x01,0xfd,0x00,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], v[1:2], 0
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x01,0x01,0x01,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], v[1:2], -1
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x01,0x83,0x01,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], v[1:2], 0.5
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x01,0xe1,0x01,0x00]
|
|
|
|
v_cmpx_t_u64_e64 s[10:11], v[1:2], -4.0
|
|
// CHECK: [0x0a,0x00,0xff,0xd0,0x01,0xef,0x01,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_mov_b32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_mov_b32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_mov_b32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_mov_b32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_mov_b32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_mov_b32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_mov_b32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_mov_b32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_mov_b32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_mov_b32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_mov_b32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_mov_b32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_mov_b32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_mov_b32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_mov_b32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x0e,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mov_b32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mov_b32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cvt_f32_i32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x0e,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cvt_f32_u32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x0e,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_cvt_u32_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_cvt_u32_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_i32_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x10,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_i32_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x10,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_i32_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_i32_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x10,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_i32_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x10,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_i32_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x10,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_i32_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x10,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_i32_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x6b,0x06,0x86,0x00]
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v_cvt_i32_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x7c,0x06,0x86,0x00]
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v_cvt_i32_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x7e,0x06,0x86,0x00]
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v_cvt_i32_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x7f,0x06,0x86,0x00]
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v_cvt_i32_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x80,0x06,0x86,0x00]
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v_cvt_i32_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0xc1,0x06,0x86,0x00]
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v_cvt_i32_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0xf0,0x06,0x86,0x00]
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v_cvt_i32_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0xf7,0x06,0x86,0x00]
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v_cvt_i32_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x26,0x06,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x06,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x00,0x06,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x01,0x06,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x02,0x06,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x03,0x06,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x04,0x06,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x05,0x06,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x0e,0x06,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x16,0x06,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x16,0x06,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x06,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x00,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x01,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x02,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x03,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x04,0x00]
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v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x05,0x00]
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v_cvt_i32_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x16,0x00]
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v_cvt_i32_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x26,0x00]
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v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0x00]
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v_cvt_i32_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0xfe,0x7f,0x01,0xe4,0x00,0x00]
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v_cvt_i32_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0xff,0xe4,0x00,0x00]
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v_cvt_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x1b,0x00,0x00]
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v_cvt_i32_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x40,0x01,0x00]
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v_cvt_i32_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x41,0x01,0x00]
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v_cvt_i32_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x42,0x01,0x00]
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v_cvt_i32_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x43,0x01,0x00]
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v_cvt_i32_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x30,0x01,0x00]
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v_cvt_i32_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x34,0x01,0x00]
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v_cvt_i32_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x38,0x01,0x00]
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v_cvt_i32_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x3c,0x01,0x00]
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v_cvt_i32_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x01,0x01,0x00]
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v_cvt_i32_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x0f,0x01,0x00]
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v_cvt_i32_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x11,0x01,0x00]
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v_cvt_i32_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x1f,0x01,0x00]
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v_cvt_i32_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x21,0x01,0x00]
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v_cvt_i32_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x2f,0x01,0x00]
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v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0x10]
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v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0x30]
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v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
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v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
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v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0x01]
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v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0x03]
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v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
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v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
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v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x08,0x00]
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v_cvt_i32_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x10,0x00]
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v_cvt_i32_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x20,0x00]
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v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x06,0x00]
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v_mov_fed_b32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0xfe,0x7f,0x01,0x06,0x06,0x00]
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v_mov_fed_b32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0xff,0x06,0x06,0x00]
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v_mov_fed_b32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x86,0x00]
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v_mov_fed_b32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x65,0x06,0x86,0x00]
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v_mov_fed_b32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x66,0x06,0x86,0x00]
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v_mov_fed_b32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x67,0x06,0x86,0x00]
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v_mov_fed_b32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x6a,0x06,0x86,0x00]
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v_mov_fed_b32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x6b,0x06,0x86,0x00]
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v_mov_fed_b32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x7c,0x06,0x86,0x00]
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v_mov_fed_b32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x7e,0x06,0x86,0x00]
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v_mov_fed_b32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x7f,0x06,0x86,0x00]
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v_mov_fed_b32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x80,0x06,0x86,0x00]
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v_mov_fed_b32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0xc1,0x06,0x86,0x00]
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v_mov_fed_b32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0xf0,0x06,0x86,0x00]
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v_mov_fed_b32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0xf7,0x06,0x86,0x00]
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v_mov_fed_b32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x06,0x00]
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v_mov_fed_b32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x00,0x06,0x00]
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v_mov_fed_b32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x01,0x06,0x00]
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v_mov_fed_b32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x02,0x06,0x00]
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v_mov_fed_b32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x03,0x06,0x00]
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v_mov_fed_b32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x04,0x06,0x00]
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v_mov_fed_b32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x05,0x06,0x00]
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v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
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// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x0e,0x06,0x00]
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v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
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|
// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_mov_fed_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_mov_fed_b32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x12,0x0a,0x7e,0x01,0x06,0x0e,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mov_fed_b32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mov_fed_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x12,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_cvt_f16_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_cvt_f16_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_cvt_f32_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_cvt_f32_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_cvt_rpi_i32_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_cvt_flr_i32_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_cvt_flr_i32_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cvt_off_f32_i4_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x0e,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cvt_f32_ubyte0_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x0e,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cvt_f32_ubyte1_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x0e,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cvt_f32_ubyte2_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x0e,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cvt_f32_ubyte3_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x0e,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_fract_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_fract_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_fract_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_fract_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_fract_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_fract_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_fract_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_fract_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_fract_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_fract_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_fract_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_fract_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_fract_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_fract_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_fract_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_fract_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_fract_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_fract_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_trunc_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_trunc_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_trunc_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_trunc_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_ceil_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ceil_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_ceil_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_ceil_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_rndne_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_rndne_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_rndne_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_rndne_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_floor_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_floor_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_floor_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_floor_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_floor_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_floor_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_floor_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_floor_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_floor_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_floor_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_floor_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_floor_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_floor_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_floor_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_floor_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_floor_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_floor_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_floor_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_exp_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x40,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_exp_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x40,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_exp_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_exp_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x40,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_exp_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x40,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_exp_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x40,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_exp_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x6a,0x06,0x86,0x00]
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v_exp_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x6b,0x06,0x86,0x00]
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v_exp_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x7c,0x06,0x86,0x00]
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v_exp_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x7e,0x06,0x86,0x00]
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v_exp_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x7f,0x06,0x86,0x00]
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v_exp_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x80,0x06,0x86,0x00]
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v_exp_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0xc1,0x06,0x86,0x00]
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v_exp_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0xf0,0x06,0x86,0x00]
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v_exp_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0xf7,0x06,0x86,0x00]
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v_exp_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x26,0x06,0x00]
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v_exp_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x46,0x06,0x00]
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v_exp_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x86,0x06,0x00]
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v_exp_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0xc6,0x06,0x00]
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v_exp_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x06,0x00]
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v_exp_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x00,0x06,0x00]
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v_exp_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x01,0x06,0x00]
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v_exp_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x02,0x06,0x00]
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v_exp_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x03,0x06,0x00]
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v_exp_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x04,0x06,0x00]
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v_exp_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x05,0x06,0x00]
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v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x0e,0x06,0x00]
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v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x16,0x06,0x00]
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v_exp_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
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|
// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x16,0x06,0x00]
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v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
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|
// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x06,0x00]
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v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
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// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x00,0x00]
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v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
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|
// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x01,0x00]
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v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
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|
// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x02,0x00]
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v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
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|
// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x03,0x00]
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v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
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|
// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x04,0x00]
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|
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v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
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|
// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x05,0x00]
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|
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v_exp_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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|
// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x16,0x00]
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|
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v_exp_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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|
// CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x26,0x00]
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|
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v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0x00]
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v_exp_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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|
// CHECK: [0xfa,0x40,0xfe,0x7f,0x01,0xe4,0x00,0x00]
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|
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v_exp_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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|
// CHECK: [0xfa,0x40,0x0a,0x7e,0xff,0xe4,0x00,0x00]
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v_exp_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
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|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x1b,0x00,0x00]
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|
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v_exp_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
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|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x40,0x01,0x00]
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v_exp_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
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|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x41,0x01,0x00]
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|
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v_exp_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
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|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x42,0x01,0x00]
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v_exp_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
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|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x43,0x01,0x00]
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v_exp_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x30,0x01,0x00]
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v_exp_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x34,0x01,0x00]
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v_exp_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
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|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x38,0x01,0x00]
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v_exp_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x3c,0x01,0x00]
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v_exp_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x01,0x01,0x00]
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v_exp_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x0f,0x01,0x00]
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v_exp_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
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|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x11,0x01,0x00]
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v_exp_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
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|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x1f,0x01,0x00]
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v_exp_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x21,0x01,0x00]
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v_exp_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x2f,0x01,0x00]
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v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
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|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0x10]
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v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
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|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0x30]
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v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
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|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
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v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
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|
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v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
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|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0x01]
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v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
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|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0x03]
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|
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v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
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|
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v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
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|
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v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
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|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x08,0x00]
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v_exp_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x10,0x00]
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v_exp_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x20,0x00]
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|
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v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x06,0x00]
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v_log_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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|
// CHECK: [0xf9,0x42,0xfe,0x7f,0x01,0x06,0x06,0x00]
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|
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v_log_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0xff,0x06,0x06,0x00]
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|
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v_log_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x86,0x00]
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|
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v_log_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x65,0x06,0x86,0x00]
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v_log_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x66,0x06,0x86,0x00]
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v_log_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x67,0x06,0x86,0x00]
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|
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v_log_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x6a,0x06,0x86,0x00]
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|
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v_log_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x6b,0x06,0x86,0x00]
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|
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v_log_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x7c,0x06,0x86,0x00]
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|
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|
v_log_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
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|
v_log_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
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|
v_log_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
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|
v_log_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_log_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_log_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_log_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_log_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_log_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_log_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_log_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_log_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_rcp_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_rcp_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_rcp_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_rcp_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_rcp_iflag_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_rcp_iflag_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_rsq_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_rsq_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_rsq_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_rsq_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_sqrt_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sqrt_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_sqrt_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_sin_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_sin_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_sin_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_sin_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_sin_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_sin_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_sin_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_sin_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_sin_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_sin_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_sin_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_sin_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_sin_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_sin_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sin_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sin_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_sin_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_sin_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cos_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cos_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cos_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cos_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cos_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cos_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cos_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cos_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cos_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cos_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cos_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cos_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cos_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_cos_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cos_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cos_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cos_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_cos_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_not_b32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_not_b32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_not_b32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_not_b32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_not_b32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_not_b32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_not_b32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_not_b32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_not_b32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_not_b32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_not_b32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_not_b32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_not_b32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_not_b32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_not_b32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_not_b32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x0e,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_not_b32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_not_b32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_bfrev_b32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_bfrev_b32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x0e,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_bfrev_b32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_ffbh_u32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_ffbh_u32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x0e,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ffbh_u32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_ffbl_b32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_ffbl_b32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x0e,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ffbl_b32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_ffbh_i32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_ffbh_i32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x0e,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ffbh_i32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_frexp_exp_i32_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_frexp_exp_i32_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_frexp_mant_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_frexp_mant_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cvt_f16_u16_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x0e,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cvt_f16_i16_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x0e,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_cvt_u16_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_cvt_u16_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_cvt_i16_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_cvt_i16_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rcp_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_rcp_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_rcp_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_rcp_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_rcp_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_sqrt_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_sqrt_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sqrt_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_sqrt_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rsq_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_rsq_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_rsq_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_rsq_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_rsq_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_log_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_log_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_log_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_log_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_log_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_log_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_log_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_log_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_log_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_log_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_log_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_log_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_log_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_log_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_log_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_log_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_log_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_log_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_log_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_log_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_log_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_exp_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_exp_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_exp_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_exp_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_exp_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_exp_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_exp_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_exp_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_exp_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_exp_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_exp_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_exp_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_exp_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_exp_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_exp_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_exp_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_exp_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_exp_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_exp_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_exp_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_frexp_mant_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_frexp_mant_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_frexp_exp_i16_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_frexp_exp_i16_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_floor_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_floor_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_floor_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_floor_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_floor_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_floor_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_floor_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_floor_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_floor_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_floor_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_floor_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_floor_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_floor_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_floor_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_floor_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_floor_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_floor_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_floor_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_floor_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_floor_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_ceil_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_ceil_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ceil_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_ceil_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_ceil_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_trunc_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_trunc_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_trunc_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_trunc_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_trunc_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rndne_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_rndne_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_rndne_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_rndne_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_rndne_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_fract_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_fract_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_fract_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_fract_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_fract_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_fract_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_fract_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_fract_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_fract_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_fract_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_fract_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_fract_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_fract_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_fract_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_fract_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_fract_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_fract_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_fract_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_fract_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_fract_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_sin_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_sin_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_sin_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_sin_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_sin_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_sin_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_sin_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_sin_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_sin_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_sin_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_sin_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_sin_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_sin_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_sin_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_sin_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_sin_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sin_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sin_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_sin_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_sin_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cos_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_cos_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_cos_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_cos_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_cos_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_cos_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_cos_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_cos_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_cos_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_cos_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_cos_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_cos_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_cos_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_cos_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_cos_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_cos_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cos_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_cos_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cos_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_cos_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_exp_legacy_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_exp_legacy_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0xfe,0x7f,0x01,0x06,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0xff,0x06,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x86,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x65,0x06,0x86,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x66,0x06,0x86,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x67,0x06,0x86,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x6a,0x06,0x86,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x6b,0x06,0x86,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x7c,0x06,0x86,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x7e,0x06,0x86,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x7f,0x06,0x86,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x80,0x06,0x86,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0xc1,0x06,0x86,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0xf0,0x06,0x86,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0xf7,0x06,0x86,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x26,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x46,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x86,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0xc6,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x00,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x01,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x02,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x03,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x04,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x05,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x0e,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x16,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x06,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x00,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x01,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x02,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x03,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x04,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x05,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x16,0x00]
|
|
|
|
v_log_legacy_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x26,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_log_legacy_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0xfe,0x7f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x40,0x01,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x41,0x01,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x42,0x01,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x43,0x01,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x30,0x01,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x34,0x01,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x38,0x01,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x01,0x01,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x11,0x01,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x21,0x01,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_log_legacy_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x03,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0xff,0x06,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x86,0x06]
|
|
|
|
v_add_f32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x65,0x06,0x86,0x06]
|
|
|
|
v_add_f32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x66,0x06,0x86,0x06]
|
|
|
|
v_add_f32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x67,0x06,0x86,0x06]
|
|
|
|
v_add_f32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x6a,0x06,0x86,0x06]
|
|
|
|
v_add_f32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x6b,0x06,0x86,0x06]
|
|
|
|
v_add_f32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x7c,0x06,0x86,0x06]
|
|
|
|
v_add_f32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x7e,0x06,0x86,0x06]
|
|
|
|
v_add_f32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x7f,0x06,0x86,0x06]
|
|
|
|
v_add_f32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x80,0x06,0x86,0x06]
|
|
|
|
v_add_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0xc1,0x06,0x86,0x06]
|
|
|
|
v_add_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0xf0,0x06,0x86,0x06]
|
|
|
|
v_add_f32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0xf7,0x06,0x86,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x02,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x26,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x46,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x86,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0xc6,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x00,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x01,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x02,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x03,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x04,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x05,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x0e,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x16,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x16,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x00,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x01,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x02,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x03,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x04,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x05,0x06]
|
|
|
|
v_add_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x16,0x06]
|
|
|
|
v_add_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x26,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x00]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x01]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x02]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x03]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x04]
|
|
|
|
v_add_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x05]
|
|
|
|
v_add_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x16]
|
|
|
|
v_add_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x02,0x01,0x06,0x06,0x26]
|
|
|
|
v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x00]
|
|
|
|
v_add_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x03,0x01,0xe4,0x00,0x00]
|
|
|
|
v_add_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0xff,0xe4,0x00,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x02,0x01,0xe4,0x00,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x1b,0x00,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x40,0x01,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x41,0x01,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x42,0x01,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x43,0x01,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x30,0x01,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x34,0x01,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x38,0x01,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x3c,0x01,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x01,0x01,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x0f,0x01,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x11,0x01,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x1f,0x01,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x21,0x01,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0x2f,0x01,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x10]
|
|
|
|
v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x30]
|
|
|
|
v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x01]
|
|
|
|
v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x03]
|
|
|
|
v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_add_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x08,0x00]
|
|
|
|
v_add_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x10,0x00]
|
|
|
|
v_add_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x20,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x40,0x00]
|
|
|
|
v_add_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x80,0x00]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x05,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0xff,0x06,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x86,0x06]
|
|
|
|
v_sub_f32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x65,0x06,0x86,0x06]
|
|
|
|
v_sub_f32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x66,0x06,0x86,0x06]
|
|
|
|
v_sub_f32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x67,0x06,0x86,0x06]
|
|
|
|
v_sub_f32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x6a,0x06,0x86,0x06]
|
|
|
|
v_sub_f32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x6b,0x06,0x86,0x06]
|
|
|
|
v_sub_f32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x7c,0x06,0x86,0x06]
|
|
|
|
v_sub_f32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x7e,0x06,0x86,0x06]
|
|
|
|
v_sub_f32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x7f,0x06,0x86,0x06]
|
|
|
|
v_sub_f32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x80,0x06,0x86,0x06]
|
|
|
|
v_sub_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0xc1,0x06,0x86,0x06]
|
|
|
|
v_sub_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0xf0,0x06,0x86,0x06]
|
|
|
|
v_sub_f32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0xf7,0x06,0x86,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x04,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x26,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x46,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x86,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0xc6,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x00,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x01,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x02,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x03,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x04,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x05,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x0e,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x16,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x16,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x00,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x01,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x02,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x03,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x04,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x05,0x06]
|
|
|
|
v_sub_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x16,0x06]
|
|
|
|
v_sub_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x26,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x00]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x01]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x02]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x03]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x04]
|
|
|
|
v_sub_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x05]
|
|
|
|
v_sub_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x16]
|
|
|
|
v_sub_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x04,0x01,0x06,0x06,0x26]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sub_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x05,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sub_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0xff,0xe4,0x00,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x04,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x1b,0x00,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x40,0x01,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x41,0x01,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x42,0x01,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x43,0x01,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x30,0x01,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x34,0x01,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x38,0x01,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x3c,0x01,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x01,0x01,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x0f,0x01,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x11,0x01,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x1f,0x01,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x21,0x01,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0x2f,0x01,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x10]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x30]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x01]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x03]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sub_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x08,0x00]
|
|
|
|
v_sub_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x10,0x00]
|
|
|
|
v_sub_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x20,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x40,0x00]
|
|
|
|
v_sub_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x80,0x00]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x07,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0xff,0x06,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x86,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x65,0x06,0x86,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x66,0x06,0x86,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x67,0x06,0x86,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x6a,0x06,0x86,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x6b,0x06,0x86,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x7c,0x06,0x86,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x7e,0x06,0x86,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x7f,0x06,0x86,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x80,0x06,0x86,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0xc1,0x06,0x86,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0xf0,0x06,0x86,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0xf7,0x06,0x86,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x06,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x26,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x46,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x86,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0xc6,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x00,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x01,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x02,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x03,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x04,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x05,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x0e,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x16,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x16,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x00,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x01,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x02,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x03,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x04,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x05,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x16,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x26,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x00]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x01]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x02]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x03]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x04]
|
|
|
|
v_subrev_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x05]
|
|
|
|
v_subrev_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x16]
|
|
|
|
v_subrev_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x06,0x01,0x06,0x06,0x26]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subrev_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x07,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0xff,0xe4,0x00,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x06,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x00,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x40,0x01,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x41,0x01,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x42,0x01,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x43,0x01,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x30,0x01,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x34,0x01,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x38,0x01,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x3c,0x01,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x01,0x01,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x0f,0x01,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x11,0x01,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x1f,0x01,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x21,0x01,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0x2f,0x01,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x10]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x30]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x01]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x03]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_subrev_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x08,0x00]
|
|
|
|
v_subrev_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x10,0x00]
|
|
|
|
v_subrev_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x20,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x40,0x00]
|
|
|
|
v_subrev_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x80,0x00]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x09,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0xff,0x06,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x86,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x65,0x06,0x86,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x66,0x06,0x86,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x67,0x06,0x86,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x6a,0x06,0x86,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x6b,0x06,0x86,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x7c,0x06,0x86,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x7e,0x06,0x86,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x7f,0x06,0x86,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x80,0x06,0x86,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0xc1,0x06,0x86,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0xf0,0x06,0x86,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0xf7,0x06,0x86,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x08,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x26,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x46,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x86,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0xc6,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x00,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x01,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x02,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x03,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x04,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x05,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x0e,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x16,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x16,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x00,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x01,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x02,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x03,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x04,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x05,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x16,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x26,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x00]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x01]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x02]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x03]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x04]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x05]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x16]
|
|
|
|
v_mul_legacy_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x08,0x01,0x06,0x06,0x26]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x09,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0xff,0xe4,0x00,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x08,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x1b,0x00,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x40,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x41,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x42,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x43,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x30,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x34,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x38,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x3c,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x0f,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x11,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x1f,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x21,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0x2f,0x01,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x10]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x30]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x01]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x03]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x08,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x10,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x20,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x40,0x00]
|
|
|
|
v_mul_legacy_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x80,0x00]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x0b,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0xff,0x06,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x86,0x06]
|
|
|
|
v_mul_f32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x65,0x06,0x86,0x06]
|
|
|
|
v_mul_f32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x66,0x06,0x86,0x06]
|
|
|
|
v_mul_f32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x67,0x06,0x86,0x06]
|
|
|
|
v_mul_f32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x6a,0x06,0x86,0x06]
|
|
|
|
v_mul_f32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x6b,0x06,0x86,0x06]
|
|
|
|
v_mul_f32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x7c,0x06,0x86,0x06]
|
|
|
|
v_mul_f32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x7e,0x06,0x86,0x06]
|
|
|
|
v_mul_f32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x7f,0x06,0x86,0x06]
|
|
|
|
v_mul_f32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x80,0x06,0x86,0x06]
|
|
|
|
v_mul_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0xc1,0x06,0x86,0x06]
|
|
|
|
v_mul_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0xf0,0x06,0x86,0x06]
|
|
|
|
v_mul_f32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0xf7,0x06,0x86,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x0a,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x26,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x46,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x86,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0xc6,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x00,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x01,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x02,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x03,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x04,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x05,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x0e,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x16,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x16,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x00,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x01,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x02,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x03,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x04,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x05,0x06]
|
|
|
|
v_mul_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x16,0x06]
|
|
|
|
v_mul_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x26,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x00]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x01]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x02]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x03]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x04]
|
|
|
|
v_mul_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x05]
|
|
|
|
v_mul_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x16]
|
|
|
|
v_mul_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0a,0x01,0x06,0x06,0x26]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x0b,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0xff,0xe4,0x00,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x0a,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x00,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x40,0x01,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x41,0x01,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x42,0x01,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x43,0x01,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x30,0x01,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x34,0x01,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x38,0x01,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x3c,0x01,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x0f,0x01,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x11,0x01,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x1f,0x01,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x21,0x01,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0x2f,0x01,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x10]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x30]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x01]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x03]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mul_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x08,0x00]
|
|
|
|
v_mul_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x10,0x00]
|
|
|
|
v_mul_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x20,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x40,0x00]
|
|
|
|
v_mul_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x80,0x00]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x0d,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0xff,0x06,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x86,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x65,0x06,0x86,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x66,0x06,0x86,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x67,0x06,0x86,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x6a,0x06,0x86,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x6b,0x06,0x86,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x7c,0x06,0x86,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x7e,0x06,0x86,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x7f,0x06,0x86,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x80,0x06,0x86,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0xc1,0x06,0x86,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0xf0,0x06,0x86,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0xf7,0x06,0x86,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x0c,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x26,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x00,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x01,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x02,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x03,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x04,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x05,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x0e,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x16,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x16,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x00,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x01,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x02,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x03,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x04,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x05,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x0e,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x00]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x01]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x02]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x03]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x04]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x05]
|
|
|
|
v_mul_i32_i24_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0c,0x01,0x06,0x06,0x0e]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_i32_i24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x0d,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0xff,0xe4,0x00,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x0c,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x1b,0x00,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x40,0x01,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x41,0x01,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x42,0x01,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x43,0x01,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x30,0x01,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x34,0x01,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x38,0x01,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x3c,0x01,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x0f,0x01,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x11,0x01,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x1f,0x01,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x21,0x01,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0x2f,0x01,0x00]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x10]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x30]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x01]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x03]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0c,0x01,0xe4,0x08,0x00]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x0f,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0xff,0x06,0x06,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x65,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x66,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x67,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x6a,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x6b,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x7c,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x7e,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x7f,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x80,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0xc1,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0xf0,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0xf7,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x0e,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x00,0x06,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x01,0x06,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x02,0x06,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x03,0x06,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x04,0x06,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x05,0x06,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x0e,0x06,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x16,0x06,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x16,0x06,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x00,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x01,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x02,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x03,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x04,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x05,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x0e,0x06]
|
|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x06]
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|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x00]
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|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x01]
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|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x02]
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|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x03]
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|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x04]
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|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x05]
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|
|
|
v_mul_hi_i32_i24_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x0e,0x01,0x06,0x06,0x0e]
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|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x00]
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|
|
|
v_mul_hi_i32_i24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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|
// CHECK: [0xfa,0x04,0xfe,0x0f,0x01,0xe4,0x00,0x00]
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|
|
|
v_mul_hi_i32_i24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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|
// CHECK: [0xfa,0x04,0x0a,0x0e,0xff,0xe4,0x00,0x00]
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|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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|
// CHECK: [0xfa,0xfe,0x0b,0x0e,0x01,0xe4,0x00,0x00]
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|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x00,0x00]
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|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x40,0x01,0x00]
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|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x41,0x01,0x00]
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|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x42,0x01,0x00]
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|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x43,0x01,0x00]
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|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x30,0x01,0x00]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x34,0x01,0x00]
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|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x38,0x01,0x00]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x11,0x01,0x00]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x21,0x01,0x00]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x08,0x00]
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|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x06]
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|
|
|
v_mul_u32_u24_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x11,0x01,0x06,0x06,0x06]
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|
|
|
v_mul_u32_u24_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0xff,0x06,0x06,0x06]
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|
|
|
v_mul_u32_u24_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x86,0x06]
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|
|
|
v_mul_u32_u24_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x65,0x06,0x86,0x06]
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|
|
|
v_mul_u32_u24_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x66,0x06,0x86,0x06]
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|
|
|
v_mul_u32_u24_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x67,0x06,0x86,0x06]
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|
|
|
v_mul_u32_u24_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x6a,0x06,0x86,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x6b,0x06,0x86,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x7c,0x06,0x86,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x7e,0x06,0x86,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x7f,0x06,0x86,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x80,0x06,0x86,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0xc1,0x06,0x86,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0xf0,0x06,0x86,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0xf7,0x06,0x86,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x10,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x26,0x06,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x00,0x06,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x01,0x06,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x02,0x06,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x03,0x06,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x04,0x06,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x05,0x06,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x0e,0x06,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x16,0x06,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x16,0x06,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x00,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x01,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x02,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x03,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x04,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x05,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x0e,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x00]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x01]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x02]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x03]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x04]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x05]
|
|
|
|
v_mul_u32_u24_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x10,0x01,0x06,0x06,0x0e]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_u32_u24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x11,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0xff,0xe4,0x00,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x10,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x1b,0x00,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x40,0x01,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x41,0x01,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x42,0x01,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x43,0x01,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x30,0x01,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x34,0x01,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x38,0x01,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x3c,0x01,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x0f,0x01,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x11,0x01,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x1f,0x01,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x21,0x01,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0x2f,0x01,0x00]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x10]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x30]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x01]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x03]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x08,0x00]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x13,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0xff,0x06,0x06,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x65,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x66,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x67,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x6a,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x6b,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x7c,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x7e,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x7f,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x80,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0xc1,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0xf0,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0xf7,0x06,0x86,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x12,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x00,0x06,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x01,0x06,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x02,0x06,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x03,0x06,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x04,0x06,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x05,0x06,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x0e,0x06,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x16,0x06,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x16,0x06,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x00,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x01,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x02,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x03,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x04,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x05,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x0e,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x00]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x01]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x02]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x03]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x04]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x05]
|
|
|
|
v_mul_hi_u32_u24_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x12,0x01,0x06,0x06,0x0e]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x13,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0xff,0xe4,0x00,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x12,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x1b,0x00,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x40,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x41,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x42,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x43,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x30,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x34,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x38,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x3c,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x0f,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x11,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x1f,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x21,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0x2f,0x01,0x00]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x10]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x30]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x01]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x03]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x08,0x00]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x15,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0xff,0x06,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x86,0x06]
|
|
|
|
v_min_f32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x65,0x06,0x86,0x06]
|
|
|
|
v_min_f32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x66,0x06,0x86,0x06]
|
|
|
|
v_min_f32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x67,0x06,0x86,0x06]
|
|
|
|
v_min_f32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x6a,0x06,0x86,0x06]
|
|
|
|
v_min_f32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x6b,0x06,0x86,0x06]
|
|
|
|
v_min_f32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x7c,0x06,0x86,0x06]
|
|
|
|
v_min_f32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x7e,0x06,0x86,0x06]
|
|
|
|
v_min_f32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x7f,0x06,0x86,0x06]
|
|
|
|
v_min_f32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x80,0x06,0x86,0x06]
|
|
|
|
v_min_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0xc1,0x06,0x86,0x06]
|
|
|
|
v_min_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0xf0,0x06,0x86,0x06]
|
|
|
|
v_min_f32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0xf7,0x06,0x86,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x14,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x26,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x46,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x86,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0xc6,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x00,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x01,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x02,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x03,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x04,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x05,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x0e,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x16,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x16,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x00,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x01,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x02,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x03,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x04,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x05,0x06]
|
|
|
|
v_min_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x16,0x06]
|
|
|
|
v_min_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x26,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x00]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x01]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x02]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x03]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x04]
|
|
|
|
v_min_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x05]
|
|
|
|
v_min_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x16]
|
|
|
|
v_min_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x14,0x01,0x06,0x06,0x26]
|
|
|
|
v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x00]
|
|
|
|
v_min_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x15,0x01,0xe4,0x00,0x00]
|
|
|
|
v_min_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0xff,0xe4,0x00,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x14,0x01,0xe4,0x00,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x1b,0x00,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x40,0x01,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x41,0x01,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x42,0x01,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x43,0x01,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x30,0x01,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x34,0x01,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x38,0x01,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x3c,0x01,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x01,0x01,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x0f,0x01,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x11,0x01,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x1f,0x01,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x21,0x01,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0x2f,0x01,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x10]
|
|
|
|
v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x30]
|
|
|
|
v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x01]
|
|
|
|
v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x03]
|
|
|
|
v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_min_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x08,0x00]
|
|
|
|
v_min_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x10,0x00]
|
|
|
|
v_min_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x20,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x40,0x00]
|
|
|
|
v_min_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x80,0x00]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x17,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0xff,0x06,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x86,0x06]
|
|
|
|
v_max_f32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x65,0x06,0x86,0x06]
|
|
|
|
v_max_f32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x66,0x06,0x86,0x06]
|
|
|
|
v_max_f32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x67,0x06,0x86,0x06]
|
|
|
|
v_max_f32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x6a,0x06,0x86,0x06]
|
|
|
|
v_max_f32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x6b,0x06,0x86,0x06]
|
|
|
|
v_max_f32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x7c,0x06,0x86,0x06]
|
|
|
|
v_max_f32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x7e,0x06,0x86,0x06]
|
|
|
|
v_max_f32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x7f,0x06,0x86,0x06]
|
|
|
|
v_max_f32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x80,0x06,0x86,0x06]
|
|
|
|
v_max_f32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0xc1,0x06,0x86,0x06]
|
|
|
|
v_max_f32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0xf0,0x06,0x86,0x06]
|
|
|
|
v_max_f32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0xf7,0x06,0x86,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x16,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x26,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x46,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x86,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0xc6,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x00,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x01,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x02,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x03,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x04,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x05,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x0e,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x16,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x16,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x00,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x01,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x02,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x03,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x04,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x05,0x06]
|
|
|
|
v_max_f32_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x16,0x06]
|
|
|
|
v_max_f32_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x26,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x00]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x01]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x02]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x03]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x04]
|
|
|
|
v_max_f32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x05]
|
|
|
|
v_max_f32_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x16]
|
|
|
|
v_max_f32_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x16,0x01,0x06,0x06,0x26]
|
|
|
|
v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x17,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0xff,0xe4,0x00,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x16,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x1b,0x00,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x40,0x01,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x41,0x01,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x42,0x01,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x43,0x01,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x30,0x01,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x34,0x01,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x38,0x01,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x3c,0x01,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x01,0x01,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x0f,0x01,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x11,0x01,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x1f,0x01,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x21,0x01,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0x2f,0x01,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x10]
|
|
|
|
v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x30]
|
|
|
|
v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x01]
|
|
|
|
v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x03]
|
|
|
|
v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_max_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x08,0x00]
|
|
|
|
v_max_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x10,0x00]
|
|
|
|
v_max_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x20,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x40,0x00]
|
|
|
|
v_max_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x80,0x00]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_i32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x19,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_i32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0xff,0x06,0x06,0x06]
|
|
|
|
v_min_i32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x86,0x06]
|
|
|
|
v_min_i32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x65,0x06,0x86,0x06]
|
|
|
|
v_min_i32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x66,0x06,0x86,0x06]
|
|
|
|
v_min_i32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x67,0x06,0x86,0x06]
|
|
|
|
v_min_i32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x6a,0x06,0x86,0x06]
|
|
|
|
v_min_i32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x6b,0x06,0x86,0x06]
|
|
|
|
v_min_i32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x7c,0x06,0x86,0x06]
|
|
|
|
v_min_i32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x7e,0x06,0x86,0x06]
|
|
|
|
v_min_i32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x7f,0x06,0x86,0x06]
|
|
|
|
v_min_i32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x80,0x06,0x86,0x06]
|
|
|
|
v_min_i32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0xc1,0x06,0x86,0x06]
|
|
|
|
v_min_i32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0xf0,0x06,0x86,0x06]
|
|
|
|
v_min_i32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0xf7,0x06,0x86,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x18,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x00,0x06,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x01,0x06,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x02,0x06,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x03,0x06,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x04,0x06,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x05,0x06,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x0e,0x06,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x16,0x06,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x16,0x06,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x00,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x01,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x02,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x03,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x04,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x05,0x06]
|
|
|
|
v_min_i32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x0e,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x00]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x01]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x02]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x03]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x04]
|
|
|
|
v_min_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x05]
|
|
|
|
v_min_i32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x18,0x01,0x06,0x06,0x0e]
|
|
|
|
v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x00]
|
|
|
|
v_min_i32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x19,0x01,0xe4,0x00,0x00]
|
|
|
|
v_min_i32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0xff,0xe4,0x00,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x18,0x01,0xe4,0x00,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x1b,0x00,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x40,0x01,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x41,0x01,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x42,0x01,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x43,0x01,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x30,0x01,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x34,0x01,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x38,0x01,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x3c,0x01,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x01,0x01,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x0f,0x01,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x11,0x01,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x1f,0x01,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x21,0x01,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0x2f,0x01,0x00]
|
|
|
|
v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x10]
|
|
|
|
v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x30]
|
|
|
|
v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x01]
|
|
|
|
v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x03]
|
|
|
|
v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_min_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x08,0x00]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_i32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x1b,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_i32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0xff,0x06,0x06,0x06]
|
|
|
|
v_max_i32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x86,0x06]
|
|
|
|
v_max_i32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x65,0x06,0x86,0x06]
|
|
|
|
v_max_i32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x66,0x06,0x86,0x06]
|
|
|
|
v_max_i32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x67,0x06,0x86,0x06]
|
|
|
|
v_max_i32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x6a,0x06,0x86,0x06]
|
|
|
|
v_max_i32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x6b,0x06,0x86,0x06]
|
|
|
|
v_max_i32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x7c,0x06,0x86,0x06]
|
|
|
|
v_max_i32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x7e,0x06,0x86,0x06]
|
|
|
|
v_max_i32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x7f,0x06,0x86,0x06]
|
|
|
|
v_max_i32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x80,0x06,0x86,0x06]
|
|
|
|
v_max_i32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0xc1,0x06,0x86,0x06]
|
|
|
|
v_max_i32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0xf0,0x06,0x86,0x06]
|
|
|
|
v_max_i32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0xf7,0x06,0x86,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x1a,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x00,0x06,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x01,0x06,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x02,0x06,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x03,0x06,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x04,0x06,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x05,0x06,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x0e,0x06,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x16,0x06,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x16,0x06,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x00,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x01,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x02,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x03,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x04,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x05,0x06]
|
|
|
|
v_max_i32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x0e,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x00]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x01]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x02]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x03]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x04]
|
|
|
|
v_max_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x05]
|
|
|
|
v_max_i32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1a,0x01,0x06,0x06,0x0e]
|
|
|
|
v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_i32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x1b,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_i32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0xff,0xe4,0x00,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x1a,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x1b,0x00,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x40,0x01,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x41,0x01,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x42,0x01,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x43,0x01,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x30,0x01,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x34,0x01,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x38,0x01,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x3c,0x01,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x01,0x01,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x0f,0x01,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x11,0x01,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x1f,0x01,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x21,0x01,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0x2f,0x01,0x00]
|
|
|
|
v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x10]
|
|
|
|
v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x30]
|
|
|
|
v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x01]
|
|
|
|
v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x03]
|
|
|
|
v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_max_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1a,0x01,0xe4,0x08,0x00]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x1d,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0xff,0x06,0x06,0x06]
|
|
|
|
v_min_u32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x86,0x06]
|
|
|
|
v_min_u32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x65,0x06,0x86,0x06]
|
|
|
|
v_min_u32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x66,0x06,0x86,0x06]
|
|
|
|
v_min_u32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x67,0x06,0x86,0x06]
|
|
|
|
v_min_u32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x6a,0x06,0x86,0x06]
|
|
|
|
v_min_u32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x6b,0x06,0x86,0x06]
|
|
|
|
v_min_u32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x7c,0x06,0x86,0x06]
|
|
|
|
v_min_u32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x7e,0x06,0x86,0x06]
|
|
|
|
v_min_u32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x7f,0x06,0x86,0x06]
|
|
|
|
v_min_u32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x80,0x06,0x86,0x06]
|
|
|
|
v_min_u32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0xc1,0x06,0x86,0x06]
|
|
|
|
v_min_u32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0xf0,0x06,0x86,0x06]
|
|
|
|
v_min_u32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0xf7,0x06,0x86,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x1c,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x00,0x06,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x01,0x06,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x02,0x06,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x03,0x06,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x04,0x06,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x05,0x06,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x0e,0x06,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x16,0x06,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x16,0x06,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x00,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x01,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x02,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x03,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x04,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x05,0x06]
|
|
|
|
v_min_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x0e,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x00]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x01]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x02]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x03]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x04]
|
|
|
|
v_min_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x05]
|
|
|
|
v_min_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1c,0x01,0x06,0x06,0x0e]
|
|
|
|
v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x00]
|
|
|
|
v_min_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x1d,0x01,0xe4,0x00,0x00]
|
|
|
|
v_min_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0xff,0xe4,0x00,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x1c,0x01,0xe4,0x00,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x1b,0x00,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x40,0x01,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x41,0x01,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x42,0x01,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x43,0x01,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x30,0x01,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x34,0x01,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x38,0x01,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x3c,0x01,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x01,0x01,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x0f,0x01,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x11,0x01,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x1f,0x01,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x21,0x01,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0x2f,0x01,0x00]
|
|
|
|
v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x10]
|
|
|
|
v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x30]
|
|
|
|
v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x01]
|
|
|
|
v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x03]
|
|
|
|
v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_min_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1c,0x01,0xe4,0x08,0x00]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x1f,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0xff,0x06,0x06,0x06]
|
|
|
|
v_max_u32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x86,0x06]
|
|
|
|
v_max_u32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x65,0x06,0x86,0x06]
|
|
|
|
v_max_u32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x66,0x06,0x86,0x06]
|
|
|
|
v_max_u32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x67,0x06,0x86,0x06]
|
|
|
|
v_max_u32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x6a,0x06,0x86,0x06]
|
|
|
|
v_max_u32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x6b,0x06,0x86,0x06]
|
|
|
|
v_max_u32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x7c,0x06,0x86,0x06]
|
|
|
|
v_max_u32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x7e,0x06,0x86,0x06]
|
|
|
|
v_max_u32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x7f,0x06,0x86,0x06]
|
|
|
|
v_max_u32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x80,0x06,0x86,0x06]
|
|
|
|
v_max_u32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0xc1,0x06,0x86,0x06]
|
|
|
|
v_max_u32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0xf0,0x06,0x86,0x06]
|
|
|
|
v_max_u32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0xf7,0x06,0x86,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x1e,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x00,0x06,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x01,0x06,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x02,0x06,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x03,0x06,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x04,0x06,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x05,0x06,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x0e,0x06,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x16,0x06,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x16,0x06,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x00,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x01,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x02,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x03,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x04,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x05,0x06]
|
|
|
|
v_max_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x0e,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x00]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x01]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x02]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x03]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x04]
|
|
|
|
v_max_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x05]
|
|
|
|
v_max_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x1e,0x01,0x06,0x06,0x0e]
|
|
|
|
v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x1f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x1e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x40,0x01,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x41,0x01,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x42,0x01,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x43,0x01,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x30,0x01,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x34,0x01,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x38,0x01,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x01,0x01,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x11,0x01,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x21,0x01,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_max_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x21,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0xff,0x06,0x06,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x65,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x66,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x67,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x6a,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x6b,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x7c,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x7e,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x7f,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x80,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0xc1,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0xf0,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0xf7,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x20,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x00,0x06,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x01,0x06,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x02,0x06,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x03,0x06,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x04,0x06,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x05,0x06,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x0e,0x06,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x16,0x06,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x16,0x06,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x00,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x01,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x02,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x03,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x04,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x05,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x0e,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x00]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x01]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x02]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x03]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x04]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x05]
|
|
|
|
v_lshrrev_b32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x20,0x01,0x06,0x06,0x0e]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x00]
|
|
|
|
v_lshrrev_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x21,0x01,0xe4,0x00,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0xff,0xe4,0x00,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x20,0x01,0xe4,0x00,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x1b,0x00,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x40,0x01,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x41,0x01,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x42,0x01,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x43,0x01,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x30,0x01,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x34,0x01,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x38,0x01,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x3c,0x01,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x01,0x01,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x0f,0x01,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x11,0x01,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x1f,0x01,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x21,0x01,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0x2f,0x01,0x00]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x10]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x30]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x01]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x03]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x08,0x00]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x23,0x01,0x06,0x06,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0xff,0x06,0x06,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x65,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x66,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x67,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x6a,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x6b,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x7c,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x7e,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x7f,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x80,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0xc1,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0xf0,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0xf7,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x22,0x01,0x06,0x06,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x00,0x06,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x01,0x06,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x02,0x06,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x03,0x06,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x04,0x06,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x05,0x06,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x0e,0x06,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x16,0x06,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x16,0x06,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x00,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x01,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x02,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x03,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x04,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x05,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x0e,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x06]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x00]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x01]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x02]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x03]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x04]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x05]
|
|
|
|
v_ashrrev_i32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x22,0x01,0x06,0x06,0x0e]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ashrrev_i32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x23,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0xff,0xe4,0x00,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x22,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x1b,0x00,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x40,0x01,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x41,0x01,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x42,0x01,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x43,0x01,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x30,0x01,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x34,0x01,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x38,0x01,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x3c,0x01,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x01,0x01,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x0f,0x01,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x11,0x01,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x1f,0x01,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x21,0x01,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0x2f,0x01,0x00]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x10]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x30]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x01]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x03]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x08,0x00]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x25,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0xff,0x06,0x06,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x65,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x66,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x67,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x6a,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x6b,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x7c,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x7e,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x7f,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x80,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0xc1,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0xf0,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0xf7,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x24,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x00,0x06,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x01,0x06,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x02,0x06,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x03,0x06,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x04,0x06,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x05,0x06,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x0e,0x06,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x16,0x06,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x16,0x06,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x00,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x01,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x02,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x03,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x04,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x05,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x0e,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x00]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x01]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x02]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x03]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x04]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x05]
|
|
|
|
v_lshlrev_b32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x24,0x01,0x06,0x06,0x0e]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x00]
|
|
|
|
v_lshlrev_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x25,0x01,0xe4,0x00,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0xff,0xe4,0x00,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x24,0x01,0xe4,0x00,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x1b,0x00,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x40,0x01,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x41,0x01,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x42,0x01,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x43,0x01,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x30,0x01,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x34,0x01,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x38,0x01,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x3c,0x01,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x01,0x01,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x0f,0x01,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x11,0x01,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x1f,0x01,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x21,0x01,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0x2f,0x01,0x00]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x10]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x30]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x01]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x03]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x08,0x00]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x06]
|
|
|
|
v_and_b32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x27,0x01,0x06,0x06,0x06]
|
|
|
|
v_and_b32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0xff,0x06,0x06,0x06]
|
|
|
|
v_and_b32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x86,0x06]
|
|
|
|
v_and_b32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x65,0x06,0x86,0x06]
|
|
|
|
v_and_b32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x66,0x06,0x86,0x06]
|
|
|
|
v_and_b32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x67,0x06,0x86,0x06]
|
|
|
|
v_and_b32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x6a,0x06,0x86,0x06]
|
|
|
|
v_and_b32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x6b,0x06,0x86,0x06]
|
|
|
|
v_and_b32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x7c,0x06,0x86,0x06]
|
|
|
|
v_and_b32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x7e,0x06,0x86,0x06]
|
|
|
|
v_and_b32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x7f,0x06,0x86,0x06]
|
|
|
|
v_and_b32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x80,0x06,0x86,0x06]
|
|
|
|
v_and_b32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0xc1,0x06,0x86,0x06]
|
|
|
|
v_and_b32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0xf0,0x06,0x86,0x06]
|
|
|
|
v_and_b32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0xf7,0x06,0x86,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x26,0x01,0x06,0x06,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x00,0x06,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x01,0x06,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x02,0x06,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x03,0x06,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x04,0x06,0x06]
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|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x05,0x06,0x06]
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|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x0e,0x06,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x16,0x06,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x16,0x06,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x00,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x01,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x02,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x03,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x04,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x05,0x06]
|
|
|
|
v_and_b32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x0e,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x06]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x00]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x01]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x02]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x03]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x04]
|
|
|
|
v_and_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x05]
|
|
|
|
v_and_b32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x26,0x01,0x06,0x06,0x0e]
|
|
|
|
v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x00]
|
|
|
|
v_and_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x27,0x01,0xe4,0x00,0x00]
|
|
|
|
v_and_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0xff,0xe4,0x00,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x26,0x01,0xe4,0x00,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x1b,0x00,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x40,0x01,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x41,0x01,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x42,0x01,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x43,0x01,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x30,0x01,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x34,0x01,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x38,0x01,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x3c,0x01,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x01,0x01,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x0f,0x01,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x11,0x01,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x1f,0x01,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x21,0x01,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0x2f,0x01,0x00]
|
|
|
|
v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x10]
|
|
|
|
v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x30]
|
|
|
|
v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x01]
|
|
|
|
v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x03]
|
|
|
|
v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_and_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x08,0x00]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x06]
|
|
|
|
v_or_b32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x29,0x01,0x06,0x06,0x06]
|
|
|
|
v_or_b32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0xff,0x06,0x06,0x06]
|
|
|
|
v_or_b32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x86,0x06]
|
|
|
|
v_or_b32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x65,0x06,0x86,0x06]
|
|
|
|
v_or_b32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x66,0x06,0x86,0x06]
|
|
|
|
v_or_b32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x67,0x06,0x86,0x06]
|
|
|
|
v_or_b32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x6a,0x06,0x86,0x06]
|
|
|
|
v_or_b32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x6b,0x06,0x86,0x06]
|
|
|
|
v_or_b32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x7c,0x06,0x86,0x06]
|
|
|
|
v_or_b32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x7e,0x06,0x86,0x06]
|
|
|
|
v_or_b32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x7f,0x06,0x86,0x06]
|
|
|
|
v_or_b32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x80,0x06,0x86,0x06]
|
|
|
|
v_or_b32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0xc1,0x06,0x86,0x06]
|
|
|
|
v_or_b32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0xf0,0x06,0x86,0x06]
|
|
|
|
v_or_b32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0xf7,0x06,0x86,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x28,0x01,0x06,0x06,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x00,0x06,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x01,0x06,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x02,0x06,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x03,0x06,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x04,0x06,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x05,0x06,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x0e,0x06,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x16,0x06,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x16,0x06,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x00,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x01,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x02,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x03,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x04,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x05,0x06]
|
|
|
|
v_or_b32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x0e,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x06]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x00]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x01]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x02]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x03]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x04]
|
|
|
|
v_or_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x05]
|
|
|
|
v_or_b32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x28,0x01,0x06,0x06,0x0e]
|
|
|
|
v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x00]
|
|
|
|
v_or_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x29,0x01,0xe4,0x00,0x00]
|
|
|
|
v_or_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0xff,0xe4,0x00,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x28,0x01,0xe4,0x00,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x1b,0x00,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x40,0x01,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x41,0x01,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x42,0x01,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x43,0x01,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x30,0x01,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x34,0x01,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x38,0x01,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x3c,0x01,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x01,0x01,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x0f,0x01,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x11,0x01,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x1f,0x01,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x21,0x01,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0x2f,0x01,0x00]
|
|
|
|
v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x10]
|
|
|
|
v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x30]
|
|
|
|
v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x01]
|
|
|
|
v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x03]
|
|
|
|
v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_or_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x08,0x00]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x06]
|
|
|
|
v_xor_b32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x2b,0x01,0x06,0x06,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0xff,0x06,0x06,0x06]
|
|
|
|
v_xor_b32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x86,0x06]
|
|
|
|
v_xor_b32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x65,0x06,0x86,0x06]
|
|
|
|
v_xor_b32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x66,0x06,0x86,0x06]
|
|
|
|
v_xor_b32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x67,0x06,0x86,0x06]
|
|
|
|
v_xor_b32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x6a,0x06,0x86,0x06]
|
|
|
|
v_xor_b32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x6b,0x06,0x86,0x06]
|
|
|
|
v_xor_b32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x7c,0x06,0x86,0x06]
|
|
|
|
v_xor_b32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x7e,0x06,0x86,0x06]
|
|
|
|
v_xor_b32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x7f,0x06,0x86,0x06]
|
|
|
|
v_xor_b32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x80,0x06,0x86,0x06]
|
|
|
|
v_xor_b32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0xc1,0x06,0x86,0x06]
|
|
|
|
v_xor_b32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0xf0,0x06,0x86,0x06]
|
|
|
|
v_xor_b32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0xf7,0x06,0x86,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x2a,0x01,0x06,0x06,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x00,0x06,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x01,0x06,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x02,0x06,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x03,0x06,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x04,0x06,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x05,0x06,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x0e,0x06,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x16,0x06,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x16,0x06,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x00,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x01,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x02,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x03,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x04,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x05,0x06]
|
|
|
|
v_xor_b32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x0e,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x06]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x00]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x01]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x02]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x03]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x04]
|
|
|
|
v_xor_b32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x05]
|
|
|
|
v_xor_b32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x2a,0x01,0x06,0x06,0x0e]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x00]
|
|
|
|
v_xor_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x2b,0x01,0xe4,0x00,0x00]
|
|
|
|
v_xor_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0xff,0xe4,0x00,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x2a,0x01,0xe4,0x00,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x1b,0x00,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x40,0x01,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x41,0x01,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x42,0x01,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x43,0x01,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x30,0x01,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x34,0x01,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x38,0x01,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x3c,0x01,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x01,0x01,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x0f,0x01,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x11,0x01,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x1f,0x01,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x21,0x01,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0x2f,0x01,0x00]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x10]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x30]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x01]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x03]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_xor_b32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2a,0x01,0xe4,0x08,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mac_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x2d,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mac_f32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0xff,0xe4,0x00,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x2c,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x00,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x40,0x01,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x41,0x01,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x42,0x01,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x43,0x01,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x30,0x01,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x34,0x01,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x38,0x01,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x3c,0x01,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x01,0x01,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x0f,0x01,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x11,0x01,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x1f,0x01,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x21,0x01,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0x2f,0x01,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x10]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x30]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x01]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x03]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mac_f32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x08,0x00]
|
|
|
|
v_mac_f32_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x10,0x00]
|
|
|
|
v_mac_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x20,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x40,0x00]
|
|
|
|
v_mac_f32_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x2c,0x01,0xe4,0x80,0x00]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_co_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x33,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0xff,0x06,0x06,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x86,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x65,0x06,0x86,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x66,0x06,0x86,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x67,0x06,0x86,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x6a,0x06,0x86,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x6b,0x06,0x86,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x7c,0x06,0x86,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x7e,0x06,0x86,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x7f,0x06,0x86,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x80,0x06,0x86,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0xc1,0x06,0x86,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0xf0,0x06,0x86,0x06]
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|
|
|
v_add_co_u32_sdwa v5, vcc, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0xf7,0x06,0x86,0x06]
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|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x32,0x01,0x06,0x06,0x06]
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|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x26,0x06,0x06]
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|
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|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
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|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x00,0x06,0x06]
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|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x01,0x06,0x06]
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|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x02,0x06,0x06]
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|
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|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x03,0x06,0x06]
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|
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|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x04,0x06,0x06]
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|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x05,0x06,0x06]
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|
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|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x0e,0x06,0x06]
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|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x16,0x06,0x06]
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|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x16,0x06,0x06]
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|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
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|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x00,0x06]
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|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x01,0x06]
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|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x02,0x06]
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|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x03,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x04,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x05,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x0e,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x00]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x01]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x02]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x03]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x04]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x05]
|
|
|
|
v_add_co_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x32,0x01,0x06,0x06,0x0e]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x00]
|
|
|
|
v_add_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x33,0x01,0xe4,0x00,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0xff,0xe4,0x00,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x32,0x01,0xe4,0x00,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x1b,0x00,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x40,0x01,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x41,0x01,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x42,0x01,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x43,0x01,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x30,0x01,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x34,0x01,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x38,0x01,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x3c,0x01,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x01,0x01,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x0f,0x01,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x11,0x01,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x1f,0x01,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x21,0x01,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0x2f,0x01,0x00]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x10]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x30]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x01]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x03]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_add_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x08,0x00]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x35,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0xff,0x06,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x86,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x65,0x06,0x86,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x66,0x06,0x86,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x67,0x06,0x86,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x6a,0x06,0x86,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x6b,0x06,0x86,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x7c,0x06,0x86,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x7e,0x06,0x86,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x7f,0x06,0x86,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x80,0x06,0x86,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0xc1,0x06,0x86,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0xf0,0x06,0x86,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0xf7,0x06,0x86,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x34,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x26,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x00,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x01,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x02,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x03,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x04,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x05,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x0e,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x16,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x16,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x00,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x01,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x02,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x03,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x04,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x05,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x0e,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x00]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x01]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x02]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x03]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x04]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x05]
|
|
|
|
v_sub_co_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x34,0x01,0x06,0x06,0x0e]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sub_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x35,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0xff,0xe4,0x00,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x34,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x40,0x01,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x41,0x01,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x42,0x01,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x43,0x01,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x30,0x01,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x34,0x01,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x38,0x01,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x3c,0x01,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x01,0x01,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x0f,0x01,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x11,0x01,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x1f,0x01,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x21,0x01,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0x2f,0x01,0x00]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x10]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x30]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x01]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x03]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sub_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x08,0x00]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v255, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x37,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0xff,0x06,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x86,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x65,0x06,0x86,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x66,0x06,0x86,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x67,0x06,0x86,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x6a,0x06,0x86,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x6b,0x06,0x86,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x7c,0x06,0x86,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x7e,0x06,0x86,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x7f,0x06,0x86,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x80,0x06,0x86,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0xc1,0x06,0x86,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0xf0,0x06,0x86,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0xf7,0x06,0x86,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x36,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x26,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x00,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x01,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x02,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x03,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x04,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x05,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x0e,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x16,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x16,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x00,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x01,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x02,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x03,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x04,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x05,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x0e,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x00]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x01]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x02]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x03]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x04]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x05]
|
|
|
|
v_subrev_co_u32_sdwa v5, vcc, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x36,0x01,0x06,0x06,0x0e]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subrev_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x37,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0xff,0xe4,0x00,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x36,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x40,0x01,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x41,0x01,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x42,0x01,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x43,0x01,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x30,0x01,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x34,0x01,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x38,0x01,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x3c,0x01,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x01,0x01,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x0f,0x01,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x11,0x01,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x1f,0x01,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x21,0x01,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0x2f,0x01,0x00]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x10]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x30]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x01]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x03]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_subrev_co_u32_dpp v5, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x08,0x00]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x39,0x01,0x06,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0xff,0x06,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, 0, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x80,0x06,0x86,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, -1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0xc1,0x06,0x86,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, 0.5, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0xf0,0x06,0x86,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, -4.0, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0xf7,0x06,0x86,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x38,0x01,0x06,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x26,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x00,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x01,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x02,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x03,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x04,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x05,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x0e,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x16,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x00,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x01,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x02,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x03,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x04,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x05,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x0e,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x06]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x00]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x01]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x02]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x03]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x04]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x05]
|
|
|
|
v_addc_co_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x38,0x01,0x06,0x06,0x0e]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x00]
|
|
|
|
v_addc_co_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x39,0x01,0xe4,0x00,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0xff,0xe4,0x00,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x38,0x01,0xe4,0x00,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x40,0x01,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x41,0x01,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x42,0x01,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x43,0x01,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x30,0x01,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x34,0x01,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x38,0x01,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x3c,0x01,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x01,0x01,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x0f,0x01,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x11,0x01,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x1f,0x01,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x21,0x01,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0x2f,0x01,0x00]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x10]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x30]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x01]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x03]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_addc_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x08,0x00]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x3b,0x01,0x06,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0xff,0x06,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, 0, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x80,0x06,0x86,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, -1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0xc1,0x06,0x86,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, 0.5, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0xf0,0x06,0x86,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, -4.0, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0xf7,0x06,0x86,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x3a,0x01,0x06,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x26,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x00,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x01,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x02,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x03,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x04,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x05,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x0e,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x16,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x00,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x01,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x02,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x03,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x04,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x05,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x0e,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x06]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x00]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x01]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x02]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x03]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x04]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x05]
|
|
|
|
v_subb_co_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3a,0x01,0x06,0x06,0x0e]
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|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x00]
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|
|
|
v_subb_co_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x3b,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0xff,0xe4,0x00,0x00]
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|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x3a,0x01,0xe4,0x00,0x00]
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|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x40,0x01,0x00]
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|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x41,0x01,0x00]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x42,0x01,0x00]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x43,0x01,0x00]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x30,0x01,0x00]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x34,0x01,0x00]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x38,0x01,0x00]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x3c,0x01,0x00]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x01,0x01,0x00]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x0f,0x01,0x00]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x11,0x01,0x00]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x1f,0x01,0x00]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x21,0x01,0x00]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0x2f,0x01,0x00]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x10]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x30]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x01]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x03]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_subb_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x08,0x00]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v255, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x3d,0x01,0x06,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v255, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0xff,0x06,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, 0, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x80,0x06,0x86,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, -1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0xc1,0x06,0x86,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, 0.5, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0xf0,0x06,0x86,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, -4.0, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0xf7,0x06,0x86,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v255, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x3c,0x01,0x06,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x26,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x00,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x01,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x02,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x03,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x04,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x05,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x0e,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x16,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x00,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x01,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x02,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x03,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x04,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x05,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, sext(v1), v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x0e,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x06]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x00]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x01]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x02]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x03]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x04]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x05]
|
|
|
|
v_subbrev_co_u32_sdwa v5, vcc, v1, sext(v2), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3c,0x01,0x06,0x06,0x0e]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v255, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x3d,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v255, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0xff,0xe4,0x00,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v255, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x3c,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x40,0x01,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x41,0x01,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x42,0x01,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x43,0x01,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x30,0x01,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x34,0x01,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x38,0x01,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x3c,0x01,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x01,0x01,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x0f,0x01,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x11,0x01,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x1f,0x01,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x21,0x01,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0x2f,0x01,0x00]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x10]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x30]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x01]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x03]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_subbrev_co_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x08,0x00]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x3f,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0xff,0x06,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x86,0x06]
|
|
|
|
v_add_f16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x65,0x06,0x86,0x06]
|
|
|
|
v_add_f16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x66,0x06,0x86,0x06]
|
|
|
|
v_add_f16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x67,0x06,0x86,0x06]
|
|
|
|
v_add_f16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x6a,0x06,0x86,0x06]
|
|
|
|
v_add_f16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x6b,0x06,0x86,0x06]
|
|
|
|
v_add_f16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x7c,0x06,0x86,0x06]
|
|
|
|
v_add_f16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x7e,0x06,0x86,0x06]
|
|
|
|
v_add_f16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x7f,0x06,0x86,0x06]
|
|
|
|
v_add_f16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x80,0x06,0x86,0x06]
|
|
|
|
v_add_f16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0xc1,0x06,0x86,0x06]
|
|
|
|
v_add_f16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0xf0,0x06,0x86,0x06]
|
|
|
|
v_add_f16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0xf7,0x06,0x86,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x3e,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x26,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x00,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x01,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x02,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x03,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x04,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x05,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x0e,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x16,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x16,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x00,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x01,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x02,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x03,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x04,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x05,0x06]
|
|
|
|
v_add_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x16,0x06]
|
|
|
|
v_add_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x26,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x00]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x01]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x02]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x03]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x04]
|
|
|
|
v_add_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x05]
|
|
|
|
v_add_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x16]
|
|
|
|
v_add_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x3e,0x01,0x06,0x06,0x26]
|
|
|
|
v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_add_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x3f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_add_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x3e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x40,0x01,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x41,0x01,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x42,0x01,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x43,0x01,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x30,0x01,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x34,0x01,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x38,0x01,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x01,0x01,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x11,0x01,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x21,0x01,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_add_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_add_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x10,0x00]
|
|
|
|
v_add_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x20,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x40,0x00]
|
|
|
|
v_add_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x3e,0x01,0xe4,0x80,0x00]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x41,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0xff,0x06,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x86,0x06]
|
|
|
|
v_sub_f16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x65,0x06,0x86,0x06]
|
|
|
|
v_sub_f16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x66,0x06,0x86,0x06]
|
|
|
|
v_sub_f16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x67,0x06,0x86,0x06]
|
|
|
|
v_sub_f16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x6a,0x06,0x86,0x06]
|
|
|
|
v_sub_f16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x6b,0x06,0x86,0x06]
|
|
|
|
v_sub_f16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x7c,0x06,0x86,0x06]
|
|
|
|
v_sub_f16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x7e,0x06,0x86,0x06]
|
|
|
|
v_sub_f16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x7f,0x06,0x86,0x06]
|
|
|
|
v_sub_f16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x80,0x06,0x86,0x06]
|
|
|
|
v_sub_f16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0xc1,0x06,0x86,0x06]
|
|
|
|
v_sub_f16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0xf0,0x06,0x86,0x06]
|
|
|
|
v_sub_f16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0xf7,0x06,0x86,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x40,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x26,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x00,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x01,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x02,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x03,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x04,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x05,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x0e,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x16,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x16,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x00,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x01,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x02,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x03,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x04,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x05,0x06]
|
|
|
|
v_sub_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x16,0x06]
|
|
|
|
v_sub_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x26,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x00]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x01]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x02]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x03]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x04]
|
|
|
|
v_sub_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x05]
|
|
|
|
v_sub_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x16]
|
|
|
|
v_sub_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x40,0x01,0x06,0x06,0x26]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sub_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x41,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sub_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0xff,0xe4,0x00,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x40,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x1b,0x00,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x40,0x01,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x41,0x01,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x42,0x01,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x43,0x01,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x30,0x01,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x34,0x01,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x38,0x01,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x3c,0x01,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x01,0x01,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x0f,0x01,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x11,0x01,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x1f,0x01,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x21,0x01,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0x2f,0x01,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x10]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x30]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x01]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x03]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sub_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x08,0x00]
|
|
|
|
v_sub_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x10,0x00]
|
|
|
|
v_sub_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x20,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x40,0x00]
|
|
|
|
v_sub_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x80,0x00]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x43,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0xff,0x06,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x86,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x65,0x06,0x86,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x66,0x06,0x86,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x67,0x06,0x86,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x6a,0x06,0x86,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x6b,0x06,0x86,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x7c,0x06,0x86,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x7e,0x06,0x86,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x7f,0x06,0x86,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x80,0x06,0x86,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0xc1,0x06,0x86,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0xf0,0x06,0x86,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0xf7,0x06,0x86,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x42,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x26,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x00,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x01,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x02,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x03,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x04,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x05,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x0e,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x16,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x16,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x00,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x01,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x02,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x03,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x04,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x05,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x16,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x26,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x00]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x01]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x02]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x03]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x04]
|
|
|
|
v_subrev_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x05]
|
|
|
|
v_subrev_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x16]
|
|
|
|
v_subrev_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x42,0x01,0x06,0x06,0x26]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subrev_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x43,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0xff,0xe4,0x00,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x42,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x1b,0x00,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x40,0x01,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x41,0x01,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x42,0x01,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x43,0x01,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x30,0x01,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x34,0x01,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x38,0x01,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x3c,0x01,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x01,0x01,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x0f,0x01,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x11,0x01,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x1f,0x01,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x21,0x01,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0x2f,0x01,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x10]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x30]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x01]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x03]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_subrev_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x08,0x00]
|
|
|
|
v_subrev_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x10,0x00]
|
|
|
|
v_subrev_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x20,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x40,0x00]
|
|
|
|
v_subrev_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x80,0x00]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x45,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0xff,0x06,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x86,0x06]
|
|
|
|
v_mul_f16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x65,0x06,0x86,0x06]
|
|
|
|
v_mul_f16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x66,0x06,0x86,0x06]
|
|
|
|
v_mul_f16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x67,0x06,0x86,0x06]
|
|
|
|
v_mul_f16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x6a,0x06,0x86,0x06]
|
|
|
|
v_mul_f16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x6b,0x06,0x86,0x06]
|
|
|
|
v_mul_f16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x7c,0x06,0x86,0x06]
|
|
|
|
v_mul_f16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x7e,0x06,0x86,0x06]
|
|
|
|
v_mul_f16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x7f,0x06,0x86,0x06]
|
|
|
|
v_mul_f16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x80,0x06,0x86,0x06]
|
|
|
|
v_mul_f16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0xc1,0x06,0x86,0x06]
|
|
|
|
v_mul_f16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0xf0,0x06,0x86,0x06]
|
|
|
|
v_mul_f16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0xf7,0x06,0x86,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x44,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x26,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x00,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x01,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x02,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x03,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x04,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x05,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x0e,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x16,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x16,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x00,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x01,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x02,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x03,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x04,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x05,0x06]
|
|
|
|
v_mul_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x16,0x06]
|
|
|
|
v_mul_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x26,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x00]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x01]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x02]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x03]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x04]
|
|
|
|
v_mul_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x05]
|
|
|
|
v_mul_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x16]
|
|
|
|
v_mul_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x44,0x01,0x06,0x06,0x26]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x45,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0xff,0xe4,0x00,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x44,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x1b,0x00,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x40,0x01,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x41,0x01,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x42,0x01,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x43,0x01,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x30,0x01,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x34,0x01,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x38,0x01,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x3c,0x01,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x0f,0x01,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x11,0x01,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x1f,0x01,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x21,0x01,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0x2f,0x01,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x10]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x30]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x01]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x03]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mul_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x08,0x00]
|
|
|
|
v_mul_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x10,0x00]
|
|
|
|
v_mul_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x20,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x40,0x00]
|
|
|
|
v_mul_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x80,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mac_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x47,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mac_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0xff,0xe4,0x00,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x46,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x1b,0x00,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x40,0x01,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x41,0x01,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x42,0x01,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x43,0x01,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x30,0x01,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x34,0x01,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x38,0x01,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x3c,0x01,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x01,0x01,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x0f,0x01,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x11,0x01,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x1f,0x01,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x21,0x01,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0x2f,0x01,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x10]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x30]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x01]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x03]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mac_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x08,0x00]
|
|
|
|
v_mac_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x10,0x00]
|
|
|
|
v_mac_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x20,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x40,0x00]
|
|
|
|
v_mac_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x46,0x01,0xe4,0x80,0x00]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x4d,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0xff,0x06,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x86,0x06]
|
|
|
|
v_add_u16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x65,0x06,0x86,0x06]
|
|
|
|
v_add_u16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x66,0x06,0x86,0x06]
|
|
|
|
v_add_u16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x67,0x06,0x86,0x06]
|
|
|
|
v_add_u16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x6a,0x06,0x86,0x06]
|
|
|
|
v_add_u16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x6b,0x06,0x86,0x06]
|
|
|
|
v_add_u16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x7c,0x06,0x86,0x06]
|
|
|
|
v_add_u16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x7e,0x06,0x86,0x06]
|
|
|
|
v_add_u16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x7f,0x06,0x86,0x06]
|
|
|
|
v_add_u16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x80,0x06,0x86,0x06]
|
|
|
|
v_add_u16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0xc1,0x06,0x86,0x06]
|
|
|
|
v_add_u16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0xf0,0x06,0x86,0x06]
|
|
|
|
v_add_u16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0xf7,0x06,0x86,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x4c,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x26,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x00,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x01,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x02,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x03,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x04,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x05,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x0e,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x16,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x16,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x00,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x01,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x02,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x03,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x04,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x05,0x06]
|
|
|
|
v_add_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x0e,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x00]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x01]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x02]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x03]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x04]
|
|
|
|
v_add_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x05]
|
|
|
|
v_add_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4c,0x01,0x06,0x06,0x0e]
|
|
|
|
v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x00]
|
|
|
|
v_add_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x4d,0x01,0xe4,0x00,0x00]
|
|
|
|
v_add_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0xff,0xe4,0x00,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x4c,0x01,0xe4,0x00,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x1b,0x00,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x40,0x01,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x41,0x01,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x42,0x01,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x43,0x01,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x30,0x01,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x34,0x01,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x38,0x01,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x3c,0x01,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x01,0x01,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x0f,0x01,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x11,0x01,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x1f,0x01,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x21,0x01,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0x2f,0x01,0x00]
|
|
|
|
v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x10]
|
|
|
|
v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x30]
|
|
|
|
v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x01]
|
|
|
|
v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x03]
|
|
|
|
v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_add_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x08,0x00]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x4f,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0xff,0x06,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x86,0x06]
|
|
|
|
v_sub_u16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x65,0x06,0x86,0x06]
|
|
|
|
v_sub_u16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x66,0x06,0x86,0x06]
|
|
|
|
v_sub_u16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x67,0x06,0x86,0x06]
|
|
|
|
v_sub_u16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x6a,0x06,0x86,0x06]
|
|
|
|
v_sub_u16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x6b,0x06,0x86,0x06]
|
|
|
|
v_sub_u16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x7c,0x06,0x86,0x06]
|
|
|
|
v_sub_u16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x7e,0x06,0x86,0x06]
|
|
|
|
v_sub_u16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x7f,0x06,0x86,0x06]
|
|
|
|
v_sub_u16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x80,0x06,0x86,0x06]
|
|
|
|
v_sub_u16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0xc1,0x06,0x86,0x06]
|
|
|
|
v_sub_u16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0xf0,0x06,0x86,0x06]
|
|
|
|
v_sub_u16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0xf7,0x06,0x86,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x4e,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x26,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x00,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x01,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x02,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x03,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x04,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x05,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x0e,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x16,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x16,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x00,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x01,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x02,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x03,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x04,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x05,0x06]
|
|
|
|
v_sub_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x0e,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x00]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x01]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x02]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x03]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x04]
|
|
|
|
v_sub_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x05]
|
|
|
|
v_sub_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x4e,0x01,0x06,0x06,0x0e]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sub_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x4f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sub_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x4e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x40,0x01,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x41,0x01,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x42,0x01,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x43,0x01,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x30,0x01,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x34,0x01,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x38,0x01,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x01,0x01,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x11,0x01,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x21,0x01,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sub_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x51,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0xff,0x06,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x86,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x65,0x06,0x86,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x66,0x06,0x86,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x67,0x06,0x86,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x6a,0x06,0x86,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x6b,0x06,0x86,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x7c,0x06,0x86,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x7e,0x06,0x86,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x7f,0x06,0x86,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x80,0x06,0x86,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0xc1,0x06,0x86,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0xf0,0x06,0x86,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0xf7,0x06,0x86,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x50,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x26,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x00,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x01,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x02,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x03,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x04,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x05,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x0e,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x16,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x16,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x00,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x01,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x02,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x03,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x04,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x05,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x0e,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x00]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x01]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x02]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x03]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x04]
|
|
|
|
v_subrev_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x05]
|
|
|
|
v_subrev_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x50,0x01,0x06,0x06,0x0e]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subrev_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x51,0x01,0xe4,0x00,0x00]
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|
|
|
v_subrev_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0xff,0xe4,0x00,0x00]
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|
|
|
v_subrev_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x50,0x01,0xe4,0x00,0x00]
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|
|
|
v_subrev_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x00,0x00]
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|
|
|
v_subrev_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x40,0x01,0x00]
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|
|
|
v_subrev_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x41,0x01,0x00]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x42,0x01,0x00]
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|
|
|
v_subrev_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x43,0x01,0x00]
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|
|
|
v_subrev_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x30,0x01,0x00]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x34,0x01,0x00]
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|
|
|
v_subrev_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x38,0x01,0x00]
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|
|
|
v_subrev_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x3c,0x01,0x00]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x01,0x01,0x00]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x0f,0x01,0x00]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x11,0x01,0x00]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x1f,0x01,0x00]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x21,0x01,0x00]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0x2f,0x01,0x00]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x10]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x30]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x01]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x03]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_subrev_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x08,0x00]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x53,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0xff,0x06,0x06,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x86,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x65,0x06,0x86,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x66,0x06,0x86,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x67,0x06,0x86,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x6a,0x06,0x86,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x6b,0x06,0x86,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x7c,0x06,0x86,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x7e,0x06,0x86,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x7f,0x06,0x86,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x80,0x06,0x86,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0xc1,0x06,0x86,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0xf0,0x06,0x86,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0xf7,0x06,0x86,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x52,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x00,0x06,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x01,0x06,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x02,0x06,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x03,0x06,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x04,0x06,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x05,0x06,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x0e,0x06,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x16,0x06,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x16,0x06,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x00,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x01,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x02,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x03,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x04,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x05,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x0e,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x06]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x00]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x01]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x02]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x03]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x04]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x05]
|
|
|
|
v_mul_lo_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x52,0x01,0x06,0x06,0x0e]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_lo_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x53,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0xff,0xe4,0x00,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x52,0x01,0xe4,0x00,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x00,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x40,0x01,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x41,0x01,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x42,0x01,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x43,0x01,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x30,0x01,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x34,0x01,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x38,0x01,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x3c,0x01,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x01,0x01,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x0f,0x01,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x11,0x01,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x1f,0x01,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x21,0x01,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0x2f,0x01,0x00]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x10]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x30]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x01]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x03]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_mul_lo_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x08,0x00]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x55,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0xff,0x06,0x06,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x65,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x66,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x67,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x6a,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x6b,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x7c,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x7e,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x7f,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x80,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0xc1,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0xf0,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0xf7,0x06,0x86,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x54,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x00,0x06,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x01,0x06,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x02,0x06,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x03,0x06,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x04,0x06,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x05,0x06,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x0e,0x06,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x16,0x06,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x16,0x06,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x00,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x01,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x02,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x03,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x04,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x05,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x0e,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x00]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x01]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x02]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x03]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x04]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x05]
|
|
|
|
v_lshlrev_b16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x54,0x01,0x06,0x06,0x0e]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x00]
|
|
|
|
v_lshlrev_b16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x55,0x01,0xe4,0x00,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0xff,0xe4,0x00,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x54,0x01,0xe4,0x00,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x00,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x40,0x01,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x41,0x01,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x42,0x01,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x43,0x01,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x30,0x01,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x34,0x01,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x38,0x01,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x3c,0x01,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x01,0x01,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x0f,0x01,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x11,0x01,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x1f,0x01,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x21,0x01,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0x2f,0x01,0x00]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x10]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x30]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x01]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x03]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_lshlrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x08,0x00]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x57,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0xff,0x06,0x06,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x65,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x66,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x67,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x6a,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x6b,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x7c,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x7e,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x7f,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x80,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0xc1,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0xf0,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0xf7,0x06,0x86,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x56,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x00,0x06,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x01,0x06,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x02,0x06,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x03,0x06,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x04,0x06,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x05,0x06,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x0e,0x06,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x16,0x06,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x16,0x06,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x00,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x01,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x02,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x03,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x04,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x05,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x0e,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x06]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x00]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x01]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x02]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x03]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x04]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x05]
|
|
|
|
v_lshrrev_b16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x56,0x01,0x06,0x06,0x0e]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x00]
|
|
|
|
v_lshrrev_b16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x57,0x01,0xe4,0x00,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0xff,0xe4,0x00,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x56,0x01,0xe4,0x00,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x1b,0x00,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x40,0x01,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x41,0x01,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x42,0x01,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x43,0x01,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x30,0x01,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x34,0x01,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x38,0x01,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x3c,0x01,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x01,0x01,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x0f,0x01,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x11,0x01,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x1f,0x01,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x21,0x01,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0x2f,0x01,0x00]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x10]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x30]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x01]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x03]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_lshrrev_b16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x08,0x00]
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|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06]
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|
|
|
v_ashrrev_i16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x59,0x01,0x06,0x06,0x06]
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|
|
|
v_ashrrev_i16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0xff,0x06,0x06,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x86,0x06]
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|
|
|
v_ashrrev_i16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x65,0x06,0x86,0x06]
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|
|
|
v_ashrrev_i16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x66,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x67,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x6a,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x6b,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x7c,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x7e,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x7f,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x80,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0xc1,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0xf0,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0xf7,0x06,0x86,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x58,0x01,0x06,0x06,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x00,0x06,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x01,0x06,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x02,0x06,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x03,0x06,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x04,0x06,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x05,0x06,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x0e,0x06,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x16,0x06,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x16,0x06,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x00,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x01,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x02,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x03,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x04,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x05,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x0e,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x06]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x00]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x01]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x02]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x03]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x04]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x05]
|
|
|
|
v_ashrrev_i16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x58,0x01,0x06,0x06,0x0e]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ashrrev_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x59,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0xff,0xe4,0x00,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x58,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x1b,0x00,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x40,0x01,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x41,0x01,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x42,0x01,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x43,0x01,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x30,0x01,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x34,0x01,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x38,0x01,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x3c,0x01,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x01,0x01,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x0f,0x01,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x11,0x01,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x1f,0x01,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x21,0x01,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0x2f,0x01,0x00]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x10]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x30]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x01]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x03]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_ashrrev_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x58,0x01,0xe4,0x08,0x00]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x5b,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0xff,0x06,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x86,0x06]
|
|
|
|
v_max_f16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x65,0x06,0x86,0x06]
|
|
|
|
v_max_f16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x66,0x06,0x86,0x06]
|
|
|
|
v_max_f16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x67,0x06,0x86,0x06]
|
|
|
|
v_max_f16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x6a,0x06,0x86,0x06]
|
|
|
|
v_max_f16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x6b,0x06,0x86,0x06]
|
|
|
|
v_max_f16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x7c,0x06,0x86,0x06]
|
|
|
|
v_max_f16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x7e,0x06,0x86,0x06]
|
|
|
|
v_max_f16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x7f,0x06,0x86,0x06]
|
|
|
|
v_max_f16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x80,0x06,0x86,0x06]
|
|
|
|
v_max_f16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0xc1,0x06,0x86,0x06]
|
|
|
|
v_max_f16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0xf0,0x06,0x86,0x06]
|
|
|
|
v_max_f16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0xf7,0x06,0x86,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x5a,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x26,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x00,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x01,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x02,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x03,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x04,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x05,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x0e,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x16,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x16,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x00,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x01,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x02,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x03,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x04,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x05,0x06]
|
|
|
|
v_max_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x16,0x06]
|
|
|
|
v_max_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x26,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x00]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x01]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x02]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x03]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x04]
|
|
|
|
v_max_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x05]
|
|
|
|
v_max_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x16]
|
|
|
|
v_max_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5a,0x01,0x06,0x06,0x26]
|
|
|
|
v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x5b,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0xff,0xe4,0x00,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x5a,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x1b,0x00,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x40,0x01,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x41,0x01,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x42,0x01,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x43,0x01,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x30,0x01,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x34,0x01,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x38,0x01,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x3c,0x01,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x01,0x01,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x0f,0x01,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x11,0x01,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x1f,0x01,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x21,0x01,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0x2f,0x01,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x10]
|
|
|
|
v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x30]
|
|
|
|
v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x01]
|
|
|
|
v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x03]
|
|
|
|
v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x08,0x00]
|
|
|
|
v_max_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x10,0x00]
|
|
|
|
v_max_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x20,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x40,0x00]
|
|
|
|
v_max_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5a,0x01,0xe4,0x80,0x00]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x5d,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0xff,0x06,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x86,0x06]
|
|
|
|
v_min_f16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x65,0x06,0x86,0x06]
|
|
|
|
v_min_f16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x66,0x06,0x86,0x06]
|
|
|
|
v_min_f16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x67,0x06,0x86,0x06]
|
|
|
|
v_min_f16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x6a,0x06,0x86,0x06]
|
|
|
|
v_min_f16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x6b,0x06,0x86,0x06]
|
|
|
|
v_min_f16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x7c,0x06,0x86,0x06]
|
|
|
|
v_min_f16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x7e,0x06,0x86,0x06]
|
|
|
|
v_min_f16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x7f,0x06,0x86,0x06]
|
|
|
|
v_min_f16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x80,0x06,0x86,0x06]
|
|
|
|
v_min_f16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0xc1,0x06,0x86,0x06]
|
|
|
|
v_min_f16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0xf0,0x06,0x86,0x06]
|
|
|
|
v_min_f16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0xf7,0x06,0x86,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x5c,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x26,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x00,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x01,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x02,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x03,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x04,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x05,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x0e,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x16,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x16,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x00,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x01,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x02,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x03,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x04,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x05,0x06]
|
|
|
|
v_min_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x16,0x06]
|
|
|
|
v_min_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x26,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x00]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x01]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x02]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x03]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x04]
|
|
|
|
v_min_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x05]
|
|
|
|
v_min_f16_sdwa v5, v1, -v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x16]
|
|
|
|
v_min_f16_sdwa v5, v1, |v2| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5c,0x01,0x06,0x06,0x26]
|
|
|
|
v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x00]
|
|
|
|
v_min_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x5d,0x01,0xe4,0x00,0x00]
|
|
|
|
v_min_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0xff,0xe4,0x00,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x5c,0x01,0xe4,0x00,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x1b,0x00,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x40,0x01,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x41,0x01,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x42,0x01,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x43,0x01,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x30,0x01,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x34,0x01,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x38,0x01,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x3c,0x01,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x01,0x01,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x0f,0x01,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x11,0x01,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x1f,0x01,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x21,0x01,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0x2f,0x01,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x10]
|
|
|
|
v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x30]
|
|
|
|
v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x01]
|
|
|
|
v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x03]
|
|
|
|
v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x08,0x00]
|
|
|
|
v_min_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x10,0x00]
|
|
|
|
v_min_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x20,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x40,0x00]
|
|
|
|
v_min_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5c,0x01,0xe4,0x80,0x00]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x5f,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0xff,0x06,0x06,0x06]
|
|
|
|
v_max_u16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x86,0x06]
|
|
|
|
v_max_u16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x65,0x06,0x86,0x06]
|
|
|
|
v_max_u16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x66,0x06,0x86,0x06]
|
|
|
|
v_max_u16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x67,0x06,0x86,0x06]
|
|
|
|
v_max_u16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x6a,0x06,0x86,0x06]
|
|
|
|
v_max_u16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x6b,0x06,0x86,0x06]
|
|
|
|
v_max_u16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x7c,0x06,0x86,0x06]
|
|
|
|
v_max_u16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x7e,0x06,0x86,0x06]
|
|
|
|
v_max_u16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x7f,0x06,0x86,0x06]
|
|
|
|
v_max_u16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x80,0x06,0x86,0x06]
|
|
|
|
v_max_u16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0xc1,0x06,0x86,0x06]
|
|
|
|
v_max_u16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0xf0,0x06,0x86,0x06]
|
|
|
|
v_max_u16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0xf7,0x06,0x86,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x5e,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x00,0x06,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x01,0x06,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x02,0x06,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x03,0x06,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x04,0x06,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x05,0x06,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x0e,0x06,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x16,0x06,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x16,0x06,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x00,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x01,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x02,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x03,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x04,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x05,0x06]
|
|
|
|
v_max_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x0e,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x00]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x01]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x02]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x03]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x04]
|
|
|
|
v_max_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x05]
|
|
|
|
v_max_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x5e,0x01,0x06,0x06,0x0e]
|
|
|
|
v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x5f,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0xff,0xe4,0x00,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x5e,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x1b,0x00,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x40,0x01,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x41,0x01,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x42,0x01,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x43,0x01,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x30,0x01,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x34,0x01,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x38,0x01,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x3c,0x01,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x01,0x01,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x0f,0x01,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x11,0x01,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x1f,0x01,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x21,0x01,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0x2f,0x01,0x00]
|
|
|
|
v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x10]
|
|
|
|
v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x30]
|
|
|
|
v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x01]
|
|
|
|
v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x03]
|
|
|
|
v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_max_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x08,0x00]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_i16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x61,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_i16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0xff,0x06,0x06,0x06]
|
|
|
|
v_max_i16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x86,0x06]
|
|
|
|
v_max_i16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x65,0x06,0x86,0x06]
|
|
|
|
v_max_i16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x66,0x06,0x86,0x06]
|
|
|
|
v_max_i16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x67,0x06,0x86,0x06]
|
|
|
|
v_max_i16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x6a,0x06,0x86,0x06]
|
|
|
|
v_max_i16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x6b,0x06,0x86,0x06]
|
|
|
|
v_max_i16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x7c,0x06,0x86,0x06]
|
|
|
|
v_max_i16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x7e,0x06,0x86,0x06]
|
|
|
|
v_max_i16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x7f,0x06,0x86,0x06]
|
|
|
|
v_max_i16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x80,0x06,0x86,0x06]
|
|
|
|
v_max_i16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0xc1,0x06,0x86,0x06]
|
|
|
|
v_max_i16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0xf0,0x06,0x86,0x06]
|
|
|
|
v_max_i16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0xf7,0x06,0x86,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x60,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x00,0x06,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x01,0x06,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x02,0x06,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x03,0x06,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x04,0x06,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x05,0x06,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x0e,0x06,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x16,0x06,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x16,0x06,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x00,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x01,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x02,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x03,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x04,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x05,0x06]
|
|
|
|
v_max_i16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x0e,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x06]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x00]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x01]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x02]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x03]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x04]
|
|
|
|
v_max_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x05]
|
|
|
|
v_max_i16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x60,0x01,0x06,0x06,0x0e]
|
|
|
|
v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x61,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0xff,0xe4,0x00,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x60,0x01,0xe4,0x00,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x1b,0x00,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x40,0x01,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x41,0x01,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x42,0x01,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x43,0x01,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x30,0x01,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x34,0x01,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x38,0x01,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x3c,0x01,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x01,0x01,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x0f,0x01,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x11,0x01,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x1f,0x01,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x21,0x01,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0x2f,0x01,0x00]
|
|
|
|
v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x10]
|
|
|
|
v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x30]
|
|
|
|
v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x01]
|
|
|
|
v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x03]
|
|
|
|
v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_max_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x60,0x01,0xe4,0x08,0x00]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_u16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x63,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_u16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0xff,0x06,0x06,0x06]
|
|
|
|
v_min_u16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x86,0x06]
|
|
|
|
v_min_u16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x65,0x06,0x86,0x06]
|
|
|
|
v_min_u16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x66,0x06,0x86,0x06]
|
|
|
|
v_min_u16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x67,0x06,0x86,0x06]
|
|
|
|
v_min_u16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x6a,0x06,0x86,0x06]
|
|
|
|
v_min_u16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x6b,0x06,0x86,0x06]
|
|
|
|
v_min_u16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x7c,0x06,0x86,0x06]
|
|
|
|
v_min_u16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x7e,0x06,0x86,0x06]
|
|
|
|
v_min_u16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x7f,0x06,0x86,0x06]
|
|
|
|
v_min_u16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x80,0x06,0x86,0x06]
|
|
|
|
v_min_u16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0xc1,0x06,0x86,0x06]
|
|
|
|
v_min_u16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0xf0,0x06,0x86,0x06]
|
|
|
|
v_min_u16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0xf7,0x06,0x86,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x62,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x00,0x06,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x01,0x06,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x02,0x06,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x03,0x06,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x04,0x06,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x05,0x06,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x0e,0x06,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x16,0x06,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x16,0x06,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x00,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x01,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x02,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x03,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x04,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x05,0x06]
|
|
|
|
v_min_u16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x0e,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x00]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x01]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x02]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x03]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x04]
|
|
|
|
v_min_u16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x05]
|
|
|
|
v_min_u16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x62,0x01,0x06,0x06,0x0e]
|
|
|
|
v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x00]
|
|
|
|
v_min_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x63,0x01,0xe4,0x00,0x00]
|
|
|
|
v_min_u16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0xff,0xe4,0x00,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x62,0x01,0xe4,0x00,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x1b,0x00,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x40,0x01,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x41,0x01,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x42,0x01,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x43,0x01,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x30,0x01,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x34,0x01,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x38,0x01,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x3c,0x01,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x01,0x01,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x0f,0x01,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x11,0x01,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x1f,0x01,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x21,0x01,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0x2f,0x01,0x00]
|
|
|
|
v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x10]
|
|
|
|
v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x30]
|
|
|
|
v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x01]
|
|
|
|
v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x03]
|
|
|
|
v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_min_u16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x62,0x01,0xe4,0x08,0x00]
|
|
|
|
v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_i16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x65,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_i16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0xff,0x06,0x06,0x06]
|
|
|
|
v_min_i16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x86,0x06]
|
|
|
|
v_min_i16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x65,0x06,0x86,0x06]
|
|
|
|
v_min_i16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x66,0x06,0x86,0x06]
|
|
|
|
v_min_i16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x67,0x06,0x86,0x06]
|
|
|
|
v_min_i16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x6a,0x06,0x86,0x06]
|
|
|
|
v_min_i16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x6b,0x06,0x86,0x06]
|
|
|
|
v_min_i16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x7c,0x06,0x86,0x06]
|
|
|
|
v_min_i16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x7e,0x06,0x86,0x06]
|
|
|
|
v_min_i16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x7f,0x06,0x86,0x06]
|
|
|
|
v_min_i16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x80,0x06,0x86,0x06]
|
|
|
|
v_min_i16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0xc1,0x06,0x86,0x06]
|
|
|
|
v_min_i16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0xf0,0x06,0x86,0x06]
|
|
|
|
v_min_i16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0xf7,0x06,0x86,0x06]
|
|
|
|
v_min_i16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x64,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_i16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06]
|
|
|
|
v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x00,0x06,0x06]
|
|
|
|
v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x01,0x06,0x06]
|
|
|
|
v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x02,0x06,0x06]
|
|
|
|
v_min_i16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x03,0x06,0x06]
|
|
|
|
v_min_i16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x04,0x06,0x06]
|
|
|
|
v_min_i16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x05,0x06,0x06]
|
|
|
|
v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x0e,0x06,0x06]
|
|
|
|
v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x16,0x06,0x06]
|
|
|
|
v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x16,0x06,0x06]
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v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06]
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v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x00,0x06]
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v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x01,0x06]
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v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x02,0x06]
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v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x03,0x06]
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v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x04,0x06]
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v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x05,0x06]
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v_min_i16_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x0e,0x06]
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v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x06]
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v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x00]
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v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x01]
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v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x02]
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v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x03]
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v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x04]
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v_min_i16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x05]
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v_min_i16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x64,0x01,0x06,0x06,0x0e]
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v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x00]
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v_min_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0xfe,0x65,0x01,0xe4,0x00,0x00]
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v_min_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0xff,0xe4,0x00,0x00]
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v_min_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0xfe,0x0b,0x64,0x01,0xe4,0x00,0x00]
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v_min_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x1b,0x00,0x00]
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v_min_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x40,0x01,0x00]
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v_min_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x41,0x01,0x00]
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v_min_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x42,0x01,0x00]
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v_min_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x43,0x01,0x00]
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v_min_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x30,0x01,0x00]
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v_min_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x34,0x01,0x00]
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v_min_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x38,0x01,0x00]
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v_min_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x3c,0x01,0x00]
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v_min_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x01,0x01,0x00]
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v_min_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x0f,0x01,0x00]
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v_min_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x11,0x01,0x00]
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v_min_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x1f,0x01,0x00]
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v_min_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x21,0x01,0x00]
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v_min_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0x2f,0x01,0x00]
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v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x10]
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v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x30]
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v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0xf0]
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v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0xf0]
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v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x01]
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v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x03]
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v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x0f]
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v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0x0f]
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v_min_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
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// CHECK: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x08,0x00]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06]
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v_ldexp_f16_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0xfe,0x67,0x01,0x06,0x06,0x06]
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v_ldexp_f16_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0xff,0x06,0x06,0x06]
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v_ldexp_f16_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x86,0x06]
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v_ldexp_f16_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x65,0x06,0x86,0x06]
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v_ldexp_f16_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x66,0x06,0x86,0x06]
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v_ldexp_f16_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x67,0x06,0x86,0x06]
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v_ldexp_f16_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x6a,0x06,0x86,0x06]
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v_ldexp_f16_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x6b,0x06,0x86,0x06]
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v_ldexp_f16_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x7c,0x06,0x86,0x06]
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v_ldexp_f16_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x7e,0x06,0x86,0x06]
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v_ldexp_f16_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x7f,0x06,0x86,0x06]
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v_ldexp_f16_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x80,0x06,0x86,0x06]
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v_ldexp_f16_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0xc1,0x06,0x86,0x06]
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v_ldexp_f16_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0xf0,0x06,0x86,0x06]
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v_ldexp_f16_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0xf7,0x06,0x86,0x06]
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v_ldexp_f16_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0xfe,0x0b,0x66,0x01,0x06,0x06,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x26,0x06,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x00,0x06,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x01,0x06,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x02,0x06,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x03,0x06,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x04,0x06,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x05,0x06,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x0e,0x06,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x16,0x06,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x16,0x06,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x00,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x01,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x02,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x03,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x04,0x06]
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v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x05,0x06]
|
|
|
|
v_ldexp_f16_sdwa v5, -v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x16,0x06]
|
|
|
|
v_ldexp_f16_sdwa v5, |v1|, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x26,0x06]
|
|
|
|
v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x06]
|
|
|
|
v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x00]
|
|
|
|
v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x01]
|
|
|
|
v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x02]
|
|
|
|
v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x03]
|
|
|
|
v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x04]
|
|
|
|
v_ldexp_f16_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x05]
|
|
|
|
v_ldexp_f16_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x66,0x01,0x06,0x06,0x0e]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ldexp_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x67,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0xff,0xe4,0x00,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x66,0x01,0xe4,0x00,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x1b,0x00,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x40,0x01,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x41,0x01,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x42,0x01,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x43,0x01,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x30,0x01,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x34,0x01,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x38,0x01,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x3c,0x01,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x01,0x01,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x0f,0x01,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x11,0x01,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x1f,0x01,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x21,0x01,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0x2f,0x01,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x10]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x30]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x01]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x03]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_ldexp_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x08,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x10,0x00]
|
|
|
|
v_ldexp_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x20,0x00]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x69,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0xff,0x06,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x86,0x06]
|
|
|
|
v_add_u32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x65,0x06,0x86,0x06]
|
|
|
|
v_add_u32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x66,0x06,0x86,0x06]
|
|
|
|
v_add_u32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x67,0x06,0x86,0x06]
|
|
|
|
v_add_u32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x6a,0x06,0x86,0x06]
|
|
|
|
v_add_u32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x6b,0x06,0x86,0x06]
|
|
|
|
v_add_u32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x7c,0x06,0x86,0x06]
|
|
|
|
v_add_u32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x7e,0x06,0x86,0x06]
|
|
|
|
v_add_u32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x7f,0x06,0x86,0x06]
|
|
|
|
v_add_u32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x80,0x06,0x86,0x06]
|
|
|
|
v_add_u32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0xc1,0x06,0x86,0x06]
|
|
|
|
v_add_u32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0xf0,0x06,0x86,0x06]
|
|
|
|
v_add_u32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0xf7,0x06,0x86,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x68,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x26,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x00,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x01,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x02,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x03,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x04,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x05,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x0e,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x16,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x16,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x00,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x01,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x02,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x03,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x04,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x05,0x06]
|
|
|
|
v_add_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x0e,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x06]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x00]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x01]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x02]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x03]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x04]
|
|
|
|
v_add_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x05]
|
|
|
|
v_add_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x68,0x01,0x06,0x06,0x0e]
|
|
|
|
v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x00]
|
|
|
|
v_add_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x69,0x01,0xe4,0x00,0x00]
|
|
|
|
v_add_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0xff,0xe4,0x00,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x68,0x01,0xe4,0x00,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x1b,0x00,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x40,0x01,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x41,0x01,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x42,0x01,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x43,0x01,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x30,0x01,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x34,0x01,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x38,0x01,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x3c,0x01,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x01,0x01,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x0f,0x01,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x11,0x01,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x1f,0x01,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x21,0x01,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0x2f,0x01,0x00]
|
|
|
|
v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x10]
|
|
|
|
v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x30]
|
|
|
|
v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x01]
|
|
|
|
v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x03]
|
|
|
|
v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_add_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x08,0x00]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x6b,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0xff,0x06,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x86,0x06]
|
|
|
|
v_sub_u32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x65,0x06,0x86,0x06]
|
|
|
|
v_sub_u32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x66,0x06,0x86,0x06]
|
|
|
|
v_sub_u32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x67,0x06,0x86,0x06]
|
|
|
|
v_sub_u32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x6a,0x06,0x86,0x06]
|
|
|
|
v_sub_u32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x6b,0x06,0x86,0x06]
|
|
|
|
v_sub_u32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x7c,0x06,0x86,0x06]
|
|
|
|
v_sub_u32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x7e,0x06,0x86,0x06]
|
|
|
|
v_sub_u32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x7f,0x06,0x86,0x06]
|
|
|
|
v_sub_u32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x80,0x06,0x86,0x06]
|
|
|
|
v_sub_u32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0xc1,0x06,0x86,0x06]
|
|
|
|
v_sub_u32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0xf0,0x06,0x86,0x06]
|
|
|
|
v_sub_u32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0xf7,0x06,0x86,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x6a,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x26,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x00,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x01,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x02,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x03,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x04,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x05,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x0e,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x16,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x16,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x00,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x01,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x02,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x03,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x04,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x05,0x06]
|
|
|
|
v_sub_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x0e,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x06]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x00]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x01]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x02]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x03]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x04]
|
|
|
|
v_sub_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x05]
|
|
|
|
v_sub_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6a,0x01,0x06,0x06,0x0e]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sub_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x6b,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sub_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0xff,0xe4,0x00,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x6a,0x01,0xe4,0x00,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x00,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x40,0x01,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x41,0x01,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x42,0x01,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x43,0x01,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x30,0x01,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x34,0x01,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x38,0x01,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x3c,0x01,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x01,0x01,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x0f,0x01,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x11,0x01,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x1f,0x01,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x21,0x01,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0x2f,0x01,0x00]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x10]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x30]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x01]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x03]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_sub_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x08,0x00]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v255, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xfe,0x6d,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v255, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0xff,0x06,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, s1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x86,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, s101, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x65,0x06,0x86,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, flat_scratch_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x66,0x06,0x86,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, flat_scratch_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x67,0x06,0x86,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, vcc_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x6a,0x06,0x86,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, vcc_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x6b,0x06,0x86,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, m0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x7c,0x06,0x86,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, exec_lo, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x7e,0x06,0x86,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, exec_hi, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x7f,0x06,0x86,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, 0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x80,0x06,0x86,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, -1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0xc1,0x06,0x86,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, 0.5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0xf0,0x06,0x86,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, -4.0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0xf7,0x06,0x86,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x0b,0x6c,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x26,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x00,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x01,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x02,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x03,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x04,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x05,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x0e,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x16,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x16,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x00,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x01,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x02,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x03,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x04,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x05,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, sext(v1), v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x0e,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x06]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x00]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x01]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x02]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x03]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x04]
|
|
|
|
v_subrev_u32_sdwa v5, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x05]
|
|
|
|
v_subrev_u32_sdwa v5, v1, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x0a,0x6c,0x01,0x06,0x06,0x0e]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subrev_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0xfe,0x6d,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0xff,0xe4,0x00,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0xfe,0x0b,0x6c,0x01,0xe4,0x00,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x00,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x40,0x01,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x41,0x01,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x42,0x01,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x43,0x01,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x30,0x01,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x34,0x01,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x38,0x01,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x3c,0x01,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x01,0x01,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x0f,0x01,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x11,0x01,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x1f,0x01,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x21,0x01,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0x2f,0x01,0x00]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x10]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x30]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] bank_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0xf0]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x01]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x03]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0x0f]
|
|
|
|
v_subrev_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
|
|
// CHECK: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x08,0x00]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_class_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x21,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_class_f32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x20,0x7c,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x23,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_class_f32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x22,0x7c,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_class_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x29,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_class_f16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x28,0x7c,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x2b,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_class_f16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x2a,0x7c,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_f_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x41,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_f_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x43,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_lt_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x45,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_eq_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_le_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x47,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_le_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x49,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_gt_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x4b,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_lg_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x4d,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_ge_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_o_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x4f,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_o_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_u_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x51,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_u_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x53,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_nge_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x55,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_nlg_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x57,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_ngt_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x59,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_nle_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x5b,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_neq_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x5d,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_nlt_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x5f,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_tru_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x61,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_f_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x63,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_lt_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x65,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_eq_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x67,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_le_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x69,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_gt_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x6b,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_lg_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x6d,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_ge_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x6f,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_o_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x71,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_u_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x73,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_nge_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x75,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_nlg_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x77,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_ngt_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x79,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_nle_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x7b,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_neq_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x7d,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_nlt_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_tru_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_tru_f16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_tru_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_tru_f16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_tru_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x00,0x06,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0xff,0x86,0x06,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x86,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x65,0x86,0x86,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x66,0x86,0x86,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x67,0x86,0x86,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x6a,0x86,0x86,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x6b,0x86,0x86,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x7c,0x86,0x86,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x7e,0x86,0x86,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x7f,0x86,0x86,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x80,0x86,0x86,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0xc1,0x86,0x86,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0xf0,0x86,0x86,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0xf7,0x86,0x86,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0xfe,0x7f,0x7c,0x01,0x86,0x06,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], v1, v2 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x06,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x00,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x01,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x02,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x03,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x04,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x05,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x16,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x26,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x06,0x06]
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v_cmpx_tru_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x06,0x00]
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v_cmpx_tru_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x06,0x01]
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v_cmpx_tru_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x06,0x02]
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v_cmpx_tru_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x06,0x03]
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v_cmpx_tru_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x06,0x04]
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v_cmpx_tru_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x06,0x05]
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v_cmpx_tru_f16_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x06,0x16]
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v_cmpx_tru_f16_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7c,0x01,0x86,0x06,0x26]
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v_cmp_f_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x06,0x06]
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v_cmp_f_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x88,0x06,0x06]
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v_cmp_f_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0xe4,0x06,0x06]
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v_cmp_f_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0xe6,0x06,0x06]
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v_cmp_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x00,0x06,0x06]
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v_cmp_f_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0xff,0x86,0x06,0x06]
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v_cmp_f_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x86,0x06]
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v_cmp_f_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x65,0x86,0x86,0x06]
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v_cmp_f_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x66,0x86,0x86,0x06]
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v_cmp_f_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x67,0x86,0x86,0x06]
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v_cmp_f_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x6a,0x86,0x86,0x06]
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v_cmp_f_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x6b,0x86,0x86,0x06]
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v_cmp_f_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x7c,0x86,0x86,0x06]
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v_cmp_f_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x7e,0x86,0x86,0x06]
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v_cmp_f_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x7f,0x86,0x86,0x06]
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v_cmp_f_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x80,0x86,0x86,0x06]
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v_cmp_f_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0xc1,0x86,0x86,0x06]
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v_cmp_f_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0xf0,0x86,0x86,0x06]
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v_cmp_f_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0xf7,0x86,0x86,0x06]
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v_cmp_f_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0xfe,0x81,0x7c,0x01,0x86,0x06,0x06]
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v_cmp_f_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x06,0x06]
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v_cmp_f_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x00,0x06]
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v_cmp_f_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x01,0x06]
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v_cmp_f_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x02,0x06]
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v_cmp_f_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x03,0x06]
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v_cmp_f_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x04,0x06]
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v_cmp_f_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x05,0x06]
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v_cmp_f_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x16,0x06]
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v_cmp_f_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x26,0x06]
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v_cmp_f_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x06,0x06]
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v_cmp_f_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x06,0x00]
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v_cmp_f_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x06,0x01]
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v_cmp_f_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x06,0x02]
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v_cmp_f_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x06,0x03]
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v_cmp_f_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x06,0x04]
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v_cmp_f_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x06,0x05]
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v_cmp_f_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x06,0x16]
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v_cmp_f_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
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// CHECK: [0xf9,0x04,0x80,0x7c,0x01,0x86,0x06,0x26]
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v_cmp_lt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x06,0x06]
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v_cmp_lt_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x88,0x06,0x06]
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|
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v_cmp_lt_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0xe4,0x06,0x06]
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|
|
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v_cmp_lt_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0xe6,0x06,0x06]
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|
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v_cmp_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x00,0x06,0x06]
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|
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v_cmp_lt_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0xff,0x86,0x06,0x06]
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|
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v_cmp_lt_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x86,0x06]
|
|
|
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v_cmp_lt_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x65,0x86,0x86,0x06]
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v_cmp_lt_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x66,0x86,0x86,0x06]
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|
|
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v_cmp_lt_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x67,0x86,0x86,0x06]
|
|
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v_cmp_lt_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x6a,0x86,0x86,0x06]
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|
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v_cmp_lt_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
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v_cmp_lt_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x83,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_lt_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x85,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_eq_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_le_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x87,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_le_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x89,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_gt_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x8b,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_lg_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x8d,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_ge_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_o_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x8f,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_o_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_u_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x91,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_u_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x93,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_nge_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x95,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_nlg_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x97,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_ngt_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x99,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_nle_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x9b,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_neq_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x9d,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_nlt_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x9f,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmp_tru_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xa1,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_f_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xa3,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_lt_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xa5,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_eq_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xa7,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_le_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xa9,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_gt_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xab,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_lg_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xad,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_ge_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xaf,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_o_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xb1,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_u_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xb3,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_nge_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xb5,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_nlg_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xb7,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_ngt_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xb9,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_nle_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xbb,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_neq_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xbd,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_nlt_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xbf,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], -v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x16,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], |v1|, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x26,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, -v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x06,0x16]
|
|
|
|
v_cmpx_tru_f32_sdwa s[6:7], v1, |v2| src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7c,0x01,0x86,0x06,0x26]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_f_i16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_f_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x41,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_f_i16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x40,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x43,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_lt_i16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x42,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x45,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_eq_i16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x44,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_le_i16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_le_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x47,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_le_i16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x46,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x49,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_gt_i16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x48,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x4b,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_ne_i16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4a,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x4d,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_ge_i16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4c,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_t_i16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_t_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x4f,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_t_i16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x4e,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_f_u16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_f_u16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x51,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_f_u16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x50,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x53,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_lt_u16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x52,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x65,0x86,0x86,0x06]
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|
|
|
v_cmp_eq_u16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x55,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_eq_u16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x54,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_le_u16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_le_u16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x57,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_le_u16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x56,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x59,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_gt_u16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x58,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x5b,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_ne_u16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5a,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x5d,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_ge_u16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5c,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_t_u16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_t_u16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x5f,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_t_u16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x5e,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x61,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_f_i16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x60,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x63,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_lt_i16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x62,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x65,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_eq_i16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x64,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x67,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_le_i16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x66,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x69,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_gt_i16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x68,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x6b,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_ne_i16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6a,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x6d,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_ge_i16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6c,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x6f,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_t_i16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x6e,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x71,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_f_u16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x70,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x73,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_lt_u16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x72,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x75,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_eq_u16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x74,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x77,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_le_u16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x76,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x79,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_gt_u16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x78,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x7b,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_ne_u16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7a,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x7d,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_ge_u16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7c,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_t_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_t_u16_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x88,0x06,0x06]
|
|
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v_cmpx_t_u16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0xe4,0x06,0x06]
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v_cmpx_t_u16_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0xe6,0x06,0x06]
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v_cmpx_t_u16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x00,0x06,0x06]
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v_cmpx_t_u16_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x7e,0x7d,0xff,0x86,0x06,0x06]
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v_cmpx_t_u16_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x86,0x06]
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v_cmpx_t_u16_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0x65,0x86,0x86,0x06]
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v_cmpx_t_u16_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0x66,0x86,0x86,0x06]
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v_cmpx_t_u16_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0x67,0x86,0x86,0x06]
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v_cmpx_t_u16_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0x6a,0x86,0x86,0x06]
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v_cmpx_t_u16_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0x6b,0x86,0x86,0x06]
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v_cmpx_t_u16_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0x7c,0x86,0x86,0x06]
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v_cmpx_t_u16_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0x7e,0x86,0x86,0x06]
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v_cmpx_t_u16_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0x7f,0x86,0x86,0x06]
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v_cmpx_t_u16_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0x80,0x86,0x86,0x06]
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v_cmpx_t_u16_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0xc1,0x86,0x86,0x06]
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v_cmpx_t_u16_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0xf0,0x86,0x86,0x06]
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v_cmpx_t_u16_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0xf7,0x86,0x86,0x06]
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v_cmpx_t_u16_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0xfe,0x7f,0x7d,0x01,0x86,0x06,0x06]
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v_cmpx_t_u16_sdwa s[6:7], v1, v2 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x06,0x06]
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v_cmpx_t_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x00,0x06]
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v_cmpx_t_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x01,0x06]
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v_cmpx_t_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x02,0x06]
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v_cmpx_t_u16_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x03,0x06]
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v_cmpx_t_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x04,0x06]
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v_cmpx_t_u16_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x05,0x06]
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v_cmpx_t_u16_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x0e,0x06]
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v_cmpx_t_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x06,0x06]
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v_cmpx_t_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
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|
// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x06,0x00]
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v_cmpx_t_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x06,0x01]
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v_cmpx_t_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x06,0x02]
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|
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v_cmpx_t_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x06,0x03]
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|
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v_cmpx_t_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x06,0x04]
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|
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v_cmpx_t_u16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x06,0x05]
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|
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v_cmpx_t_u16_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x7e,0x7d,0x01,0x86,0x06,0x0e]
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|
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v_cmp_f_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x06,0x06]
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|
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v_cmp_f_i32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x88,0x06,0x06]
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|
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|
v_cmp_f_i32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0xe4,0x06,0x06]
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v_cmp_f_i32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0xe6,0x06,0x06]
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v_cmp_f_i32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x00,0x06,0x06]
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v_cmp_f_i32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x80,0x7d,0xff,0x86,0x06,0x06]
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v_cmp_f_i32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x86,0x06]
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v_cmp_f_i32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x80,0x7d,0x65,0x86,0x86,0x06]
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v_cmp_f_i32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x80,0x7d,0x66,0x86,0x86,0x06]
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v_cmp_f_i32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x80,0x7d,0x67,0x86,0x86,0x06]
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v_cmp_f_i32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x6a,0x86,0x86,0x06]
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v_cmp_f_i32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x6b,0x86,0x86,0x06]
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v_cmp_f_i32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
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// CHECK: [0xf9,0x04,0x80,0x7d,0x7c,0x86,0x86,0x06]
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v_cmp_f_i32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x7e,0x86,0x86,0x06]
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v_cmp_f_i32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x7f,0x86,0x86,0x06]
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v_cmp_f_i32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x80,0x86,0x86,0x06]
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v_cmp_f_i32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
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|
// CHECK: [0xf9,0x04,0x80,0x7d,0xc1,0x86,0x86,0x06]
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v_cmp_f_i32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0xf0,0x86,0x86,0x06]
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|
|
|
v_cmp_f_i32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0xf7,0x86,0x86,0x06]
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|
|
|
v_cmp_f_i32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x81,0x7d,0x01,0x86,0x06,0x06]
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|
|
|
v_cmp_f_i32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x06,0x06]
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|
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|
v_cmp_f_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x00,0x06]
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|
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|
v_cmp_f_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x01,0x06]
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|
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|
v_cmp_f_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x02,0x06]
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|
|
|
v_cmp_f_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x03,0x06]
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|
|
|
v_cmp_f_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x04,0x06]
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|
|
|
v_cmp_f_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x05,0x06]
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|
|
|
v_cmp_f_i32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x0e,0x06]
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|
|
|
v_cmp_f_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x06,0x06]
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|
|
|
v_cmp_f_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x06,0x00]
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|
|
|
v_cmp_f_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x06,0x01]
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|
|
|
v_cmp_f_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_f_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_f_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_f_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_f_i32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x80,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x83,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_lt_i32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x82,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x85,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_eq_i32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x84,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_le_i32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_le_i32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x87,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_le_i32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x86,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x89,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_gt_i32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x88,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x8b,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_ne_i32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8a,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x8d,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_ge_i32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8c,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_t_i32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_t_i32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x8f,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_t_i32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x8e,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_f_u32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_f_u32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x91,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_f_u32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x90,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x93,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_lt_u32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x92,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x95,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_eq_u32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x94,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_le_u32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_le_u32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x97,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_le_u32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x96,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x99,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_gt_u32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x98,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x9b,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_ne_u32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9a,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x9d,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_ge_u32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9c,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmp_t_u32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmp_t_u32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0x9f,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmp_t_u32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0x9e,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xa1,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_f_i32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa0,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xa3,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_lt_i32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa2,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xa5,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_eq_i32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa4,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xa7,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_le_i32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa6,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xa9,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_gt_i32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xa8,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xab,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_ne_i32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xaa,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xad,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_ge_i32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xac,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xaf,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_t_i32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xae,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xb1,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_f_u32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb0,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xb3,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_lt_u32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb2,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xb5,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_eq_u32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb4,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xb7,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_le_u32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb6,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xb9,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_gt_u32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xb8,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xbb,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x03,0x06]
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|
|
|
v_cmpx_ne_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_ne_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x05,0x06]
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|
|
|
v_cmpx_ne_u32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x0e,0x06]
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|
|
|
v_cmpx_ne_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x06,0x06]
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|
|
|
v_cmpx_ne_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x06,0x00]
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|
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|
v_cmpx_ne_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x06,0x01]
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|
|
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v_cmpx_ne_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x06,0x02]
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|
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|
v_cmpx_ne_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x06,0x03]
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|
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v_cmpx_ne_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x06,0x04]
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|
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|
v_cmpx_ne_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x06,0x05]
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|
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v_cmpx_ne_u32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xba,0x7d,0x01,0x86,0x06,0x0e]
|
|
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|
v_cmpx_ge_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x06,0x06]
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|
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v_cmpx_ge_u32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x88,0x06,0x06]
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|
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v_cmpx_ge_u32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0xe4,0x06,0x06]
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|
|
|
v_cmpx_ge_u32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0xe6,0x06,0x06]
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|
|
|
v_cmpx_ge_u32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0xff,0x86,0x06,0x06]
|
|
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|
v_cmpx_ge_u32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xbd,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_ge_u32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbc,0x7d,0x01,0x86,0x06,0x0e]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[8:9], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x88,0x06,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0xe4,0x06,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa flat_scratch, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0xe6,0x06,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x00,0x06,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v255, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0xff,0x86,0x06,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], s1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], s101, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x65,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], flat_scratch_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x66,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], flat_scratch_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x67,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], vcc_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x6a,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], vcc_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x6b,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], m0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x7c,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], exec_lo, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x7e,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], exec_hi, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x7f,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], 0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x80,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], -1, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0xc1,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], 0.5, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0xf0,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], -4.0, v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0xf7,0x86,0x86,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, v255 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0xfe,0xbf,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, v2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x00,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x01,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x02,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x03,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_0 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x04,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, v2 src0_sel:WORD_1 src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x05,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], sext(v1), v2 src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x0e,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x06,0x06]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_0
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x06,0x00]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_1
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x06,0x01]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_2
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x06,0x02]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:BYTE_3
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x06,0x03]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_0
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x06,0x04]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:WORD_1
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x06,0x05]
|
|
|
|
v_cmpx_t_u32_sdwa s[6:7], v1, sext(v2) src0_sel:DWORD src1_sel:DWORD
|
|
// CHECK: [0xf9,0x04,0xbe,0x7d,0x01,0x86,0x06,0x0e]
|