.. |
AArch64
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[AArch64][Inline-Asm] Return the 32-bit floating point register class
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2016-07-21 21:39:05 +00:00 |
AMDGPU
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Revert "Invariant start/end intrinsics overloaded for address space"
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2016-07-21 19:06:28 +00:00 |
ARM
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[ARM] Skip inline asm memory operands in DAGToDAGISel
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2016-07-20 09:48:24 +00:00 |
BPF
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[BPF] Remove exit-on-error from tests (PR27768, PR27769)
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2016-05-30 08:28:34 +00:00 |
Generic
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Move mempcpy_call.ll to X86 subdirectory
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2016-07-13 18:28:45 +00:00 |
Hexagon
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[Hexagon] Handle returning small structures by value
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2016-07-18 17:30:41 +00:00 |
Inputs
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…
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Lanai
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[lanai] Use peephole optimizer to generate more conditional ALU operations.
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2016-07-07 23:36:04 +00:00 |
MIR
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[MIRTesting] Abort when failing to parse a function.
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2016-07-21 22:25:57 +00:00 |
MSP430
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…
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Mips
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Revert "RegScavenging: Add scavengeRegisterBackwards()"
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2016-07-20 00:21:32 +00:00 |
NVPTX
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[NVPTX] Enable the load-store vectorizer on nvptx.
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2016-07-20 22:11:36 +00:00 |
PowerPC
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Revert "RegScavenging: Add scavengeRegisterBackwards()"
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2016-07-20 00:21:32 +00:00 |
SPARC
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VirtRegMap: Replace some identity copies with KILL instructions.
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2016-07-09 00:19:07 +00:00 |
SystemZ
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Revert "RegScavenging: Add scavengeRegisterBackwards()"
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2016-07-20 00:21:32 +00:00 |
Thumb
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Revert "RegScavenging: Add scavengeRegisterBackwards()"
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2016-07-20 00:21:32 +00:00 |
Thumb2
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[Thumb] Reapply r272251 with a fix for PR28348 (mk 2)
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2016-07-05 12:37:13 +00:00 |
WebAssembly
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[WebAssembly] Emit type signatures for declared functions
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2016-06-03 18:34:36 +00:00 |
WinEH
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revert http://reviews.llvm.org/D21101
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2016-06-30 17:52:24 +00:00 |
X86
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[AVX512] Add ExeDomain to vector extend and truncate instructions.
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2016-07-22 05:46:44 +00:00 |
XCore
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IR: Introduce Module::global_objects().
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2016-06-22 20:29:42 +00:00 |