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llvm-project/mlir
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Benjamin Kramer 6635c12ada [mlir] Use SmallBitVector instead of SmallDenseSet for AffineMap::compressSymbols 
This is both more efficient and more ergonomic to use, as inverting a
bit vector is trivial while inverting a set is annoying.

Sadly this leaks into a bunch of APIs downstream, so adapt them as well.

This would be NFC, but there is an ordering dependency in MemRefOps's
computeMemRefRankReductionMask. This is now deterministic, previously it
was dependent on SmallDenseSet's unspecified iteration order.

Differential Revision: https://reviews.llvm.org/D119076
 		2022-02-07 00:21:44 +01:00
..
benchmark/python [mlir] Split out a new ControlFlow dialect from Standard 2022-02-06 14:51:16 -08:00
cmake/modules [mlir] Do not use an empty source file when building aggregate libraries. 2022-02-05 23:06:28 -08:00
docs [mlir] Split out a new ControlFlow dialect from Standard 2022-02-06 14:51:16 -08:00
examples [mlir] Split out a new ControlFlow dialect from Standard 2022-02-06 14:51:16 -08:00
include [mlir] Use SmallBitVector instead of SmallDenseSet for AffineMap::compressSymbols 2022-02-07 00:21:44 +01:00
lib [mlir] Use SmallBitVector instead of SmallDenseSet for AffineMap::compressSymbols 2022-02-07 00:21:44 +01:00
python [mlir] Fixup python bindings after splitting cf ops from std. 2022-02-06 14:51:17 -08:00
test [mlir] Use SmallBitVector instead of SmallDenseSet for AffineMap::compressSymbols 2022-02-07 00:21:44 +01:00
tools [mlir][NFC] Fully qualify call to `mlir::success` in auto generated C++ 2022-02-05 00:40:04 +01:00
unittests Revert "[MLIR][Presburger] Use `SmallVector` instead of `std::vector` in `getLocalRepr`" 2022-02-04 23:24:08 +05:30
utils [mlir] Set up boilerplate build for MLIR benchmarks 2022-01-27 21:38:15 +00:00
.clang-format
…
.clang-tidy Enable readability-redundant-smartptr-get in MLIR local clang-tidy config 2022-01-08 20:07:11 +00:00
CMakeLists.txt [mlir] Set up boilerplate build for MLIR benchmarks 2022-01-27 21:38:15 +00:00
LICENSE.TXT
…
README.md
…

README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.