Krzysztof Parzyszek 0f983d69a4 [Hexagon] Avoid creating invalid offsets in packetizer ... Two memory instructions with a dependency only on the address register between the two (the first one of them being post-incrememnt) can be packetized together after the offset on the second was updated to the incremement value. Make sure that the new offset is valid for the instruction. llvm-svn: 328897		2018-03-30 19:28:37 +00:00
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Analysis	[MemorySSA] Consider callsite args for hashing and equality.	2018-03-29 00:54:39 +00:00
Assembler	…
Bindings	[LLVM-C] Finish exception instruction bindings - Round 2	2018-03-30 17:49:53 +00:00
Bitcode	…
BugPoint	…
CodeGen	[Hexagon] Avoid creating invalid offsets in packetizer	2018-03-30 19:28:37 +00:00
DebugInfo	[MSF] Default to FPM2, and always mark FPM pages allocated.	2018-03-29 18:34:15 +00:00
Examples	…
ExecutionEngine	…
Feature	…
FileCheck	…
Instrumentation	DataFlowSanitizer: wrappers of functions with local linkage should have the same linkage as the function being wrapped	2018-03-30 18:37:55 +00:00
Integer	…
JitListener	…
LTO	…
Linker	…
MC	[Hexagon] Recognize and handle :endloop01	2018-03-30 15:29:47 +00:00
Object	[llvm-ar] Support multiple dashed options	2018-03-28 17:21:14 +00:00
ObjectYAML	…
Other	…
SafepointIRVerifier	…
SymbolRewriter	…
TableGen	…
ThinLTO/X86	…
Transforms	Revert "peel loops with runtime small trip counts"	2018-03-30 16:55:44 +00:00
Unit	…
Verifier	…
YAMLParser	…
tools	[X86][BtVer2] Fixed the number of micro opcodes for AVX vector converts and	2018-03-30 18:53:47 +00:00
.clang-format	…
CMakeLists.txt	…
TestRunner.sh	…
lit.cfg.py	…
lit.site.cfg.py.in	…