forked from OSchip/llvm-project
43 lines
1.8 KiB
YAML
43 lines
1.8 KiB
YAML
# REQUIRES: aarch64-registered-target
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# RUN: not --crash llc -verify-machineinstrs -mtriple aarch64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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name: test
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body: |
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bb.0:
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liveins: $x0, $w0
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%0:_(s64) = COPY $x0
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%1:_(<4 x s16>) = COPY $x0
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%2:_(s32) = COPY $w0
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; CHECK: *** Bad machine code: G_ASSERT_SEXT expects an immediate operand #2 ***
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; CHECK: instruction: %assert_sext_1:_(s64) = G_ASSERT_SEXT
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%assert_sext_1:_(s64) = G_ASSERT_SEXT %0, %0
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; CHECK: *** Bad machine code: G_ASSERT_SEXT expects an immediate operand #2 ***
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; CHECK: instruction: %assert_sext_2:_(s64) = G_ASSERT_SEXT
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%assert_sext_2:_(s64) = G_ASSERT_SEXT %0, i8 8
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; CHECK: *** Bad machine code: Type mismatch in generic instruction ***
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; CHECK: instruction: %assert_sext_3:_(<2 x s32>) = G_ASSERT_SEXT
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%assert_sext_3:_(<2 x s32>) = G_ASSERT_SEXT %0, 8
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; CHECK: *** Bad machine code: Type mismatch in generic instruction ***
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; CHECK: instruction: %assert_sext_4:_(<2 x s32>) = G_ASSERT_SEXT
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%assert_sext_4:_(<2 x s32>) = G_ASSERT_SEXT %1, 8
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; CHECK: *** Bad machine code: G_ASSERT_SEXT size must be >= 1 ***
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; CHECK: instruction: %assert_sext_5:_(s64) = G_ASSERT_SEXT
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%assert_sext_5:_(s64) = G_ASSERT_SEXT %0, 0
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; CHECK: *** Bad machine code: G_ASSERT_SEXT size must be less than source bit width ***
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; CHECK: instruction: %assert_sext_6:_(s64) = G_ASSERT_SEXT
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%assert_sext_6:_(s64) = G_ASSERT_SEXT %0, 128
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; CHECK: *** Bad machine code: Type mismatch in generic instruction ***
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; CHECK: instruction: %assert_sext_7:_(s64) = G_ASSERT_SEXT %2:_, 8
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%assert_sext_7:_(s64) = G_ASSERT_SEXT %2, 8
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; CHECK: *** Bad machine code: Generic instruction cannot have physical register ***
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; CHECK: instruction: %assert_sext_8:_(s64) = G_ASSERT_SEXT $x0, 8
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%assert_sext_8:_(s64) = G_ASSERT_SEXT $x0, 8
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