forked from OSchip/llvm-project
286daafd65
Implement fetch_<op>/fetch_and_<op>/exchange/compare-and-exchange instructions for BPF. Specially, the following gcc intrinsics are implemented. __sync_fetch_and_add (32, 64) __sync_fetch_and_sub (32, 64) __sync_fetch_and_and (32, 64) __sync_fetch_and_or (32, 64) __sync_fetch_and_xor (32, 64) __sync_lock_test_and_set (32, 64) __sync_val_compare_and_swap (32, 64) For __sync_fetch_and_sub, internally, it is implemented as a negation followed by __sync_fetch_and_add. For __sync_lock_test_and_set, despite its name, it actually does an atomic exchange and return the old content. https://gcc.gnu.org/onlinedocs/gcc-4.1.1/gcc/Atomic-Builtins.html For intrinsics like __sync_{add,sub}_and_fetch and __sync_bool_compare_and_swap, the compiler is able to generate codes using __sync_fetch_and_{add,sub} and __sync_val_compare_and_swap. Similar to xadd, atomic xadd, xor and xxor (atomic_<op>) instructions are added for atomic operations which do not have return values. LLVM will check the return value for __sync_fetch_and_{add,and,or,xor}. If the return value is used, instructions atomic_fetch_<op> will be used. Otherwise, atomic_<op> instructions will be used. All new instructions only support 64bit and 32bit with alu32 mode. old xadd instruction still supports 32bit without alu32 mode. For encoding, please take a look at test atomics_2.ll. Differential Revision: https://reviews.llvm.org/D72184 |
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| .. | ||
| BTF | ||
| CORE | ||
| 32-bit-subreg-alu.ll | ||
| 32-bit-subreg-cond-select.ll | ||
| 32-bit-subreg-load-store.ll | ||
| 32-bit-subreg-peephole-phi-1.ll | ||
| 32-bit-subreg-peephole-phi-2.ll | ||
| 32-bit-subreg-peephole-phi-3.ll | ||
| 32-bit-subreg-peephole.ll | ||
| 32-bit-subreg-zext.ll | ||
| adjust-opt-icmp1.ll | ||
| adjust-opt-icmp2.ll | ||
| adjust-opt-speculative1.ll | ||
| adjust-opt-speculative2.ll | ||
| alu8.ll | ||
| atomics.ll | ||
| atomics_2.ll | ||
| basictest.ll | ||
| byval.ll | ||
| callx.ll | ||
| cc_args.ll | ||
| cc_args_be.ll | ||
| cc_ret.ll | ||
| cmp.ll | ||
| dwarfdump.ll | ||
| elf-symbol-information.ll | ||
| ex1.ll | ||
| fi_ri.ll | ||
| i128.ll | ||
| inline_asm.ll | ||
| inlineasm-output-template.ll | ||
| intrinsics.ll | ||
| is_trunc_free.ll | ||
| is_zext_free.ll | ||
| lit.local.cfg | ||
| load.ll | ||
| loops.ll | ||
| many_args1.ll | ||
| many_args2.ll | ||
| mem_offset.ll | ||
| mem_offset_be.ll | ||
| memcpy-expand-in-order.ll | ||
| objdump_atomics.ll | ||
| objdump_cond_op.ll | ||
| objdump_cond_op_2.ll | ||
| objdump_dis_all.ll | ||
| objdump_imm_hex.ll | ||
| objdump_intrinsics.ll | ||
| objdump_nop.ll | ||
| objdump_static_var.ll | ||
| objdump_trivial.ll | ||
| objdump_two_funcs.ll | ||
| optnone-1.ll | ||
| optnone-2.ll | ||
| reloc-btf-2.ll | ||
| reloc-btf.ll | ||
| reloc.ll | ||
| remove_truncate_1.ll | ||
| remove_truncate_2.ll | ||
| remove_truncate_3.ll | ||
| remove_truncate_4.ll | ||
| remove_truncate_5.ll | ||
| remove_truncate_6.ll | ||
| remove_truncate_7.ll | ||
| rodata_1.ll | ||
| rodata_2.ll | ||
| rodata_3.ll | ||
| rodata_4.ll | ||
| rodata_5.ll | ||
| rodata_6.ll | ||
| rodata_7.ll | ||
| sanity.ll | ||
| sdiv_error.ll | ||
| select_ri.ll | ||
| selectiondag-bug.ll | ||
| setcc.ll | ||
| shifts.ll | ||
| simplifycfg.ll | ||
| sockex2.ll | ||
| struct_ret1.ll | ||
| struct_ret2.ll | ||
| undef.ll | ||
| vararg1.ll | ||
| warn-call.ll | ||
| warn-stack.ll | ||
| xadd.ll | ||
| xadd_legal.ll | ||