llvm-project/llvm/test/Transforms/HardwareLoops
Sam Parker c98a8a09b5 [HardwareLoops] Loop guard intrinsic to recognise zext
If a loop count was initially represented by a 32b unsigned int in C
then the hardware-loop pass can recognise the loop guard and insert
the llvm.test.set.loop.iterations intrinsic. If this was instead a
unsigned short/char then clang inserts a zext instruction to expand
the loop count to an i32. This patch adds the necessary pattern
matching to enable the use of lvm.test.set.loop.iterations in those
cases.

Patch by: sherwin-dc

Differential Revision: https://reviews.llvm.org/D109631
2021-09-16 08:33:16 +01:00
..
ARM [test, HardwareLoops] Fix use of var defined in CHECK-NOT 2021-03-30 15:06:32 +01:00
loop-guards.ll [HardwareLoops] Loop guard intrinsic to recognise zext 2021-09-16 08:33:16 +01:00
scalar-while.ll [ARM] Improve WLS lowering 2021-03-11 17:56:19 +00:00
sibling-loops.ll
unconditional-latch.ll
unscevable.ll