forked from OSchip/llvm-project
94 lines
3.2 KiB
LLVM
94 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
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; truncate v2i64 to v2i32
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define void @convert_v2i64_to_v2i32(<2 x i32>* %dst.addr, <2 x i64> %src) nounwind {
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; X86-LABEL: convert_v2i64_to_v2i32:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; X86-NEXT: pcmpeqd %xmm1, %xmm1
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; X86-NEXT: psubd %xmm1, %xmm0
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; X86-NEXT: movq %xmm0, (%eax)
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; X86-NEXT: retl
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;
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; X64-LABEL: convert_v2i64_to_v2i32:
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; X64: # %bb.0: # %entry
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; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; X64-NEXT: pcmpeqd %xmm1, %xmm1
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; X64-NEXT: psubd %xmm1, %xmm0
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; X64-NEXT: movq %xmm0, (%rdi)
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; X64-NEXT: retq
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entry:
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%val = trunc <2 x i64> %src to <2 x i32>
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%add = add <2 x i32> %val, < i32 1, i32 1 >
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store <2 x i32> %add, <2 x i32>* %dst.addr
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ret void
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}
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; truncate v3i32 to v3i8
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define void @convert_v3i32_to_v3i8(<3 x i8>* %dst.addr, <3 x i32>* %src.addr) nounwind {
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; X86-LABEL: convert_v3i32_to_v3i8:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movdqa (%ecx), %xmm0
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; X86-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
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; X86-NEXT: pcmpeqd %xmm1, %xmm1
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; X86-NEXT: psubb %xmm1, %xmm0
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; X86-NEXT: pextrb $2, %xmm0, 2(%eax)
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; X86-NEXT: pextrw $0, %xmm0, (%eax)
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; X86-NEXT: retl
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;
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; X64-LABEL: convert_v3i32_to_v3i8:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movdqa (%rsi), %xmm0
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; X64-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
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; X64-NEXT: pcmpeqd %xmm1, %xmm1
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; X64-NEXT: psubb %xmm1, %xmm0
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; X64-NEXT: pextrb $2, %xmm0, 2(%rdi)
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; X64-NEXT: pextrw $0, %xmm0, (%rdi)
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; X64-NEXT: retq
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entry:
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%load = load <3 x i32>, <3 x i32>* %src.addr
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%val = trunc <3 x i32> %load to <3 x i8>
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%add = add <3 x i8> %val, < i8 1, i8 1, i8 1 >
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store <3 x i8> %add, <3 x i8>* %dst.addr
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ret void
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}
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; truncate v5i16 to v5i8
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define void @convert_v5i16_to_v5i8(<5 x i8>* %dst.addr, <5 x i16>* %src.addr) nounwind {
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; X86-LABEL: convert_v5i16_to_v5i8:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movdqa (%ecx), %xmm0
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; X86-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
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; X86-NEXT: pcmpeqd %xmm1, %xmm1
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; X86-NEXT: psubb %xmm1, %xmm0
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; X86-NEXT: pextrb $4, %xmm0, 4(%eax)
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; X86-NEXT: movd %xmm0, (%eax)
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; X86-NEXT: retl
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;
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; X64-LABEL: convert_v5i16_to_v5i8:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movdqa (%rsi), %xmm0
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; X64-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
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; X64-NEXT: pcmpeqd %xmm1, %xmm1
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; X64-NEXT: psubb %xmm1, %xmm0
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; X64-NEXT: pextrb $4, %xmm0, 4(%rdi)
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; X64-NEXT: movd %xmm0, (%rdi)
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; X64-NEXT: retq
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entry:
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%load = load <5 x i16>, <5 x i16>* %src.addr
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%val = trunc <5 x i16> %load to <5 x i8>
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%add = add <5 x i8> %val, < i8 1, i8 1, i8 1, i8 1, i8 1 >
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store <5 x i8> %add, <5 x i8>* %dst.addr
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ret void
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}
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