forked from OSchip/llvm-project
118 lines
4.3 KiB
LLVM
118 lines
4.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE41
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; Widen a v5i16 to v8i16 to do a vector sub and multiple
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define void @update(<5 x i16>* %dst, <5 x i16>* %src, i32 %n) nounwind {
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; SSE2-LABEL: update:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
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; SSE2-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
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; SSE2-NEXT: movl %edx, -{{[0-9]+}}(%rsp)
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; SSE2-NEXT: movabsq $4295032833, %rax # imm = 0x100010001
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; SSE2-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
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; SSE2-NEXT: movw $0, -{{[0-9]+}}(%rsp)
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; SSE2-NEXT: movl $0, -{{[0-9]+}}(%rsp)
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; SSE2-NEXT: movdqa {{.*#+}} xmm0 = <271,271,271,271,271,u,u,u>
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; SSE2-NEXT: movdqa {{.*#+}} xmm1 = <2,4,2,2,2,u,u,u>
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; SSE2-NEXT: .p2align 4, 0x90
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; SSE2-NEXT: .LBB0_1: # %forcond
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; SSE2-NEXT: # =>This Inner Loop Header: Depth=1
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; SSE2-NEXT: movl -{{[0-9]+}}(%rsp), %eax
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; SSE2-NEXT: cmpl -{{[0-9]+}}(%rsp), %eax
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; SSE2-NEXT: jge .LBB0_3
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; SSE2-NEXT: # %bb.2: # %forbody
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; SSE2-NEXT: # in Loop: Header=BB0_1 Depth=1
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; SSE2-NEXT: movslq -{{[0-9]+}}(%rsp), %rax
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; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %rcx
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; SSE2-NEXT: shlq $4, %rax
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; SSE2-NEXT: movq -{{[0-9]+}}(%rsp), %rdx
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; SSE2-NEXT: movdqa (%rdx,%rax), %xmm2
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; SSE2-NEXT: psubw %xmm0, %xmm2
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; SSE2-NEXT: pmullw %xmm1, %xmm2
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; SSE2-NEXT: movq %xmm2, (%rcx,%rax)
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; SSE2-NEXT: pextrw $4, %xmm2, %edx
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; SSE2-NEXT: movw %dx, 8(%rcx,%rax)
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; SSE2-NEXT: incl -{{[0-9]+}}(%rsp)
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; SSE2-NEXT: jmp .LBB0_1
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; SSE2-NEXT: .LBB0_3: # %afterfor
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: update:
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; SSE41: # %bb.0: # %entry
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; SSE41-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
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; SSE41-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
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; SSE41-NEXT: movl %edx, -{{[0-9]+}}(%rsp)
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; SSE41-NEXT: movabsq $4295032833, %rax # imm = 0x100010001
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; SSE41-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
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; SSE41-NEXT: movw $0, -{{[0-9]+}}(%rsp)
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; SSE41-NEXT: movl $0, -{{[0-9]+}}(%rsp)
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; SSE41-NEXT: movdqa {{.*#+}} xmm0 = <271,271,271,271,271,u,u,u>
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; SSE41-NEXT: .p2align 4, 0x90
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; SSE41-NEXT: .LBB0_1: # %forcond
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; SSE41-NEXT: # =>This Inner Loop Header: Depth=1
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; SSE41-NEXT: movl -{{[0-9]+}}(%rsp), %eax
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; SSE41-NEXT: cmpl -{{[0-9]+}}(%rsp), %eax
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; SSE41-NEXT: jge .LBB0_3
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; SSE41-NEXT: # %bb.2: # %forbody
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; SSE41-NEXT: # in Loop: Header=BB0_1 Depth=1
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; SSE41-NEXT: movslq -{{[0-9]+}}(%rsp), %rax
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; SSE41-NEXT: movq -{{[0-9]+}}(%rsp), %rcx
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; SSE41-NEXT: shlq $4, %rax
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; SSE41-NEXT: movq -{{[0-9]+}}(%rsp), %rdx
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; SSE41-NEXT: movdqa (%rdx,%rax), %xmm1
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; SSE41-NEXT: psubw %xmm0, %xmm1
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; SSE41-NEXT: movdqa %xmm1, %xmm2
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; SSE41-NEXT: psllw $2, %xmm2
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; SSE41-NEXT: psllw $1, %xmm1
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; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm1[0],xmm2[1],xmm1[2,3,4,5,6,7]
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; SSE41-NEXT: pextrw $4, %xmm1, 8(%rcx,%rax)
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; SSE41-NEXT: movq %xmm2, (%rcx,%rax)
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; SSE41-NEXT: incl -{{[0-9]+}}(%rsp)
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; SSE41-NEXT: jmp .LBB0_1
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; SSE41-NEXT: .LBB0_3: # %afterfor
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; SSE41-NEXT: retq
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entry:
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%dst.addr = alloca <5 x i16>*
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%src.addr = alloca <5 x i16>*
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%n.addr = alloca i32
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%v = alloca <5 x i16>, align 16
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%i = alloca i32, align 4
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store <5 x i16>* %dst, <5 x i16>** %dst.addr
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store <5 x i16>* %src, <5 x i16>** %src.addr
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store i32 %n, i32* %n.addr
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store <5 x i16> < i16 1, i16 1, i16 1, i16 0, i16 0 >, <5 x i16>* %v
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store i32 0, i32* %i
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br label %forcond
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forcond:
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%tmp = load i32, i32* %i
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%tmp1 = load i32, i32* %n.addr
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%cmp = icmp slt i32 %tmp, %tmp1
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br i1 %cmp, label %forbody, label %afterfor
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forbody:
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%tmp2 = load i32, i32* %i
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%tmp3 = load <5 x i16>*, <5 x i16>** %dst.addr
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%arrayidx = getelementptr <5 x i16>, <5 x i16>* %tmp3, i32 %tmp2
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%tmp4 = load i32, i32* %i
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%tmp5 = load <5 x i16>*, <5 x i16>** %src.addr
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%arrayidx6 = getelementptr <5 x i16>, <5 x i16>* %tmp5, i32 %tmp4
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%tmp7 = load <5 x i16>, <5 x i16>* %arrayidx6
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%sub = sub <5 x i16> %tmp7, < i16 271, i16 271, i16 271, i16 271, i16 271 >
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%mul = mul <5 x i16> %sub, < i16 2, i16 4, i16 2, i16 2, i16 2 >
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store <5 x i16> %mul, <5 x i16>* %arrayidx
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br label %forinc
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forinc:
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%tmp8 = load i32, i32* %i
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%inc = add i32 %tmp8, 1
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store i32 %inc, i32* %i
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br label %forcond
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afterfor:
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ret void
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}
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