forked from OSchip/llvm-project
1368 lines
55 KiB
LLVM
1368 lines
55 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX512,AVX512DQ
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512DQVL
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512BWVL
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;
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; Just one 32-bit run to make sure we do reasonable things for i64 shifts.
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
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;
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; Variable Shifts
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;
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define <2 x i64> @var_shift_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
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; SSE2-LABEL: var_shift_v2i64:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movdqa %xmm0, %xmm2
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; SSE2-NEXT: psrlq %xmm1, %xmm2
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; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
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; SSE2-NEXT: psrlq %xmm1, %xmm0
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; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: var_shift_v2i64:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movdqa %xmm0, %xmm2
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; SSE41-NEXT: psrlq %xmm1, %xmm2
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; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
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; SSE41-NEXT: psrlq %xmm1, %xmm0
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; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7]
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; SSE41-NEXT: retq
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;
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; AVX1-LABEL: var_shift_v2i64:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm2
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; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
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; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: var_shift_v2i64:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpsrlvq %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: retq
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;
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; XOPAVX1-LABEL: var_shift_v2i64:
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; XOPAVX1: # %bb.0:
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; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
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; XOPAVX1-NEXT: vpsubq %xmm1, %xmm2, %xmm1
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; XOPAVX1-NEXT: vpshlq %xmm1, %xmm0, %xmm0
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; XOPAVX1-NEXT: retq
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;
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; XOPAVX2-LABEL: var_shift_v2i64:
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; XOPAVX2: # %bb.0:
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; XOPAVX2-NEXT: vpsrlvq %xmm1, %xmm0, %xmm0
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; XOPAVX2-NEXT: retq
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;
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; AVX512-LABEL: var_shift_v2i64:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpsrlvq %xmm1, %xmm0, %xmm0
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; AVX512-NEXT: retq
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;
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; AVX512VL-LABEL: var_shift_v2i64:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vpsrlvq %xmm1, %xmm0, %xmm0
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; AVX512VL-NEXT: retq
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;
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; X86-SSE-LABEL: var_shift_v2i64:
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; X86-SSE: # %bb.0:
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; X86-SSE-NEXT: movdqa %xmm0, %xmm2
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; X86-SSE-NEXT: psrlq %xmm1, %xmm2
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; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
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; X86-SSE-NEXT: psrlq %xmm1, %xmm0
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; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]
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; X86-SSE-NEXT: retl
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%shift = lshr <2 x i64> %a, %b
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ret <2 x i64> %shift
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}
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define <4 x i32> @var_shift_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
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; SSE2-LABEL: var_shift_v4i32:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7]
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; SSE2-NEXT: movdqa %xmm0, %xmm3
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; SSE2-NEXT: psrld %xmm2, %xmm3
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; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm1[0,1,1,1,4,5,6,7]
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; SSE2-NEXT: movdqa %xmm0, %xmm2
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; SSE2-NEXT: psrld %xmm4, %xmm2
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; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
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; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
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; SSE2-NEXT: pshuflw {{.*#+}} xmm3 = xmm1[2,3,3,3,4,5,6,7]
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; SSE2-NEXT: movdqa %xmm0, %xmm4
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; SSE2-NEXT: psrld %xmm3, %xmm4
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; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,1,1,4,5,6,7]
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; SSE2-NEXT: psrld %xmm1, %xmm0
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; SSE2-NEXT: punpckhqdq {{.*#+}} xmm0 = xmm0[1],xmm4[1]
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; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,3],xmm0[0,3]
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; SSE2-NEXT: movaps %xmm2, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: var_shift_v4i32:
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; SSE41: # %bb.0:
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; SSE41-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7]
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; SSE41-NEXT: movdqa %xmm0, %xmm3
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; SSE41-NEXT: psrld %xmm2, %xmm3
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; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
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; SSE41-NEXT: pshuflw {{.*#+}} xmm4 = xmm2[2,3,3,3,4,5,6,7]
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; SSE41-NEXT: movdqa %xmm0, %xmm5
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; SSE41-NEXT: psrld %xmm4, %xmm5
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; SSE41-NEXT: pblendw {{.*#+}} xmm5 = xmm3[0,1,2,3],xmm5[4,5,6,7]
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; SSE41-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,1,1,4,5,6,7]
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; SSE41-NEXT: movdqa %xmm0, %xmm3
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; SSE41-NEXT: psrld %xmm1, %xmm3
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; SSE41-NEXT: pshuflw {{.*#+}} xmm1 = xmm2[0,1,1,1,4,5,6,7]
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; SSE41-NEXT: psrld %xmm1, %xmm0
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; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm3[0,1,2,3],xmm0[4,5,6,7]
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; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm5[2,3],xmm0[4,5],xmm5[6,7]
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; SSE41-NEXT: retq
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;
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; AVX1-LABEL: var_shift_v4i32:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vpsrldq {{.*#+}} xmm2 = xmm1[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
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; AVX1-NEXT: vpsrld %xmm2, %xmm0, %xmm2
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; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm3
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; AVX1-NEXT: vpsrld %xmm3, %xmm0, %xmm3
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; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
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; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3
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; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm3 = xmm1[2],xmm3[2],xmm1[3],xmm3[3]
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; AVX1-NEXT: vpsrld %xmm3, %xmm0, %xmm3
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; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
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; AVX1-NEXT: vpsrld %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm3[4,5,6,7]
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; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: var_shift_v4i32:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: retq
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;
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; XOPAVX1-LABEL: var_shift_v4i32:
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; XOPAVX1: # %bb.0:
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; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
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; XOPAVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm1
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; XOPAVX1-NEXT: vpshld %xmm1, %xmm0, %xmm0
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; XOPAVX1-NEXT: retq
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;
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; XOPAVX2-LABEL: var_shift_v4i32:
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; XOPAVX2: # %bb.0:
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; XOPAVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0
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; XOPAVX2-NEXT: retq
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;
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; AVX512-LABEL: var_shift_v4i32:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0
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; AVX512-NEXT: retq
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;
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; AVX512VL-LABEL: var_shift_v4i32:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0
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; AVX512VL-NEXT: retq
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;
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; X86-SSE-LABEL: var_shift_v4i32:
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; X86-SSE: # %bb.0:
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; X86-SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7]
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; X86-SSE-NEXT: movdqa %xmm0, %xmm3
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; X86-SSE-NEXT: psrld %xmm2, %xmm3
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; X86-SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm1[0,1,1,1,4,5,6,7]
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; X86-SSE-NEXT: movdqa %xmm0, %xmm2
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; X86-SSE-NEXT: psrld %xmm4, %xmm2
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; X86-SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
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; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
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; X86-SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm1[2,3,3,3,4,5,6,7]
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; X86-SSE-NEXT: movdqa %xmm0, %xmm4
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; X86-SSE-NEXT: psrld %xmm3, %xmm4
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; X86-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,1,1,4,5,6,7]
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; X86-SSE-NEXT: psrld %xmm1, %xmm0
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; X86-SSE-NEXT: punpckhqdq {{.*#+}} xmm0 = xmm0[1],xmm4[1]
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; X86-SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,3],xmm0[0,3]
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; X86-SSE-NEXT: movaps %xmm2, %xmm0
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; X86-SSE-NEXT: retl
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%shift = lshr <4 x i32> %a, %b
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ret <4 x i32> %shift
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}
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define <8 x i16> @var_shift_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
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; SSE2-LABEL: var_shift_v8i16:
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; SSE2: # %bb.0:
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; SSE2-NEXT: psllw $12, %xmm1
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; SSE2-NEXT: movdqa %xmm1, %xmm2
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; SSE2-NEXT: psraw $15, %xmm2
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; SSE2-NEXT: movdqa %xmm2, %xmm3
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; SSE2-NEXT: pandn %xmm0, %xmm3
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; SSE2-NEXT: psrlw $8, %xmm0
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; SSE2-NEXT: pand %xmm2, %xmm0
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; SSE2-NEXT: por %xmm3, %xmm0
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; SSE2-NEXT: paddw %xmm1, %xmm1
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; SSE2-NEXT: movdqa %xmm1, %xmm2
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; SSE2-NEXT: psraw $15, %xmm2
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; SSE2-NEXT: movdqa %xmm2, %xmm3
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; SSE2-NEXT: pandn %xmm0, %xmm3
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; SSE2-NEXT: psrlw $4, %xmm0
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; SSE2-NEXT: pand %xmm2, %xmm0
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; SSE2-NEXT: por %xmm3, %xmm0
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; SSE2-NEXT: paddw %xmm1, %xmm1
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; SSE2-NEXT: movdqa %xmm1, %xmm2
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; SSE2-NEXT: psraw $15, %xmm2
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; SSE2-NEXT: movdqa %xmm2, %xmm3
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; SSE2-NEXT: pandn %xmm0, %xmm3
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; SSE2-NEXT: psrlw $2, %xmm0
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; SSE2-NEXT: pand %xmm2, %xmm0
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; SSE2-NEXT: por %xmm3, %xmm0
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; SSE2-NEXT: paddw %xmm1, %xmm1
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; SSE2-NEXT: psraw $15, %xmm1
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; SSE2-NEXT: movdqa %xmm1, %xmm2
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; SSE2-NEXT: pandn %xmm0, %xmm2
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; SSE2-NEXT: psrlw $1, %xmm0
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; SSE2-NEXT: pand %xmm1, %xmm0
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; SSE2-NEXT: por %xmm2, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: var_shift_v8i16:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movdqa %xmm1, %xmm2
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; SSE41-NEXT: movdqa %xmm0, %xmm1
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; SSE41-NEXT: movdqa %xmm2, %xmm0
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; SSE41-NEXT: psllw $12, %xmm0
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; SSE41-NEXT: psllw $4, %xmm2
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; SSE41-NEXT: por %xmm0, %xmm2
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; SSE41-NEXT: movdqa %xmm2, %xmm3
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; SSE41-NEXT: paddw %xmm2, %xmm3
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; SSE41-NEXT: movdqa %xmm1, %xmm4
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; SSE41-NEXT: psrlw $8, %xmm4
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; SSE41-NEXT: movdqa %xmm2, %xmm0
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; SSE41-NEXT: pblendvb %xmm0, %xmm4, %xmm1
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; SSE41-NEXT: movdqa %xmm1, %xmm2
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; SSE41-NEXT: psrlw $4, %xmm2
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; SSE41-NEXT: movdqa %xmm3, %xmm0
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; SSE41-NEXT: pblendvb %xmm0, %xmm2, %xmm1
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; SSE41-NEXT: movdqa %xmm1, %xmm2
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; SSE41-NEXT: psrlw $2, %xmm2
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; SSE41-NEXT: paddw %xmm3, %xmm3
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; SSE41-NEXT: movdqa %xmm3, %xmm0
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; SSE41-NEXT: pblendvb %xmm0, %xmm2, %xmm1
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; SSE41-NEXT: movdqa %xmm1, %xmm2
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; SSE41-NEXT: psrlw $1, %xmm2
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; SSE41-NEXT: paddw %xmm3, %xmm3
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; SSE41-NEXT: movdqa %xmm3, %xmm0
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; SSE41-NEXT: pblendvb %xmm0, %xmm2, %xmm1
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; SSE41-NEXT: movdqa %xmm1, %xmm0
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; SSE41-NEXT: retq
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;
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; AVX1-LABEL: var_shift_v8i16:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vpsllw $12, %xmm1, %xmm2
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; AVX1-NEXT: vpsllw $4, %xmm1, %xmm1
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; AVX1-NEXT: vpor %xmm2, %xmm1, %xmm1
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; AVX1-NEXT: vpaddw %xmm1, %xmm1, %xmm2
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; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm3
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; AVX1-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0
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; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm1
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; AVX1-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vpsrlw $2, %xmm0, %xmm1
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; AVX1-NEXT: vpaddw %xmm2, %xmm2, %xmm2
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; AVX1-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vpsrlw $1, %xmm0, %xmm1
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; AVX1-NEXT: vpaddw %xmm2, %xmm2, %xmm2
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; AVX1-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: var_shift_v8i16:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
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; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
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; AVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
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; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; XOP-LABEL: var_shift_v8i16:
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; XOP: # %bb.0:
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; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2
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; XOP-NEXT: vpsubw %xmm1, %xmm2, %xmm1
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; XOP-NEXT: vpshlw %xmm1, %xmm0, %xmm0
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; XOP-NEXT: retq
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;
|
|
; AVX512DQ-LABEL: var_shift_v8i16:
|
|
; AVX512DQ: # %bb.0:
|
|
; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
|
|
; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
|
|
; AVX512DQ-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
|
|
; AVX512DQ-NEXT: vpmovdw %zmm0, %ymm0
|
|
; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
|
|
; AVX512DQ-NEXT: vzeroupper
|
|
; AVX512DQ-NEXT: retq
|
|
;
|
|
; AVX512BW-LABEL: var_shift_v8i16:
|
|
; AVX512BW: # %bb.0:
|
|
; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
|
|
; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
|
|
; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
|
|
; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
|
|
; AVX512BW-NEXT: vzeroupper
|
|
; AVX512BW-NEXT: retq
|
|
;
|
|
; AVX512DQVL-LABEL: var_shift_v8i16:
|
|
; AVX512DQVL: # %bb.0:
|
|
; AVX512DQVL-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
|
|
; AVX512DQVL-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
|
|
; AVX512DQVL-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
|
|
; AVX512DQVL-NEXT: vpmovdw %ymm0, %xmm0
|
|
; AVX512DQVL-NEXT: vzeroupper
|
|
; AVX512DQVL-NEXT: retq
|
|
;
|
|
; AVX512BWVL-LABEL: var_shift_v8i16:
|
|
; AVX512BWVL: # %bb.0:
|
|
; AVX512BWVL-NEXT: vpsrlvw %xmm1, %xmm0, %xmm0
|
|
; AVX512BWVL-NEXT: retq
|
|
;
|
|
; X86-SSE-LABEL: var_shift_v8i16:
|
|
; X86-SSE: # %bb.0:
|
|
; X86-SSE-NEXT: psllw $12, %xmm1
|
|
; X86-SSE-NEXT: movdqa %xmm1, %xmm2
|
|
; X86-SSE-NEXT: psraw $15, %xmm2
|
|
; X86-SSE-NEXT: movdqa %xmm2, %xmm3
|
|
; X86-SSE-NEXT: pandn %xmm0, %xmm3
|
|
; X86-SSE-NEXT: psrlw $8, %xmm0
|
|
; X86-SSE-NEXT: pand %xmm2, %xmm0
|
|
; X86-SSE-NEXT: por %xmm3, %xmm0
|
|
; X86-SSE-NEXT: paddw %xmm1, %xmm1
|
|
; X86-SSE-NEXT: movdqa %xmm1, %xmm2
|
|
; X86-SSE-NEXT: psraw $15, %xmm2
|
|
; X86-SSE-NEXT: movdqa %xmm2, %xmm3
|
|
; X86-SSE-NEXT: pandn %xmm0, %xmm3
|
|
; X86-SSE-NEXT: psrlw $4, %xmm0
|
|
; X86-SSE-NEXT: pand %xmm2, %xmm0
|
|
; X86-SSE-NEXT: por %xmm3, %xmm0
|
|
; X86-SSE-NEXT: paddw %xmm1, %xmm1
|
|
; X86-SSE-NEXT: movdqa %xmm1, %xmm2
|
|
; X86-SSE-NEXT: psraw $15, %xmm2
|
|
; X86-SSE-NEXT: movdqa %xmm2, %xmm3
|
|
; X86-SSE-NEXT: pandn %xmm0, %xmm3
|
|
; X86-SSE-NEXT: psrlw $2, %xmm0
|
|
; X86-SSE-NEXT: pand %xmm2, %xmm0
|
|
; X86-SSE-NEXT: por %xmm3, %xmm0
|
|
; X86-SSE-NEXT: paddw %xmm1, %xmm1
|
|
; X86-SSE-NEXT: psraw $15, %xmm1
|
|
; X86-SSE-NEXT: movdqa %xmm1, %xmm2
|
|
; X86-SSE-NEXT: pandn %xmm0, %xmm2
|
|
; X86-SSE-NEXT: psrlw $1, %xmm0
|
|
; X86-SSE-NEXT: pand %xmm1, %xmm0
|
|
; X86-SSE-NEXT: por %xmm2, %xmm0
|
|
; X86-SSE-NEXT: retl
|
|
%shift = lshr <8 x i16> %a, %b
|
|
ret <8 x i16> %shift
|
|
}
|
|
|
|
define <16 x i8> @var_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
|
|
; SSE2-LABEL: var_shift_v16i8:
|
|
; SSE2: # %bb.0:
|
|
; SSE2-NEXT: psllw $5, %xmm1
|
|
; SSE2-NEXT: pxor %xmm2, %xmm2
|
|
; SSE2-NEXT: pxor %xmm3, %xmm3
|
|
; SSE2-NEXT: pcmpgtb %xmm1, %xmm3
|
|
; SSE2-NEXT: movdqa %xmm3, %xmm4
|
|
; SSE2-NEXT: pandn %xmm0, %xmm4
|
|
; SSE2-NEXT: psrlw $4, %xmm0
|
|
; SSE2-NEXT: pand %xmm3, %xmm0
|
|
; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
|
|
; SSE2-NEXT: por %xmm4, %xmm0
|
|
; SSE2-NEXT: paddb %xmm1, %xmm1
|
|
; SSE2-NEXT: pxor %xmm3, %xmm3
|
|
; SSE2-NEXT: pcmpgtb %xmm1, %xmm3
|
|
; SSE2-NEXT: movdqa %xmm3, %xmm4
|
|
; SSE2-NEXT: pandn %xmm0, %xmm4
|
|
; SSE2-NEXT: psrlw $2, %xmm0
|
|
; SSE2-NEXT: pand %xmm3, %xmm0
|
|
; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
|
|
; SSE2-NEXT: por %xmm4, %xmm0
|
|
; SSE2-NEXT: paddb %xmm1, %xmm1
|
|
; SSE2-NEXT: pcmpgtb %xmm1, %xmm2
|
|
; SSE2-NEXT: movdqa %xmm2, %xmm1
|
|
; SSE2-NEXT: pandn %xmm0, %xmm1
|
|
; SSE2-NEXT: psrlw $1, %xmm0
|
|
; SSE2-NEXT: pand %xmm2, %xmm0
|
|
; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
|
|
; SSE2-NEXT: por %xmm1, %xmm0
|
|
; SSE2-NEXT: retq
|
|
;
|
|
; SSE41-LABEL: var_shift_v16i8:
|
|
; SSE41: # %bb.0:
|
|
; SSE41-NEXT: movdqa %xmm0, %xmm2
|
|
; SSE41-NEXT: psllw $5, %xmm1
|
|
; SSE41-NEXT: movdqa %xmm0, %xmm3
|
|
; SSE41-NEXT: psrlw $4, %xmm3
|
|
; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
|
|
; SSE41-NEXT: movdqa %xmm1, %xmm0
|
|
; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
|
|
; SSE41-NEXT: movdqa %xmm2, %xmm3
|
|
; SSE41-NEXT: psrlw $2, %xmm3
|
|
; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
|
|
; SSE41-NEXT: paddb %xmm1, %xmm1
|
|
; SSE41-NEXT: movdqa %xmm1, %xmm0
|
|
; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
|
|
; SSE41-NEXT: movdqa %xmm2, %xmm3
|
|
; SSE41-NEXT: psrlw $1, %xmm3
|
|
; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
|
|
; SSE41-NEXT: paddb %xmm1, %xmm1
|
|
; SSE41-NEXT: movdqa %xmm1, %xmm0
|
|
; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
|
|
; SSE41-NEXT: movdqa %xmm2, %xmm0
|
|
; SSE41-NEXT: retq
|
|
;
|
|
; AVX-LABEL: var_shift_v16i8:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vpsllw $5, %xmm1, %xmm1
|
|
; AVX-NEXT: vpsrlw $4, %xmm0, %xmm2
|
|
; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
|
|
; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
|
|
; AVX-NEXT: vpsrlw $2, %xmm0, %xmm2
|
|
; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
|
|
; AVX-NEXT: vpaddb %xmm1, %xmm1, %xmm1
|
|
; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
|
|
; AVX-NEXT: vpsrlw $1, %xmm0, %xmm2
|
|
; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
|
|
; AVX-NEXT: vpaddb %xmm1, %xmm1, %xmm1
|
|
; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; XOP-LABEL: var_shift_v16i8:
|
|
; XOP: # %bb.0:
|
|
; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2
|
|
; XOP-NEXT: vpsubb %xmm1, %xmm2, %xmm1
|
|
; XOP-NEXT: vpshlb %xmm1, %xmm0, %xmm0
|
|
; XOP-NEXT: retq
|
|
;
|
|
; AVX512DQ-LABEL: var_shift_v16i8:
|
|
; AVX512DQ: # %bb.0:
|
|
; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
|
|
; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
|
|
; AVX512DQ-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0
|
|
; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0
|
|
; AVX512DQ-NEXT: vzeroupper
|
|
; AVX512DQ-NEXT: retq
|
|
;
|
|
; AVX512BW-LABEL: var_shift_v16i8:
|
|
; AVX512BW: # %bb.0:
|
|
; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
|
|
; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
|
|
; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
|
|
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
|
|
; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
|
|
; AVX512BW-NEXT: vzeroupper
|
|
; AVX512BW-NEXT: retq
|
|
;
|
|
; AVX512DQVL-LABEL: var_shift_v16i8:
|
|
; AVX512DQVL: # %bb.0:
|
|
; AVX512DQVL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
|
|
; AVX512DQVL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
|
|
; AVX512DQVL-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0
|
|
; AVX512DQVL-NEXT: vpmovdb %zmm0, %xmm0
|
|
; AVX512DQVL-NEXT: vzeroupper
|
|
; AVX512DQVL-NEXT: retq
|
|
;
|
|
; AVX512BWVL-LABEL: var_shift_v16i8:
|
|
; AVX512BWVL: # %bb.0:
|
|
; AVX512BWVL-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
|
|
; AVX512BWVL-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
|
|
; AVX512BWVL-NEXT: vpsrlvw %ymm1, %ymm0, %ymm0
|
|
; AVX512BWVL-NEXT: vpmovwb %ymm0, %xmm0
|
|
; AVX512BWVL-NEXT: vzeroupper
|
|
; AVX512BWVL-NEXT: retq
|
|
;
|
|
; X86-SSE-LABEL: var_shift_v16i8:
|
|
; X86-SSE: # %bb.0:
|
|
; X86-SSE-NEXT: psllw $5, %xmm1
|
|
; X86-SSE-NEXT: pxor %xmm2, %xmm2
|
|
; X86-SSE-NEXT: pxor %xmm3, %xmm3
|
|
; X86-SSE-NEXT: pcmpgtb %xmm1, %xmm3
|
|
; X86-SSE-NEXT: movdqa %xmm3, %xmm4
|
|
; X86-SSE-NEXT: pandn %xmm0, %xmm4
|
|
; X86-SSE-NEXT: psrlw $4, %xmm0
|
|
; X86-SSE-NEXT: pand %xmm3, %xmm0
|
|
; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
|
|
; X86-SSE-NEXT: por %xmm4, %xmm0
|
|
; X86-SSE-NEXT: paddb %xmm1, %xmm1
|
|
; X86-SSE-NEXT: pxor %xmm3, %xmm3
|
|
; X86-SSE-NEXT: pcmpgtb %xmm1, %xmm3
|
|
; X86-SSE-NEXT: movdqa %xmm3, %xmm4
|
|
; X86-SSE-NEXT: pandn %xmm0, %xmm4
|
|
; X86-SSE-NEXT: psrlw $2, %xmm0
|
|
; X86-SSE-NEXT: pand %xmm3, %xmm0
|
|
; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
|
|
; X86-SSE-NEXT: por %xmm4, %xmm0
|
|
; X86-SSE-NEXT: paddb %xmm1, %xmm1
|
|
; X86-SSE-NEXT: pcmpgtb %xmm1, %xmm2
|
|
; X86-SSE-NEXT: movdqa %xmm2, %xmm1
|
|
; X86-SSE-NEXT: pandn %xmm0, %xmm1
|
|
; X86-SSE-NEXT: psrlw $1, %xmm0
|
|
; X86-SSE-NEXT: pand %xmm2, %xmm0
|
|
; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
|
|
; X86-SSE-NEXT: por %xmm1, %xmm0
|
|
; X86-SSE-NEXT: retl
|
|
%shift = lshr <16 x i8> %a, %b
|
|
ret <16 x i8> %shift
|
|
}
|
|
|
|
;
|
|
; Uniform Variable Shifts
|
|
;
|
|
|
|
define <2 x i64> @splatvar_shift_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
|
|
; SSE-LABEL: splatvar_shift_v2i64:
|
|
; SSE: # %bb.0:
|
|
; SSE-NEXT: psrlq %xmm1, %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: splatvar_shift_v2i64:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vpsrlq %xmm1, %xmm0, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; XOP-LABEL: splatvar_shift_v2i64:
|
|
; XOP: # %bb.0:
|
|
; XOP-NEXT: vpsrlq %xmm1, %xmm0, %xmm0
|
|
; XOP-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: splatvar_shift_v2i64:
|
|
; AVX512: # %bb.0:
|
|
; AVX512-NEXT: vpsrlq %xmm1, %xmm0, %xmm0
|
|
; AVX512-NEXT: retq
|
|
;
|
|
; AVX512VL-LABEL: splatvar_shift_v2i64:
|
|
; AVX512VL: # %bb.0:
|
|
; AVX512VL-NEXT: vpsrlq %xmm1, %xmm0, %xmm0
|
|
; AVX512VL-NEXT: retq
|
|
;
|
|
; X86-SSE-LABEL: splatvar_shift_v2i64:
|
|
; X86-SSE: # %bb.0:
|
|
; X86-SSE-NEXT: psrlq %xmm1, %xmm0
|
|
; X86-SSE-NEXT: retl
|
|
%splat = shufflevector <2 x i64> %b, <2 x i64> undef, <2 x i32> zeroinitializer
|
|
%shift = lshr <2 x i64> %a, %splat
|
|
ret <2 x i64> %shift
|
|
}
|
|
|
|
define <4 x i32> @splatvar_shift_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
|
|
; SSE2-LABEL: splatvar_shift_v4i32:
|
|
; SSE2: # %bb.0:
|
|
; SSE2-NEXT: xorps %xmm2, %xmm2
|
|
; SSE2-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
|
|
; SSE2-NEXT: psrld %xmm2, %xmm0
|
|
; SSE2-NEXT: retq
|
|
;
|
|
; SSE41-LABEL: splatvar_shift_v4i32:
|
|
; SSE41: # %bb.0:
|
|
; SSE41-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
|
|
; SSE41-NEXT: psrld %xmm1, %xmm0
|
|
; SSE41-NEXT: retq
|
|
;
|
|
; AVX-LABEL: splatvar_shift_v4i32:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
|
|
; AVX-NEXT: vpsrld %xmm1, %xmm0, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; XOP-LABEL: splatvar_shift_v4i32:
|
|
; XOP: # %bb.0:
|
|
; XOP-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
|
|
; XOP-NEXT: vpsrld %xmm1, %xmm0, %xmm0
|
|
; XOP-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: splatvar_shift_v4i32:
|
|
; AVX512: # %bb.0:
|
|
; AVX512-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
|
|
; AVX512-NEXT: vpsrld %xmm1, %xmm0, %xmm0
|
|
; AVX512-NEXT: retq
|
|
;
|
|
; AVX512VL-LABEL: splatvar_shift_v4i32:
|
|
; AVX512VL: # %bb.0:
|
|
; AVX512VL-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
|
|
; AVX512VL-NEXT: vpsrld %xmm1, %xmm0, %xmm0
|
|
; AVX512VL-NEXT: retq
|
|
;
|
|
; X86-SSE-LABEL: splatvar_shift_v4i32:
|
|
; X86-SSE: # %bb.0:
|
|
; X86-SSE-NEXT: xorps %xmm2, %xmm2
|
|
; X86-SSE-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
|
|
; X86-SSE-NEXT: psrld %xmm2, %xmm0
|
|
; X86-SSE-NEXT: retl
|
|
%splat = shufflevector <4 x i32> %b, <4 x i32> undef, <4 x i32> zeroinitializer
|
|
%shift = lshr <4 x i32> %a, %splat
|
|
ret <4 x i32> %shift
|
|
}
|
|
|
|
define <8 x i16> @splatvar_shift_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
|
|
; SSE2-LABEL: splatvar_shift_v8i16:
|
|
; SSE2: # %bb.0:
|
|
; SSE2-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1]
|
|
; SSE2-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
|
; SSE2-NEXT: psrlw %xmm1, %xmm0
|
|
; SSE2-NEXT: retq
|
|
;
|
|
; SSE41-LABEL: splatvar_shift_v8i16:
|
|
; SSE41: # %bb.0:
|
|
; SSE41-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
|
|
; SSE41-NEXT: psrlw %xmm1, %xmm0
|
|
; SSE41-NEXT: retq
|
|
;
|
|
; AVX-LABEL: splatvar_shift_v8i16:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
|
|
; AVX-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; XOP-LABEL: splatvar_shift_v8i16:
|
|
; XOP: # %bb.0:
|
|
; XOP-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
|
|
; XOP-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
|
|
; XOP-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: splatvar_shift_v8i16:
|
|
; AVX512: # %bb.0:
|
|
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
|
|
; AVX512-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
|
|
; AVX512-NEXT: retq
|
|
;
|
|
; AVX512VL-LABEL: splatvar_shift_v8i16:
|
|
; AVX512VL: # %bb.0:
|
|
; AVX512VL-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
|
|
; AVX512VL-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
|
|
; AVX512VL-NEXT: retq
|
|
;
|
|
; X86-SSE-LABEL: splatvar_shift_v8i16:
|
|
; X86-SSE: # %bb.0:
|
|
; X86-SSE-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1]
|
|
; X86-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
|
; X86-SSE-NEXT: psrlw %xmm1, %xmm0
|
|
; X86-SSE-NEXT: retl
|
|
%splat = shufflevector <8 x i16> %b, <8 x i16> undef, <8 x i32> zeroinitializer
|
|
%shift = lshr <8 x i16> %a, %splat
|
|
ret <8 x i16> %shift
|
|
}
|
|
|
|
define <16 x i8> @splatvar_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
|
|
; SSE2-LABEL: splatvar_shift_v16i8:
|
|
; SSE2: # %bb.0:
|
|
; SSE2-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0]
|
|
; SSE2-NEXT: psrldq {{.*#+}} xmm1 = xmm1[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
|
; SSE2-NEXT: psrlw %xmm1, %xmm0
|
|
; SSE2-NEXT: pcmpeqd %xmm2, %xmm2
|
|
; SSE2-NEXT: psrlw %xmm1, %xmm2
|
|
; SSE2-NEXT: psrlw $8, %xmm2
|
|
; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
|
|
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm2[0,0,0,0,4,5,6,7]
|
|
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
|
|
; SSE2-NEXT: pand %xmm1, %xmm0
|
|
; SSE2-NEXT: retq
|
|
;
|
|
; SSE41-LABEL: splatvar_shift_v16i8:
|
|
; SSE41: # %bb.0:
|
|
; SSE41-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
|
|
; SSE41-NEXT: psrlw %xmm1, %xmm0
|
|
; SSE41-NEXT: pcmpeqd %xmm2, %xmm2
|
|
; SSE41-NEXT: psrlw %xmm1, %xmm2
|
|
; SSE41-NEXT: pshufb {{.*#+}} xmm2 = xmm2[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
|
|
; SSE41-NEXT: pand %xmm2, %xmm0
|
|
; SSE41-NEXT: retq
|
|
;
|
|
; AVX1-LABEL: splatvar_shift_v16i8:
|
|
; AVX1: # %bb.0:
|
|
; AVX1-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
|
|
; AVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
|
|
; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpsrlw %xmm1, %xmm2, %xmm1
|
|
; AVX1-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
|
|
; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: splatvar_shift_v16i8:
|
|
; AVX2: # %bb.0:
|
|
; AVX2-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
|
|
; AVX2-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
|
|
; AVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpsrlw %xmm1, %xmm2, %xmm1
|
|
; AVX2-NEXT: vpsrlw $8, %xmm1, %xmm1
|
|
; AVX2-NEXT: vpbroadcastb %xmm1, %xmm1
|
|
; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
|
|
; AVX2-NEXT: retq
|
|
;
|
|
; XOPAVX1-LABEL: splatvar_shift_v16i8:
|
|
; XOPAVX1: # %bb.0:
|
|
; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
|
|
; XOPAVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
|
|
; XOPAVX1-NEXT: vpsubb %xmm1, %xmm2, %xmm1
|
|
; XOPAVX1-NEXT: vpshlb %xmm1, %xmm0, %xmm0
|
|
; XOPAVX1-NEXT: retq
|
|
;
|
|
; XOPAVX2-LABEL: splatvar_shift_v16i8:
|
|
; XOPAVX2: # %bb.0:
|
|
; XOPAVX2-NEXT: vpbroadcastb %xmm1, %xmm1
|
|
; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
|
|
; XOPAVX2-NEXT: vpsubb %xmm1, %xmm2, %xmm1
|
|
; XOPAVX2-NEXT: vpshlb %xmm1, %xmm0, %xmm0
|
|
; XOPAVX2-NEXT: retq
|
|
;
|
|
; AVX512DQ-LABEL: splatvar_shift_v16i8:
|
|
; AVX512DQ: # %bb.0:
|
|
; AVX512DQ-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
|
|
; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
|
|
; AVX512DQ-NEXT: vpsrld %xmm1, %zmm0, %zmm0
|
|
; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0
|
|
; AVX512DQ-NEXT: vzeroupper
|
|
; AVX512DQ-NEXT: retq
|
|
;
|
|
; AVX512BW-LABEL: splatvar_shift_v16i8:
|
|
; AVX512BW: # %bb.0:
|
|
; AVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
|
|
; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
|
|
; AVX512BW-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
|
|
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
|
|
; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
|
|
; AVX512BW-NEXT: vzeroupper
|
|
; AVX512BW-NEXT: retq
|
|
;
|
|
; AVX512DQVL-LABEL: splatvar_shift_v16i8:
|
|
; AVX512DQVL: # %bb.0:
|
|
; AVX512DQVL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
|
|
; AVX512DQVL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
|
|
; AVX512DQVL-NEXT: vpsrld %xmm1, %zmm0, %zmm0
|
|
; AVX512DQVL-NEXT: vpmovdb %zmm0, %xmm0
|
|
; AVX512DQVL-NEXT: vzeroupper
|
|
; AVX512DQVL-NEXT: retq
|
|
;
|
|
; AVX512BWVL-LABEL: splatvar_shift_v16i8:
|
|
; AVX512BWVL: # %bb.0:
|
|
; AVX512BWVL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
|
|
; AVX512BWVL-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
|
|
; AVX512BWVL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
|
|
; AVX512BWVL-NEXT: vpmovwb %ymm0, %xmm0
|
|
; AVX512BWVL-NEXT: vzeroupper
|
|
; AVX512BWVL-NEXT: retq
|
|
;
|
|
; X86-SSE-LABEL: splatvar_shift_v16i8:
|
|
; X86-SSE: # %bb.0:
|
|
; X86-SSE-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0]
|
|
; X86-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
|
|
; X86-SSE-NEXT: psrlw %xmm1, %xmm0
|
|
; X86-SSE-NEXT: pcmpeqd %xmm2, %xmm2
|
|
; X86-SSE-NEXT: psrlw %xmm1, %xmm2
|
|
; X86-SSE-NEXT: psrlw $8, %xmm2
|
|
; X86-SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
|
|
; X86-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm2[0,0,0,0,4,5,6,7]
|
|
; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
|
|
; X86-SSE-NEXT: pand %xmm1, %xmm0
|
|
; X86-SSE-NEXT: retl
|
|
%splat = shufflevector <16 x i8> %b, <16 x i8> undef, <16 x i32> zeroinitializer
|
|
%shift = lshr <16 x i8> %a, %splat
|
|
ret <16 x i8> %shift
|
|
}
|
|
|
|
;
|
|
; Constant Shifts
|
|
;
|
|
|
|
define <2 x i64> @constant_shift_v2i64(<2 x i64> %a) nounwind {
|
|
; SSE2-LABEL: constant_shift_v2i64:
|
|
; SSE2: # %bb.0:
|
|
; SSE2-NEXT: movdqa %xmm0, %xmm1
|
|
; SSE2-NEXT: psrlq $1, %xmm1
|
|
; SSE2-NEXT: psrlq $7, %xmm0
|
|
; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
|
|
; SSE2-NEXT: retq
|
|
;
|
|
; SSE41-LABEL: constant_shift_v2i64:
|
|
; SSE41: # %bb.0:
|
|
; SSE41-NEXT: movdqa %xmm0, %xmm1
|
|
; SSE41-NEXT: psrlq $7, %xmm1
|
|
; SSE41-NEXT: psrlq $1, %xmm0
|
|
; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
|
|
; SSE41-NEXT: retq
|
|
;
|
|
; AVX1-LABEL: constant_shift_v2i64:
|
|
; AVX1: # %bb.0:
|
|
; AVX1-NEXT: vpsrlq $7, %xmm0, %xmm1
|
|
; AVX1-NEXT: vpsrlq $1, %xmm0, %xmm0
|
|
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: constant_shift_v2i64:
|
|
; AVX2: # %bb.0:
|
|
; AVX2-NEXT: vpsrlvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; AVX2-NEXT: retq
|
|
;
|
|
; XOPAVX1-LABEL: constant_shift_v2i64:
|
|
; XOPAVX1: # %bb.0:
|
|
; XOPAVX1-NEXT: vpshlq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; XOPAVX1-NEXT: retq
|
|
;
|
|
; XOPAVX2-LABEL: constant_shift_v2i64:
|
|
; XOPAVX2: # %bb.0:
|
|
; XOPAVX2-NEXT: vpsrlvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; XOPAVX2-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: constant_shift_v2i64:
|
|
; AVX512: # %bb.0:
|
|
; AVX512-NEXT: vpsrlvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; AVX512-NEXT: retq
|
|
;
|
|
; AVX512VL-LABEL: constant_shift_v2i64:
|
|
; AVX512VL: # %bb.0:
|
|
; AVX512VL-NEXT: vpsrlvq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; AVX512VL-NEXT: retq
|
|
;
|
|
; X86-SSE-LABEL: constant_shift_v2i64:
|
|
; X86-SSE: # %bb.0:
|
|
; X86-SSE-NEXT: movdqa %xmm0, %xmm1
|
|
; X86-SSE-NEXT: psrlq $1, %xmm1
|
|
; X86-SSE-NEXT: psrlq $7, %xmm0
|
|
; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
|
|
; X86-SSE-NEXT: retl
|
|
%shift = lshr <2 x i64> %a, <i64 1, i64 7>
|
|
ret <2 x i64> %shift
|
|
}
|
|
|
|
define <4 x i32> @constant_shift_v4i32(<4 x i32> %a) nounwind {
|
|
; SSE2-LABEL: constant_shift_v4i32:
|
|
; SSE2: # %bb.0:
|
|
; SSE2-NEXT: movdqa %xmm0, %xmm1
|
|
; SSE2-NEXT: psrld $7, %xmm1
|
|
; SSE2-NEXT: movdqa %xmm0, %xmm2
|
|
; SSE2-NEXT: psrld $6, %xmm2
|
|
; SSE2-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1],xmm1[1]
|
|
; SSE2-NEXT: movdqa %xmm0, %xmm1
|
|
; SSE2-NEXT: psrld $5, %xmm1
|
|
; SSE2-NEXT: psrld $4, %xmm0
|
|
; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
|
|
; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm2[0,3]
|
|
; SSE2-NEXT: retq
|
|
;
|
|
; SSE41-LABEL: constant_shift_v4i32:
|
|
; SSE41: # %bb.0:
|
|
; SSE41-NEXT: movdqa %xmm0, %xmm1
|
|
; SSE41-NEXT: psrld $7, %xmm1
|
|
; SSE41-NEXT: movdqa %xmm0, %xmm2
|
|
; SSE41-NEXT: psrld $5, %xmm2
|
|
; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm1[4,5,6,7]
|
|
; SSE41-NEXT: movdqa %xmm0, %xmm1
|
|
; SSE41-NEXT: psrld $6, %xmm1
|
|
; SSE41-NEXT: psrld $4, %xmm0
|
|
; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
|
|
; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
|
|
; SSE41-NEXT: retq
|
|
;
|
|
; AVX1-LABEL: constant_shift_v4i32:
|
|
; AVX1: # %bb.0:
|
|
; AVX1-NEXT: vpsrld $7, %xmm0, %xmm1
|
|
; AVX1-NEXT: vpsrld $5, %xmm0, %xmm2
|
|
; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3],xmm1[4,5,6,7]
|
|
; AVX1-NEXT: vpsrld $6, %xmm0, %xmm2
|
|
; AVX1-NEXT: vpsrld $4, %xmm0, %xmm0
|
|
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
|
|
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: constant_shift_v4i32:
|
|
; AVX2: # %bb.0:
|
|
; AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; AVX2-NEXT: retq
|
|
;
|
|
; XOPAVX1-LABEL: constant_shift_v4i32:
|
|
; XOPAVX1: # %bb.0:
|
|
; XOPAVX1-NEXT: vpshld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; XOPAVX1-NEXT: retq
|
|
;
|
|
; XOPAVX2-LABEL: constant_shift_v4i32:
|
|
; XOPAVX2: # %bb.0:
|
|
; XOPAVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; XOPAVX2-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: constant_shift_v4i32:
|
|
; AVX512: # %bb.0:
|
|
; AVX512-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; AVX512-NEXT: retq
|
|
;
|
|
; AVX512VL-LABEL: constant_shift_v4i32:
|
|
; AVX512VL: # %bb.0:
|
|
; AVX512VL-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; AVX512VL-NEXT: retq
|
|
;
|
|
; X86-SSE-LABEL: constant_shift_v4i32:
|
|
; X86-SSE: # %bb.0:
|
|
; X86-SSE-NEXT: movdqa %xmm0, %xmm1
|
|
; X86-SSE-NEXT: psrld $7, %xmm1
|
|
; X86-SSE-NEXT: movdqa %xmm0, %xmm2
|
|
; X86-SSE-NEXT: psrld $6, %xmm2
|
|
; X86-SSE-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1],xmm1[1]
|
|
; X86-SSE-NEXT: movdqa %xmm0, %xmm1
|
|
; X86-SSE-NEXT: psrld $5, %xmm1
|
|
; X86-SSE-NEXT: psrld $4, %xmm0
|
|
; X86-SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
|
|
; X86-SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm2[0,3]
|
|
; X86-SSE-NEXT: retl
|
|
%shift = lshr <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
|
|
ret <4 x i32> %shift
|
|
}
|
|
|
|
define <8 x i16> @constant_shift_v8i16(<8 x i16> %a) nounwind {
|
|
; SSE2-LABEL: constant_shift_v8i16:
|
|
; SSE2: # %bb.0:
|
|
; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [0,65535,65535,65535,65535,65535,65535,65535]
|
|
; SSE2-NEXT: movdqa %xmm1, %xmm2
|
|
; SSE2-NEXT: pandn %xmm0, %xmm2
|
|
; SSE2-NEXT: pmulhuw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
|
|
; SSE2-NEXT: pand %xmm1, %xmm0
|
|
; SSE2-NEXT: por %xmm2, %xmm0
|
|
; SSE2-NEXT: retq
|
|
;
|
|
; SSE41-LABEL: constant_shift_v8i16:
|
|
; SSE41: # %bb.0:
|
|
; SSE41-NEXT: movdqa {{.*#+}} xmm1 = <u,32768,16384,8192,4096,2048,1024,512>
|
|
; SSE41-NEXT: pmulhuw %xmm0, %xmm1
|
|
; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7]
|
|
; SSE41-NEXT: retq
|
|
;
|
|
; AVX-LABEL: constant_shift_v8i16:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vpmulhuw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
|
|
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7]
|
|
; AVX-NEXT: retq
|
|
;
|
|
; XOP-LABEL: constant_shift_v8i16:
|
|
; XOP: # %bb.0:
|
|
; XOP-NEXT: vpshlw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; XOP-NEXT: retq
|
|
;
|
|
; AVX512DQ-LABEL: constant_shift_v8i16:
|
|
; AVX512DQ: # %bb.0:
|
|
; AVX512DQ-NEXT: vpmulhuw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
|
|
; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7]
|
|
; AVX512DQ-NEXT: retq
|
|
;
|
|
; AVX512BW-LABEL: constant_shift_v8i16:
|
|
; AVX512BW: # %bb.0:
|
|
; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
|
|
; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,2,3,4,5,6,7]
|
|
; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
|
|
; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
|
|
; AVX512BW-NEXT: vzeroupper
|
|
; AVX512BW-NEXT: retq
|
|
;
|
|
; AVX512DQVL-LABEL: constant_shift_v8i16:
|
|
; AVX512DQVL: # %bb.0:
|
|
; AVX512DQVL-NEXT: vpmulhuw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
|
|
; AVX512DQVL-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7]
|
|
; AVX512DQVL-NEXT: retq
|
|
;
|
|
; AVX512BWVL-LABEL: constant_shift_v8i16:
|
|
; AVX512BWVL: # %bb.0:
|
|
; AVX512BWVL-NEXT: vpsrlvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; AVX512BWVL-NEXT: retq
|
|
;
|
|
; X86-SSE-LABEL: constant_shift_v8i16:
|
|
; X86-SSE: # %bb.0:
|
|
; X86-SSE-NEXT: movdqa {{.*#+}} xmm1 = [0,65535,65535,65535,65535,65535,65535,65535]
|
|
; X86-SSE-NEXT: movdqa %xmm1, %xmm2
|
|
; X86-SSE-NEXT: pandn %xmm0, %xmm2
|
|
; X86-SSE-NEXT: pmulhuw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
|
|
; X86-SSE-NEXT: pand %xmm1, %xmm0
|
|
; X86-SSE-NEXT: por %xmm2, %xmm0
|
|
; X86-SSE-NEXT: retl
|
|
%shift = lshr <8 x i16> %a, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>
|
|
ret <8 x i16> %shift
|
|
}
|
|
|
|
define <16 x i8> @constant_shift_v16i8(<16 x i8> %a) nounwind {
|
|
; SSE2-LABEL: constant_shift_v16i8:
|
|
; SSE2: # %bb.0:
|
|
; SSE2-NEXT: pxor %xmm1, %xmm1
|
|
; SSE2-NEXT: movdqa %xmm0, %xmm2
|
|
; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
|
|
; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
|
|
; SSE2-NEXT: psrlw $8, %xmm2
|
|
; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
|
|
; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
|
|
; SSE2-NEXT: psrlw $8, %xmm0
|
|
; SSE2-NEXT: packuswb %xmm2, %xmm0
|
|
; SSE2-NEXT: retq
|
|
;
|
|
; SSE41-LABEL: constant_shift_v16i8:
|
|
; SSE41: # %bb.0:
|
|
; SSE41-NEXT: pxor %xmm2, %xmm2
|
|
; SSE41-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
|
|
; SSE41-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm2[8],xmm0[9],xmm2[9],xmm0[10],xmm2[10],xmm0[11],xmm2[11],xmm0[12],xmm2[12],xmm0[13],xmm2[13],xmm0[14],xmm2[14],xmm0[15],xmm2[15]
|
|
; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
|
|
; SSE41-NEXT: psrlw $8, %xmm0
|
|
; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
|
|
; SSE41-NEXT: psrlw $8, %xmm1
|
|
; SSE41-NEXT: packuswb %xmm0, %xmm1
|
|
; SSE41-NEXT: movdqa %xmm1, %xmm0
|
|
; SSE41-NEXT: retq
|
|
;
|
|
; AVX1-LABEL: constant_shift_v16i8:
|
|
; AVX1: # %bb.0:
|
|
; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
|
|
; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15]
|
|
; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
|
|
; AVX1-NEXT: vpsrlw $8, %xmm1, %xmm1
|
|
; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
|
|
; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0
|
|
; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: constant_shift_v16i8:
|
|
; AVX2: # %bb.0:
|
|
; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
|
|
; AVX2-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
|
|
; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0
|
|
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
|
|
; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
|
|
; AVX2-NEXT: vzeroupper
|
|
; AVX2-NEXT: retq
|
|
;
|
|
; XOP-LABEL: constant_shift_v16i8:
|
|
; XOP: # %bb.0:
|
|
; XOP-NEXT: vpshlb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; XOP-NEXT: retq
|
|
;
|
|
; AVX512DQ-LABEL: constant_shift_v16i8:
|
|
; AVX512DQ: # %bb.0:
|
|
; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
|
|
; AVX512DQ-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
|
|
; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0
|
|
; AVX512DQ-NEXT: vzeroupper
|
|
; AVX512DQ-NEXT: retq
|
|
;
|
|
; AVX512BW-LABEL: constant_shift_v16i8:
|
|
; AVX512BW: # %bb.0:
|
|
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0]
|
|
; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
|
|
; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
|
|
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
|
|
; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
|
|
; AVX512BW-NEXT: vzeroupper
|
|
; AVX512BW-NEXT: retq
|
|
;
|
|
; AVX512DQVL-LABEL: constant_shift_v16i8:
|
|
; AVX512DQVL: # %bb.0:
|
|
; AVX512DQVL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
|
|
; AVX512DQVL-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
|
|
; AVX512DQVL-NEXT: vpmovdb %zmm0, %xmm0
|
|
; AVX512DQVL-NEXT: vzeroupper
|
|
; AVX512DQVL-NEXT: retq
|
|
;
|
|
; AVX512BWVL-LABEL: constant_shift_v16i8:
|
|
; AVX512BWVL: # %bb.0:
|
|
; AVX512BWVL-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
|
|
; AVX512BWVL-NEXT: vpsrlvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
|
|
; AVX512BWVL-NEXT: vpmovwb %ymm0, %xmm0
|
|
; AVX512BWVL-NEXT: vzeroupper
|
|
; AVX512BWVL-NEXT: retq
|
|
;
|
|
; X86-SSE-LABEL: constant_shift_v16i8:
|
|
; X86-SSE: # %bb.0:
|
|
; X86-SSE-NEXT: pxor %xmm1, %xmm1
|
|
; X86-SSE-NEXT: movdqa %xmm0, %xmm2
|
|
; X86-SSE-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
|
|
; X86-SSE-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm2
|
|
; X86-SSE-NEXT: psrlw $8, %xmm2
|
|
; X86-SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
|
|
; X86-SSE-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
|
|
; X86-SSE-NEXT: psrlw $8, %xmm0
|
|
; X86-SSE-NEXT: packuswb %xmm2, %xmm0
|
|
; X86-SSE-NEXT: retl
|
|
%shift = lshr <16 x i8> %a, <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>
|
|
ret <16 x i8> %shift
|
|
}
|
|
|
|
;
|
|
; Uniform Constant Shifts
|
|
;
|
|
|
|
define <2 x i64> @splatconstant_shift_v2i64(<2 x i64> %a) nounwind {
|
|
; SSE-LABEL: splatconstant_shift_v2i64:
|
|
; SSE: # %bb.0:
|
|
; SSE-NEXT: psrlq $7, %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: splatconstant_shift_v2i64:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vpsrlq $7, %xmm0, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; XOP-LABEL: splatconstant_shift_v2i64:
|
|
; XOP: # %bb.0:
|
|
; XOP-NEXT: vpsrlq $7, %xmm0, %xmm0
|
|
; XOP-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: splatconstant_shift_v2i64:
|
|
; AVX512: # %bb.0:
|
|
; AVX512-NEXT: vpsrlq $7, %xmm0, %xmm0
|
|
; AVX512-NEXT: retq
|
|
;
|
|
; AVX512VL-LABEL: splatconstant_shift_v2i64:
|
|
; AVX512VL: # %bb.0:
|
|
; AVX512VL-NEXT: vpsrlq $7, %xmm0, %xmm0
|
|
; AVX512VL-NEXT: retq
|
|
;
|
|
; X86-SSE-LABEL: splatconstant_shift_v2i64:
|
|
; X86-SSE: # %bb.0:
|
|
; X86-SSE-NEXT: psrlq $7, %xmm0
|
|
; X86-SSE-NEXT: retl
|
|
%shift = lshr <2 x i64> %a, <i64 7, i64 7>
|
|
ret <2 x i64> %shift
|
|
}
|
|
|
|
define <4 x i32> @splatconstant_shift_v4i32(<4 x i32> %a) nounwind {
|
|
; SSE-LABEL: splatconstant_shift_v4i32:
|
|
; SSE: # %bb.0:
|
|
; SSE-NEXT: psrld $5, %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: splatconstant_shift_v4i32:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vpsrld $5, %xmm0, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; XOP-LABEL: splatconstant_shift_v4i32:
|
|
; XOP: # %bb.0:
|
|
; XOP-NEXT: vpsrld $5, %xmm0, %xmm0
|
|
; XOP-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: splatconstant_shift_v4i32:
|
|
; AVX512: # %bb.0:
|
|
; AVX512-NEXT: vpsrld $5, %xmm0, %xmm0
|
|
; AVX512-NEXT: retq
|
|
;
|
|
; AVX512VL-LABEL: splatconstant_shift_v4i32:
|
|
; AVX512VL: # %bb.0:
|
|
; AVX512VL-NEXT: vpsrld $5, %xmm0, %xmm0
|
|
; AVX512VL-NEXT: retq
|
|
;
|
|
; X86-SSE-LABEL: splatconstant_shift_v4i32:
|
|
; X86-SSE: # %bb.0:
|
|
; X86-SSE-NEXT: psrld $5, %xmm0
|
|
; X86-SSE-NEXT: retl
|
|
%shift = lshr <4 x i32> %a, <i32 5, i32 5, i32 5, i32 5>
|
|
ret <4 x i32> %shift
|
|
}
|
|
|
|
define <8 x i16> @splatconstant_shift_v8i16(<8 x i16> %a) nounwind {
|
|
; SSE-LABEL: splatconstant_shift_v8i16:
|
|
; SSE: # %bb.0:
|
|
; SSE-NEXT: psrlw $3, %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: splatconstant_shift_v8i16:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; XOP-LABEL: splatconstant_shift_v8i16:
|
|
; XOP: # %bb.0:
|
|
; XOP-NEXT: vpsrlw $3, %xmm0, %xmm0
|
|
; XOP-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: splatconstant_shift_v8i16:
|
|
; AVX512: # %bb.0:
|
|
; AVX512-NEXT: vpsrlw $3, %xmm0, %xmm0
|
|
; AVX512-NEXT: retq
|
|
;
|
|
; AVX512VL-LABEL: splatconstant_shift_v8i16:
|
|
; AVX512VL: # %bb.0:
|
|
; AVX512VL-NEXT: vpsrlw $3, %xmm0, %xmm0
|
|
; AVX512VL-NEXT: retq
|
|
;
|
|
; X86-SSE-LABEL: splatconstant_shift_v8i16:
|
|
; X86-SSE: # %bb.0:
|
|
; X86-SSE-NEXT: psrlw $3, %xmm0
|
|
; X86-SSE-NEXT: retl
|
|
%shift = lshr <8 x i16> %a, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
|
|
ret <8 x i16> %shift
|
|
}
|
|
|
|
define <16 x i8> @splatconstant_shift_v16i8(<16 x i8> %a) nounwind {
|
|
; SSE-LABEL: splatconstant_shift_v16i8:
|
|
; SSE: # %bb.0:
|
|
; SSE-NEXT: psrlw $3, %xmm0
|
|
; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: splatconstant_shift_v16i8:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
|
|
; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; XOP-LABEL: splatconstant_shift_v16i8:
|
|
; XOP: # %bb.0:
|
|
; XOP-NEXT: vpshlb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; XOP-NEXT: retq
|
|
;
|
|
; AVX512-LABEL: splatconstant_shift_v16i8:
|
|
; AVX512: # %bb.0:
|
|
; AVX512-NEXT: vpsrlw $3, %xmm0, %xmm0
|
|
; AVX512-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; AVX512-NEXT: retq
|
|
;
|
|
; AVX512VL-LABEL: splatconstant_shift_v16i8:
|
|
; AVX512VL: # %bb.0:
|
|
; AVX512VL-NEXT: vpsrlw $3, %xmm0, %xmm0
|
|
; AVX512VL-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
|
|
; AVX512VL-NEXT: retq
|
|
;
|
|
; X86-SSE-LABEL: splatconstant_shift_v16i8:
|
|
; X86-SSE: # %bb.0:
|
|
; X86-SSE-NEXT: psrlw $3, %xmm0
|
|
; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
|
|
; X86-SSE-NEXT: retl
|
|
%shift = lshr <16 x i8> %a, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
|
|
ret <16 x i8> %shift
|
|
}
|
|
|
|
define <4 x i32> @vector_variable_shift_right(<4 x i1> %cond, <4 x i32> %x, <4 x i32> %y, <4 x i32> %z) nounwind {
|
|
; SSE2-LABEL: vector_variable_shift_right:
|
|
; SSE2: # %bb.0:
|
|
; SSE2-NEXT: xorps %xmm4, %xmm4
|
|
; SSE2-NEXT: xorps %xmm5, %xmm5
|
|
; SSE2-NEXT: movss {{.*#+}} xmm5 = xmm2[0],xmm5[1,2,3]
|
|
; SSE2-NEXT: movss {{.*#+}} xmm4 = xmm1[0],xmm4[1,2,3]
|
|
; SSE2-NEXT: pslld $31, %xmm0
|
|
; SSE2-NEXT: psrad $31, %xmm0
|
|
; SSE2-NEXT: movdqa %xmm3, %xmm1
|
|
; SSE2-NEXT: psrld %xmm4, %xmm1
|
|
; SSE2-NEXT: psrld %xmm5, %xmm3
|
|
; SSE2-NEXT: pand %xmm0, %xmm1
|
|
; SSE2-NEXT: pandn %xmm3, %xmm0
|
|
; SSE2-NEXT: por %xmm1, %xmm0
|
|
; SSE2-NEXT: retq
|
|
;
|
|
; SSE41-LABEL: vector_variable_shift_right:
|
|
; SSE41: # %bb.0:
|
|
; SSE41-NEXT: pslld $31, %xmm0
|
|
; SSE41-NEXT: pmovzxdq {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero
|
|
; SSE41-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
|
|
; SSE41-NEXT: movdqa %xmm3, %xmm4
|
|
; SSE41-NEXT: psrld %xmm1, %xmm4
|
|
; SSE41-NEXT: psrld %xmm2, %xmm3
|
|
; SSE41-NEXT: blendvps %xmm0, %xmm4, %xmm3
|
|
; SSE41-NEXT: movaps %xmm3, %xmm0
|
|
; SSE41-NEXT: retq
|
|
;
|
|
; AVX1-LABEL: vector_variable_shift_right:
|
|
; AVX1: # %bb.0:
|
|
; AVX1-NEXT: vpslld $31, %xmm0, %xmm0
|
|
; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero
|
|
; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
|
|
; AVX1-NEXT: vpsrld %xmm1, %xmm3, %xmm1
|
|
; AVX1-NEXT: vpsrld %xmm2, %xmm3, %xmm2
|
|
; AVX1-NEXT: vblendvps %xmm0, %xmm1, %xmm2, %xmm0
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: vector_variable_shift_right:
|
|
; AVX2: # %bb.0:
|
|
; AVX2-NEXT: vpslld $31, %xmm0, %xmm0
|
|
; AVX2-NEXT: vbroadcastss %xmm1, %xmm1
|
|
; AVX2-NEXT: vbroadcastss %xmm2, %xmm2
|
|
; AVX2-NEXT: vblendvps %xmm0, %xmm1, %xmm2, %xmm0
|
|
; AVX2-NEXT: vpsrlvd %xmm0, %xmm3, %xmm0
|
|
; AVX2-NEXT: retq
|
|
;
|
|
; XOPAVX1-LABEL: vector_variable_shift_right:
|
|
; XOPAVX1: # %bb.0:
|
|
; XOPAVX1-NEXT: vpslld $31, %xmm0, %xmm0
|
|
; XOPAVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,0,0,0]
|
|
; XOPAVX1-NEXT: vpermilps {{.*#+}} xmm2 = xmm2[0,0,0,0]
|
|
; XOPAVX1-NEXT: vblendvps %xmm0, %xmm1, %xmm2, %xmm0
|
|
; XOPAVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
|
|
; XOPAVX1-NEXT: vpsubd %xmm0, %xmm1, %xmm0
|
|
; XOPAVX1-NEXT: vpshld %xmm0, %xmm3, %xmm0
|
|
; XOPAVX1-NEXT: retq
|
|
;
|
|
; XOPAVX2-LABEL: vector_variable_shift_right:
|
|
; XOPAVX2: # %bb.0:
|
|
; XOPAVX2-NEXT: vpslld $31, %xmm0, %xmm0
|
|
; XOPAVX2-NEXT: vbroadcastss %xmm1, %xmm1
|
|
; XOPAVX2-NEXT: vbroadcastss %xmm2, %xmm2
|
|
; XOPAVX2-NEXT: vblendvps %xmm0, %xmm1, %xmm2, %xmm0
|
|
; XOPAVX2-NEXT: vpsrlvd %xmm0, %xmm3, %xmm0
|
|
; XOPAVX2-NEXT: retq
|
|
;
|
|
; AVX512DQ-LABEL: vector_variable_shift_right:
|
|
; AVX512DQ: # %bb.0:
|
|
; AVX512DQ-NEXT: vpslld $31, %xmm0, %xmm0
|
|
; AVX512DQ-NEXT: vpmovd2m %zmm0, %k1
|
|
; AVX512DQ-NEXT: vpbroadcastd %xmm1, %xmm0
|
|
; AVX512DQ-NEXT: vpbroadcastd %xmm2, %xmm1
|
|
; AVX512DQ-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1}
|
|
; AVX512DQ-NEXT: vpsrlvd %xmm1, %xmm3, %xmm0
|
|
; AVX512DQ-NEXT: vzeroupper
|
|
; AVX512DQ-NEXT: retq
|
|
;
|
|
; AVX512BW-LABEL: vector_variable_shift_right:
|
|
; AVX512BW: # %bb.0:
|
|
; AVX512BW-NEXT: vpslld $31, %xmm0, %xmm0
|
|
; AVX512BW-NEXT: vptestmd %zmm0, %zmm0, %k1
|
|
; AVX512BW-NEXT: vpbroadcastd %xmm1, %xmm0
|
|
; AVX512BW-NEXT: vpbroadcastd %xmm2, %xmm1
|
|
; AVX512BW-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1}
|
|
; AVX512BW-NEXT: vpsrlvd %xmm1, %xmm3, %xmm0
|
|
; AVX512BW-NEXT: vzeroupper
|
|
; AVX512BW-NEXT: retq
|
|
;
|
|
; AVX512DQVL-LABEL: vector_variable_shift_right:
|
|
; AVX512DQVL: # %bb.0:
|
|
; AVX512DQVL-NEXT: vpslld $31, %xmm0, %xmm0
|
|
; AVX512DQVL-NEXT: vpmovd2m %xmm0, %k1
|
|
; AVX512DQVL-NEXT: vpbroadcastd %xmm2, %xmm0
|
|
; AVX512DQVL-NEXT: vpbroadcastd %xmm1, %xmm0 {%k1}
|
|
; AVX512DQVL-NEXT: vpsrlvd %xmm0, %xmm3, %xmm0
|
|
; AVX512DQVL-NEXT: retq
|
|
;
|
|
; AVX512BWVL-LABEL: vector_variable_shift_right:
|
|
; AVX512BWVL: # %bb.0:
|
|
; AVX512BWVL-NEXT: vpslld $31, %xmm0, %xmm0
|
|
; AVX512BWVL-NEXT: vptestmd %xmm0, %xmm0, %k1
|
|
; AVX512BWVL-NEXT: vpbroadcastd %xmm2, %xmm0
|
|
; AVX512BWVL-NEXT: vpbroadcastd %xmm1, %xmm0 {%k1}
|
|
; AVX512BWVL-NEXT: vpsrlvd %xmm0, %xmm3, %xmm0
|
|
; AVX512BWVL-NEXT: retq
|
|
;
|
|
; X86-SSE-LABEL: vector_variable_shift_right:
|
|
; X86-SSE: # %bb.0:
|
|
; X86-SSE-NEXT: pushl %ebp
|
|
; X86-SSE-NEXT: movl %esp, %ebp
|
|
; X86-SSE-NEXT: andl $-16, %esp
|
|
; X86-SSE-NEXT: subl $16, %esp
|
|
; X86-SSE-NEXT: xorps %xmm3, %xmm3
|
|
; X86-SSE-NEXT: xorps %xmm4, %xmm4
|
|
; X86-SSE-NEXT: movss {{.*#+}} xmm4 = xmm2[0],xmm4[1,2,3]
|
|
; X86-SSE-NEXT: movss {{.*#+}} xmm3 = xmm1[0],xmm3[1,2,3]
|
|
; X86-SSE-NEXT: pslld $31, %xmm0
|
|
; X86-SSE-NEXT: psrad $31, %xmm0
|
|
; X86-SSE-NEXT: movdqa 8(%ebp), %xmm1
|
|
; X86-SSE-NEXT: movdqa %xmm1, %xmm2
|
|
; X86-SSE-NEXT: psrld %xmm3, %xmm2
|
|
; X86-SSE-NEXT: psrld %xmm4, %xmm1
|
|
; X86-SSE-NEXT: pand %xmm0, %xmm2
|
|
; X86-SSE-NEXT: pandn %xmm1, %xmm0
|
|
; X86-SSE-NEXT: por %xmm2, %xmm0
|
|
; X86-SSE-NEXT: movl %ebp, %esp
|
|
; X86-SSE-NEXT: popl %ebp
|
|
; X86-SSE-NEXT: retl
|
|
%splat1 = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> zeroinitializer
|
|
%splat2 = shufflevector <4 x i32> %y, <4 x i32> undef, <4 x i32> zeroinitializer
|
|
%sel = select <4 x i1> %cond, <4 x i32> %splat1, <4 x i32> %splat2
|
|
%sh = lshr <4 x i32> %z, %sel
|
|
ret <4 x i32> %sh
|
|
}
|