forked from OSchip/llvm-project
49 lines
1.7 KiB
LLVM
49 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
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define <2 x i64> @test(i16 %a) nounwind {
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; X86-LABEL: test:
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; X86: # %bb.0:
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; X86-NEXT: pxor %xmm0, %xmm0
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; X86-NEXT: pinsrw $3, {{[0-9]+}}(%esp), %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: test:
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; X64: # %bb.0:
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; X64-NEXT: pxor %xmm0, %xmm0
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; X64-NEXT: pinsrw $3, %edi, %xmm0
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; X64-NEXT: retq
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%tmp10 = insertelement <8 x i16> zeroinitializer, i16 %a, i32 3
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%tmp12 = insertelement <8 x i16> %tmp10, i16 0, i32 4
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%tmp14 = insertelement <8 x i16> %tmp12, i16 0, i32 5
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%tmp16 = insertelement <8 x i16> %tmp14, i16 0, i32 6
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%tmp18 = insertelement <8 x i16> %tmp16, i16 0, i32 7
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%tmp19 = bitcast <8 x i16> %tmp18 to <2 x i64>
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ret <2 x i64> %tmp19
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}
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define <2 x i64> @test2(i8 %a) nounwind {
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; X86-LABEL: test2:
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; X86: # %bb.0:
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: pxor %xmm0, %xmm0
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; X86-NEXT: pinsrw $5, %eax, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: test2:
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; X64: # %bb.0:
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: pxor %xmm0, %xmm0
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; X64-NEXT: pinsrw $5, %eax, %xmm0
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; X64-NEXT: retq
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%tmp24 = insertelement <16 x i8> zeroinitializer, i8 %a, i32 10
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%tmp26 = insertelement <16 x i8> %tmp24, i8 0, i32 11
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%tmp28 = insertelement <16 x i8> %tmp26, i8 0, i32 12
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%tmp30 = insertelement <16 x i8> %tmp28, i8 0, i32 13
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%tmp32 = insertelement <16 x i8> %tmp30, i8 0, i32 14
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%tmp34 = insertelement <16 x i8> %tmp32, i8 0, i32 15
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%tmp35 = bitcast <16 x i8> %tmp34 to <2 x i64>
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ret <2 x i64> %tmp35
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}
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