forked from OSchip/llvm-project
41 lines
1.9 KiB
YAML
41 lines
1.9 KiB
YAML
# RUN: llc -mtriple=x86_64-- -run-pass=regallocfast -o - %s | FileCheck %s
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# Check that fastregalloc does not displace register assigned to tied def when
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# RegMask operand is present. STATEPOINT is an example of such instruction.
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# Tied def/use must be assigned to the same register.
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---
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name: test_relocate
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $rdi
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; CHECK: renamable [[REG:\$[a-z0-9]+]] = STATEPOINT 0, 0, 0, target-flags(x86-plt) 0, 2, 0, 2, 0, 2, 0, 2, 1, renamable [[REG]](tied-def 0)
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%1:gr64 = COPY $rdi
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ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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%1:gr64 = STATEPOINT 0, 0, 0, target-flags(x86-plt) 0, 2, 0, 2, 0, 2, 0, 2, 1, %1(tied-def 0), 2, 0, 2, 1, 0, 0, csr_64, implicit-def $rsp, implicit-def $ssp
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ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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$rax = COPY %1
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RET 0, killed $rax
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...
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# Same as above but with multiple RegMask operands per instruction.
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# These regmasks have no real meaning and chosen to allow only single register to be assignable ($r12)
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---
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name: test_relocate_multi_regmasks
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $rdi
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; CHECK: renamable $r12 = STATEPOINT 0, 0, 0, target-flags(x86-plt) 0, 2, 0, 2, 0, 2, 0, 2, 1, renamable $r12(tied-def 0)
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%1:gr64 = COPY $rdi
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ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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%1:gr64 = STATEPOINT 0, 0, 0, target-flags(x86-plt) 0, 2, 0, 2, 0, 2, 0, 2, 1, %1(tied-def 0), 2, 0, 2, 1, 0, 0, csr_64_rt_allregs, csr_64_hhvm, implicit-def $rsp, implicit-def $ssp
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ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
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$rax = COPY %1
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RET 0, killed $rax
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...
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