forked from OSchip/llvm-project
517 lines
18 KiB
LLVM
517 lines
18 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X64
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; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown -O0 < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X64FAST
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; RUN: llc -verify-machineinstrs -mtriple=i686-unknown < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X86
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; RUN: llc -verify-machineinstrs -mtriple=i686-unknown -O0 < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X86FAST
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declare void @bar(i32)
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; Test a simple indirect call and tail call.
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define void @icall_reg(void (i32)* %fp, i32 %x) #0 {
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entry:
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tail call void @bar(i32 %x)
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tail call void %fp(i32 %x)
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tail call void @bar(i32 %x)
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tail call void %fp(i32 %x)
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ret void
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}
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; X64-LABEL: icall_reg:
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; X64-DAG: movq %rdi, %[[fp:[^ ]*]]
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; X64-DAG: movl %esi, %[[x:[^ ]*]]
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; X64: movl %esi, %edi
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; X64: callq bar
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; X64-DAG: movl %[[x]], %edi
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; X64-DAG: movq %[[fp]], %r11
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; X64: callq __llvm_retpoline_r11
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; X64: movl %[[x]], %edi
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; X64: callq bar
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; X64-DAG: movl %[[x]], %edi
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; X64-DAG: movq %[[fp]], %r11
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; X64: jmp __llvm_retpoline_r11 # TAILCALL
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; X64FAST-LABEL: icall_reg:
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; X64FAST: callq bar
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; X64FAST: callq __llvm_retpoline_r11
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; X64FAST: callq bar
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; X64FAST: jmp __llvm_retpoline_r11 # TAILCALL
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; X86-LABEL: icall_reg:
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; X86-DAG: movl 12(%esp), %[[fp:[^ ]*]]
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; X86-DAG: movl 16(%esp), %[[x:[^ ]*]]
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; X86: pushl %[[x]]
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; X86: calll bar
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; X86: movl %[[fp]], %eax
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; X86: pushl %[[x]]
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; X86: calll __llvm_retpoline_eax
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; X86: pushl %[[x]]
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; X86: calll bar
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; X86: movl %[[fp]], %eax
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; X86: pushl %[[x]]
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; X86: calll __llvm_retpoline_eax
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; X86-NOT: # TAILCALL
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; X86FAST-LABEL: icall_reg:
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; X86FAST: calll bar
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; X86FAST: calll __llvm_retpoline_eax
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; X86FAST: calll bar
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; X86FAST: calll __llvm_retpoline_eax
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@global_fp = external dso_local global void (i32)*
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; Test an indirect call through a global variable.
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define void @icall_global_fp(i32 %x, void (i32)** %fpp) #0 {
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%fp1 = load void (i32)*, void (i32)** @global_fp
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call void %fp1(i32 %x)
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%fp2 = load void (i32)*, void (i32)** @global_fp
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tail call void %fp2(i32 %x)
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ret void
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}
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; X64-LABEL: icall_global_fp:
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; X64-DAG: movl %edi, %[[x:[^ ]*]]
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; X64-DAG: movq global_fp(%rip), %r11
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; X64: callq __llvm_retpoline_r11
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; X64-DAG: movl %[[x]], %edi
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; X64-DAG: movq global_fp(%rip), %r11
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; X64: jmp __llvm_retpoline_r11 # TAILCALL
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; X64FAST-LABEL: icall_global_fp:
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; X64FAST: movq global_fp(%rip), %r11
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; X64FAST: callq __llvm_retpoline_r11
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; X64FAST: movq global_fp(%rip), %r11
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; X64FAST: jmp __llvm_retpoline_r11 # TAILCALL
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; X86-LABEL: icall_global_fp:
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; X86: movl global_fp, %eax
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; X86: pushl 4(%esp)
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; X86: calll __llvm_retpoline_eax
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; X86: addl $4, %esp
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; X86: movl global_fp, %eax
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; X86: jmp __llvm_retpoline_eax # TAILCALL
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; X86FAST-LABEL: icall_global_fp:
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; X86FAST: calll __llvm_retpoline_eax
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; X86FAST: jmp __llvm_retpoline_eax # TAILCALL
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%struct.Foo = type { void (%struct.Foo*)** }
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; Test an indirect call through a vtable.
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define void @vcall(%struct.Foo* %obj) #0 {
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%vptr_field = getelementptr %struct.Foo, %struct.Foo* %obj, i32 0, i32 0
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%vptr = load void (%struct.Foo*)**, void (%struct.Foo*)*** %vptr_field
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%vslot = getelementptr void(%struct.Foo*)*, void(%struct.Foo*)** %vptr, i32 1
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%fp = load void(%struct.Foo*)*, void(%struct.Foo*)** %vslot
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tail call void %fp(%struct.Foo* %obj)
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tail call void %fp(%struct.Foo* %obj)
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ret void
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}
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; X64-LABEL: vcall:
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; X64: movq %rdi, %[[obj:[^ ]*]]
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; X64: movq (%rdi), %[[vptr:[^ ]*]]
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; X64: movq 8(%[[vptr]]), %[[fp:[^ ]*]]
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; X64: movq %[[fp]], %r11
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; X64: callq __llvm_retpoline_r11
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; X64-DAG: movq %[[obj]], %rdi
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; X64-DAG: movq %[[fp]], %r11
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; X64: jmp __llvm_retpoline_r11 # TAILCALL
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; X64FAST-LABEL: vcall:
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; X64FAST: callq __llvm_retpoline_r11
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; X64FAST: jmp __llvm_retpoline_r11 # TAILCALL
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; X86-LABEL: vcall:
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; X86: movl 8(%esp), %[[obj:[^ ]*]]
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; X86: movl (%[[obj]]), %[[vptr:[^ ]*]]
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; X86: movl 4(%[[vptr]]), %[[fp:[^ ]*]]
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; X86: movl %[[fp]], %eax
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; X86: pushl %[[obj]]
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; X86: calll __llvm_retpoline_eax
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; X86: addl $4, %esp
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; X86: movl %[[fp]], %eax
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; X86: jmp __llvm_retpoline_eax # TAILCALL
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; X86FAST-LABEL: vcall:
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; X86FAST: calll __llvm_retpoline_eax
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; X86FAST: jmp __llvm_retpoline_eax # TAILCALL
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declare void @direct_callee()
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define void @direct_tail() #0 {
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tail call void @direct_callee()
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ret void
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}
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; X64-LABEL: direct_tail:
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; X64: jmp direct_callee@PLT # TAILCALL
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; X64FAST-LABEL: direct_tail:
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; X64FAST: jmp direct_callee@PLT # TAILCALL
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; X86-LABEL: direct_tail:
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; X86: jmp direct_callee@PLT # TAILCALL
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; X86FAST-LABEL: direct_tail:
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; X86FAST: jmp direct_callee@PLT # TAILCALL
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declare void @nonlazybind_callee() #2
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define void @nonlazybind_caller() #0 {
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call void @nonlazybind_callee()
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tail call void @nonlazybind_callee()
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ret void
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}
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; X64-LABEL: nonlazybind_caller:
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; X64: movq nonlazybind_callee@GOTPCREL(%rip), %[[REG:.*]]
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; X64: movq %[[REG]], %r11
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; X64: callq __llvm_retpoline_r11
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; X64: movq %[[REG]], %r11
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; X64: jmp __llvm_retpoline_r11 # TAILCALL
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; X64FAST-LABEL: nonlazybind_caller:
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; X64FAST: movq nonlazybind_callee@GOTPCREL(%rip), %r11
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; X64FAST: callq __llvm_retpoline_r11
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; X64FAST: movq nonlazybind_callee@GOTPCREL(%rip), %r11
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; X64FAST: jmp __llvm_retpoline_r11 # TAILCALL
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; X86-LABEL: nonlazybind_caller:
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; X86: calll nonlazybind_callee@PLT
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; X86: jmp nonlazybind_callee@PLT # TAILCALL
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; X86FAST-LABEL: nonlazybind_caller:
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; X86FAST: calll nonlazybind_callee@PLT
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; X86FAST: jmp nonlazybind_callee@PLT # TAILCALL
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; Check that a switch gets lowered using a jump table when retpolines are only
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; enabled for calls.
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define void @switch_jumptable(i32* %ptr, i64* %sink) #0 {
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; X64-LABEL: switch_jumptable:
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; X64: jmpq *
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; X86-LABEL: switch_jumptable:
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; X86: jmpl *
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entry:
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br label %header
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header:
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%i = load volatile i32, i32* %ptr
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switch i32 %i, label %bb0 [
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i32 1, label %bb1
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i32 2, label %bb2
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i32 3, label %bb3
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i32 4, label %bb4
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i32 5, label %bb5
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i32 6, label %bb6
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i32 7, label %bb7
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i32 8, label %bb8
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i32 9, label %bb9
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]
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bb0:
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store volatile i64 0, i64* %sink
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br label %header
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bb1:
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store volatile i64 1, i64* %sink
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br label %header
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bb2:
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store volatile i64 2, i64* %sink
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br label %header
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bb3:
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store volatile i64 3, i64* %sink
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br label %header
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bb4:
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store volatile i64 4, i64* %sink
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br label %header
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bb5:
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store volatile i64 5, i64* %sink
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br label %header
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bb6:
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store volatile i64 6, i64* %sink
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br label %header
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bb7:
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store volatile i64 7, i64* %sink
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br label %header
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bb8:
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store volatile i64 8, i64* %sink
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br label %header
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bb9:
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store volatile i64 9, i64* %sink
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br label %header
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}
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@indirectbr_preserved.targets = constant [10 x i8*] [i8* blockaddress(@indirectbr_preserved, %bb0),
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i8* blockaddress(@indirectbr_preserved, %bb1),
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i8* blockaddress(@indirectbr_preserved, %bb2),
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i8* blockaddress(@indirectbr_preserved, %bb3),
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i8* blockaddress(@indirectbr_preserved, %bb4),
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i8* blockaddress(@indirectbr_preserved, %bb5),
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i8* blockaddress(@indirectbr_preserved, %bb6),
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i8* blockaddress(@indirectbr_preserved, %bb7),
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i8* blockaddress(@indirectbr_preserved, %bb8),
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i8* blockaddress(@indirectbr_preserved, %bb9)]
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; Check that we preserve indirectbr when only calls are retpolined.
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define void @indirectbr_preserved(i64* readonly %p, i64* %sink) #0 {
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; X64-LABEL: indirectbr_preserved:
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; X64: jmpq *
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; X86-LABEL: indirectbr_preserved:
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; X86: jmpl *
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entry:
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%i0 = load i64, i64* %p
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%target.i0 = getelementptr [10 x i8*], [10 x i8*]* @indirectbr_preserved.targets, i64 0, i64 %i0
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%target0 = load i8*, i8** %target.i0
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indirectbr i8* %target0, [label %bb1, label %bb3]
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bb0:
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store volatile i64 0, i64* %sink
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br label %latch
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bb1:
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store volatile i64 1, i64* %sink
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br label %latch
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bb2:
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store volatile i64 2, i64* %sink
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br label %latch
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bb3:
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store volatile i64 3, i64* %sink
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br label %latch
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bb4:
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store volatile i64 4, i64* %sink
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br label %latch
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bb5:
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store volatile i64 5, i64* %sink
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br label %latch
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bb6:
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store volatile i64 6, i64* %sink
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br label %latch
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bb7:
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store volatile i64 7, i64* %sink
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br label %latch
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bb8:
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store volatile i64 8, i64* %sink
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br label %latch
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bb9:
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store volatile i64 9, i64* %sink
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br label %latch
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latch:
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%i.next = load i64, i64* %p
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%target.i.next = getelementptr [10 x i8*], [10 x i8*]* @indirectbr_preserved.targets, i64 0, i64 %i.next
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%target.next = load i8*, i8** %target.i.next
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; Potentially hit a full 10 successors here so that even if we rewrite as
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; a switch it will try to be lowered with a jump table.
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indirectbr i8* %target.next, [label %bb0,
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label %bb1,
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label %bb2,
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label %bb3,
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label %bb4,
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label %bb5,
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label %bb6,
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label %bb7,
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label %bb8,
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label %bb9]
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}
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@indirectbr_rewrite.targets = constant [10 x i8*] [i8* blockaddress(@indirectbr_rewrite, %bb0),
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i8* blockaddress(@indirectbr_rewrite, %bb1),
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i8* blockaddress(@indirectbr_rewrite, %bb2),
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i8* blockaddress(@indirectbr_rewrite, %bb3),
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i8* blockaddress(@indirectbr_rewrite, %bb4),
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i8* blockaddress(@indirectbr_rewrite, %bb5),
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i8* blockaddress(@indirectbr_rewrite, %bb6),
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i8* blockaddress(@indirectbr_rewrite, %bb7),
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i8* blockaddress(@indirectbr_rewrite, %bb8),
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i8* blockaddress(@indirectbr_rewrite, %bb9)]
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; Check that when retpolines are enabled for indirect branches the indirectbr
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; instruction gets rewritten to use switch, and that in turn doesn't get lowered
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; as a jump table.
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define void @indirectbr_rewrite(i64* readonly %p, i64* %sink) #1 {
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; X64-LABEL: indirectbr_rewrite:
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; X64-NOT: jmpq
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; X86-LABEL: indirectbr_rewrite:
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; X86-NOT: jmpl
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entry:
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%i0 = load i64, i64* %p
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%target.i0 = getelementptr [10 x i8*], [10 x i8*]* @indirectbr_rewrite.targets, i64 0, i64 %i0
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%target0 = load i8*, i8** %target.i0
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indirectbr i8* %target0, [label %bb1, label %bb3]
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bb0:
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store volatile i64 0, i64* %sink
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br label %latch
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bb1:
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store volatile i64 1, i64* %sink
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br label %latch
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bb2:
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store volatile i64 2, i64* %sink
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br label %latch
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bb3:
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store volatile i64 3, i64* %sink
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br label %latch
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bb4:
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store volatile i64 4, i64* %sink
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br label %latch
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bb5:
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store volatile i64 5, i64* %sink
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br label %latch
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bb6:
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store volatile i64 6, i64* %sink
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br label %latch
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bb7:
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store volatile i64 7, i64* %sink
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br label %latch
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bb8:
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store volatile i64 8, i64* %sink
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br label %latch
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bb9:
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store volatile i64 9, i64* %sink
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br label %latch
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latch:
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%i.next = load i64, i64* %p
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%target.i.next = getelementptr [10 x i8*], [10 x i8*]* @indirectbr_rewrite.targets, i64 0, i64 %i.next
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%target.next = load i8*, i8** %target.i.next
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; Potentially hit a full 10 successors here so that even if we rewrite as
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; a switch it will try to be lowered with a jump table.
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indirectbr i8* %target.next, [label %bb0,
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label %bb1,
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label %bb2,
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label %bb3,
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label %bb4,
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label %bb5,
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label %bb6,
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label %bb7,
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label %bb8,
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label %bb9]
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}
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; Lastly check that the necessary thunks were emitted.
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;
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; X64-LABEL: .section .text.__llvm_retpoline_r11,{{.*}},__llvm_retpoline_r11,comdat
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; X64-NEXT: .hidden __llvm_retpoline_r11
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; X64-NEXT: .weak __llvm_retpoline_r11
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; X64: __llvm_retpoline_r11:
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; X64-NEXT: # {{.*}} # %entry
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; X64-NEXT: callq [[CALL_TARGET:.*]]
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; X64-NEXT: [[CAPTURE_SPEC:.*]]: # Block address taken
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; X64-NEXT: # %entry
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; X64-NEXT: # =>This Inner Loop Header: Depth=1
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; X64-NEXT: pause
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; X64-NEXT: lfence
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; X64-NEXT: jmp [[CAPTURE_SPEC]]
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; X64-NEXT: .p2align 4, 0x90
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; X64-NEXT: {{.*}} # Block address taken
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; X64-NEXT: # %entry
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; X64-NEXT: [[CALL_TARGET]]:
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; X64-NEXT: movq %r11, (%rsp)
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; X64-NEXT: retq
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;
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; X86-LABEL: .section .text.__llvm_retpoline_eax,{{.*}},__llvm_retpoline_eax,comdat
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; X86-NEXT: .hidden __llvm_retpoline_eax
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; X86-NEXT: .weak __llvm_retpoline_eax
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; X86: __llvm_retpoline_eax:
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; X86-NEXT: # {{.*}} # %entry
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; X86-NEXT: calll [[CALL_TARGET:.*]]
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; X86-NEXT: [[CAPTURE_SPEC:.*]]: # Block address taken
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; X86-NEXT: # %entry
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; X86-NEXT: # =>This Inner Loop Header: Depth=1
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; X86-NEXT: pause
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; X86-NEXT: lfence
|
|
; X86-NEXT: jmp [[CAPTURE_SPEC]]
|
|
; X86-NEXT: .p2align 4, 0x90
|
|
; X86-NEXT: {{.*}} # Block address taken
|
|
; X86-NEXT: # %entry
|
|
; X86-NEXT: [[CALL_TARGET]]:
|
|
; X86-NEXT: movl %eax, (%esp)
|
|
; X86-NEXT: retl
|
|
;
|
|
; X86-LABEL: .section .text.__llvm_retpoline_ecx,{{.*}},__llvm_retpoline_ecx,comdat
|
|
; X86-NEXT: .hidden __llvm_retpoline_ecx
|
|
; X86-NEXT: .weak __llvm_retpoline_ecx
|
|
; X86: __llvm_retpoline_ecx:
|
|
; X86-NEXT: # {{.*}} # %entry
|
|
; X86-NEXT: calll [[CALL_TARGET:.*]]
|
|
; X86-NEXT: [[CAPTURE_SPEC:.*]]: # Block address taken
|
|
; X86-NEXT: # %entry
|
|
; X86-NEXT: # =>This Inner Loop Header: Depth=1
|
|
; X86-NEXT: pause
|
|
; X86-NEXT: lfence
|
|
; X86-NEXT: jmp [[CAPTURE_SPEC]]
|
|
; X86-NEXT: .p2align 4, 0x90
|
|
; X86-NEXT: {{.*}} # Block address taken
|
|
; X86-NEXT: # %entry
|
|
; X86-NEXT: [[CALL_TARGET]]:
|
|
; X86-NEXT: movl %ecx, (%esp)
|
|
; X86-NEXT: retl
|
|
;
|
|
; X86-LABEL: .section .text.__llvm_retpoline_edx,{{.*}},__llvm_retpoline_edx,comdat
|
|
; X86-NEXT: .hidden __llvm_retpoline_edx
|
|
; X86-NEXT: .weak __llvm_retpoline_edx
|
|
; X86: __llvm_retpoline_edx:
|
|
; X86-NEXT: # {{.*}} # %entry
|
|
; X86-NEXT: calll [[CALL_TARGET:.*]]
|
|
; X86-NEXT: [[CAPTURE_SPEC:.*]]: # Block address taken
|
|
; X86-NEXT: # %entry
|
|
; X86-NEXT: # =>This Inner Loop Header: Depth=1
|
|
; X86-NEXT: pause
|
|
; X86-NEXT: lfence
|
|
; X86-NEXT: jmp [[CAPTURE_SPEC]]
|
|
; X86-NEXT: .p2align 4, 0x90
|
|
; X86-NEXT: {{.*}} # Block address taken
|
|
; X86-NEXT: # %entry
|
|
; X86-NEXT: [[CALL_TARGET]]:
|
|
; X86-NEXT: movl %edx, (%esp)
|
|
; X86-NEXT: retl
|
|
;
|
|
; X86-LABEL: .section .text.__llvm_retpoline_edi,{{.*}},__llvm_retpoline_edi,comdat
|
|
; X86-NEXT: .hidden __llvm_retpoline_edi
|
|
; X86-NEXT: .weak __llvm_retpoline_edi
|
|
; X86: __llvm_retpoline_edi:
|
|
; X86-NEXT: # {{.*}} # %entry
|
|
; X86-NEXT: calll [[CALL_TARGET:.*]]
|
|
; X86-NEXT: [[CAPTURE_SPEC:.*]]: # Block address taken
|
|
; X86-NEXT: # %entry
|
|
; X86-NEXT: # =>This Inner Loop Header: Depth=1
|
|
; X86-NEXT: pause
|
|
; X86-NEXT: lfence
|
|
; X86-NEXT: jmp [[CAPTURE_SPEC]]
|
|
; X86-NEXT: .p2align 4, 0x90
|
|
; X86-NEXT: {{.*}} # Block address taken
|
|
; X86-NEXT: # %entry
|
|
; X86-NEXT: [[CALL_TARGET]]:
|
|
; X86-NEXT: movl %edi, (%esp)
|
|
; X86-NEXT: retl
|
|
|
|
|
|
attributes #0 = { "target-features"="+retpoline-indirect-calls" }
|
|
attributes #1 = { "target-features"="+retpoline-indirect-calls,+retpoline-indirect-branches" }
|
|
attributes #2 = { nonlazybind }
|