forked from OSchip/llvm-project
73 lines
1.8 KiB
YAML
73 lines
1.8 KiB
YAML
# RUN: llc -run-pass opt-phis -mtriple=x86_64-- -o - %s | FileCheck %s
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# All PHIs should be removed since they can be securely replaced
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# by %8 register.
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# CHECK-NOT: PHI
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--- |
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define void @test() {
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ret void
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}
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...
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---
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name: test
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alignment: 16
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tracksRegLiveness: true
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jumpTable:
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kind: block-address
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entries:
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- id: 0
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blocks: [ '%bb.3', '%bb.2', '%bb.1', '%bb.4' ]
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body: |
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bb.0:
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liveins: $edi, $ymm0, $rsi
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%9:gr64 = COPY $rsi
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%8:vr256 = COPY $ymm0
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%7:gr32 = COPY $edi
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%11:gr32 = SAR32ri %7, 31, implicit-def dead $eflags
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%12:gr32 = SHR32ri %11, 30, implicit-def dead $eflags
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%13:gr32 = ADD32rr %7, killed %12, implicit-def dead $eflags
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%14:gr32 = AND32ri8 %13, -4, implicit-def dead $eflags
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%15:gr32 = SUB32rr %7, %14, implicit-def dead $eflags
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%10:gr64_nosp = SUBREG_TO_REG 0, %15, %subreg.sub_32bit
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%16:gr32 = SUB32ri8 %15, 3, implicit-def $eflags
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JCC_1 %bb.8, 7, implicit $eflags
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bb.9:
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JMP64m $noreg, 8, %10, %jump-table.0, $noreg :: (load (s64) from jump-table)
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bb.1:
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%0:vr256 = COPY %8
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JMP_1 %bb.5
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bb.2:
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%1:vr256 = COPY %8
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JMP_1 %bb.6
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bb.3:
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%2:vr256 = COPY %8
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JMP_1 %bb.7
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bb.4:
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%3:vr256 = COPY %8
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%17:vr128 = VEXTRACTF128rr %8, 1
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VPEXTRDmr %9, 1, $noreg, 12, $noreg, killed %17, 2
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bb.5:
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%4:vr256 = PHI %0, %bb.1, %3, %bb.4
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%18:vr128 = VEXTRACTF128rr %4, 1
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VPEXTRDmr %9, 1, $noreg, 8, $noreg, killed %18, 1
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bb.6:
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%5:vr256 = PHI %1, %bb.2, %4, %bb.5
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%19:vr128 = VEXTRACTF128rr %5, 1
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VMOVPDI2DImr %9, 1, $noreg, 4, $noreg, killed %19
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bb.7:
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%6:vr256 = PHI %2, %bb.3, %5, %bb.6
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%20:vr128 = COPY %6.sub_xmm
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VPEXTRDmr %9, 1, $noreg, 0, $noreg, killed %20, 3
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bb.8:
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RET 0
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...
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