forked from OSchip/llvm-project
61 lines
2.5 KiB
LLVM
61 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE41
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE42
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX
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define i8 @test_demandedbits_umin_ult(i8 %a0, i8 %a1) {
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; CHECK-LABEL: test_demandedbits_umin_ult:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: orb $4, %al
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; CHECK-NEXT: andb $12, %al
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: retq
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%lhs0 = and i8 %a0, 13 ; b1101
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%rhs0 = and i8 %a1, 12 ; b1100
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%lhs1 = or i8 %lhs0, 12 ; b1100
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%rhs1 = or i8 %rhs0, 4 ; b0100
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%umin = tail call i8 @llvm.umin.i8(i8 %lhs1, i8 %rhs1)
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ret i8 %umin
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}
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declare i8 @llvm.umin.i8(i8, i8)
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define <8 x i16> @test_v8i16_nosignbit(<8 x i16> %a, <8 x i16> %b) {
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; SSE2-LABEL: test_v8i16_nosignbit:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE2-NEXT: psrlw $1, %xmm1
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; SSE2-NEXT: pmaxsw %xmm1, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: test_v8i16_nosignbit:
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; SSE41: # %bb.0:
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; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE41-NEXT: psrlw $1, %xmm1
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; SSE41-NEXT: pmaxuw %xmm1, %xmm0
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; SSE41-NEXT: retq
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;
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; SSE42-LABEL: test_v8i16_nosignbit:
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; SSE42: # %bb.0:
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; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
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; SSE42-NEXT: psrlw $1, %xmm1
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; SSE42-NEXT: pmaxuw %xmm1, %xmm0
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; SSE42-NEXT: retq
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;
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; AVX-LABEL: test_v8i16_nosignbit:
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; AVX: # %bb.0:
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; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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; AVX-NEXT: vpsrlw $1, %xmm1, %xmm1
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; AVX-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%1 = and <8 x i16> %a, <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>
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%2 = lshr <8 x i16> %b, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
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%3 = icmp ugt <8 x i16> %1, %2
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%4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2
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ret <8 x i16> %4
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}
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