forked from OSchip/llvm-project
35 lines
1.2 KiB
LLVM
35 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; Coalescing from R32 to a subset R32_. Once another register coalescer bug is
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; fixed, the movb should go away as well.
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; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s
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@B = external dso_local global i32 ; <i32*> [#uses=2]
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@C = external dso_local global i16* ; <i16**> [#uses=2]
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define void @test(i32 %A) {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl %eax, %ecx
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; CHECK-NEXT: andb $16, %cl
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; CHECK-NEXT: shll %cl, B
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; CHECK-NEXT: shrl $3, %eax
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; CHECK-NEXT: addl %eax, C
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; CHECK-NEXT: retl
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%A.upgrd.1 = trunc i32 %A to i8 ; <i8> [#uses=1]
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%tmp2 = load i32, i32* @B ; <i32> [#uses=1]
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%tmp3 = and i8 %A.upgrd.1, 16 ; <i8> [#uses=1]
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%shift.upgrd.2 = zext i8 %tmp3 to i32 ; <i32> [#uses=1]
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%tmp4 = shl i32 %tmp2, %shift.upgrd.2 ; <i32> [#uses=1]
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store i32 %tmp4, i32* @B
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%tmp6 = lshr i32 %A, 3 ; <i32> [#uses=1]
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%tmp = load i16*, i16** @C ; <i16*> [#uses=1]
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%tmp8 = ptrtoint i16* %tmp to i32 ; <i32> [#uses=1]
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%tmp9 = add i32 %tmp8, %tmp6 ; <i32> [#uses=1]
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%tmp9.upgrd.3 = inttoptr i32 %tmp9 to i16* ; <i16*> [#uses=1]
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store i16* %tmp9.upgrd.3, i16** @C
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ret void
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}
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