llvm-project/llvm/test/MC/Disassembler
Craig Topper c3cf55b935 [X86][Disassembler] Make it an error to set EVEX.R' to 0 when modrm.reg encodes a GPR.
This is different than the behavior of EVEX.X extending modrm.rm to 5 bits.

llvm-svn: 333728
2018-06-01 06:11:29 +00:00
..
AArch64 [AArch64] Fix spelling of ICH_ELRSR_EL2 system register 2018-02-06 09:39:04 +00:00
AMDGPU AMDGPU: Fix v_dot{4, 8}* instruction encoding 2018-05-15 19:32:47 +00:00
ARC [ARC] Add LImm support for J/JL 2018-04-13 15:10:34 +00:00
ARM [ARM]Decoding MSR with unpredictable destination register causes an assert 2018-03-06 15:21:19 +00:00
Hexagon [Hexagon] Remove trailing spaces, NFC 2017-11-22 20:43:00 +00:00
Lanai
Mips [mips] Correct the predicates of arithmetic and logic instructions. 2018-05-30 11:33:35 +00:00
PowerPC [PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9. 2018-02-23 15:55:16 +00:00
Sparc
SystemZ [SystemZ] Add support for IBM z14 processor (3/3) 2017-07-17 17:44:20 +00:00
WebAssembly [WebAssembly] Initial Disassembler. 2018-05-10 22:16:44 +00:00
X86 [X86][Disassembler] Make it an error to set EVEX.R' to 0 when modrm.reg encodes a GPR. 2018-06-01 06:11:29 +00:00
XCore