..
AArch64
[AArch64][SVE] Fix range for DUP immediates (16bit elts)
2018-06-04 07:24:23 +00:00
AMDGPU
AMDGPU: Fix v_dot{4, 8}* instruction encoding
2018-05-15 19:32:47 +00:00
ARM
[MC] Relax .fill size requirements
2018-05-18 17:45:48 +00:00
AVR
[AVR] Implement some missing code paths
2017-12-11 11:01:27 +00:00
AsmParser
[MC] Add assembler support for .cg_profile.
2018-06-02 16:33:01 +00:00
BPF
bpf: New disassembler testcases for 32-bit subregister support
2018-02-23 23:49:35 +00:00
COFF
[CodeView] Add prefix to CodeView registers.
2018-05-29 14:35:34 +00:00
Disassembler
[X86][Disassembler] Make it an error to set EVEX.R' to 0 when modrm.reg encodes a GPR.
2018-06-01 06:11:29 +00:00
ELF
[MC] Add assembler support for .cg_profile.
2018-06-02 16:33:01 +00:00
Hexagon
[Hexagon] Use addAliasForDirective for data directives
2018-05-17 13:21:18 +00:00
Lanai
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MachO
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
Mips
[mips] Support 64-bit offsets for lb/sb/ld/sd/lld ... instructions
2018-06-01 16:37:53 +00:00
PowerPC
[PowerPC] Set isAsmParserOnly=1 for X-form TLS loads/stores
2018-05-28 15:27:58 +00:00
RISCV
[RISCV] Support resolving fixup_riscv_call and add to MCFixupKindInfo table
2018-05-30 01:16:36 +00:00
Sparc
Implemented sane default for llvm-objdump's relocation Value format
2018-06-01 05:31:58 +00:00
SystemZ
[SystemZ, AsmParser] Enable the mnemonic spell corrector.
2017-07-18 09:17:00 +00:00
WebAssembly
[WebAssembly] MC: Add compile-twice test and fix corresponding bug
2018-05-30 02:57:20 +00:00
X86
Implemented sane default for llvm-objdump's relocation Value format
2018-06-01 05:31:58 +00:00