forked from OSchip/llvm-project
132 lines
3.6 KiB
LLVM
132 lines
3.6 KiB
LLVM
; Test 64-bit byteswaps from memory to registers.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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declare i64 @llvm.bswap.i64(i64 %a)
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; Check LRVG with no displacement.
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define i64 @f1(i64 *%src) {
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; CHECK-LABEL: f1:
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; CHECK: lrvg %r2, 0(%r2)
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; CHECK: br %r14
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%a = load i64 , i64 *%src
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%swapped = call i64 @llvm.bswap.i64(i64 %a)
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ret i64 %swapped
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}
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; Check the high end of the aligned LRVG range.
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define i64 @f2(i64 *%src) {
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; CHECK-LABEL: f2:
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; CHECK: lrvg %r2, 524280(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%src, i64 65535
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%a = load i64 , i64 *%ptr
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%swapped = call i64 @llvm.bswap.i64(i64 %a)
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ret i64 %swapped
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}
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; Check the next doubleword up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define i64 @f3(i64 *%src) {
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; CHECK-LABEL: f3:
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; CHECK: agfi %r2, 524288
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; CHECK: lrvg %r2, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%src, i64 65536
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%a = load i64 , i64 *%ptr
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%swapped = call i64 @llvm.bswap.i64(i64 %a)
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ret i64 %swapped
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}
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; Check the high end of the negative aligned LRVG range.
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define i64 @f4(i64 *%src) {
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; CHECK-LABEL: f4:
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; CHECK: lrvg %r2, -8(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%src, i64 -1
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%a = load i64 , i64 *%ptr
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%swapped = call i64 @llvm.bswap.i64(i64 %a)
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ret i64 %swapped
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}
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; Check the low end of the LRVG range.
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define i64 @f5(i64 *%src) {
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; CHECK-LABEL: f5:
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; CHECK: lrvg %r2, -524288(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%src, i64 -65536
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%a = load i64 , i64 *%ptr
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%swapped = call i64 @llvm.bswap.i64(i64 %a)
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ret i64 %swapped
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}
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; Check the next doubleword down, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define i64 @f6(i64 *%src) {
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; CHECK-LABEL: f6:
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; CHECK: agfi %r2, -524296
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; CHECK: lrvg %r2, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i64, i64 *%src, i64 -65537
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%a = load i64 , i64 *%ptr
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%swapped = call i64 @llvm.bswap.i64(i64 %a)
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ret i64 %swapped
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}
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; Check that LRVG allows an index.
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define i64 @f7(i64 %src, i64 %index) {
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; CHECK-LABEL: f7:
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; CHECK: lrvg %r2, 524287({{%r3,%r2|%r2,%r3}})
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; CHECK: br %r14
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%add1 = add i64 %src, %index
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%add2 = add i64 %add1, 524287
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%ptr = inttoptr i64 %add2 to i64 *
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%a = load i64 , i64 *%ptr
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%swapped = call i64 @llvm.bswap.i64(i64 %a)
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ret i64 %swapped
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}
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; Test a case where we spill the source of at least one LRVGR. We want
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; to use LRVG if possible.
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define i64 @f8(i64 *%ptr) {
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; CHECK-LABEL: f8:
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; CHECK: lrvg {{%r[0-9]+}}, 160(%r15)
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; CHECK: br %r14
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%val0 = call i64 @foo()
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%val1 = call i64 @foo()
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%val2 = call i64 @foo()
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%val3 = call i64 @foo()
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%val4 = call i64 @foo()
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%val5 = call i64 @foo()
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%val6 = call i64 @foo()
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%val7 = call i64 @foo()
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%val8 = call i64 @foo()
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%val9 = call i64 @foo()
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%swapped0 = call i64 @llvm.bswap.i64(i64 %val0)
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%swapped1 = call i64 @llvm.bswap.i64(i64 %val1)
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%swapped2 = call i64 @llvm.bswap.i64(i64 %val2)
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%swapped3 = call i64 @llvm.bswap.i64(i64 %val3)
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%swapped4 = call i64 @llvm.bswap.i64(i64 %val4)
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%swapped5 = call i64 @llvm.bswap.i64(i64 %val5)
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%swapped6 = call i64 @llvm.bswap.i64(i64 %val6)
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%swapped7 = call i64 @llvm.bswap.i64(i64 %val7)
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%swapped8 = call i64 @llvm.bswap.i64(i64 %val8)
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%swapped9 = call i64 @llvm.bswap.i64(i64 %val9)
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%ret1 = add i64 %swapped0, %swapped1
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%ret2 = add i64 %ret1, %swapped2
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%ret3 = add i64 %ret2, %swapped3
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%ret4 = add i64 %ret3, %swapped4
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%ret5 = add i64 %ret4, %swapped5
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%ret6 = add i64 %ret5, %swapped6
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%ret7 = add i64 %ret6, %swapped7
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%ret8 = add i64 %ret7, %swapped8
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%ret9 = add i64 %ret8, %swapped9
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ret i64 %ret9
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}
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declare i64 @foo()
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