.. |
AArch64
|
[AArch64][GlobalISel] Zero-extend s1 values when returning.
|
2018-06-01 13:20:32 +00:00 |
AMDGPU
|
AMDGPU: Switch some half using-tests to use amdhsa
|
2018-06-01 07:06:03 +00:00 |
ARC
|
…
|
|
ARM
|
[NEON] Support VLD1xN intrinsics in AArch32 mode (LLVM part)
|
2018-06-02 16:40:03 +00:00 |
AVR
|
[AVR] Add a regression test for struct return lowering
|
2018-03-20 11:23:03 +00:00 |
BPF
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
Generic
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
Hexagon
|
[Hexagon] Select HVX code for vector CTPOP, CTLZ, and CTTZ
|
2018-06-01 14:52:58 +00:00 |
Inputs
|
…
|
|
Lanai
|
Remove SETCCE use from Lanai's backend
|
2018-06-03 12:56:24 +00:00 |
MIR
|
[NFC] MIR-Canon: switching to a stable string sorting of instructions.
|
2018-05-13 06:07:20 +00:00 |
MSP430
|
Emit a left-shift instead of a power-of-two multiply for jump-tables
|
2018-05-16 08:58:26 +00:00 |
Mips
|
[mips] Restore the availablity of trap for microMIPS
|
2018-06-04 12:50:32 +00:00 |
NVPTX
|
[DAG] fold FP binops with undef operands to NaN
|
2018-05-21 23:54:19 +00:00 |
Nios2
|
…
|
|
PowerPC
|
[PowerPC] Fix the incorrect iterator inside peephole
|
2018-05-29 13:38:56 +00:00 |
RISCV
|
[RISCV] Add peepholes for Global Address lowering patterns
|
2018-05-29 19:34:54 +00:00 |
SPARC
|
[Sparc] Select correct register class for FP register constraints
|
2018-05-30 06:07:55 +00:00 |
SystemZ
|
[SystemZ] Bugfix in combineSTORE().
|
2018-05-25 09:01:23 +00:00 |
Thumb
|
Reapply ARM: Do not spill CSR to stack on entry to noreturn functions
|
2018-04-07 10:57:03 +00:00 |
Thumb2
|
[Thumb2] fix typo in test from r332548
|
2018-05-17 03:24:25 +00:00 |
WebAssembly
|
[WebAssembly] Update to the new names for the memory intrinsics.
|
2018-05-31 22:35:25 +00:00 |
WinCFGuard
|
…
|
|
WinEH
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
X86
|
[X86] Remove and autoupgrade masked avx512vnni intrinsics using the unmasked intrinsics and select instructions.
|
2018-06-03 23:24:17 +00:00 |
XCore
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |