llvm-project/llvm/test/CodeGen
Jay Foad 275ecaae16 [AMDGPU] Cluster MIMG instructions
Differential Revision: https://reviews.llvm.org/D74035
2020-06-08 14:01:53 +01:00
..
AArch64 [AArch64][SVE] Implement vector tuple intrinsics 2020-06-08 11:09:55 +00:00
AMDGPU [AMDGPU] Cluster MIMG instructions 2020-06-08 14:01:53 +01:00
ARC
ARM [ARM][XO] Execute-only miscompiles double literals for big-endian 2020-06-08 08:13:08 +01:00
AVR [AVR] Fix I/O instructions on XMEGA 2020-05-17 19:46:09 +12:00
BPF [BPF] Remove unnecessary MOV_32_64 instructions 2020-06-03 08:14:54 -07:00
Generic [Tests] Migrate a number of tests to gc-live bundle representation 2020-06-05 16:44:04 -07:00
Hexagon Simplify MachineVerifier's block-successor verification. 2020-06-06 22:30:51 -04:00
Inputs
Lanai
MIR [MachineVerifier] Verify that a DBG_VALUE has a debug location 2020-05-28 13:53:40 -07:00
MSP430
Mips RegAllocFast: Record internal state based on register units 2020-06-03 16:51:46 -04:00
NVPTX
PowerPC [NFC][PowerPC] Modify the test case to test RM 2020-06-08 08:55:31 +00:00
RISCV Add NoMerge MIFlag to avoid MIR branch folding 2020-05-29 12:31:06 -07:00
SPARC
SystemZ [SystemZ] Implement -fstack-clash-protection 2020-06-06 18:38:36 +02:00
Thumb
Thumb2 [ARM] VQMOVN demand bits analysis 2020-06-05 18:41:02 +01:00
VE [VE] Add AND/OR/XOR regression tests 2020-06-05 10:05:22 +02:00
WebAssembly Simplify MachineVerifier's block-successor verification. 2020-06-06 22:30:51 -04:00
WinCFGuard
WinEH
X86 [X86] Support load shrinking for strict fp nodes in combineCVTPH2PS 2020-06-07 21:09:55 -07:00
XCore