forked from OSchip/llvm-project
142 lines
6.4 KiB
TableGen
142 lines
6.4 KiB
TableGen
//===- PTX.td - Describe the PTX Target Machine ---------------*- tblgen -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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// This is the top level entry point for the PTX target.
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Target-independent interfaces
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//===----------------------------------------------------------------------===//
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include "llvm/Target/Target.td"
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//===----------------------------------------------------------------------===//
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// Subtarget Features
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//===----------------------------------------------------------------------===//
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//===- Architectural Features ---------------------------------------------===//
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def FeatureDouble : SubtargetFeature<"double", "SupportsDouble", "true",
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"Do not demote .f64 to .f32">;
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def FeatureNoFMA : SubtargetFeature<"no-fma","SupportsFMA", "false",
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"Disable Fused-Multiply Add">;
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//===- PTX Version --------------------------------------------------------===//
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def FeaturePTX20 : SubtargetFeature<"ptx20", "PTXVersion", "PTX_VERSION_2_0",
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"Use PTX Language Version 2.0">;
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def FeaturePTX21 : SubtargetFeature<"ptx21", "PTXVersion", "PTX_VERSION_2_1",
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"Use PTX Language Version 2.1">;
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def FeaturePTX22 : SubtargetFeature<"ptx22", "PTXVersion", "PTX_VERSION_2_2",
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"Use PTX Language Version 2.2">;
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def FeaturePTX23 : SubtargetFeature<"ptx23", "PTXVersion", "PTX_VERSION_2_3",
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"Use PTX Language Version 2.3">;
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//===- PTX Target ---------------------------------------------------------===//
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def FeatureSM10 : SubtargetFeature<"sm10", "PTXTarget", "PTX_SM_1_0",
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"Use Shader Model 1.0">;
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def FeatureSM11 : SubtargetFeature<"sm11", "PTXTarget", "PTX_SM_1_1",
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"Use Shader Model 1.1">;
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def FeatureSM12 : SubtargetFeature<"sm12", "PTXTarget", "PTX_SM_1_2",
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"Use Shader Model 1.2">;
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def FeatureSM13 : SubtargetFeature<"sm13", "PTXTarget", "PTX_SM_1_3",
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"Use Shader Model 1.3">;
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def FeatureSM20 : SubtargetFeature<"sm20", "PTXTarget", "PTX_SM_2_0",
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"Use Shader Model 2.0", [FeatureDouble]>;
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def FeatureSM21 : SubtargetFeature<"sm21", "PTXTarget", "PTX_SM_2_1",
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"Use Shader Model 2.1", [FeatureDouble]>;
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def FeatureSM22 : SubtargetFeature<"sm22", "PTXTarget", "PTX_SM_2_2",
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"Use Shader Model 2.2", [FeatureDouble]>;
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def FeatureSM23 : SubtargetFeature<"sm23", "PTXTarget", "PTX_SM_2_3",
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"Use Shader Model 2.3", [FeatureDouble]>;
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def FeatureCOMPUTE10 : SubtargetFeature<"compute10", "PTXTarget",
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"PTX_COMPUTE_1_0",
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"Use Compute Compatibility 1.0">;
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def FeatureCOMPUTE11 : SubtargetFeature<"compute11", "PTXTarget",
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"PTX_COMPUTE_1_1",
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"Use Compute Compatibility 1.1">;
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def FeatureCOMPUTE12 : SubtargetFeature<"compute12", "PTXTarget",
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"PTX_COMPUTE_1_2",
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"Use Compute Compatibility 1.2">;
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def FeatureCOMPUTE13 : SubtargetFeature<"compute13", "PTXTarget",
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"PTX_COMPUTE_1_3",
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"Use Compute Compatibility 1.3">;
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def FeatureCOMPUTE20 : SubtargetFeature<"compute20", "PTXTarget",
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"PTX_COMPUTE_2_0",
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"Use Compute Compatibility 2.0",
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[FeatureDouble]>;
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//===----------------------------------------------------------------------===//
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// PTX supported processors
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//===----------------------------------------------------------------------===//
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class Proc<string Name, list<SubtargetFeature> Features>
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: Processor<Name, NoItineraries, Features>;
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def : Proc<"generic", []>;
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// Processor definitions for compute/shader models
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def : Proc<"compute_10", [FeatureCOMPUTE10]>;
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def : Proc<"compute_11", [FeatureCOMPUTE11]>;
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def : Proc<"compute_12", [FeatureCOMPUTE12]>;
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def : Proc<"compute_13", [FeatureCOMPUTE13]>;
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def : Proc<"compute_20", [FeatureCOMPUTE20]>;
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def : Proc<"sm_10", [FeatureSM10]>;
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def : Proc<"sm_11", [FeatureSM11]>;
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def : Proc<"sm_12", [FeatureSM12]>;
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def : Proc<"sm_13", [FeatureSM13]>;
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def : Proc<"sm_20", [FeatureSM20]>;
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def : Proc<"sm_21", [FeatureSM21]>;
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def : Proc<"sm_22", [FeatureSM22]>;
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def : Proc<"sm_23", [FeatureSM23]>;
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// Processor definitions for common GPU architectures
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def : Proc<"g80", [FeatureSM10]>;
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def : Proc<"gt200", [FeatureSM13]>;
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def : Proc<"gf100", [FeatureSM20, FeatureDouble]>;
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def : Proc<"fermi", [FeatureSM20, FeatureDouble]>;
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//===----------------------------------------------------------------------===//
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// Register File Description
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//===----------------------------------------------------------------------===//
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include "PTXRegisterInfo.td"
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//===----------------------------------------------------------------------===//
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// Instruction Descriptions
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//===----------------------------------------------------------------------===//
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include "PTXInstrInfo.td"
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def PTXInstrInfo : InstrInfo;
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//===----------------------------------------------------------------------===//
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// Assembly printer
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//===----------------------------------------------------------------------===//
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// PTX uses the MC printer for asm output, so make sure the TableGen
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// AsmWriter bits get associated with the correct class.
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def PTXAsmWriter : AsmWriter {
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string AsmWriterClassName = "InstPrinter";
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bit isMCAsmWriter = 1;
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}
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//===----------------------------------------------------------------------===//
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// Target Declaration
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//===----------------------------------------------------------------------===//
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def PTX : Target {
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let InstructionSet = PTXInstrInfo;
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let AssemblyWriters = [PTXAsmWriter];
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}
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