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AsmParser
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
Disassembler
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
MCTargetDesc
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[lldb/Hexagon] Include <mutex>
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2020-01-21 09:51:30 -08:00 |
TargetInfo
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CMake: Make most target symbols hidden by default
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2020-01-14 19:46:52 -08:00 |
BitTracker.cpp
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[Hexagon] Fixes -Wrange-loop-analysis warnings
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2019-12-22 19:35:02 +01:00 |
BitTracker.h
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…
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CMakeLists.txt
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Hexagon.h
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…
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Hexagon.td
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
HexagonArch.h
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonAsmPrinter.cpp
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CMake: Make most target symbols hidden by default
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2020-01-14 19:46:52 -08:00 |
HexagonAsmPrinter.h
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Include what you use in HexagonAsmPrinter.h
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2019-06-03 11:41:18 +00:00 |
HexagonBitSimplify.cpp
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
HexagonBitTracker.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
HexagonBitTracker.h
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…
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HexagonBlockRanges.cpp
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Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
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2019-08-01 23:27:28 +00:00 |
HexagonBlockRanges.h
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…
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HexagonBranchRelaxation.cpp
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[Alignment][NFC] Remove unneeded llvm:: scoping on Align types
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2019-09-27 12:54:21 +00:00 |
HexagonCFGOptimizer.cpp
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HexagonCallingConv.td
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…
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HexagonCommonGEP.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
HexagonConstExtenders.cpp
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[Hexagon] Add a target feature to disable compound instructions
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2020-01-16 12:37:30 -06:00 |
HexagonConstPropagation.cpp
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
HexagonCopyToCombine.cpp
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
HexagonDepArch.h
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
HexagonDepArch.td
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonDepDecoders.inc
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonDepIICHVX.td
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonDepIICScalar.td
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
HexagonDepITypes.h
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonDepITypes.td
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonDepInstrFormats.td
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonDepInstrInfo.td
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonDepMapAsm2Intrin.td
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonDepMappings.td
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonDepMask.h
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonDepOperands.td
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonDepTimingClasses.h
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonEarlyIfConv.cpp
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Fix "pointer is null" static analyzer warnings. NFCI.
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2020-01-10 11:10:42 +00:00 |
HexagonExpandCondsets.cpp
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Make more use of MachineInstr::mayLoadOrStore.
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2019-12-19 11:51:52 +00:00 |
HexagonFixupHwLoops.cpp
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[Alignment][NFC] Remove unneeded llvm:: scoping on Align types
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2019-09-27 12:54:21 +00:00 |
HexagonFrameLowering.cpp
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Add support for Linux/Musl ABI
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2020-01-20 09:59:56 -06:00 |
HexagonFrameLowering.h
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Add support for Linux/Musl ABI
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2020-01-20 09:59:56 -06:00 |
HexagonGenExtract.cpp
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[IR] Split out target specific intrinsic enums into separate headers
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2019-12-11 18:02:14 -08:00 |
HexagonGenInsert.cpp
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Reland 'Fixed -Wdeprecated-copy warnings. NFCI.'
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2019-11-23 23:09:39 +01:00 |
HexagonGenMux.cpp
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[Hexagon] Validate the iterators before converting them to mux.
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2019-11-14 13:01:16 -06:00 |
HexagonGenPredicate.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
HexagonHardwareLoops.cpp
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Update spelling of {analyze,insert,remove}Branch in strings and comments
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2020-01-21 10:15:38 -06:00 |
HexagonHazardRecognizer.cpp
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…
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HexagonHazardRecognizer.h
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…
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HexagonIICHVX.td
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…
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HexagonIICScalar.td
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…
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HexagonISelDAGToDAG.cpp
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[Hexagon] Add a target feature to disable compound instructions
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2020-01-16 12:37:30 -06:00 |
HexagonISelDAGToDAG.h
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[Hexagon] Update PS_aligna with max stack alignment once isel completes
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2019-11-12 11:47:29 -06:00 |
HexagonISelDAGToDAGHVX.cpp
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[IR] Split out target specific intrinsic enums into separate headers
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2019-12-11 18:02:14 -08:00 |
HexagonISelLowering.cpp
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonISelLowering.h
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Add support for Linux/Musl ABI
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2020-01-20 09:59:56 -06:00 |
HexagonISelLoweringHVX.cpp
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[DAGCombine] Initialize the default operation action for SIGN_EXTEND_INREG for vector type as 'expand' instead of 'legal'
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2020-01-03 03:26:41 +00:00 |
HexagonInstrFormats.td
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonInstrFormatsV60.td
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HexagonInstrFormatsV65.td
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…
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HexagonInstrInfo.cpp
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
HexagonInstrInfo.h
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
HexagonIntrinsics.td
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[Hexagon] Remove incorrect intrinsic definition and invalid testcase
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2019-11-21 09:18:15 -06:00 |
HexagonIntrinsicsV5.td
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HexagonIntrinsicsV60.td
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HexagonLoopIdiomRecognition.cpp
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Revert "[SCEV] Move ScalarEvolutionExpander.cpp to Transforms/Utils (NFC)."
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2020-01-04 18:44:38 +00:00 |
HexagonMCInstLower.cpp
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HexagonMachineFunctionInfo.cpp
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HexagonMachineFunctionInfo.h
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Add support for Linux/Musl ABI
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2020-01-20 09:59:56 -06:00 |
HexagonMachineScheduler.cpp
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HexagonMachineScheduler.h
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HexagonMapAsm2IntrinV62.gen.td
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HexagonMapAsm2IntrinV65.gen.td
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HexagonNewValueJump.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
HexagonOperands.td
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HexagonOptAddrMode.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
HexagonOptimizeSZextends.cpp
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[IR] Split out target specific intrinsic enums into separate headers
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2019-12-11 18:02:14 -08:00 |
HexagonPatterns.td
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
HexagonPatternsHVX.td
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[Hexagon] Bitcast v4i16 to v8i8, unify no-op casts between scalar and HVX
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2019-09-23 14:33:27 +00:00 |
HexagonPatternsV65.td
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HexagonPeephole.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
HexagonPseudo.td
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonRDFOpt.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
HexagonRegisterInfo.cpp
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[Hexagon] Fix vector spill expansion to use proper alignment
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2019-11-12 09:43:21 -06:00 |
HexagonRegisterInfo.h
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[TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true
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2020-01-19 14:20:37 -08:00 |
HexagonRegisterInfo.td
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[NFC] Fix trivial typos in comments
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2020-01-06 10:50:26 +00:00 |
HexagonSchedule.td
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
HexagonScheduleV5.td
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HexagonScheduleV55.td
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HexagonScheduleV60.td
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HexagonScheduleV62.td
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HexagonScheduleV65.td
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HexagonScheduleV66.td
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HexagonScheduleV67.td
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonScheduleV67T.td
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
HexagonSelectionDAGInfo.cpp
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HexagonSelectionDAGInfo.h
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HexagonSplitConst32AndConst64.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
HexagonSplitDouble.cpp
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Make more use of MachineInstr::mayLoadOrStore.
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2019-12-19 11:51:52 +00:00 |
HexagonStoreWidening.cpp
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Make more use of MachineInstr::mayLoadOrStore.
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2019-12-19 11:51:52 +00:00 |
HexagonSubtarget.cpp
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
HexagonSubtarget.h
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
HexagonTargetMachine.cpp
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[Hexagon] Add support for Hexagon/HVX v67 ISA
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2020-01-20 16:16:49 -06:00 |
HexagonTargetMachine.h
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HexagonTargetObjectFile.cpp
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Revert "Honor -fuse-init-array when os is not specified on x86"
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2019-12-17 07:36:59 -08:00 |
HexagonTargetObjectFile.h
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HexagonTargetStreamer.h
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HexagonTargetTransformInfo.cpp
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[ARM] Teach the Arm cost model that a Shift can be folded into other instructions
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2019-12-09 10:24:33 +00:00 |
HexagonTargetTransformInfo.h
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[ARM] Teach the Arm cost model that a Shift can be folded into other instructions
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2019-12-09 10:24:33 +00:00 |
HexagonVExtract.cpp
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[Hexagon] Handle stack realignment in hexagon-vextract
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2019-11-12 09:43:21 -06:00 |
HexagonVLIWPacketizer.cpp
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
HexagonVLIWPacketizer.h
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[Hexagon] Add support for Hexagon v67t microarchitecture (tiny core)
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2020-01-21 11:35:10 -06:00 |
HexagonVectorLoopCarriedReuse.cpp
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[IR] Split out target specific intrinsic enums into separate headers
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2019-12-11 18:02:14 -08:00 |
HexagonVectorPrint.cpp
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LLVMBuild.txt
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…
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RDFCopy.cpp
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Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
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2019-08-01 23:27:28 +00:00 |
RDFCopy.h
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RDFDeadCode.cpp
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Prune two MachineInstr.h includes, fix up deps
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2019-10-19 00:22:07 +00:00 |
RDFDeadCode.h
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RDFGraph.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
RDFGraph.h
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RDFLiveness.cpp
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[Hexagon] Fixes -Wrange-loop-analysis warnings
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2019-12-22 19:35:02 +01:00 |
RDFLiveness.h
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RDFRegisters.cpp
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Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
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2019-08-01 23:27:28 +00:00 |
RDFRegisters.h
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Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
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2019-08-01 23:27:28 +00:00 |