llvm-project/llvm/lib/Target/AArch64
Krzysztof Parzyszek 020041d99b Update spelling of {analyze,insert,remove}Branch in strings and comments
These names have been changed from CamelCase to camelCase, but there were
many places (comments mostly) that still used the old names.

This change is NFC.
2020-01-21 10:15:38 -06:00
..
AsmParser [AArch64] Make AArch64 specific assembly directives case insensitive 2020-01-17 16:16:18 +00:00
Disassembler CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
MCTargetDesc CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
TargetInfo CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
Utils [AArch64][SVE] Add ptest intrinsics 2020-01-15 11:15:01 +00:00
AArch64.h GlobalISel: add combiner to form indexed loads. 2019-09-09 10:04:23 +00:00
AArch64.td AArch64: add missing Apple CPU names and use them by default. 2020-01-08 09:24:06 +00:00
AArch64A53Fix835769.cpp
AArch64A57FPLoadBalancing.cpp [llvm] Migrate llvm::make_unique to std::make_unique 2019-08-15 15:54:37 +00:00
AArch64AdvSIMDScalarPass.cpp [aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-12 22:40:53 +00:00
AArch64AsmPrinter.cpp CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
AArch64BranchTargets.cpp
AArch64CallLowering.cpp [NFC] Fix trivial typos in comments 2020-01-06 10:50:26 +00:00
AArch64CallLowering.h [AArch64][GlobalISel][NFC] Refactor tail call lowering code 2019-09-17 19:08:44 +00:00
AArch64CallingConvention.cpp [Alignment][NFC] Remove unneeded llvm:: scoping on Align types 2019-09-27 12:54:21 +00:00
AArch64CallingConvention.h Add Windows Control Flow Guard checks (/guard:cf). 2019-10-28 15:19:39 +00:00
AArch64CallingConvention.td [AArch64][SVE] Remove nxv1f32 and nxv1f64 as legal types 2019-12-12 09:49:22 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
AArch64CollectLOH.cpp AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
AArch64Combine.td [AArch64][GlobalISel] Change G_FCONSTANTs feeding into stores into G_CONSTANTS 2020-01-16 15:18:44 -08:00
AArch64CompressJumpTables.cpp [AArch64] Fix a bug with jump table generation 2019-12-06 14:31:53 +00:00
AArch64CondBrTuning.cpp [aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-12 22:40:53 +00:00
AArch64ConditionOptimizer.cpp Update spelling of {analyze,insert,remove}Branch in strings and comments 2020-01-21 10:15:38 -06:00
AArch64ConditionalCompares.cpp Update spelling of {analyze,insert,remove}Branch in strings and comments 2020-01-21 10:15:38 -06:00
AArch64DeadRegisterDefinitionsPass.cpp [aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-12 22:40:53 +00:00
AArch64ExpandImm.cpp
AArch64ExpandImm.h
AArch64ExpandPseudoInsts.cpp Merge memtag instructions with adjacent stack slots. 2020-01-17 15:19:29 -08:00
AArch64FalkorHWPFFix.cpp [TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true 2020-01-19 14:20:37 -08:00
AArch64FastISel.cpp [AArch64] [Windows] Use COFF stubs for calls to extern_weak functions 2019-12-23 12:13:49 +02:00
AArch64FrameLowering.cpp Merge memtag instructions with adjacent stack slots. 2020-01-17 15:19:29 -08:00
AArch64FrameLowering.h Merge memtag instructions with adjacent stack slots. 2020-01-17 15:19:29 -08:00
AArch64GenRegisterBankInfo.def [AArch64][GlobalISel] Overhaul legalization & isel or shifts to select immediate forms. 2019-07-03 01:49:06 +00:00
AArch64ISelDAGToDAG.cpp [AArch64][SVE] Add patterns for some arith SVE instructions. 2020-01-13 11:39:42 -05:00
AArch64ISelLowering.cpp [AArch64][SVE] Extend int_aarch64_sve_ld1_gather_imm 2020-01-20 12:19:18 +00:00
AArch64ISelLowering.h GlobalISel: Preserve load/store metadata in IRTranslator 2020-01-16 13:49:43 -05:00
AArch64InstrAtomics.td DAG: Use TargetConstant for FENCE operands 2020-01-02 17:16:10 -05:00
AArch64InstrFormats.td [AArch64][SVE] Add ImmArg property to intrinsics with immediates 2020-01-17 10:47:55 +00:00
AArch64InstrInfo.cpp Merge memtag instructions with adjacent stack slots. 2020-01-17 15:19:29 -08:00
AArch64InstrInfo.h [AArch64] Enable clustering memory accesses to fixed stack objects 2019-12-18 09:46:11 +00:00
AArch64InstrInfo.td Merge memtag instructions with adjacent stack slots. 2020-01-17 15:19:29 -08:00
AArch64InstructionSelector.cpp [GlobalISel] Pass MachineOperands into MachineIRBuilder helper methods 2020-01-16 16:04:21 +00:00
AArch64LegalizerInfo.cpp [GlobalISel] Pass MachineOperands into MachineIRBuilder helper methods 2020-01-16 16:04:21 +00:00
AArch64LegalizerInfo.h [GlobalISel] Translate calls to memcpy et al to G_INTRINSIC_W_SIDE_EFFECTs and legalize later. 2019-07-19 00:24:45 +00:00
AArch64LoadStoreOptimizer.cpp [AArch64] Respect reserved registers while renaming in LdSt opt. 2019-12-21 15:10:07 +01:00
AArch64MCInstLower.cpp AArch64: Add a tagged-globals backend feature. 2019-07-31 20:14:19 +00:00
AArch64MCInstLower.h
AArch64MachineFunctionInfo.h Revert "AArch64: Fix frame record chain" 2019-12-14 13:58:40 -08:00
AArch64MacroFusion.cpp
AArch64MacroFusion.h
AArch64PBQPRegAlloc.cpp [aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-12 22:40:53 +00:00
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PfmCounters.td
AArch64PreLegalizerCombiner.cpp [AArch64][GlobalISel] Change G_FCONSTANTs feeding into stores into G_CONSTANTS 2020-01-16 15:18:44 -08:00
AArch64PromoteConstant.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
AArch64RedundantCopyElimination.cpp CodeGen: Introduce a class for registers 2019-06-24 15:50:29 +00:00
AArch64RegisterBankInfo.cpp GlobalISel: Add type argument to getRegBankFromRegClass 2020-01-03 16:25:10 -05:00
AArch64RegisterBankInfo.h GlobalISel: Add type argument to getRegBankFromRegClass 2020-01-03 16:25:10 -05:00
AArch64RegisterBanks.td
AArch64RegisterInfo.cpp Merge memtag instructions with adjacent stack slots. 2020-01-17 15:19:29 -08:00
AArch64RegisterInfo.h [TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true 2020-01-19 14:20:37 -08:00
AArch64RegisterInfo.td [NFC] Fix trivial typos in comments 2020-01-06 10:50:26 +00:00
AArch64SIMDInstrOpt.cpp [aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-12 22:40:53 +00:00
AArch64SVEInstrInfo.td [AArch64][SVE] Extend int_aarch64_sve_ld1_gather_imm 2020-01-20 12:19:18 +00:00
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64SchedExynosM3.td [AArch64] Update for Exynos 2019-11-12 14:37:41 -06:00
AArch64SchedExynosM4.td [AArch64] Update for Exynos 2019-11-12 14:37:41 -06:00
AArch64SchedExynosM5.td [AArch64] Add the pipeline model for Exynos M5 2019-11-22 15:09:17 -06:00
AArch64SchedFalkor.td
AArch64SchedFalkorDetails.td
AArch64SchedKryo.td
AArch64SchedKryoDetails.td
AArch64SchedPredExynos.td [AArch64] Add new scheduling predicates 2019-11-11 15:02:51 -06:00
AArch64SchedPredicates.td [NFC] [AArch64] Fix wrong documentation for IsStoreRegOffsetOp 2019-11-23 19:11:31 +01:00
AArch64SchedThunderX.td
AArch64SchedThunderX2T99.td [AArch64] Remove overlapping scheduling definitions (NFC) 2019-10-30 13:57:27 -05:00
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp Merge memtag instructions with adjacent stack slots. 2020-01-17 15:19:29 -08:00
AArch64SelectionDAGInfo.h Basic codegen for MTE stack tagging. 2019-07-17 19:24:02 +00:00
AArch64SpeculationHardening.cpp Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each 2019-10-19 01:31:09 +00:00
AArch64StackOffset.h [SVE][CodeGen] Scalable vector MVT size queries 2019-11-18 12:30:59 +00:00
AArch64StackTagging.cpp [IR] Split out target specific intrinsic enums into separate headers 2019-12-11 18:02:14 -08:00
AArch64StackTaggingPreRA.cpp MTE: add more unchecked instructions. 2019-11-19 11:19:53 -08:00
AArch64StorePairSuppress.cpp [aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-12 22:40:53 +00:00
AArch64Subtarget.cpp AArch64: add missing Apple CPU names and use them by default. 2020-01-08 09:24:06 +00:00
AArch64Subtarget.h AArch64: add missing Apple CPU names and use them by default. 2020-01-08 09:24:06 +00:00
AArch64SystemOperands.td AArch64: add missing Apple CPU names and use them by default. 2020-01-08 09:24:06 +00:00
AArch64TargetMachine.cpp CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp Revert "Honor -fuse-init-array when os is not specified on x86" 2019-12-17 07:36:59 -08:00
AArch64TargetObjectFile.h [MachO][TLOF] Use hasLocalLinkage to determine if indirect symbol is local 2019-08-22 16:59:00 +00:00
AArch64TargetTransformInfo.cpp [IR] Split out target specific intrinsic enums into separate headers 2019-12-11 18:02:14 -08:00
AArch64TargetTransformInfo.h Rename TTI::getIntImmCost for instructions and intrinsics 2019-12-11 18:00:20 -08:00
CMakeLists.txt [gicombiner] Fix windows issue where single quotes in the command are passed through to tablegen 2019-10-02 23:38:06 +00:00
LLVMBuild.txt Add Windows Control Flow Guard checks (/guard:cf). 2019-10-28 15:19:39 +00:00
SVEInstrFormats.td [AArch64][SVE] Add break intrinsics 2020-01-17 11:47:08 +00:00