forked from OSchip/llvm-project
40 lines
1.7 KiB
LLVM
40 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4a -show-mc-encoding | FileCheck %s --check-prefixes=X86
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; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4a,+avx -show-mc-encoding | FileCheck %s --check-prefixes=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a -show-mc-encoding | FileCheck %s --check-prefixes=X64
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a,+avx -show-mc-encoding | FileCheck %s --check-prefixes=X64
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define void @test_movntss(i8* %p, <4 x float> %a) nounwind optsize ssp {
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; X86-LABEL: test_movntss:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: movntss %xmm0, (%eax) # encoding: [0xf3,0x0f,0x2b,0x00]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_movntss:
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; X64: # %bb.0:
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; X64-NEXT: movntss %xmm0, (%rdi) # encoding: [0xf3,0x0f,0x2b,0x07]
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; X64-NEXT: retq # encoding: [0xc3]
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tail call void @llvm.x86.sse4a.movnt.ss(i8* %p, <4 x float> %a) nounwind
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ret void
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}
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declare void @llvm.x86.sse4a.movnt.ss(i8*, <4 x float>)
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define void @test_movntsd(i8* %p, <2 x double> %a) nounwind optsize ssp {
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; X86-LABEL: test_movntsd:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: movntsd %xmm0, (%eax) # encoding: [0xf2,0x0f,0x2b,0x00]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_movntsd:
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; X64: # %bb.0:
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; X64-NEXT: movntsd %xmm0, (%rdi) # encoding: [0xf2,0x0f,0x2b,0x07]
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; X64-NEXT: retq # encoding: [0xc3]
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tail call void @llvm.x86.sse4a.movnt.sd(i8* %p, <2 x double> %a) nounwind
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ret void
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}
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declare void @llvm.x86.sse4a.movnt.sd(i8*, <2 x double>)
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