forked from OSchip/llvm-project
66 lines
2.5 KiB
LLVM
66 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefixes=CHECK,X86
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefixes=CHECK,X64
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define i32 @mul_f(<4 x i8>* %A) {
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; X86-LABEL: mul_f:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
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; X86-NEXT: pmaddwd %xmm0, %xmm0
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; X86-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
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; X86-NEXT: movd %xmm0, (%eax)
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: mul_f:
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; X64: # %bb.0: # %entry
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; X64-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
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; X64-NEXT: pmaddwd %xmm0, %xmm0
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; X64-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
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; X64-NEXT: movd %xmm0, (%rax)
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: retq
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entry:
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%0 = load <4 x i8>, <4 x i8>* %A, align 8
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%mul = mul <4 x i8> %0, %0
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store <4 x i8> %mul, <4 x i8>* undef
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ret i32 0
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}
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define i32 @shuff_f(<4 x i8>* %A) {
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; X86-LABEL: shuff_f:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
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; X86-NEXT: paddd %xmm0, %xmm0
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; X86-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
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; X86-NEXT: movd %xmm0, (%eax)
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: shuff_f:
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; X64: # %bb.0: # %entry
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; X64-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
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; X64-NEXT: paddd %xmm0, %xmm0
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; X64-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
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; X64-NEXT: movd %xmm0, (%rax)
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: retq
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entry:
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%0 = load <4 x i8>, <4 x i8>* %A, align 8
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%add = add <4 x i8> %0, %0
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store <4 x i8> %add, <4 x i8>* undef
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ret i32 0
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}
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define <2 x float> @bitcast_widen(<4 x i32> %in) nounwind readnone {
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; CHECK-LABEL: bitcast_widen:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: ret{{[l|q]}}
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entry:
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%x = shufflevector <4 x i32> %in, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
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%y = bitcast <2 x i32> %x to <2 x float>
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ret <2 x float> %y
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}
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