forked from OSchip/llvm-project
139 lines
4.2 KiB
LLVM
139 lines
4.2 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-linux -O0 | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=x86_64-windows-itanium -O0 | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=i686-- -O0 | FileCheck %s --check-prefix=X32
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; GEP indices are interpreted as signed integers, so they
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; should be sign-extended to 64 bits on 64-bit targets.
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; PR3181
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define i32 @test1(i32 %t3, i32* %t1) nounwind {
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%t9 = getelementptr i32, i32* %t1, i32 %t3 ; <i32*> [#uses=1]
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%t15 = load i32, i32* %t9 ; <i32> [#uses=1]
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ret i32 %t15
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; X32-LABEL: test1:
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; X32: movl (%eax,%ecx,4), %eax
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; X32: ret
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; X64-LABEL: test1:
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; X64: movslq %e[[A0:di|cx]], %rax
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; X64: movl (%r[[A1:si|dx]],%rax,4), %eax
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; X64: ret
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}
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define i32 @test2(i64 %t3, i32* %t1) nounwind {
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%t9 = getelementptr i32, i32* %t1, i64 %t3 ; <i32*> [#uses=1]
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%t15 = load i32, i32* %t9 ; <i32> [#uses=1]
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ret i32 %t15
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; X32-LABEL: test2:
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; X32: movl ({{%e[a-z]+}},{{%e[a-z]+}},4), %e
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; X32: ret
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; X64-LABEL: test2:
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; X64: movl (%r[[A1]],%r[[A0]],4), %eax
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; X64: ret
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}
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; PR4984
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define i8 @test3(i8* %start) nounwind {
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entry:
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%A = getelementptr i8, i8* %start, i64 -2 ; <i8*> [#uses=1]
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%B = load i8, i8* %A, align 1 ; <i8> [#uses=1]
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ret i8 %B
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; X32-LABEL: test3:
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; X32: movl 4(%esp), %eax
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; X32: movb -2(%eax), %al
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; X32: ret
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; X64-LABEL: test3:
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; X64: movb -2(%r[[A0]]), %al
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; X64: ret
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}
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define double @test4(i64 %x, double* %p) nounwind {
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entry:
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%x.addr = alloca i64, align 8 ; <i64*> [#uses=2]
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%p.addr = alloca double*, align 8 ; <double**> [#uses=2]
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store i64 %x, i64* %x.addr
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store double* %p, double** %p.addr
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%tmp = load i64, i64* %x.addr ; <i64> [#uses=1]
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%add = add nsw i64 %tmp, 16 ; <i64> [#uses=1]
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%tmp1 = load double*, double** %p.addr ; <double*> [#uses=1]
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%arrayidx = getelementptr inbounds double, double* %tmp1, i64 %add ; <double*> [#uses=1]
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%tmp2 = load double, double* %arrayidx ; <double> [#uses=1]
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ret double %tmp2
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; X32-LABEL: test4:
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; X32: 128(%e{{.*}},%e{{.*}},8)
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; X64-LABEL: test4:
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; X64: 128(%r{{.*}},%r{{.*}},8)
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}
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; PR8961 - Make sure the sext for the GEP addressing comes before the load that
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; is folded.
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define i64 @test5(i8* %A, i32 %I, i64 %B) nounwind {
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%v8 = getelementptr i8, i8* %A, i32 %I
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%v9 = bitcast i8* %v8 to i64*
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%v10 = load i64, i64* %v9
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%v11 = add i64 %B, %v10
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ret i64 %v11
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; X64-LABEL: test5:
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; X64: movslq %e[[A1]], [[R0:%r[a-z]+]]
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; X64-NEXT: (%r[[A0]],[[R0]]),
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; X64: ret
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}
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; PR9500, rdar://9156159 - Don't do non-local address mode folding,
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; because it may require values which wouldn't otherwise be live out
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; of their blocks.
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define void @test6() personality i32 (...)* @__gxx_personality_v0 {
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if.end: ; preds = %if.then, %invoke.cont
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%tmp15 = load i64, i64* undef
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%dec = add i64 %tmp15, 13
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store i64 %dec, i64* undef
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%call17 = invoke i8* @_ZNK18G__FastAllocString4dataEv()
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to label %invoke.cont16 unwind label %lpad
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invoke.cont16: ; preds = %if.then14
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%arrayidx18 = getelementptr inbounds i8, i8* %call17, i64 %dec
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store i8 0, i8* %arrayidx18
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unreachable
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lpad: ; preds = %if.end19, %if.then14, %if.end, %entry
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%exn = landingpad {i8*, i32}
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cleanup
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unreachable
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}
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declare i8* @_ZNK18G__FastAllocString4dataEv() nounwind
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; PR10605 / rdar://9930964 - Don't fold loads incorrectly. The load should
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; happen before the store.
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define i32 @test7({i32,i32,i32}* %tmp1, i32 %tmp71, i32 %tmp63) nounwind {
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; X64-LABEL: test7:
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; X64: movl 8({{%rdi|%rcx}}), %eax
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; X64: movl $4, 8({{%rdi|%rcx}})
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%tmp29 = getelementptr inbounds {i32,i32,i32}, {i32,i32,i32}* %tmp1, i32 0, i32 2
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%tmp30 = load i32, i32* %tmp29, align 4
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%p2 = getelementptr inbounds {i32,i32,i32}, {i32,i32,i32}* %tmp1, i32 0, i32 2
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store i32 4, i32* %p2
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%tmp72 = or i32 %tmp71, %tmp30
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%tmp73 = icmp ne i32 %tmp63, 32
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br i1 %tmp73, label %T, label %F
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T:
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ret i32 %tmp72
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F:
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ret i32 4
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}
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declare i32 @__gxx_personality_v0(...)
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