forked from OSchip/llvm-project
30 lines
1.1 KiB
LLVM
30 lines
1.1 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=gfx908 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; GCN-LABEL: {{^}}test_mfma_loop_zeroinit:
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; GCN-COUNT32: v_accvgpr_write_b32
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; GCN: [[LOOP:BB[0-9_]+]]:
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; GCN-NOT: v_accvgpr
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; GCN: v_mfma_f32_32x32x1f32
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; GCN-NOT: v_accvgpr
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; GCN: s_cbranch_scc1 [[LOOP]]
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; GCN-COUNT32: v_accvgpr_read_b32
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define amdgpu_kernel void @test_mfma_loop_zeroinit(<32 x float> addrspace(1)* %arg) {
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entry:
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br label %for.cond.preheader
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for.cond.preheader:
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%phi = phi <32 x float> [ zeroinitializer, %entry ], [ %mai.1, %for.cond.preheader ]
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%c = phi i32 [ 0, %entry ], [ %inc, %for.cond.preheader ]
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%mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %phi, i32 0, i32 0, i32 0)
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%inc = add nuw nsw i32 %c, 1
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%cc = icmp eq i32 %inc, 16
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br i1 %cc, label %exit, label %for.cond.preheader
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exit:
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store <32 x float> %mai.1, <32 x float> addrspace(1)* %arg
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ret void
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}
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declare <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float, float, <32 x float>, i32, i32, i32)
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declare i32 @llvm.amdgcn.workitem.id.x()
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