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llvm-project/llvm/test/CodeGen
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Simon Pilgrim 989cbbd2f5 [DAGCombiner] Fold CONCAT_VECTORS of EXTRACT_SUBVECTOR (or undef) to VECTOR_SHUFFLE. 
Check to see if this is a CONCAT_VECTORS of a bunch of EXTRACT_SUBVECTOR operations. If so, and if the EXTRACT_SUBVECTOR vector inputs come from at most two distinct vectors the same size as the result, attempt to turn this into a legal shuffle.

Differential Revision: http://reviews.llvm.org/D12125

llvm-svn: 245490
 		2015-08-19 20:09:50 +00:00
..
AArch64 Split ARM and AArch64 emutls.ll test 2015-08-19 01:44:51 +00:00
AMDGPU AMDGPU/SI: Fix printing useless info with amdhsa 2015-08-15 00:12:39 +00:00
ARM [ARM] Add instruction selection patterns for vmin/vmax 2015-08-19 14:11:27 +00:00
BPF [bpf] rename triple names bpf_be -> bpfeb 2015-06-05 16:11:14 +00:00
CPP [opaque pointer type] Add textual IR support for explicit type parameter to the call instruction 2015-04-16 23:24:18 +00:00
Generic Update test suite to make "ninja check" succeed without native backend builtin 2015-08-04 06:32:54 +00:00
Hexagon DI: Disallow uniquable DICompileUnits 2015-08-03 17:26:41 +00:00
Inputs DI: Disallow uniquable DICompileUnits 2015-08-03 17:26:41 +00:00
MIR MIR Serialization: Serialize instruction's register ties. 2015-08-19 19:05:34 +00:00
MSP430 [opaque pointer type] Add textual IR support for explicit type parameter to gep operator 2015-03-13 18:20:45 +00:00
Mips Revert r229675 - [mips] Avoid redundant sign extension of the result of binary bitwise instructions. 2015-08-04 14:26:35 +00:00
NVPTX Use 32-bit divides instead of 64-bit divides where possible. 2015-08-11 22:16:34 +00:00
PowerPC Temporary fix for the self-host failures introduced by rL244921. 2015-08-19 19:04:47 +00:00
SPARC [SPARC] Fix BooleanContents, so that select of a trunc doesn't 2015-08-19 14:47:04 +00:00
SystemZ [DAGCombiner] Attempt to mask vectors before zero extension instead of after. 2015-08-15 13:27:30 +00:00
Thumb DI: Disallow uniquable DICompileUnits 2015-08-03 17:26:41 +00:00
Thumb2 ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2 2015-07-21 00:18:59 +00:00
WebAssembly WebAssembly: floating-point comparisons 2015-08-12 17:53:29 +00:00
WinEH [WinEH] Calculate state numbers for the new EH representation 2015-08-18 19:07:12 +00:00
X86 [DAGCombiner] Fold CONCAT_VECTORS of EXTRACT_SUBVECTOR (or undef) to VECTOR_SHUFFLE. 2015-08-19 20:09:50 +00:00
XCore DI: Disallow uniquable DICompileUnits 2015-08-03 17:26:41 +00:00