llvm-project/mlir
Matthias Springer 3bbc869e2e [mlir][linalg][bufferize] Support scf::IfOp
This commit adds support for scf::IfOp to comprehensive bufferization. Support is currently limited to cases where both branches yield tensors that bufferize to the same buffer.

To keep the analysis simple, scf::IfOp are treated as memory writes for analysis purposes, even if no op inside any branch is writing. (scf::ForOps are handled in the same way.)

Differential Revision: https://reviews.llvm.org/D111929
2021-10-22 10:12:55 +09:00
..
cmake/modules Add MLIR_INSTALL_AGGREGATE_OBJECTS and default it to ON. 2021-10-19 16:14:04 -07:00
docs [mlir:GreedyPatternRewriter] Add debug logging for pattern rewriter actions 2021-10-21 17:14:35 +00:00
examples [MLIR][arith] fix references to std.constant in comments 2021-10-14 20:38:47 +00:00
include [mlir][vector] Add patterns to convert multidimreduce to vector.contract 2021-10-21 14:03:32 -07:00
lib [mlir][linalg][bufferize] Support scf::IfOp 2021-10-22 10:12:55 +09:00
python [mlir][python] Fix MemRefType IsAFunction in Python bindings 2021-10-14 13:12:37 +02:00
test [mlir][linalg][bufferize] Support scf::IfOp 2021-10-22 10:12:55 +09:00
tools Make genAttributeVerifier escape the summary. 2021-10-21 21:41:31 +00:00
unittests [mlir][RFC] Refactor layout representation in MemRefType 2021-10-19 12:31:15 +03:00
utils [mlir][spirv] Add memory semantics verify for atomic operations 2021-10-14 00:00:55 +08:00
.clang-format
.clang-tidy NFC: .clang-tidy: Inherit configs from parents to improve maintainability 2021-06-08 08:25:59 -07:00
CMakeLists.txt Add MLIR_INSTALL_AGGREGATE_OBJECTS and default it to ON. 2021-10-19 16:14:04 -07:00
LICENSE.TXT
README.md

README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.