forked from OSchip/llvm-project
136 lines
5.1 KiB
LLVM
136 lines
5.1 KiB
LLVM
; RUN: llc -mtriple=x86_64-linux-gnu -stop-after=expand-isel-pseudos < %s | FileCheck %s
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define i32 @foo(i32 %n) !prof !1 {
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entry:
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switch i32 %n, label %bb_default [
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i32 8, label %bb1
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i32 -8826, label %bb2
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i32 18312, label %bb3
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i32 18568, label %bb4
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i32 129, label %bb5
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], !prof !2
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; CHECK: successors: %[[PEELED_CASE_LABEL:.*]](0x5999999a), %[[PEELED_SWITCH_LABEL:.*]](0x26666666)
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; CHECK: %[[VAL:[0-9]+]]:gr32 = COPY %edi
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; CHECK: %{{[0-9]+}}:gr32 = SUB32ri %[[VAL]], 18568, implicit-def %eflags
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; CHECK: JE_1 %[[PEELED_CASE_LABEL]], implicit %eflags
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; CHECK: JMP_1 %[[PEELED_SWITCH_LABEL]]
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; CHECK: [[PEELED_SWITCH_LABEL]]:
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; CHECK: successors: %[[BB1_LABEL:.*]](0x0206d3a0), %[[BB2_LABEL:.*]](0x7df92c60)
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; CHECK: %{{[0-9]+}}:gr32 = SUB32ri %[[VAL]], 18311, implicit-def %eflags
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; CHECK: JG_1 %[[BB2_LABEL]], implicit %eflags
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; CHECK: JMP_1 %[[BB1_LABEL]]
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; CHECK: [[BB1_LABEL]]:
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; CHECK: successors: %[[CASE2_LABEL:.*]](0x35e50d5b), %[[BB3_LABEL:.*]](0x4a1af2a5)
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; CHECK: %{{[0-9]+}}:gr32 = SUB32ri %[[VAL]], -8826, implicit-def %eflags
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; CHECK: JE_1 %[[CASE2_LABEL]], implicit %eflags
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; CHECK: JMP_1 %[[BB3_LABEL]]
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; CHECK: [[BB3_LABEL]]
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; CHECK: successors: %[[CASE5_LABEL:.*]](0x45d173c8), %[[BB4_LABEL:.*]](0x3a2e8c38)
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; CHECK: %{{[0-9]+}}:gr32 = SUB32ri %[[VAL]], 129, implicit-def %eflags
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; CHECK: JE_1 %[[CASE5_LABEL]], implicit %eflags
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; CHECK: JMP_1 %[[BB4_LABEL]]
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; CHECK: [[BB4_LABEL:.*]]:
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; CHECK: successors: %[[CASE1_LABEL:.*]](0x66666666), %[[DEFAULT_BB_LABEL:.*]](0x1999999a)
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; CHECK: %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], 8, implicit-def %eflags
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; CHECK: JE_1 %[[CASE1_LABEL]], implicit %eflags
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; CHECK: JMP_1 %[[DEFAULT_BB_LABEL]]
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; CHECK: [[BB2_LABEL]]:
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; CHECK: successors: %[[CASE3_LABEL:.*]](0x7fe44107), %[[DEFAULT_BB_LABEL]](0x001bbef9)
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; CHECK: %{{[0-9]+}}:gr32 = SUB32ri %[[VAL]], 18312, implicit-def %eflags
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; CHECK: JE_1 %[[CASE3_LABEL]], implicit %eflags
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; CHECK: JMP_1 %[[DEFAULT_BB_LABEL]]
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bb1:
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br label %return
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bb2:
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br label %return
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bb3:
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br label %return
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bb4:
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br label %return
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bb5:
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br label %return
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bb_default:
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br label %return
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return:
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%retval = phi i32 [ 0, %bb_default ], [ 5, %bb5 ], [ 4, %bb4 ], [ 3, %bb3 ], [ 2, %bb2 ], [ 1, %bb1 ]
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ret i32 %retval
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}
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; Test the peeling of the merged cases value 85 and 86.
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define i32 @foo1(i32 %n) !prof !1 {
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entry:
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switch i32 %n, label %bb_default [
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i32 -40, label %bb1
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i32 86, label %bb2
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i32 85, label %bb2
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i32 1, label %bb3
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i32 5, label %bb4
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i32 7, label %bb5
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i32 49, label %bb6
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], !prof !3
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; CHECK: successors: %[[PEELED_CASE_LABEL:.*]](0x59999999), %[[PEELED_SWITCH_LABEL:.*]](0x26666667)
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; CHECK: %[[VAL:[0-9]+]]:gr32 = COPY %edi
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; CHECK: %{{[0-9]+}}:gr32 = ADD32ri8 %{{[0-9]+}}, -85, implicit-def dead %eflags
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; CHECK: %{{[0-9]+}}:gr32 = SUB32ri8 %{{[0-9]+}}, 2, implicit-def %eflags
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; CHECK: JB_1 %[[PEELED_CASE_LABEL]], implicit %eflags
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; CHECK: JMP_1 %[[PEELED_SWITCH_LABEL]]
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; CHECK: [[PEELED_SWITCH_LABEL]]:
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; CHECK: successors: %[[BB1_LABEL:.*]](0x0088888a), %[[BB2_LABEL:.*]](0x7f777776)
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; CHECK: %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], 4, implicit-def %eflags
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; CHECK: JG_1 %[[BB2_LABEL]], implicit %eflags
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; CHECK: JMP_1 %[[BB1_LABEL]]
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; CHECK: [[BB1_LABEL]]:
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; CHECK: successors: %[[CASE4_LABEL:.*]](0x7f775a4f), %[[BB3_LABEL:.*]](0x0088a5b1)
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; CHECK: %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], 1, implicit-def %eflags
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; CHECK: JE_1 %[[CASE4_LABEL]], implicit %eflags
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; CHECK: JMP_1 %[[BB3_LABEL]]
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; CHECK: [[BB3_LABEL]]:
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; CHECK: successors: %[[CASE1_LABEL:.*]](0x66666666), %[[DEFAULT_BB_LABEL:.*]](0x1999999a)
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; CHECK: %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], -40, implicit-def %eflags
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; CHECK: JE_1 %[[CASE1_LABEL]], implicit %eflags
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; CHECK: JMP_1 %[[DEFAULT_BB_LABEL]]
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; CHECK: [[BB2_LABEL]]:
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; CHECK: successors: %[[CASE5_LABEL:.*]](0x00000000), %[[BB4_LABEL:.*]](0x80000000)
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; CHECK: %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], 5, implicit-def %eflags
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; CHECK: JE_1 %[[CASE5_LABEL]], implicit %eflags
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; CHECK: JMP_1 %[[BB4_LABEL]]
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; CHECK: [[BB4_LABEL]]:
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; CHECK: successors: %[[CASE6_LABEL:.*]](0x00000000), %[[BB5_LABEL:.*]](0x80000000)
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; CHECK: %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], 7, implicit-def %eflags
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; CHECK: JE_1 %[[CASE6_LABEL]], implicit %eflags
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; CHECK: JMP_1 %[[BB5_LABEL]]
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; CHECK: [[BB5_LABEL]]:
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; CHECK: successors: %[[CASE7_LABEL:.*]](0x00000000), %[[DEFAULT_BB_LABEL]](0x80000000)
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; CHECK: %{{[0-9]+}}:gr32 = SUB32ri8 %[[VAL]], 49, implicit-def %eflags
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; CHECK: JE_1 %[[CASE7_LABEL]], implicit %eflags
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; CHECK: JMP_1 %[[DEFAULT_BB_LABEL]]
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bb1:
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br label %return
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bb2:
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br label %return
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bb3:
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br label %return
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bb4:
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br label %return
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bb5:
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br label %return
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bb6:
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br label %return
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bb_default:
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br label %return
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return:
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%retval = phi i32 [ 0, %bb_default ], [ 6, %bb6 ], [ 5, %bb5 ], [ 4, %bb4 ], [ 3, %bb3 ], [ 2, %bb2 ], [ 1, %bb1 ]
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ret i32 %retval
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}
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!1 = !{!"function_entry_count", i64 100000}
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!2 = !{!"branch_weights", i32 50, i32 100, i32 200, i32 29500, i32 70000, i32 150}
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!3 = !{!"branch_weights", i32 50, i32 100, i32 500, i32 69500, i32 29850, i32 0, i32 0, i32 0}
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