forked from OSchip/llvm-project
277 lines
12 KiB
LLVM
277 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-apple-darwin -mattr=avx512f < %s | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F
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; RUN: llc -mtriple=x86_64-apple-darwin -mattr=avx512f,avx512bw,avx512vl < %s | FileCheck %s --check-prefix=AVX512 --check-prefix=SKX
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define <16 x i32> @test1(<16 x i32> %trigger, <16 x i32>* %addr) {
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; AVX512-LABEL: test1:
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; AVX512: ## BB#0:
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; AVX512-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX512-NEXT: vpcmpeqd %zmm1, %zmm0, %k1
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; AVX512-NEXT: vmovdqu32 (%rdi), %zmm0 {%k1} {z}
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; AVX512-NEXT: retq
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%mask = icmp eq <16 x i32> %trigger, zeroinitializer
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%res = call <16 x i32> @llvm.masked.load.v16i32.p0v16i32(<16 x i32>* %addr, i32 4, <16 x i1>%mask, <16 x i32>undef)
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ret <16 x i32> %res
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}
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define <16 x i32> @test2(<16 x i32> %trigger, <16 x i32>* %addr) {
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; AVX512-LABEL: test2:
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; AVX512: ## BB#0:
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; AVX512-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX512-NEXT: vpcmpeqd %zmm1, %zmm0, %k1
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; AVX512-NEXT: vmovdqu32 (%rdi), %zmm0 {%k1} {z}
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; AVX512-NEXT: retq
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%mask = icmp eq <16 x i32> %trigger, zeroinitializer
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%res = call <16 x i32> @llvm.masked.load.v16i32.p0v16i32(<16 x i32>* %addr, i32 4, <16 x i1>%mask, <16 x i32>zeroinitializer)
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ret <16 x i32> %res
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}
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define void @test3(<16 x i32> %trigger, <16 x i32>* %addr, <16 x i32> %val) {
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; AVX512-LABEL: test3:
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; AVX512: ## BB#0:
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; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2
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; AVX512-NEXT: vpcmpeqd %zmm2, %zmm0, %k1
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; AVX512-NEXT: vmovdqu32 %zmm1, (%rdi) {%k1}
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; AVX512-NEXT: vzeroupper
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; AVX512-NEXT: retq
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%mask = icmp eq <16 x i32> %trigger, zeroinitializer
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call void @llvm.masked.store.v16i32.p0v16i32(<16 x i32>%val, <16 x i32>* %addr, i32 4, <16 x i1>%mask)
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ret void
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}
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define <16 x float> @test4(<16 x i32> %trigger, <16 x float>* %addr, <16 x float> %dst) {
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; AVX512-LABEL: test4:
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; AVX512: ## BB#0:
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; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2
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; AVX512-NEXT: vpcmpeqd %zmm2, %zmm0, %k1
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; AVX512-NEXT: vblendmps (%rdi), %zmm1, %zmm0 {%k1}
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; AVX512-NEXT: retq
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%mask = icmp eq <16 x i32> %trigger, zeroinitializer
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%res = call <16 x float> @llvm.masked.load.v16f32.p0v16f32(<16 x float>* %addr, i32 4, <16 x i1>%mask, <16 x float> %dst)
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ret <16 x float> %res
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}
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define void @test13(<16 x i32> %trigger, <16 x float>* %addr, <16 x float> %val) {
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; AVX512-LABEL: test13:
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; AVX512: ## BB#0:
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; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2
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; AVX512-NEXT: vpcmpeqd %zmm2, %zmm0, %k1
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; AVX512-NEXT: vmovups %zmm1, (%rdi) {%k1}
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; AVX512-NEXT: vzeroupper
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; AVX512-NEXT: retq
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%mask = icmp eq <16 x i32> %trigger, zeroinitializer
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call void @llvm.masked.store.v16f32.p0v16f32(<16 x float>%val, <16 x float>* %addr, i32 4, <16 x i1>%mask)
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ret void
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}
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define void @one_mask_bit_set5(<8 x double>* %addr, <8 x double> %val) {
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; AVX512-LABEL: one_mask_bit_set5:
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; AVX512: ## BB#0:
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; AVX512-NEXT: vextractf32x4 $3, %zmm0, %xmm0
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; AVX512-NEXT: vmovlps %xmm0, 48(%rdi)
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; AVX512-NEXT: vzeroupper
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; AVX512-NEXT: retq
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call void @llvm.masked.store.v8f64.p0v8f64(<8 x double> %val, <8 x double>* %addr, i32 4, <8 x i1><i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 true, i1 false>)
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ret void
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}
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define <8 x double> @load_one_mask_bit_set5(<8 x double>* %addr, <8 x double> %val) {
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;
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; AVX512-LABEL: load_one_mask_bit_set5:
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; AVX512: ## BB#0:
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; AVX512-NEXT: vextractf32x4 $3, %zmm0, %xmm1
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; AVX512-NEXT: vmovhpd {{.*#+}} xmm1 = xmm1[0],mem[0]
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; AVX512-NEXT: vinsertf32x4 $3, %xmm1, %zmm0, %zmm0
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; AVX512-NEXT: retq
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%res = call <8 x double> @llvm.masked.load.v8f64.p0v8f64(<8 x double>* %addr, i32 4, <8 x i1><i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 true>, <8 x double> %val)
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ret <8 x double> %res
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}
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declare <16 x i32> @llvm.masked.load.v16i32.p0v16i32(<16 x i32>*, i32, <16 x i1>, <16 x i32>)
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declare void @llvm.masked.store.v16i32.p0v16i32(<16 x i32>, <16 x i32>*, i32, <16 x i1>)
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declare void @llvm.masked.store.v16f32.p0v16f32(<16 x float>, <16 x float>*, i32, <16 x i1>)
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declare <16 x float> @llvm.masked.load.v16f32.p0v16f32(<16 x float>*, i32, <16 x i1>, <16 x float>)
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declare <8 x double> @llvm.masked.load.v8f64.p0v8f64(<8 x double>*, i32, <8 x i1>, <8 x double>)
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declare void @llvm.masked.store.v8f64.p0v8f64(<8 x double>, <8 x double>*, i32, <8 x i1>)
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declare <16 x i32*> @llvm.masked.load.v16p0i32.p0v16p0i32(<16 x i32*>*, i32, <16 x i1>, <16 x i32*>)
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define <16 x i32*> @test23(<16 x i32*> %trigger, <16 x i32*>* %addr) {
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; AVX512-LABEL: test23:
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; AVX512: ## BB#0:
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; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2
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; AVX512-NEXT: vpcmpeqq %zmm2, %zmm0, %k1
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; AVX512-NEXT: vpcmpeqq %zmm2, %zmm1, %k2
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; AVX512-NEXT: vmovdqu64 64(%rdi), %zmm1 {%k2} {z}
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; AVX512-NEXT: vmovdqu64 (%rdi), %zmm0 {%k1} {z}
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; AVX512-NEXT: retq
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%mask = icmp eq <16 x i32*> %trigger, zeroinitializer
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%res = call <16 x i32*> @llvm.masked.load.v16p0i32.p0v16p0i32(<16 x i32*>* %addr, i32 4, <16 x i1>%mask, <16 x i32*>zeroinitializer)
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ret <16 x i32*> %res
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}
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%mystruct = type { i16, i16, [1 x i8*] }
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declare <16 x %mystruct*> @llvm.masked.load.v16p0mystruct.p0v16p0mystruct(<16 x %mystruct*>*, i32, <16 x i1>, <16 x %mystruct*>)
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define <16 x %mystruct*> @test24(<16 x i1> %mask, <16 x %mystruct*>* %addr) {
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; AVX512F-LABEL: test24:
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; AVX512F: ## BB#0:
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; AVX512F-NEXT: vpmovsxbd %xmm0, %zmm0
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; AVX512F-NEXT: vpslld $31, %zmm0, %zmm0
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; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k1
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; AVX512F-NEXT: vmovdqu64 (%rdi), %zmm0 {%k1} {z}
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; AVX512F-NEXT: kshiftrw $8, %k1, %k1
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; AVX512F-NEXT: vmovdqu64 64(%rdi), %zmm1 {%k1} {z}
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; AVX512F-NEXT: retq
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;
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; SKX-LABEL: test24:
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; SKX: ## BB#0:
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; SKX-NEXT: vpsllw $7, %xmm0, %xmm0
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; SKX-NEXT: vpmovb2m %xmm0, %k1
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; SKX-NEXT: vmovdqu64 (%rdi), %zmm0 {%k1} {z}
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; SKX-NEXT: kshiftrw $8, %k1, %k1
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; SKX-NEXT: vmovdqu64 64(%rdi), %zmm1 {%k1} {z}
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; SKX-NEXT: retq
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%res = call <16 x %mystruct*> @llvm.masked.load.v16p0mystruct.p0v16p0mystruct(<16 x %mystruct*>* %addr, i32 4, <16 x i1>%mask, <16 x %mystruct*>zeroinitializer)
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ret <16 x %mystruct*> %res
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}
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define void @test_store_16i64(<16 x i64>* %ptrs, <16 x i1> %mask, <16 x i64> %src0) {
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; AVX512F-LABEL: test_store_16i64:
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; AVX512F: ## BB#0:
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; AVX512F-NEXT: vpmovsxbd %xmm0, %zmm0
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; AVX512F-NEXT: vpslld $31, %zmm0, %zmm0
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; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k1
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; AVX512F-NEXT: vmovdqu64 %zmm1, (%rdi) {%k1}
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; AVX512F-NEXT: kshiftrw $8, %k1, %k1
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; AVX512F-NEXT: vmovdqu64 %zmm2, 64(%rdi) {%k1}
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; AVX512F-NEXT: vzeroupper
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; AVX512F-NEXT: retq
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;
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; SKX-LABEL: test_store_16i64:
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; SKX: ## BB#0:
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; SKX-NEXT: vpsllw $7, %xmm0, %xmm0
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; SKX-NEXT: vpmovb2m %xmm0, %k1
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; SKX-NEXT: vmovdqu64 %zmm1, (%rdi) {%k1}
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; SKX-NEXT: kshiftrw $8, %k1, %k1
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; SKX-NEXT: vmovdqu64 %zmm2, 64(%rdi) {%k1}
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; SKX-NEXT: vzeroupper
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; SKX-NEXT: retq
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call void @llvm.masked.store.v16i64.p0v16i64(<16 x i64> %src0, <16 x i64>* %ptrs, i32 4, <16 x i1> %mask)
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ret void
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}
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declare void @llvm.masked.store.v16i64.p0v16i64(<16 x i64> %src0, <16 x i64>* %ptrs, i32, <16 x i1> %mask)
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define void @test_store_16f64(<16 x double>* %ptrs, <16 x i1> %mask, <16 x double> %src0) {
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; AVX512F-LABEL: test_store_16f64:
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; AVX512F: ## BB#0:
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; AVX512F-NEXT: vpmovsxbd %xmm0, %zmm0
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; AVX512F-NEXT: vpslld $31, %zmm0, %zmm0
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; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k1
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; AVX512F-NEXT: vmovupd %zmm1, (%rdi) {%k1}
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; AVX512F-NEXT: kshiftrw $8, %k1, %k1
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; AVX512F-NEXT: vmovupd %zmm2, 64(%rdi) {%k1}
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; AVX512F-NEXT: vzeroupper
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; AVX512F-NEXT: retq
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;
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; SKX-LABEL: test_store_16f64:
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; SKX: ## BB#0:
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; SKX-NEXT: vpsllw $7, %xmm0, %xmm0
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; SKX-NEXT: vpmovb2m %xmm0, %k1
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; SKX-NEXT: vmovupd %zmm1, (%rdi) {%k1}
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; SKX-NEXT: kshiftrw $8, %k1, %k1
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; SKX-NEXT: vmovupd %zmm2, 64(%rdi) {%k1}
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; SKX-NEXT: vzeroupper
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; SKX-NEXT: retq
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call void @llvm.masked.store.v16f64.p0v16f64(<16 x double> %src0, <16 x double>* %ptrs, i32 4, <16 x i1> %mask)
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ret void
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}
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declare void @llvm.masked.store.v16f64.p0v16f64(<16 x double> %src0, <16 x double>* %ptrs, i32, <16 x i1> %mask)
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define <16 x i64> @test_load_16i64(<16 x i64>* %ptrs, <16 x i1> %mask, <16 x i64> %src0) {
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; AVX512F-LABEL: test_load_16i64:
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; AVX512F: ## BB#0:
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; AVX512F-NEXT: vpmovsxbd %xmm0, %zmm0
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; AVX512F-NEXT: vpslld $31, %zmm0, %zmm0
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; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k1
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; AVX512F-NEXT: vpblendmq (%rdi), %zmm1, %zmm0 {%k1}
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; AVX512F-NEXT: kshiftrw $8, %k1, %k1
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; AVX512F-NEXT: vpblendmq 64(%rdi), %zmm2, %zmm1 {%k1}
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; AVX512F-NEXT: retq
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;
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; SKX-LABEL: test_load_16i64:
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; SKX: ## BB#0:
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; SKX-NEXT: vpsllw $7, %xmm0, %xmm0
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; SKX-NEXT: vpmovb2m %xmm0, %k1
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; SKX-NEXT: vpblendmq (%rdi), %zmm1, %zmm0 {%k1}
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; SKX-NEXT: kshiftrw $8, %k1, %k1
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; SKX-NEXT: vpblendmq 64(%rdi), %zmm2, %zmm1 {%k1}
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; SKX-NEXT: retq
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%res = call <16 x i64> @llvm.masked.load.v16i64.p0v16i64(<16 x i64>* %ptrs, i32 4, <16 x i1> %mask, <16 x i64> %src0)
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ret <16 x i64> %res
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}
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declare <16 x i64> @llvm.masked.load.v16i64.p0v16i64(<16 x i64>* %ptrs, i32, <16 x i1> %mask, <16 x i64> %src0)
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define <16 x double> @test_load_16f64(<16 x double>* %ptrs, <16 x i1> %mask, <16 x double> %src0) {
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; AVX512F-LABEL: test_load_16f64:
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; AVX512F: ## BB#0:
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; AVX512F-NEXT: vpmovsxbd %xmm0, %zmm0
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; AVX512F-NEXT: vpslld $31, %zmm0, %zmm0
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; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k1
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; AVX512F-NEXT: vblendmpd (%rdi), %zmm1, %zmm0 {%k1}
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; AVX512F-NEXT: kshiftrw $8, %k1, %k1
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; AVX512F-NEXT: vblendmpd 64(%rdi), %zmm2, %zmm1 {%k1}
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; AVX512F-NEXT: retq
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;
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; SKX-LABEL: test_load_16f64:
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; SKX: ## BB#0:
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; SKX-NEXT: vpsllw $7, %xmm0, %xmm0
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; SKX-NEXT: vpmovb2m %xmm0, %k1
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; SKX-NEXT: vblendmpd (%rdi), %zmm1, %zmm0 {%k1}
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; SKX-NEXT: kshiftrw $8, %k1, %k1
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; SKX-NEXT: vblendmpd 64(%rdi), %zmm2, %zmm1 {%k1}
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; SKX-NEXT: retq
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%res = call <16 x double> @llvm.masked.load.v16f64.p0v16f64(<16 x double>* %ptrs, i32 4, <16 x i1> %mask, <16 x double> %src0)
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ret <16 x double> %res
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}
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declare <16 x double> @llvm.masked.load.v16f64.p0v16f64(<16 x double>* %ptrs, i32, <16 x i1> %mask, <16 x double> %src0)
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define <32 x double> @test_load_32f64(<32 x double>* %ptrs, <32 x i1> %mask, <32 x double> %src0) {
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; AVX512F-LABEL: test_load_32f64:
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; AVX512F: ## BB#0:
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; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm5
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; AVX512F-NEXT: vpmovsxbd %xmm5, %zmm5
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; AVX512F-NEXT: vpslld $31, %zmm5, %zmm5
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; AVX512F-NEXT: vptestmd %zmm5, %zmm5, %k1
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; AVX512F-NEXT: vblendmpd 128(%rdi), %zmm3, %zmm5 {%k1}
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; AVX512F-NEXT: vpmovsxbd %xmm0, %zmm0
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; AVX512F-NEXT: vpslld $31, %zmm0, %zmm0
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; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k2
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; AVX512F-NEXT: vblendmpd (%rdi), %zmm1, %zmm0 {%k2}
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; AVX512F-NEXT: kshiftrw $8, %k1, %k1
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; AVX512F-NEXT: vblendmpd 192(%rdi), %zmm4, %zmm3 {%k1}
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; AVX512F-NEXT: kshiftrw $8, %k2, %k1
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; AVX512F-NEXT: vblendmpd 64(%rdi), %zmm2, %zmm1 {%k1}
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; AVX512F-NEXT: vmovapd %zmm5, %zmm2
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; AVX512F-NEXT: retq
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;
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; SKX-LABEL: test_load_32f64:
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; SKX: ## BB#0:
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; SKX-NEXT: vpsllw $7, %ymm0, %ymm0
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; SKX-NEXT: vpmovb2m %ymm0, %k1
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; SKX-NEXT: vblendmpd (%rdi), %zmm1, %zmm0 {%k1}
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; SKX-NEXT: kshiftrd $16, %k1, %k2
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; SKX-NEXT: vblendmpd 128(%rdi), %zmm3, %zmm5 {%k2}
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; SKX-NEXT: kshiftrw $8, %k1, %k1
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; SKX-NEXT: vblendmpd 64(%rdi), %zmm2, %zmm1 {%k1}
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; SKX-NEXT: kshiftrw $8, %k2, %k1
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; SKX-NEXT: vblendmpd 192(%rdi), %zmm4, %zmm3 {%k1}
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; SKX-NEXT: vmovapd %zmm5, %zmm2
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; SKX-NEXT: retq
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%res = call <32 x double> @llvm.masked.load.v32f64.p0v32f64(<32 x double>* %ptrs, i32 4, <32 x i1> %mask, <32 x double> %src0)
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ret <32 x double> %res
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}
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declare <32 x double> @llvm.masked.load.v32f64.p0v32f64(<32 x double>* %ptrs, i32, <32 x i1> %mask, <32 x double> %src0)
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