forked from OSchip/llvm-project
32 lines
1019 B
LLVM
32 lines
1019 B
LLVM
; RUN: llc -march=amdgcn -mcpu=tahiti -show-mc-encoding < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
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; RUN: llc -march=amdgcn -mcpu=fiji -show-mc-encoding < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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declare void @llvm.amdgcn.s.dcache.inv() #0
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declare void @llvm.amdgcn.s.waitcnt(i32) #0
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; GCN-LABEL: {{^}}test_s_dcache_inv:
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; GCN-NEXT: ; BB#0:
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; SI-NEXT: s_dcache_inv ; encoding: [0x00,0x00,0xc0,0xc7]
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; VI-NEXT: s_dcache_inv ; encoding: [0x00,0x00,0x80,0xc0,0x00,0x00,0x00,0x00]
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; GCN-NEXT: s_endpgm
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define amdgpu_kernel void @test_s_dcache_inv() #0 {
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call void @llvm.amdgcn.s.dcache.inv()
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ret void
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}
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; GCN-LABEL: {{^}}test_s_dcache_inv_insert_wait:
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; GCN-NEXT: ; BB#0:
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; GCN: s_dcache_inv
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; GCN: s_waitcnt lgkmcnt(0) ; encoding
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define amdgpu_kernel void @test_s_dcache_inv_insert_wait() #0 {
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call void @llvm.amdgcn.s.dcache.inv()
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call void @llvm.amdgcn.s.waitcnt(i32 127)
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br label %end
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end:
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store volatile i32 3, i32 addrspace(1)* undef
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ret void
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}
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attributes #0 = { nounwind }
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