llvm-project/llvm/lib/CodeGen/SelectionDAG
Sebastian Neubauer 833b3b0d3a [AMDGPU] Add v3f16/v3i16 support to SDag
Fix lowering and instruction selection for v3x16 types
and enable InstCombine to emit them.

This patch only implements it for the selection dag.
GlobalISel tests in GlobalISel/llvm.amdgcn.image.load.1d.d16.ll and
GlobalISel/llvm.amdgcn.image.store.2d.d16.ll still don't work.

Differential Revision: https://reviews.llvm.org/D84420
2020-09-16 17:20:27 +02:00
..
CMakeLists.txt [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries" 2019-11-21 10:48:08 -08:00
DAGCombiner.cpp [DAG] Remover getOperand() call. NFCI. 2020-09-16 11:18:58 +01:00
FastISel.cpp [FastISel] Bail out of selectGetElementPtr for vector GEPs. 2020-09-14 12:53:06 -07:00
FunctionLoweringInfo.cpp [Statepoint] Consolidate relocation type tracking [NFC] 2020-07-29 11:45:31 -07:00
InstrEmitter.cpp [Statepoints] Properly handle const base pointer. 2020-09-09 14:07:00 +07:00
InstrEmitter.h InstrEmitter.h - reduce SelectionDAG.h include to SelectionDAGNodes.h include. 2020-04-19 11:52:31 +01:00
LLVMBuild.txt
LegalizeDAG.cpp [SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore. 2020-09-14 13:54:50 -07:00
LegalizeFloatTypes.cpp [Legalize][ARM][X86] Add float legalization for VECREDUCE 2020-09-14 20:42:09 +02:00
LegalizeIntegerTypes.cpp [SelectionDAG][X86][ARM][AArch64] Add ISD opcode for __builtin_parity. Expand it to shifts and xors. 2020-09-12 11:42:18 -07:00
LegalizeTypes.cpp [AMDGPU] Add v3f16/v3i16 support to SDag 2020-09-16 17:20:27 +02:00
LegalizeTypes.h [Legalize][ARM][X86] Add float legalization for VECREDUCE 2020-09-14 20:42:09 +02:00
LegalizeTypesGeneric.cpp [CodeGen] Refactor getMemBasePlusOffset & getObjectPtrOffset to accept a TypeSize 2020-08-11 12:17:10 +01:00
LegalizeVectorOps.cpp [Intrinsic] Add sshl.sat/ushl.sat, saturated shift intrinsics. 2020-08-07 15:09:24 +02:00
LegalizeVectorTypes.cpp [CodeGen] Fix bug in IncrementPointer 2020-09-14 08:03:55 +01:00
ResourcePriorityQueue.cpp ResourcePriorityQueue.h - reduce unnecessary includes to forward declarations. NFC. 2020-05-26 19:22:14 +01:00
SDNodeDbgValue.h
ScheduleDAGFast.cpp DAG: Use Register 2020-04-08 13:44:31 -04:00
ScheduleDAGRRList.cpp [ScheduleDAGRRList] Pacify overload mismatch in std::min. 2020-07-23 11:56:50 +01:00
ScheduleDAGSDNodes.cpp [Statepoints] Support lowering gc relocations to virtual registers 2020-07-25 14:26:05 -07:00
ScheduleDAGSDNodes.h DAG: Use Register 2020-04-08 13:44:31 -04:00
ScheduleDAGVLIW.cpp Prune Analysis includes from SelectionDAG.h 2019-10-19 01:07:48 +00:00
SelectionDAG.cpp [SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore. 2020-09-14 13:54:50 -07:00
SelectionDAGAddressAnalysis.cpp Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each 2019-10-19 01:31:09 +00:00
SelectionDAGBuilder.cpp SelectionDAGBuilder.h - remove unnecessary includes. NFCI. 2020-09-15 12:18:22 +01:00
SelectionDAGBuilder.h SelectionDAGBuilder.h - remove unnecessary includes. NFCI. 2020-09-15 12:18:22 +01:00
SelectionDAGDumper.cpp [SelectionDAG][X86][ARM][AArch64] Add ISD opcode for __builtin_parity. Expand it to shifts and xors. 2020-09-12 11:42:18 -07:00
SelectionDAGISel.cpp SelectionDAGBuilder.h - remove unnecessary includes. NFCI. 2020-09-15 12:18:22 +01:00
SelectionDAGPrinter.cpp Utility to dump .dot representation of SelectionDAG without firing viewer 2020-06-04 11:51:48 +05:30
SelectionDAGTargetInfo.cpp
StatepointLowering.cpp StatepointLowering.cpp - remove unnecessary includes. NFCI. 2020-09-15 12:18:23 +01:00
StatepointLowering.h [Statepoint] Consolidate relocation type tracking [NFC] 2020-07-29 11:45:31 -07:00
TargetLowering.cpp Revert "[SelectionDAG] Remove unused FP constant in getNegatedExpression" 2020-09-15 22:03:50 +08:00