llvm-project/llvm/test/Transforms/SLPVectorizer/AArch64
Suyog Sarda 43fae93da8 Revert 224119 "This patch recognizes (+ (+ v0, v1) (+ v2, v3)), reorders them for bundling into vector of loads,
and vectorizes it." 

This was re-ordering floating point data types resulting in mismatch in output.

llvm-svn: 224424
2014-12-17 10:34:27 +00:00
..
commute.ll Preserve IR flags (nsw, nuw, exact, fast-math) in SLP vectorizer (PR20802). 2014-09-03 17:40:30 +00:00
lit.local.cfg
load-store-q.ll Teach the SLP Vectorizer that keeping some values live over a callsite can have a cost. 2014-08-05 12:30:34 +00:00
mismatched-intrinsics.ll
sdiv-pow2.ll [AArch64] Improve cost model to handle sdiv by a pow-of-two. 2014-09-29 13:59:31 +00:00