forked from OSchip/llvm-project
175 lines
8.5 KiB
LLVM
175 lines
8.5 KiB
LLVM
; RUN: opt %loadPolly -polly-scops -analyze -polly-allow-modref-calls \
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; RUN: < %s | FileCheck %s
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; RUN: opt %loadPolly -polly-scops -polly-allow-nonaffine \
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; RUN: -polly-allow-modref-calls -analyze < %s | FileCheck %s --check-prefix=NONAFFINE
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; TODO: We should delinearize the accesses despite the use in a call to a
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; readonly function. For now we verify we do not delinearize them though.
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; CHECK: Function: ham
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; CHECK-NEXT: Region: %bb12---%bb28
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; CHECK-NEXT: Max Loop Depth: 1
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; CHECK-NEXT: Invariant Accesses: {
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; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb12[] -> MemRef_arg1[0] };
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; CHECK-NEXT: Execution Context: [tmp14, p_1] -> { : }
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; CHECK-NEXT: }
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; CHECK-NEXT: Context:
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; CHECK-NEXT: [tmp14, p_1] -> { : -9223372036854775808 <= tmp14 <= 9223372036854775807 and -9223372036854775808 <= p_1 <= 9223372036854775807 }
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; CHECK-NEXT: Assumed Context:
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; CHECK-NEXT: [tmp14, p_1] -> { : }
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; CHECK-NEXT: Invalid Context:
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; CHECK-NEXT: [tmp14, p_1] -> { : tmp14 > 0 and (p_1 <= -1152921504606846977 or tmp14 >= 1152921504606846977 or p_1 >= 1152921504606846977 - tmp14) }
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; CHECK-NEXT: p0: %tmp14
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; CHECK-NEXT: p1: {0,+,(0 smax %tmp)}<%bb12>
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; CHECK-NEXT: Arrays {
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; CHECK-NEXT: i64 MemRef_tmp13; // Element size 8
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; CHECK-NEXT: i64 MemRef_arg1[*]; // Element size 8
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; CHECK-NEXT: [1000 x double]* MemRef_arg4[*]; // Element size 8
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; CHECK-NEXT: }
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; CHECK-NEXT: Arrays (Bounds as pw_affs) {
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; CHECK-NEXT: i64 MemRef_tmp13; // Element size 8
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; CHECK-NEXT: i64 MemRef_arg1[*]; // Element size 8
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; CHECK-NEXT: [1000 x double]* MemRef_arg4[*]; // Element size 8
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; CHECK-NEXT: }
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; CHECK-NEXT: Alias Groups (0):
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; CHECK-NEXT: n/a
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; CHECK-NEXT: Statements {
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; CHECK-NEXT: Stmt_bb12
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb12[] };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb12[] -> [0, 0] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
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; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb12[] -> MemRef_tmp13[] };
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; CHECK-NEXT: Stmt_bb17
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb17[i0] : 0 <= i0 < tmp14 };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb17[i0] -> [1, i0] };
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; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb17[i0] -> MemRef_arg4[o0] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [tmp14, p_1] -> { Stmt_bb17[i0] -> MemRef_arg4[p_1 + i0] };
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; CHECK-NEXT: }
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; NONAFFINE: Function: ham
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; NONAFFINE-NEXT: Region: %bb5---%bb32
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; NONAFFINE-NEXT: Max Loop Depth: 2
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; NONAFFINE-NEXT: Invariant Accesses: {
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; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb5[] -> MemRef_arg[0] };
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; NONAFFINE-NEXT: Execution Context: [tmp9, tmp14] -> { : }
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; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb12[i0] -> MemRef_arg1[0] };
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; NONAFFINE-NEXT: Execution Context: [tmp9, tmp14] -> { : }
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; NONAFFINE-NEXT: }
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; NONAFFINE-NEXT: Context:
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; NONAFFINE-NEXT: [tmp9, tmp14] -> { : -9223372036854775808 <= tmp9 <= 9223372036854775807 and -9223372036854775808 <= tmp14 <= 9223372036854775807 }
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; NONAFFINE-NEXT: Assumed Context:
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; NONAFFINE-NEXT: [tmp9, tmp14] -> { : }
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; NONAFFINE-NEXT: Invalid Context:
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; NONAFFINE-NEXT: [tmp9, tmp14] -> { : 1 = 0 }
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; NONAFFINE-NEXT: p0: %tmp9
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; NONAFFINE-NEXT: p1: %tmp14
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; NONAFFINE-NEXT: Arrays {
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; NONAFFINE-NEXT: i64 MemRef_arg1[*]; // Element size 8
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; NONAFFINE-NEXT: i64 MemRef_arg[*]; // Element size 8
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; NONAFFINE-NEXT: i64 MemRef_tmp7; // Element size 8
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; NONAFFINE-NEXT: i64 MemRef_tmp8; // Element size 8
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; NONAFFINE-NEXT: [1000 x double]* MemRef_arg4[*]; // Element size 8
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; NONAFFINE-NEXT: }
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; NONAFFINE-NEXT: Arrays (Bounds as pw_affs) {
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; NONAFFINE-NEXT: i64 MemRef_arg1[*]; // Element size 8
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; NONAFFINE-NEXT: i64 MemRef_arg[*]; // Element size 8
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; NONAFFINE-NEXT: i64 MemRef_tmp7; // Element size 8
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; NONAFFINE-NEXT: i64 MemRef_tmp8; // Element size 8
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; NONAFFINE-NEXT: [1000 x double]* MemRef_arg4[*]; // Element size 8
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; NONAFFINE-NEXT: }
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; NONAFFINE-NEXT: Alias Groups (0):
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; NONAFFINE-NEXT: n/a
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; NONAFFINE-NEXT: Statements {
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; NONAFFINE-NEXT: Stmt_bb5
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; NONAFFINE-NEXT: Domain :=
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; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb5[] };
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; NONAFFINE-NEXT: Schedule :=
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; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb5[] -> [0, 0, 0] };
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; NONAFFINE-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
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; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb5[] -> MemRef_tmp7[] };
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; NONAFFINE-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
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; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb5[] -> MemRef_tmp8[] };
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; NONAFFINE-NEXT: Stmt_bb17
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; NONAFFINE-NEXT: Domain :=
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; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] : 0 <= i0 < tmp9 and 0 <= i1 < tmp14 };
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; NONAFFINE-NEXT: Schedule :=
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; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> [1, i0, i1] };
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; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
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; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_tmp7[] };
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; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
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; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_tmp8[] };
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; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_arg4[o0] };
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; NONAFFINE-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; NONAFFINE-NEXT: [tmp9, tmp14] -> { Stmt_bb17[i0, i1] -> MemRef_arg4[o0] : -1152921504606846976 <= o0 <= 1152921504606846975 };
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; NONAFFINE-NEXT: }
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target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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define void @ham(i64* noalias %arg, i64* noalias %arg1, i64* noalias %arg2, i64* noalias %arg3, [1000 x double]* noalias %arg4) gc "dummy" {
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bb:
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br label %bb5
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bb5: ; preds = %bb
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%tmp = load i64, i64* %arg1, align 8
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%tmp6 = icmp slt i64 %tmp, 0
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%tmp7 = select i1 %tmp6, i64 0, i64 %tmp
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%tmp8 = xor i64 %tmp7, -1
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%tmp9 = load i64, i64* %arg, align 8
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%tmp10 = icmp sgt i64 %tmp9, 0
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br i1 %tmp10, label %bb11, label %bb32
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bb11: ; preds = %bb5
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br label %bb12
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bb12: ; preds = %bb28, %bb11
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%tmp13 = phi i64 [ %tmp30, %bb28 ], [ 1, %bb11 ]
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%tmp14 = load i64, i64* %arg1, align 8
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%tmp15 = icmp sgt i64 %tmp14, 0
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br i1 %tmp15, label %bb16, label %bb28
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bb16: ; preds = %bb12
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br label %bb17
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bb17: ; preds = %bb17, %bb16
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%tmp18 = phi i64 [ %tmp26, %bb17 ], [ 1, %bb16 ]
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%tmp19 = mul i64 %tmp13, %tmp7
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%tmp20 = add i64 %tmp19, %tmp8
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%tmp21 = add i64 %tmp20, %tmp18
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%tmp22 = add i64 %tmp18, %tmp13
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%tmp23 = sitofp i64 %tmp22 to double
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%tmp24 = getelementptr [1000 x double], [1000 x double]* %arg4, i64 0, i64 %tmp21
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%bc = bitcast double* %tmp24 to i8*
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%dummy = call i8* @llvm.gcread(i8* %bc, i8** null)
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store double %tmp23, double* %tmp24, align 8
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%tmp25 = icmp eq i64 %tmp18, %tmp14
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%tmp26 = add i64 %tmp18, 1
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br i1 %tmp25, label %bb27, label %bb17
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bb27: ; preds = %bb17
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br label %bb28
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bb28: ; preds = %bb27, %bb12
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%tmp29 = icmp eq i64 %tmp13, %tmp9
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%tmp30 = add i64 %tmp13, 1
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br i1 %tmp29, label %bb31, label %bb12
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bb31: ; preds = %bb28
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br label %bb32
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bb32: ; preds = %bb31, %bb5
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ret void
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}
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declare i8* @llvm.gcread(i8*, i8**)
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