forked from OSchip/llvm-project
42 lines
1.6 KiB
LLVM
42 lines
1.6 KiB
LLVM
; RUN: opt -S < %s -loop-unroll -unroll-count=4 -disable-iv-rewrite | FileCheck %s
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;
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; Test induction variable simplify after loop unrolling. It should
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; expose nice opportunities for GVN.
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;
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; CHECK-NOT: while.body also ensures that loop unrolling (with SCEV)
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; removes unrolled loop exits given that 128 is a multiple of 4.
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
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; PR10534: LoopUnroll not keeping canonical induction variable...
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; CHECK: while.body:
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; CHECK-NOT: while.body.1:
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; CHECK: %shr.1 = lshr i32 %bit_addr.addr.01, 5
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; CHECK: %arrayidx.1 = getelementptr inbounds i32* %bitmap, i32 %shr.1
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; CHECK: %shr.2 = lshr i32 %bit_addr.addr.01, 5
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; CHECK: %arrayidx.2 = getelementptr inbounds i32* %bitmap, i32 %shr.2
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; CHECK: %shr.3 = lshr i32 %bit_addr.addr.01, 5
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; CHECK: %arrayidx.3 = getelementptr inbounds i32* %bitmap, i32 %shr.3
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define void @FlipBit(i32* nocapture %bitmap, i32 %bit_addr, i32 %nbits) nounwind {
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entry:
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br label %while.body
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while.body:
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%nbits.addr.02 = phi i32 [ 128, %entry ], [ %dec, %while.body ]
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%bit_addr.addr.01 = phi i32 [ 0, %entry ], [ %inc, %while.body ]
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%dec = add i32 %nbits.addr.02, -1
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%shr = lshr i32 %bit_addr.addr.01, 5
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%rem = and i32 %bit_addr.addr.01, 31
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%shl = shl i32 1, %rem
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%arrayidx = getelementptr inbounds i32* %bitmap, i32 %shr
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%tmp6 = load i32* %arrayidx, align 4
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%xor = xor i32 %tmp6, %shl
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store i32 %xor, i32* %arrayidx, align 4
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%inc = add i32 %bit_addr.addr.01, 1
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%tobool = icmp eq i32 %dec, 0
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br i1 %tobool, label %while.end, label %while.body
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while.end:
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ret void
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}
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